Commit | Line | Data |
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6b884a8d | 1 | |
5019f0b1 | 2 | #include <linux/device.h> |
6b884a8d GL |
3 | #include <linux/io.h> |
4 | #include <linux/ioport.h> | |
dbbdee94 | 5 | #include <linux/module.h> |
6b884a8d | 6 | #include <linux/of_address.h> |
dbbdee94 GL |
7 | #include <linux/pci_regs.h> |
8 | #include <linux/string.h> | |
6b884a8d | 9 | |
dbbdee94 GL |
10 | /* Max address size we deal with */ |
11 | #define OF_MAX_ADDR_CELLS 4 | |
12 | #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ | |
13 | (ns) > 0) | |
14 | ||
15 | static struct of_bus *of_match_bus(struct device_node *np); | |
0131d897 SAS |
16 | static int __of_address_to_resource(struct device_node *dev, |
17 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 18 | const char *name, struct resource *r); |
dbbdee94 GL |
19 | |
20 | /* Debug utility */ | |
21 | #ifdef DEBUG | |
0131d897 | 22 | static void of_dump_addr(const char *s, const __be32 *addr, int na) |
dbbdee94 GL |
23 | { |
24 | printk(KERN_DEBUG "%s", s); | |
25 | while (na--) | |
154063a9 | 26 | printk(" %08x", be32_to_cpu(*(addr++))); |
dbbdee94 GL |
27 | printk("\n"); |
28 | } | |
29 | #else | |
0131d897 | 30 | static void of_dump_addr(const char *s, const __be32 *addr, int na) { } |
dbbdee94 GL |
31 | #endif |
32 | ||
33 | /* Callbacks for bus specific translators */ | |
34 | struct of_bus { | |
35 | const char *name; | |
36 | const char *addresses; | |
37 | int (*match)(struct device_node *parent); | |
38 | void (*count_cells)(struct device_node *child, | |
39 | int *addrc, int *sizec); | |
0131d897 | 40 | u64 (*map)(u32 *addr, const __be32 *range, |
dbbdee94 GL |
41 | int na, int ns, int pna); |
42 | int (*translate)(u32 *addr, u64 offset, int na); | |
0131d897 | 43 | unsigned int (*get_flags)(const __be32 *addr); |
dbbdee94 GL |
44 | }; |
45 | ||
46 | /* | |
47 | * Default translator (generic bus) | |
48 | */ | |
49 | ||
50 | static void of_bus_default_count_cells(struct device_node *dev, | |
51 | int *addrc, int *sizec) | |
52 | { | |
53 | if (addrc) | |
54 | *addrc = of_n_addr_cells(dev); | |
55 | if (sizec) | |
56 | *sizec = of_n_size_cells(dev); | |
57 | } | |
58 | ||
0131d897 | 59 | static u64 of_bus_default_map(u32 *addr, const __be32 *range, |
dbbdee94 GL |
60 | int na, int ns, int pna) |
61 | { | |
62 | u64 cp, s, da; | |
63 | ||
64 | cp = of_read_number(range, na); | |
65 | s = of_read_number(range + na + pna, ns); | |
66 | da = of_read_number(addr, na); | |
67 | ||
68 | pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n", | |
69 | (unsigned long long)cp, (unsigned long long)s, | |
70 | (unsigned long long)da); | |
71 | ||
72 | if (da < cp || da >= (cp + s)) | |
73 | return OF_BAD_ADDR; | |
74 | return da - cp; | |
75 | } | |
76 | ||
77 | static int of_bus_default_translate(u32 *addr, u64 offset, int na) | |
78 | { | |
79 | u64 a = of_read_number(addr, na); | |
80 | memset(addr, 0, na * 4); | |
81 | a += offset; | |
82 | if (na > 1) | |
154063a9 GL |
83 | addr[na - 2] = cpu_to_be32(a >> 32); |
84 | addr[na - 1] = cpu_to_be32(a & 0xffffffffu); | |
dbbdee94 GL |
85 | |
86 | return 0; | |
87 | } | |
88 | ||
0131d897 | 89 | static unsigned int of_bus_default_get_flags(const __be32 *addr) |
dbbdee94 GL |
90 | { |
91 | return IORESOURCE_MEM; | |
92 | } | |
93 | ||
94 | #ifdef CONFIG_PCI | |
95 | /* | |
96 | * PCI bus specific translator | |
97 | */ | |
98 | ||
99 | static int of_bus_pci_match(struct device_node *np) | |
100 | { | |
101 | /* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */ | |
102 | return !strcmp(np->type, "pci") || !strcmp(np->type, "vci"); | |
103 | } | |
104 | ||
105 | static void of_bus_pci_count_cells(struct device_node *np, | |
106 | int *addrc, int *sizec) | |
107 | { | |
108 | if (addrc) | |
109 | *addrc = 3; | |
110 | if (sizec) | |
111 | *sizec = 2; | |
112 | } | |
113 | ||
0131d897 | 114 | static unsigned int of_bus_pci_get_flags(const __be32 *addr) |
dbbdee94 GL |
115 | { |
116 | unsigned int flags = 0; | |
0131d897 | 117 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
118 | |
119 | switch((w >> 24) & 0x03) { | |
120 | case 0x01: | |
121 | flags |= IORESOURCE_IO; | |
122 | break; | |
123 | case 0x02: /* 32 bits */ | |
124 | case 0x03: /* 64 bits */ | |
125 | flags |= IORESOURCE_MEM; | |
126 | break; | |
127 | } | |
128 | if (w & 0x40000000) | |
129 | flags |= IORESOURCE_PREFETCH; | |
130 | return flags; | |
131 | } | |
132 | ||
0131d897 SAS |
133 | static u64 of_bus_pci_map(u32 *addr, const __be32 *range, int na, int ns, |
134 | int pna) | |
dbbdee94 GL |
135 | { |
136 | u64 cp, s, da; | |
137 | unsigned int af, rf; | |
138 | ||
139 | af = of_bus_pci_get_flags(addr); | |
140 | rf = of_bus_pci_get_flags(range); | |
141 | ||
142 | /* Check address type match */ | |
143 | if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) | |
144 | return OF_BAD_ADDR; | |
145 | ||
146 | /* Read address values, skipping high cell */ | |
147 | cp = of_read_number(range + 1, na - 1); | |
148 | s = of_read_number(range + na + pna, ns); | |
149 | da = of_read_number(addr + 1, na - 1); | |
150 | ||
151 | pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n", | |
152 | (unsigned long long)cp, (unsigned long long)s, | |
153 | (unsigned long long)da); | |
154 | ||
155 | if (da < cp || da >= (cp + s)) | |
156 | return OF_BAD_ADDR; | |
157 | return da - cp; | |
158 | } | |
159 | ||
160 | static int of_bus_pci_translate(u32 *addr, u64 offset, int na) | |
161 | { | |
162 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
163 | } | |
164 | ||
0131d897 | 165 | const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, |
dbbdee94 GL |
166 | unsigned int *flags) |
167 | { | |
a9fadeef | 168 | const __be32 *prop; |
dbbdee94 GL |
169 | unsigned int psize; |
170 | struct device_node *parent; | |
171 | struct of_bus *bus; | |
172 | int onesize, i, na, ns; | |
173 | ||
174 | /* Get parent & match bus type */ | |
175 | parent = of_get_parent(dev); | |
176 | if (parent == NULL) | |
177 | return NULL; | |
178 | bus = of_match_bus(parent); | |
179 | if (strcmp(bus->name, "pci")) { | |
180 | of_node_put(parent); | |
181 | return NULL; | |
182 | } | |
183 | bus->count_cells(dev, &na, &ns); | |
184 | of_node_put(parent); | |
185 | if (!OF_CHECK_COUNTS(na, ns)) | |
186 | return NULL; | |
187 | ||
188 | /* Get "reg" or "assigned-addresses" property */ | |
189 | prop = of_get_property(dev, bus->addresses, &psize); | |
190 | if (prop == NULL) | |
191 | return NULL; | |
192 | psize /= 4; | |
193 | ||
194 | onesize = na + ns; | |
154063a9 GL |
195 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { |
196 | u32 val = be32_to_cpu(prop[0]); | |
197 | if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { | |
dbbdee94 GL |
198 | if (size) |
199 | *size = of_read_number(prop + na, ns); | |
200 | if (flags) | |
201 | *flags = bus->get_flags(prop); | |
202 | return prop; | |
203 | } | |
154063a9 | 204 | } |
dbbdee94 GL |
205 | return NULL; |
206 | } | |
207 | EXPORT_SYMBOL(of_get_pci_address); | |
208 | ||
209 | int of_pci_address_to_resource(struct device_node *dev, int bar, | |
210 | struct resource *r) | |
211 | { | |
0131d897 | 212 | const __be32 *addrp; |
dbbdee94 GL |
213 | u64 size; |
214 | unsigned int flags; | |
215 | ||
216 | addrp = of_get_pci_address(dev, bar, &size, &flags); | |
217 | if (addrp == NULL) | |
218 | return -EINVAL; | |
35f3da32 | 219 | return __of_address_to_resource(dev, addrp, size, flags, NULL, r); |
dbbdee94 GL |
220 | } |
221 | EXPORT_SYMBOL_GPL(of_pci_address_to_resource); | |
222 | #endif /* CONFIG_PCI */ | |
223 | ||
224 | /* | |
225 | * ISA bus specific translator | |
226 | */ | |
227 | ||
228 | static int of_bus_isa_match(struct device_node *np) | |
229 | { | |
230 | return !strcmp(np->name, "isa"); | |
231 | } | |
232 | ||
233 | static void of_bus_isa_count_cells(struct device_node *child, | |
234 | int *addrc, int *sizec) | |
235 | { | |
236 | if (addrc) | |
237 | *addrc = 2; | |
238 | if (sizec) | |
239 | *sizec = 1; | |
240 | } | |
241 | ||
0131d897 SAS |
242 | static u64 of_bus_isa_map(u32 *addr, const __be32 *range, int na, int ns, |
243 | int pna) | |
dbbdee94 GL |
244 | { |
245 | u64 cp, s, da; | |
246 | ||
247 | /* Check address type match */ | |
0131d897 | 248 | if ((addr[0] ^ range[0]) & cpu_to_be32(1)) |
dbbdee94 GL |
249 | return OF_BAD_ADDR; |
250 | ||
251 | /* Read address values, skipping high cell */ | |
252 | cp = of_read_number(range + 1, na - 1); | |
253 | s = of_read_number(range + na + pna, ns); | |
254 | da = of_read_number(addr + 1, na - 1); | |
255 | ||
256 | pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", | |
257 | (unsigned long long)cp, (unsigned long long)s, | |
258 | (unsigned long long)da); | |
259 | ||
260 | if (da < cp || da >= (cp + s)) | |
261 | return OF_BAD_ADDR; | |
262 | return da - cp; | |
263 | } | |
264 | ||
265 | static int of_bus_isa_translate(u32 *addr, u64 offset, int na) | |
266 | { | |
267 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
268 | } | |
269 | ||
0131d897 | 270 | static unsigned int of_bus_isa_get_flags(const __be32 *addr) |
dbbdee94 GL |
271 | { |
272 | unsigned int flags = 0; | |
0131d897 | 273 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
274 | |
275 | if (w & 1) | |
276 | flags |= IORESOURCE_IO; | |
277 | else | |
278 | flags |= IORESOURCE_MEM; | |
279 | return flags; | |
280 | } | |
281 | ||
282 | /* | |
283 | * Array of bus specific translators | |
284 | */ | |
285 | ||
286 | static struct of_bus of_busses[] = { | |
287 | #ifdef CONFIG_PCI | |
288 | /* PCI */ | |
289 | { | |
290 | .name = "pci", | |
291 | .addresses = "assigned-addresses", | |
292 | .match = of_bus_pci_match, | |
293 | .count_cells = of_bus_pci_count_cells, | |
294 | .map = of_bus_pci_map, | |
295 | .translate = of_bus_pci_translate, | |
296 | .get_flags = of_bus_pci_get_flags, | |
297 | }, | |
298 | #endif /* CONFIG_PCI */ | |
299 | /* ISA */ | |
300 | { | |
301 | .name = "isa", | |
302 | .addresses = "reg", | |
303 | .match = of_bus_isa_match, | |
304 | .count_cells = of_bus_isa_count_cells, | |
305 | .map = of_bus_isa_map, | |
306 | .translate = of_bus_isa_translate, | |
307 | .get_flags = of_bus_isa_get_flags, | |
308 | }, | |
309 | /* Default */ | |
310 | { | |
311 | .name = "default", | |
312 | .addresses = "reg", | |
313 | .match = NULL, | |
314 | .count_cells = of_bus_default_count_cells, | |
315 | .map = of_bus_default_map, | |
316 | .translate = of_bus_default_translate, | |
317 | .get_flags = of_bus_default_get_flags, | |
318 | }, | |
319 | }; | |
320 | ||
321 | static struct of_bus *of_match_bus(struct device_node *np) | |
322 | { | |
323 | int i; | |
324 | ||
325 | for (i = 0; i < ARRAY_SIZE(of_busses); i++) | |
326 | if (!of_busses[i].match || of_busses[i].match(np)) | |
327 | return &of_busses[i]; | |
328 | BUG(); | |
329 | return NULL; | |
330 | } | |
331 | ||
332 | static int of_translate_one(struct device_node *parent, struct of_bus *bus, | |
333 | struct of_bus *pbus, u32 *addr, | |
334 | int na, int ns, int pna, const char *rprop) | |
335 | { | |
0131d897 | 336 | const __be32 *ranges; |
dbbdee94 GL |
337 | unsigned int rlen; |
338 | int rone; | |
339 | u64 offset = OF_BAD_ADDR; | |
340 | ||
341 | /* Normally, an absence of a "ranges" property means we are | |
342 | * crossing a non-translatable boundary, and thus the addresses | |
343 | * below the current not cannot be converted to CPU physical ones. | |
344 | * Unfortunately, while this is very clear in the spec, it's not | |
345 | * what Apple understood, and they do have things like /uni-n or | |
346 | * /ht nodes with no "ranges" property and a lot of perfectly | |
347 | * useable mapped devices below them. Thus we treat the absence of | |
348 | * "ranges" as equivalent to an empty "ranges" property which means | |
349 | * a 1:1 translation at that level. It's up to the caller not to try | |
350 | * to translate addresses that aren't supposed to be translated in | |
351 | * the first place. --BenH. | |
3930f294 GL |
352 | * |
353 | * As far as we know, this damage only exists on Apple machines, so | |
354 | * This code is only enabled on powerpc. --gcl | |
dbbdee94 GL |
355 | */ |
356 | ranges = of_get_property(parent, rprop, &rlen); | |
3930f294 GL |
357 | #if !defined(CONFIG_PPC) |
358 | if (ranges == NULL) { | |
359 | pr_err("OF: no ranges; cannot translate\n"); | |
360 | return 1; | |
361 | } | |
362 | #endif /* !defined(CONFIG_PPC) */ | |
dbbdee94 GL |
363 | if (ranges == NULL || rlen == 0) { |
364 | offset = of_read_number(addr, na); | |
365 | memset(addr, 0, pna * 4); | |
3930f294 | 366 | pr_debug("OF: empty ranges; 1:1 translation\n"); |
dbbdee94 GL |
367 | goto finish; |
368 | } | |
369 | ||
370 | pr_debug("OF: walking ranges...\n"); | |
371 | ||
372 | /* Now walk through the ranges */ | |
373 | rlen /= 4; | |
374 | rone = na + pna + ns; | |
375 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
376 | offset = bus->map(addr, ranges, na, ns, pna); | |
377 | if (offset != OF_BAD_ADDR) | |
378 | break; | |
379 | } | |
380 | if (offset == OF_BAD_ADDR) { | |
381 | pr_debug("OF: not found !\n"); | |
382 | return 1; | |
383 | } | |
384 | memcpy(addr, ranges + na, 4 * pna); | |
385 | ||
386 | finish: | |
387 | of_dump_addr("OF: parent translation for:", addr, pna); | |
388 | pr_debug("OF: with offset: %llx\n", (unsigned long long)offset); | |
389 | ||
390 | /* Translate it into parent bus space */ | |
391 | return pbus->translate(addr, offset, pna); | |
392 | } | |
393 | ||
394 | /* | |
395 | * Translate an address from the device-tree into a CPU physical address, | |
396 | * this walks up the tree and applies the various bus mappings on the | |
397 | * way. | |
398 | * | |
399 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
400 | * that translation is impossible (that is we are not dealing with a value | |
401 | * that can be mapped to a cpu physical address). This is not really specified | |
402 | * that way, but this is traditionally the way IBM at least do things | |
403 | */ | |
0131d897 | 404 | u64 __of_translate_address(struct device_node *dev, const __be32 *in_addr, |
dbbdee94 GL |
405 | const char *rprop) |
406 | { | |
407 | struct device_node *parent = NULL; | |
408 | struct of_bus *bus, *pbus; | |
409 | u32 addr[OF_MAX_ADDR_CELLS]; | |
410 | int na, ns, pna, pns; | |
411 | u64 result = OF_BAD_ADDR; | |
412 | ||
413 | pr_debug("OF: ** translation for device %s **\n", dev->full_name); | |
414 | ||
415 | /* Increase refcount at current level */ | |
416 | of_node_get(dev); | |
417 | ||
418 | /* Get parent & match bus type */ | |
419 | parent = of_get_parent(dev); | |
420 | if (parent == NULL) | |
421 | goto bail; | |
422 | bus = of_match_bus(parent); | |
423 | ||
424 | /* Cound address cells & copy address locally */ | |
425 | bus->count_cells(dev, &na, &ns); | |
426 | if (!OF_CHECK_COUNTS(na, ns)) { | |
427 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
428 | dev->full_name); | |
429 | goto bail; | |
430 | } | |
431 | memcpy(addr, in_addr, na * 4); | |
432 | ||
433 | pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n", | |
434 | bus->name, na, ns, parent->full_name); | |
435 | of_dump_addr("OF: translating address:", addr, na); | |
436 | ||
437 | /* Translate */ | |
438 | for (;;) { | |
439 | /* Switch to parent bus */ | |
440 | of_node_put(dev); | |
441 | dev = parent; | |
442 | parent = of_get_parent(dev); | |
443 | ||
444 | /* If root, we have finished */ | |
445 | if (parent == NULL) { | |
446 | pr_debug("OF: reached root node\n"); | |
447 | result = of_read_number(addr, na); | |
448 | break; | |
449 | } | |
450 | ||
451 | /* Get new parent bus and counts */ | |
452 | pbus = of_match_bus(parent); | |
453 | pbus->count_cells(dev, &pna, &pns); | |
454 | if (!OF_CHECK_COUNTS(pna, pns)) { | |
455 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
456 | dev->full_name); | |
457 | break; | |
458 | } | |
459 | ||
460 | pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", | |
461 | pbus->name, pna, pns, parent->full_name); | |
462 | ||
463 | /* Apply bus translation */ | |
464 | if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) | |
465 | break; | |
466 | ||
467 | /* Complete the move up one level */ | |
468 | na = pna; | |
469 | ns = pns; | |
470 | bus = pbus; | |
471 | ||
472 | of_dump_addr("OF: one level translation:", addr, na); | |
473 | } | |
474 | bail: | |
475 | of_node_put(parent); | |
476 | of_node_put(dev); | |
477 | ||
478 | return result; | |
479 | } | |
480 | ||
0131d897 | 481 | u64 of_translate_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 GL |
482 | { |
483 | return __of_translate_address(dev, in_addr, "ranges"); | |
484 | } | |
485 | EXPORT_SYMBOL(of_translate_address); | |
486 | ||
0131d897 | 487 | u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 GL |
488 | { |
489 | return __of_translate_address(dev, in_addr, "dma-ranges"); | |
490 | } | |
491 | EXPORT_SYMBOL(of_translate_dma_address); | |
492 | ||
0131d897 | 493 | const __be32 *of_get_address(struct device_node *dev, int index, u64 *size, |
dbbdee94 GL |
494 | unsigned int *flags) |
495 | { | |
0131d897 | 496 | const __be32 *prop; |
dbbdee94 GL |
497 | unsigned int psize; |
498 | struct device_node *parent; | |
499 | struct of_bus *bus; | |
500 | int onesize, i, na, ns; | |
501 | ||
502 | /* Get parent & match bus type */ | |
503 | parent = of_get_parent(dev); | |
504 | if (parent == NULL) | |
505 | return NULL; | |
506 | bus = of_match_bus(parent); | |
507 | bus->count_cells(dev, &na, &ns); | |
508 | of_node_put(parent); | |
509 | if (!OF_CHECK_COUNTS(na, ns)) | |
510 | return NULL; | |
511 | ||
512 | /* Get "reg" or "assigned-addresses" property */ | |
513 | prop = of_get_property(dev, bus->addresses, &psize); | |
514 | if (prop == NULL) | |
515 | return NULL; | |
516 | psize /= 4; | |
517 | ||
518 | onesize = na + ns; | |
519 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) | |
520 | if (i == index) { | |
521 | if (size) | |
522 | *size = of_read_number(prop + na, ns); | |
523 | if (flags) | |
524 | *flags = bus->get_flags(prop); | |
525 | return prop; | |
526 | } | |
527 | return NULL; | |
528 | } | |
529 | EXPORT_SYMBOL(of_get_address); | |
530 | ||
0131d897 SAS |
531 | static int __of_address_to_resource(struct device_node *dev, |
532 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 533 | const char *name, struct resource *r) |
1f5bef30 GL |
534 | { |
535 | u64 taddr; | |
536 | ||
537 | if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) | |
538 | return -EINVAL; | |
539 | taddr = of_translate_address(dev, addrp); | |
540 | if (taddr == OF_BAD_ADDR) | |
541 | return -EINVAL; | |
542 | memset(r, 0, sizeof(struct resource)); | |
543 | if (flags & IORESOURCE_IO) { | |
544 | unsigned long port; | |
545 | port = pci_address_to_pio(taddr); | |
546 | if (port == (unsigned long)-1) | |
547 | return -EINVAL; | |
548 | r->start = port; | |
549 | r->end = port + size - 1; | |
550 | } else { | |
551 | r->start = taddr; | |
552 | r->end = taddr + size - 1; | |
553 | } | |
554 | r->flags = flags; | |
35f3da32 BC |
555 | r->name = name ? name : dev->full_name; |
556 | ||
1f5bef30 GL |
557 | return 0; |
558 | } | |
559 | ||
560 | /** | |
561 | * of_address_to_resource - Translate device tree address and return as resource | |
562 | * | |
563 | * Note that if your address is a PIO address, the conversion will fail if | |
564 | * the physical address can't be internally converted to an IO token with | |
565 | * pci_address_to_pio(), that is because it's either called to early or it | |
566 | * can't be matched to any host bridge IO space | |
567 | */ | |
568 | int of_address_to_resource(struct device_node *dev, int index, | |
569 | struct resource *r) | |
570 | { | |
0131d897 | 571 | const __be32 *addrp; |
1f5bef30 GL |
572 | u64 size; |
573 | unsigned int flags; | |
35f3da32 | 574 | const char *name = NULL; |
1f5bef30 GL |
575 | |
576 | addrp = of_get_address(dev, index, &size, &flags); | |
577 | if (addrp == NULL) | |
578 | return -EINVAL; | |
35f3da32 BC |
579 | |
580 | /* Get optional "reg-names" property to add a name to a resource */ | |
581 | of_property_read_string_index(dev, "reg-names", index, &name); | |
582 | ||
583 | return __of_address_to_resource(dev, addrp, size, flags, name, r); | |
1f5bef30 GL |
584 | } |
585 | EXPORT_SYMBOL_GPL(of_address_to_resource); | |
586 | ||
90e33f62 GL |
587 | struct device_node *of_find_matching_node_by_address(struct device_node *from, |
588 | const struct of_device_id *matches, | |
589 | u64 base_address) | |
590 | { | |
591 | struct device_node *dn = of_find_matching_node(from, matches); | |
592 | struct resource res; | |
593 | ||
594 | while (dn) { | |
595 | if (of_address_to_resource(dn, 0, &res)) | |
596 | continue; | |
597 | if (res.start == base_address) | |
598 | return dn; | |
599 | dn = of_find_matching_node(dn, matches); | |
600 | } | |
601 | ||
602 | return NULL; | |
603 | } | |
604 | ||
1f5bef30 | 605 | |
6b884a8d GL |
606 | /** |
607 | * of_iomap - Maps the memory mapped IO for a given device_node | |
608 | * @device: the device whose io range will be mapped | |
609 | * @index: index of the io range | |
610 | * | |
611 | * Returns a pointer to the mapped memory | |
612 | */ | |
613 | void __iomem *of_iomap(struct device_node *np, int index) | |
614 | { | |
615 | struct resource res; | |
616 | ||
617 | if (of_address_to_resource(np, index, &res)) | |
618 | return NULL; | |
619 | ||
28c1b6d6 | 620 | return ioremap(res.start, resource_size(&res)); |
6b884a8d GL |
621 | } |
622 | EXPORT_SYMBOL(of_iomap); |