[linux-2.6-block.git] / drivers / nvmem / sunxi_sid.c

/*
 * Allwinner sunXi SoCs Security ID support.
 *
 * Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/device.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/nvmem-provider.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/random.h>

/* Registers and special values for doing register-based SID readout on H3 */
#define SUN8I_SID_PRCTL		0x40
#define SUN8I_SID_RDKEY		0x60

#define SUN8I_SID_OFFSET_MASK	0x1FF
#define SUN8I_SID_OFFSET_SHIFT	16
#define SUN8I_SID_OP_LOCK	(0xAC << 8)
#define SUN8I_SID_READ		BIT(1)

static struct nvmem_config econfig = {
	.name = "sunxi-sid",
	.read_only = true,
	.stride = 4,
	.word_size = 1,
};

struct sunxi_sid_cfg {
	u32	value_offset;
	u32	size;
	bool	need_register_readout;
};

struct sunxi_sid {
	void __iomem		*base;
	u32			value_offset;
};

/* We read the entire key, due to a 32 bit read alignment requirement. Since we
 * want to return the requested byte, this results in somewhat slower code and
 * uses 4 times more reads as needed but keeps code simpler. Since the SID is
 * only very rarely probed, this is not really an issue.
 */
static u8 sunxi_sid_read_byte(const struct sunxi_sid *sid,
			      const unsigned int offset)
{
	u32 sid_key;

	sid_key = ioread32be(sid->base + round_down(offset, 4));
	sid_key >>= (offset % 4) * 8;

	return sid_key; /* Only return the last byte */
}

static int sunxi_sid_read(void *context, unsigned int offset,
			  void *val, size_t bytes)
{
	struct sunxi_sid *sid = context;
	u8 *buf = val;

	/* Offset the read operation to the real position of SID */
	offset += sid->value_offset;

	while (bytes--)
		*buf++ = sunxi_sid_read_byte(sid, offset++);

	return 0;
}

static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
				      const unsigned int offset,
				      u32 *out)
{
	u32 reg_val;
	int ret;

	/* Set word, lock access, and set read command */
	reg_val = (offset & SUN8I_SID_OFFSET_MASK)
		  << SUN8I_SID_OFFSET_SHIFT;
	reg_val |= SUN8I_SID_OP_LOCK | SUN8I_SID_READ;
	writel(reg_val, sid->base + SUN8I_SID_PRCTL);

	ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
				 !(reg_val & SUN8I_SID_READ), 100, 250000);
	if (ret)
		return ret;

	if (out)
		*out = readl(sid->base + SUN8I_SID_RDKEY);

	writel(0, sid->base + SUN8I_SID_PRCTL);

	return 0;
}

/*
 * On Allwinner H3, the value on the 0x200 offset of the SID controller seems
 * to be not reliable at all.
 * Read by the registers instead.
 */
static int sun8i_sid_read_byte_by_reg(const struct sunxi_sid *sid,
				      const unsigned int offset,
				      u8 *out)
{
	u32 word;
	int ret;

	ret = sun8i_sid_register_readout(sid, offset & ~0x03, &word);

	if (ret)
		return ret;

	*out = (word >> ((offset & 0x3) * 8)) & 0xff;

	return 0;
}

static int sun8i_sid_read_by_reg(void *context, unsigned int offset,
				 void *val, size_t bytes)
{
	struct sunxi_sid *sid = context;
	u8 *buf = val;
	int ret;

	while (bytes--) {
		ret = sun8i_sid_read_byte_by_reg(sid, offset++, buf++);
		if (ret)
			return ret;
	}

	return 0;
}

static int sunxi_sid_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct resource *res;
	struct nvmem_device *nvmem;
	struct sunxi_sid *sid;
	int ret, i, size;
	char *randomness;
	const struct sunxi_sid_cfg *cfg;

	sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
	if (!sid)
		return -ENOMEM;

	cfg = of_device_get_match_data(dev);
	if (!cfg)
		return -EINVAL;
	sid->value_offset = cfg->value_offset;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	sid->base = devm_ioremap_resource(dev, res);
	if (IS_ERR(sid->base))
		return PTR_ERR(sid->base);

	size = cfg->size;

	econfig.size = size;
	econfig.dev = dev;
	if (cfg->need_register_readout)
		econfig.reg_read = sun8i_sid_read_by_reg;
	else
		econfig.reg_read = sunxi_sid_read;
	econfig.priv = sid;
	nvmem = nvmem_register(&econfig);
	if (IS_ERR(nvmem))
		return PTR_ERR(nvmem);

	randomness = kzalloc(size, GFP_KERNEL);
	if (!randomness) {
		ret = -EINVAL;
		goto err_unreg_nvmem;
	}

	for (i = 0; i < size; i++)
		econfig.reg_read(sid, i, &randomness[i], 1);

	add_device_randomness(randomness, size);
	kfree(randomness);

	platform_set_drvdata(pdev, nvmem);

	return 0;

err_unreg_nvmem:
	nvmem_unregister(nvmem);
	return ret;
}

static int sunxi_sid_remove(struct platform_device *pdev)
{
	struct nvmem_device *nvmem = platform_get_drvdata(pdev);

	return nvmem_unregister(nvmem);
}

static const struct sunxi_sid_cfg sun4i_a10_cfg = {
	.size = 0x10,
};

static const struct sunxi_sid_cfg sun7i_a20_cfg = {
	.size = 0x200,
};

static const struct sunxi_sid_cfg sun8i_h3_cfg = {
	.value_offset = 0x200,
	.size = 0x100,
	.need_register_readout = true,
};

static const struct sunxi_sid_cfg sun50i_a64_cfg = {
	.value_offset = 0x200,
	.size = 0x100,
};

static const struct of_device_id sunxi_sid_of_match[] = {
	{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
	{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
	{ .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
	{ .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
	{/* sentinel */},
};
MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);

static struct platform_driver sunxi_sid_driver = {
	.probe = sunxi_sid_probe,
	.remove = sunxi_sid_remove,
	.driver = {
		.name = "eeprom-sunxi-sid",
		.of_match_table = sunxi_sid_of_match,
	},
};
module_platform_driver(sunxi_sid_driver);

MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
MODULE_DESCRIPTION("Allwinner sunxi security id driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
3d0b16a6 MR	1	/*
	2	* Allwinner sunXi SoCs Security ID support.
	3	*
	4	* Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
	5	* Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
3d0b16a6 MR	16	*/
3d0b16a6 MR	17
3d0b16a6 MR	18	#include <linux/device.h>
3d0b16a6 MR	19	#include <linux/io.h>
1a963642	20	#include <linux/iopoll.h>
3d0b16a6 MR	21	#include <linux/module.h>
	22	#include <linux/nvmem-provider.h>
	23	#include <linux/of.h>
4a72cda5	24	#include <linux/of_device.h>
3d0b16a6	25	#include <linux/platform_device.h>
3d0b16a6 MR	26	#include <linux/slab.h>
	27	#include <linux/random.h>
	28
1a963642 IZ	29	/* Registers and special values for doing register-based SID readout on H3 */
	30	#define SUN8I_SID_PRCTL 0x40
	31	#define SUN8I_SID_RDKEY 0x60
	32
	33	#define SUN8I_SID_OFFSET_MASK 0x1FF
	34	#define SUN8I_SID_OFFSET_SHIFT 16
	35	#define SUN8I_SID_OP_LOCK (0xAC << 8)
	36	#define SUN8I_SID_READ BIT(1)
	37
3d0b16a6 MR	38	static struct nvmem_config econfig = {
	39	.name = "sunxi-sid",
	40	.read_only = true,
9c7b16eb SK	41	.stride = 4,
9c7b16eb SK	42	.word_size = 1,
3d0b16a6 MR	43	};
3d0b16a6 MR	44
4a72cda5	45	struct sunxi_sid_cfg {
1a963642	46	u32 value_offset;
4a72cda5	47	u32 size;
1a963642	48	bool need_register_readout;
4a72cda5 IZ	49	};
4a72cda5 IZ	50
3d0b16a6 MR	51	struct sunxi_sid {
3d0b16a6 MR	52	void __iomem *base;
1a963642	53	u32 value_offset;
3d0b16a6 MR	54	};
	55
	56	/* We read the entire key, due to a 32 bit read alignment requirement. Since we
	57	* want to return the requested byte, this results in somewhat slower code and
	58	* uses 4 times more reads as needed but keeps code simpler. Since the SID is
	59	* only very rarely probed, this is not really an issue.
	60	*/
	61	static u8 sunxi_sid_read_byte(const struct sunxi_sid *sid,
	62	const unsigned int offset)
	63	{
	64	u32 sid_key;
	65
	66	sid_key = ioread32be(sid->base + round_down(offset, 4));
	67	sid_key >>= (offset % 4) * 8;
	68
	69	return sid_key; /* Only return the last byte */
	70	}
	71
9c7b16eb SK	72	static int sunxi_sid_read(void *context, unsigned int offset,
9c7b16eb SK	73	void *val, size_t bytes)
3d0b16a6 MR	74	{
3d0b16a6 MR	75	struct sunxi_sid *sid = context;
3d0b16a6 MR	76	u8 *buf = val;
3d0b16a6 MR	77
1a963642 IZ	78	/* Offset the read operation to the real position of SID */
	79	offset += sid->value_offset;
	80
9c7b16eb SK	81	while (bytes--)
9c7b16eb SK	82	*buf++ = sunxi_sid_read_byte(sid, offset++);
3d0b16a6 MR	83
	84	return 0;
	85	}
	86
1a963642	87	static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
0ab09d65 IZ	88	const unsigned int offset,
0ab09d65 IZ	89	u32 *out)
1a963642 IZ	90	{
	91	u32 reg_val;
	92	int ret;
	93
	94	/* Set word, lock access, and set read command */
0ab09d65	95	reg_val = (offset & SUN8I_SID_OFFSET_MASK)
1a963642 IZ	96	<< SUN8I_SID_OFFSET_SHIFT;
	97	reg_val \|= SUN8I_SID_OP_LOCK \| SUN8I_SID_READ;
	98	writel(reg_val, sid->base + SUN8I_SID_PRCTL);
	99
	100	ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
	101	!(reg_val & SUN8I_SID_READ), 100, 250000);
	102	if (ret)
	103	return ret;
	104
0ab09d65 IZ	105	if (out)
	106	*out = readl(sid->base + SUN8I_SID_RDKEY);
	107
1a963642	108	writel(0, sid->base + SUN8I_SID_PRCTL);
0ab09d65 IZ	109
	110	return 0;
	111	}
	112
	113	/*
	114	* On Allwinner H3, the value on the 0x200 offset of the SID controller seems
	115	* to be not reliable at all.
	116	* Read by the registers instead.
	117	*/
	118	static int sun8i_sid_read_byte_by_reg(const struct sunxi_sid *sid,
	119	const unsigned int offset,
	120	u8 *out)
	121	{
	122	u32 word;
	123	int ret;
	124
	125	ret = sun8i_sid_register_readout(sid, offset & ~0x03, &word);
	126
	127	if (ret)
	128	return ret;
	129
	130	out = (word >> ((offset & 0x3) 8)) & 0xff;
	131
	132	return 0;
	133	}
	134
	135	static int sun8i_sid_read_by_reg(void *context, unsigned int offset,
	136	void *val, size_t bytes)
	137	{
	138	struct sunxi_sid *sid = context;
	139	u8 *buf = val;
	140	int ret;
	141
	142	while (bytes--) {
	143	ret = sun8i_sid_read_byte_by_reg(sid, offset++, buf++);
	144	if (ret)
	145	return ret;
	146	}
	147
1a963642 IZ	148	return 0;
	149	}
	150
3d0b16a6 MR	151	static int sunxi_sid_probe(struct platform_device *pdev)
	152	{
	153	struct device *dev = &pdev->dev;
	154	struct resource *res;
	155	struct nvmem_device *nvmem;
3d0b16a6	156	struct sunxi_sid *sid;
fb727077	157	int ret, i, size;
3d0b16a6	158	char *randomness;
4a72cda5	159	const struct sunxi_sid_cfg *cfg;
3d0b16a6 MR	160
	161	sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
	162	if (!sid)
	163	return -ENOMEM;
	164
4a72cda5 IZ	165	cfg = of_device_get_match_data(dev);
	166	if (!cfg)
	167	return -EINVAL;
1a963642	168	sid->value_offset = cfg->value_offset;
4a72cda5	169
3d0b16a6 MR	170	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	171	sid->base = devm_ioremap_resource(dev, res);
	172	if (IS_ERR(sid->base))
	173	return PTR_ERR(sid->base);
	174
4a72cda5 IZ	175	size = cfg->size;
	176
	177	econfig.size = size;
3d0b16a6	178	econfig.dev = dev;
0ab09d65 IZ	179	if (cfg->need_register_readout)
	180	econfig.reg_read = sun8i_sid_read_by_reg;
	181	else
	182	econfig.reg_read = sunxi_sid_read;
9c7b16eb	183	econfig.priv = sid;
3d0b16a6 MR	184	nvmem = nvmem_register(&econfig);
	185	if (IS_ERR(nvmem))
	186	return PTR_ERR(nvmem);
	187
6396bb22	188	randomness = kzalloc(size, GFP_KERNEL);
fb727077 MR	189	if (!randomness) {
	190	ret = -EINVAL;
	191	goto err_unreg_nvmem;
	192	}
	193
3d0b16a6	194	for (i = 0; i < size; i++)
0ab09d65	195	econfig.reg_read(sid, i, &randomness[i], 1);
3d0b16a6 MR	196
	197	add_device_randomness(randomness, size);
	198	kfree(randomness);
	199
	200	platform_set_drvdata(pdev, nvmem);
	201
	202	return 0;
fb727077 MR	203
	204	err_unreg_nvmem:
	205	nvmem_unregister(nvmem);
	206	return ret;
3d0b16a6 MR	207	}
	208
	209	static int sunxi_sid_remove(struct platform_device *pdev)
	210	{
	211	struct nvmem_device *nvmem = platform_get_drvdata(pdev);
	212
	213	return nvmem_unregister(nvmem);
	214	}
	215
4a72cda5 IZ	216	static const struct sunxi_sid_cfg sun4i_a10_cfg = {
	217	.size = 0x10,
	218	};
	219
	220	static const struct sunxi_sid_cfg sun7i_a20_cfg = {
	221	.size = 0x200,
	222	};
	223
1a963642 IZ	224	static const struct sunxi_sid_cfg sun8i_h3_cfg = {
	225	.value_offset = 0x200,
	226	.size = 0x100,
	227	.need_register_readout = true,
	228	};
	229
b7fe57b8 IZ	230	static const struct sunxi_sid_cfg sun50i_a64_cfg = {
	231	.value_offset = 0x200,
	232	.size = 0x100,
	233	};
	234
3d0b16a6	235	static const struct of_device_id sunxi_sid_of_match[] = {
4a72cda5 IZ	236	{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
4a72cda5 IZ	237	{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
1a963642	238	{ .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
b7fe57b8	239	{ .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
3d0b16a6 MR	240	{/* sentinel */},
	241	};
	242	MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
	243
	244	static struct platform_driver sunxi_sid_driver = {
	245	.probe = sunxi_sid_probe,
	246	.remove = sunxi_sid_remove,
	247	.driver = {
	248	.name = "eeprom-sunxi-sid",
	249	.of_match_table = sunxi_sid_of_match,
	250	},
	251	};
	252	module_platform_driver(sunxi_sid_driver);
	253
	254	MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
	255	MODULE_DESCRIPTION("Allwinner sunxi security id driver");
	256	MODULE_LICENSE("GPL");