[linux-2.6-block.git] / drivers / nvmem / sprd-efuse.c

// SPDX-License-Identifier: GPL-2.0
// Copyright (C) 2019 Spreadtrum Communications Inc.

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/hwspinlock.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/nvmem-provider.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>

#define SPRD_EFUSE_ENABLE		0x20
#define SPRD_EFUSE_ERR_FLAG		0x24
#define SPRD_EFUSE_ERR_CLR		0x28
#define SPRD_EFUSE_MAGIC_NUM		0x2c
#define SPRD_EFUSE_FW_CFG		0x50
#define SPRD_EFUSE_PW_SWT		0x54
#define SPRD_EFUSE_MEM(val)		(0x1000 + ((val) << 2))

#define SPRD_EFUSE_VDD_EN		BIT(0)
#define SPRD_EFUSE_AUTO_CHECK_EN	BIT(1)
#define SPRD_EFUSE_DOUBLE_EN		BIT(2)
#define SPRD_EFUSE_MARGIN_RD_EN		BIT(3)
#define SPRD_EFUSE_LOCK_WR_EN		BIT(4)

#define SPRD_EFUSE_ERR_CLR_MASK		GENMASK(13, 0)

#define SPRD_EFUSE_ENK1_ON		BIT(0)
#define SPRD_EFUSE_ENK2_ON		BIT(1)
#define SPRD_EFUSE_PROG_EN		BIT(2)

#define SPRD_EFUSE_MAGIC_NUMBER		0x8810

/* Block width (bytes) definitions */
#define SPRD_EFUSE_BLOCK_WIDTH		4

/*
 * The Spreadtrum AP efuse contains 2 parts: normal efuse and secure efuse,
 * and we can only access the normal efuse in kernel. So define the normal
 * block offset index and normal block numbers.
 */
#define SPRD_EFUSE_NORMAL_BLOCK_NUMS	24
#define SPRD_EFUSE_NORMAL_BLOCK_OFFSET	72

/* Timeout (ms) for the trylock of hardware spinlocks */
#define SPRD_EFUSE_HWLOCK_TIMEOUT	5000

/*
 * Since different Spreadtrum SoC chip can have different normal block numbers
 * and offset. And some SoC can support block double feature, which means
 * when reading or writing data to efuse memory, the controller can save double
 * data in case one data become incorrect after a long period.
 *
 * Thus we should save them in the device data structure.
 */
struct sprd_efuse_variant_data {
	u32 blk_nums;
	u32 blk_offset;
	bool blk_double;
};

struct sprd_efuse {
	struct device *dev;
	struct clk *clk;
	struct hwspinlock *hwlock;
	struct mutex mutex;
	void __iomem *base;
	const struct sprd_efuse_variant_data *data;
};

static const struct sprd_efuse_variant_data ums312_data = {
	.blk_nums = SPRD_EFUSE_NORMAL_BLOCK_NUMS,
	.blk_offset = SPRD_EFUSE_NORMAL_BLOCK_OFFSET,
	.blk_double = false,
};

/*
 * On Spreadtrum platform, we have multi-subsystems will access the unique
 * efuse controller, so we need one hardware spinlock to synchronize between
 * the multiple subsystems.
 */
static int sprd_efuse_lock(struct sprd_efuse *efuse)
{
	int ret;

	mutex_lock(&efuse->mutex);

	ret = hwspin_lock_timeout_raw(efuse->hwlock,
				      SPRD_EFUSE_HWLOCK_TIMEOUT);
	if (ret) {
		dev_err(efuse->dev, "timeout get the hwspinlock\n");
		mutex_unlock(&efuse->mutex);
		return ret;
	}

	return 0;
}

static void sprd_efuse_unlock(struct sprd_efuse *efuse)
{
	hwspin_unlock_raw(efuse->hwlock);
	mutex_unlock(&efuse->mutex);
}

static void sprd_efuse_set_prog_power(struct sprd_efuse *efuse, bool en)
{
	u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);

	if (en)
		val &= ~SPRD_EFUSE_ENK2_ON;
	else
		val &= ~SPRD_EFUSE_ENK1_ON;

	writel(val, efuse->base + SPRD_EFUSE_PW_SWT);

	/* Open or close efuse power need wait 1000us to make power stable. */
	usleep_range(1000, 1200);

	if (en)
		val |= SPRD_EFUSE_ENK1_ON;
	else
		val |= SPRD_EFUSE_ENK2_ON;

	writel(val, efuse->base + SPRD_EFUSE_PW_SWT);

	/* Open or close efuse power need wait 1000us to make power stable. */
	usleep_range(1000, 1200);
}

static void sprd_efuse_set_read_power(struct sprd_efuse *efuse, bool en)
{
	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);

	if (en)
		val |= SPRD_EFUSE_VDD_EN;
	else
		val &= ~SPRD_EFUSE_VDD_EN;

	writel(val, efuse->base + SPRD_EFUSE_ENABLE);

	/* Open or close efuse power need wait 1000us to make power stable. */
	usleep_range(1000, 1200);
}

static void sprd_efuse_set_prog_lock(struct sprd_efuse *efuse, bool en)
{
	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);

	if (en)
		val |= SPRD_EFUSE_LOCK_WR_EN;
	else
		val &= ~SPRD_EFUSE_LOCK_WR_EN;

	writel(val, efuse->base + SPRD_EFUSE_ENABLE);
}

static void sprd_efuse_set_auto_check(struct sprd_efuse *efuse, bool en)
{
	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);

	if (en)
		val |= SPRD_EFUSE_AUTO_CHECK_EN;
	else
		val &= ~SPRD_EFUSE_AUTO_CHECK_EN;

	writel(val, efuse->base + SPRD_EFUSE_ENABLE);
}

static void sprd_efuse_set_data_double(struct sprd_efuse *efuse, bool en)
{
	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);

	if (en)
		val |= SPRD_EFUSE_DOUBLE_EN;
	else
		val &= ~SPRD_EFUSE_DOUBLE_EN;

	writel(val, efuse->base + SPRD_EFUSE_ENABLE);
}

static void sprd_efuse_set_prog_en(struct sprd_efuse *efuse, bool en)
{
	u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);

	if (en)
		val |= SPRD_EFUSE_PROG_EN;
	else
		val &= ~SPRD_EFUSE_PROG_EN;

	writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
}

static int sprd_efuse_raw_prog(struct sprd_efuse *efuse, u32 blk, bool doub,
			       bool lock, u32 *data)
{
	u32 status;
	int ret = 0;

	/*
	 * We need set the correct magic number before writing the efuse to
	 * allow programming, and block other programming until we clear the
	 * magic number.
	 */
	writel(SPRD_EFUSE_MAGIC_NUMBER,
	       efuse->base + SPRD_EFUSE_MAGIC_NUM);

	/*
	 * Power on the efuse, enable programme and enable double data
	 * if asked.
	 */
	sprd_efuse_set_prog_power(efuse, true);
	sprd_efuse_set_prog_en(efuse, true);
	sprd_efuse_set_data_double(efuse, doub);

	/*
	 * Enable the auto-check function to validate if the programming is
	 * successful.
	 */
	sprd_efuse_set_auto_check(efuse, true);

	writel(*data, efuse->base + SPRD_EFUSE_MEM(blk));

	/* Disable auto-check and data double after programming */
	sprd_efuse_set_auto_check(efuse, false);
	sprd_efuse_set_data_double(efuse, false);

	/*
	 * Check the efuse error status, if the programming is successful,
	 * we should lock this efuse block to avoid programming again.
	 */
	status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
	if (status) {
		dev_err(efuse->dev,
			"write error status %d of block %d\n", ret, blk);

		writel(SPRD_EFUSE_ERR_CLR_MASK,
		       efuse->base + SPRD_EFUSE_ERR_CLR);
		ret = -EBUSY;
	} else {
		sprd_efuse_set_prog_lock(efuse, lock);
		writel(*data, efuse->base + SPRD_EFUSE_MEM(blk));
		sprd_efuse_set_prog_lock(efuse, false);
	}

	sprd_efuse_set_prog_power(efuse, false);
	writel(0, efuse->base + SPRD_EFUSE_MAGIC_NUM);

	return ret;
}

static int sprd_efuse_raw_read(struct sprd_efuse *efuse, int blk, u32 *val,
			       bool doub)
{
	u32 status;

	/*
	 * Need power on the efuse before reading data from efuse, and will
	 * power off the efuse after reading process.
	 */
	sprd_efuse_set_read_power(efuse, true);

	/* Enable double data if asked */
	sprd_efuse_set_data_double(efuse, doub);

	/* Start to read data from efuse block */
	*val = readl(efuse->base + SPRD_EFUSE_MEM(blk));

	/* Disable double data */
	sprd_efuse_set_data_double(efuse, false);

	/* Power off the efuse */
	sprd_efuse_set_read_power(efuse, false);

	/*
	 * Check the efuse error status and clear them if there are some
	 * errors occurred.
	 */
	status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
	if (status) {
		dev_err(efuse->dev,
			"read error status %d of block %d\n", status, blk);

		writel(SPRD_EFUSE_ERR_CLR_MASK,
		       efuse->base + SPRD_EFUSE_ERR_CLR);
		return -EBUSY;
	}

	return 0;
}

static int sprd_efuse_read(void *context, u32 offset, void *val, size_t bytes)
{
	struct sprd_efuse *efuse = context;
	bool blk_double = efuse->data->blk_double;
	u32 index = offset / SPRD_EFUSE_BLOCK_WIDTH + efuse->data->blk_offset;
	u32 blk_offset = (offset % SPRD_EFUSE_BLOCK_WIDTH) * BITS_PER_BYTE;
	u32 data;
	int ret;

	ret = sprd_efuse_lock(efuse);
	if (ret)
		return ret;

	ret = clk_prepare_enable(efuse->clk);
	if (ret)
		goto unlock;

	ret = sprd_efuse_raw_read(efuse, index, &data, blk_double);
	if (!ret) {
		data >>= blk_offset;
		memcpy(val, &data, bytes);
	}

	clk_disable_unprepare(efuse->clk);

unlock:
	sprd_efuse_unlock(efuse);
	return ret;
}

static int sprd_efuse_write(void *context, u32 offset, void *val, size_t bytes)
{
	struct sprd_efuse *efuse = context;
	int ret;

	ret = sprd_efuse_lock(efuse);
	if (ret)
		return ret;

	ret = clk_prepare_enable(efuse->clk);
	if (ret)
		goto unlock;

	ret = sprd_efuse_raw_prog(efuse, offset, false, false, val);

	clk_disable_unprepare(efuse->clk);

unlock:
	sprd_efuse_unlock(efuse);
	return ret;
}

static int sprd_efuse_probe(struct platform_device *pdev)
{
	struct device_node *np = pdev->dev.of_node;
	struct nvmem_device *nvmem;
	struct nvmem_config econfig = { };
	struct sprd_efuse *efuse;
	const struct sprd_efuse_variant_data *pdata;
	int ret;

	pdata = of_device_get_match_data(&pdev->dev);
	if (!pdata) {
		dev_err(&pdev->dev, "No matching driver data found\n");
		return -EINVAL;
	}

	efuse = devm_kzalloc(&pdev->dev, sizeof(*efuse), GFP_KERNEL);
	if (!efuse)
		return -ENOMEM;

	efuse->base = devm_platform_ioremap_resource(pdev, 0);
	if (!efuse->base)
		return -ENOMEM;

	ret = of_hwspin_lock_get_id(np, 0);
	if (ret < 0) {
		dev_err(&pdev->dev, "failed to get hwlock id\n");
		return ret;
	}

	efuse->hwlock = devm_hwspin_lock_request_specific(&pdev->dev, ret);
	if (!efuse->hwlock) {
		dev_err(&pdev->dev, "failed to request hwlock\n");
		return -ENXIO;
	}

	efuse->clk = devm_clk_get(&pdev->dev, "enable");
	if (IS_ERR(efuse->clk)) {
		dev_err(&pdev->dev, "failed to get enable clock\n");
		return PTR_ERR(efuse->clk);
	}

	mutex_init(&efuse->mutex);
	efuse->dev = &pdev->dev;
	efuse->data = pdata;

	econfig.stride = 1;
	econfig.word_size = 1;
	econfig.read_only = false;
	econfig.name = "sprd-efuse";
	econfig.size = efuse->data->blk_nums * SPRD_EFUSE_BLOCK_WIDTH;
	econfig.reg_read = sprd_efuse_read;
	econfig.reg_write = sprd_efuse_write;
	econfig.priv = efuse;
	econfig.dev = &pdev->dev;
	nvmem = devm_nvmem_register(&pdev->dev, &econfig);
	if (IS_ERR(nvmem)) {
		dev_err(&pdev->dev, "failed to register nvmem\n");
		return PTR_ERR(nvmem);
	}

	return 0;
}

static const struct of_device_id sprd_efuse_of_match[] = {
	{ .compatible = "sprd,ums312-efuse", .data = &ums312_data },
	{ }
};

static struct platform_driver sprd_efuse_driver = {
	.probe = sprd_efuse_probe,
	.driver = {
		.name = "sprd-efuse",
		.of_match_table = sprd_efuse_of_match,
	},
};

module_platform_driver(sprd_efuse_driver);

MODULE_AUTHOR("Freeman Liu <freeman.liu@spreadtrum.com>");
MODULE_DESCRIPTION("Spreadtrum AP efuse driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
096030e7 FL	1	// SPDX-License-Identifier: GPL-2.0
	2	// Copyright (C) 2019 Spreadtrum Communications Inc.
	3
	4	#include <linux/clk.h>
	5	#include <linux/delay.h>
	6	#include <linux/hwspinlock.h>
	7	#include <linux/io.h>
	8	#include <linux/module.h>
	9	#include <linux/nvmem-provider.h>
	10	#include <linux/of_device.h>
	11	#include <linux/platform_device.h>
	12
	13	#define SPRD_EFUSE_ENABLE 0x20
	14	#define SPRD_EFUSE_ERR_FLAG 0x24
	15	#define SPRD_EFUSE_ERR_CLR 0x28
	16	#define SPRD_EFUSE_MAGIC_NUM 0x2c
	17	#define SPRD_EFUSE_FW_CFG 0x50
	18	#define SPRD_EFUSE_PW_SWT 0x54
	19	#define SPRD_EFUSE_MEM(val) (0x1000 + ((val) << 2))
	20
	21	#define SPRD_EFUSE_VDD_EN BIT(0)
	22	#define SPRD_EFUSE_AUTO_CHECK_EN BIT(1)
	23	#define SPRD_EFUSE_DOUBLE_EN BIT(2)
	24	#define SPRD_EFUSE_MARGIN_RD_EN BIT(3)
	25	#define SPRD_EFUSE_LOCK_WR_EN BIT(4)
	26
	27	#define SPRD_EFUSE_ERR_CLR_MASK GENMASK(13, 0)
	28
	29	#define SPRD_EFUSE_ENK1_ON BIT(0)
	30	#define SPRD_EFUSE_ENK2_ON BIT(1)
	31	#define SPRD_EFUSE_PROG_EN BIT(2)
	32
	33	#define SPRD_EFUSE_MAGIC_NUMBER 0x8810
	34
	35	/* Block width (bytes) definitions */
	36	#define SPRD_EFUSE_BLOCK_WIDTH 4
	37
	38	/*
	39	* The Spreadtrum AP efuse contains 2 parts: normal efuse and secure efuse,
	40	* and we can only access the normal efuse in kernel. So define the normal
	41	* block offset index and normal block numbers.
	42	*/
	43	#define SPRD_EFUSE_NORMAL_BLOCK_NUMS 24
	44	#define SPRD_EFUSE_NORMAL_BLOCK_OFFSET 72
	45
	46	/* Timeout (ms) for the trylock of hardware spinlocks */
	47	#define SPRD_EFUSE_HWLOCK_TIMEOUT 5000
	48
	49	/*
	50	* Since different Spreadtrum SoC chip can have different normal block numbers
	51	* and offset. And some SoC can support block double feature, which means
	52	* when reading or writing data to efuse memory, the controller can save double
	53	* data in case one data become incorrect after a long period.
	54	*
	55	* Thus we should save them in the device data structure.
	56	*/
	57	struct sprd_efuse_variant_data {
	58	u32 blk_nums;
	59	u32 blk_offset;
	60	bool blk_double;
	61	};
	62
	63	struct sprd_efuse {
	64	struct device *dev;
65	struct clk *clk;
66	struct hwspinlock *hwlock;
67	struct mutex mutex;
68	void __iomem *base;
69	const struct sprd_efuse_variant_data *data;
70	};
71
72	static const struct sprd_efuse_variant_data ums312_data = {
73	.blk_nums = SPRD_EFUSE_NORMAL_BLOCK_NUMS,
74	.blk_offset = SPRD_EFUSE_NORMAL_BLOCK_OFFSET,
75	.blk_double = false,
76	};
77
78	/*
79	* On Spreadtrum platform, we have multi-subsystems will access the unique
80	* efuse controller, so we need one hardware spinlock to synchronize between
81	* the multiple subsystems.
82	*/
83	static int sprd_efuse_lock(struct sprd_efuse *efuse)
84	{
85	int ret;
86
87	mutex_lock(&efuse->mutex);
88
89	ret = hwspin_lock_timeout_raw(efuse->hwlock,
90	SPRD_EFUSE_HWLOCK_TIMEOUT);
91	if (ret) {
92	dev_err(efuse->dev, "timeout get the hwspinlock\n");
93	mutex_unlock(&efuse->mutex);
94	return ret;
95	}
96
97	return 0;
98	}
99
100	static void sprd_efuse_unlock(struct sprd_efuse *efuse)
101	{
102	hwspin_unlock_raw(efuse->hwlock);
103	mutex_unlock(&efuse->mutex);
104	}
105
106	static void sprd_efuse_set_prog_power(struct sprd_efuse *efuse, bool en)
107	{
108	u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);
109
110	if (en)
111	val &= ~SPRD_EFUSE_ENK2_ON;
112	else
113	val &= ~SPRD_EFUSE_ENK1_ON;
114
115	writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
116
117	/* Open or close efuse power need wait 1000us to make power stable. */
118	usleep_range(1000, 1200);
119
120	if (en)
121	val \|= SPRD_EFUSE_ENK1_ON;
122	else
123	val \|= SPRD_EFUSE_ENK2_ON;
124
125	writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
126
127	/* Open or close efuse power need wait 1000us to make power stable. */
128	usleep_range(1000, 1200);
129	}
130
131	static void sprd_efuse_set_read_power(struct sprd_efuse *efuse, bool en)
132	{
133	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
134
135	if (en)
136	val \|= SPRD_EFUSE_VDD_EN;
137	else
138	val &= ~SPRD_EFUSE_VDD_EN;
139
140	writel(val, efuse->base + SPRD_EFUSE_ENABLE);
141
142	/* Open or close efuse power need wait 1000us to make power stable. */
143	usleep_range(1000, 1200);
144	}
145
146	static void sprd_efuse_set_prog_lock(struct sprd_efuse *efuse, bool en)
147	{
148	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
149
150	if (en)
151	val \|= SPRD_EFUSE_LOCK_WR_EN;
152	else
153	val &= ~SPRD_EFUSE_LOCK_WR_EN;
154
155	writel(val, efuse->base + SPRD_EFUSE_ENABLE);
156	}
157
158	static void sprd_efuse_set_auto_check(struct sprd_efuse *efuse, bool en)
159	{
160	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
161
162	if (en)
163	val \|= SPRD_EFUSE_AUTO_CHECK_EN;
164	else
165	val &= ~SPRD_EFUSE_AUTO_CHECK_EN;
166
167	writel(val, efuse->base + SPRD_EFUSE_ENABLE);
168	}
169
170	static void sprd_efuse_set_data_double(struct sprd_efuse *efuse, bool en)
171	{
172	u32 val = readl(efuse->base + SPRD_EFUSE_ENABLE);
173
174	if (en)
175	val \|= SPRD_EFUSE_DOUBLE_EN;
176	else
177	val &= ~SPRD_EFUSE_DOUBLE_EN;
178
179	writel(val, efuse->base + SPRD_EFUSE_ENABLE);
180	}
181
182	static void sprd_efuse_set_prog_en(struct sprd_efuse *efuse, bool en)
183	{
184	u32 val = readl(efuse->base + SPRD_EFUSE_PW_SWT);
185
186	if (en)
187	val \|= SPRD_EFUSE_PROG_EN;
188	else
189	val &= ~SPRD_EFUSE_PROG_EN;
190
191	writel(val, efuse->base + SPRD_EFUSE_PW_SWT);
192	}
193
194	static int sprd_efuse_raw_prog(struct sprd_efuse *efuse, u32 blk, bool doub,
195	bool lock, u32 *data)
196	{
197	u32 status;
198	int ret = 0;
199
200	/*
201	* We need set the correct magic number before writing the efuse to
202	* allow programming, and block other programming until we clear the
203	* magic number.
204	*/
205	writel(SPRD_EFUSE_MAGIC_NUMBER,
206	efuse->base + SPRD_EFUSE_MAGIC_NUM);
207
208	/*
209	* Power on the efuse, enable programme and enable double data
210	* if asked.
211	*/
212	sprd_efuse_set_prog_power(efuse, true);
213	sprd_efuse_set_prog_en(efuse, true);
214	sprd_efuse_set_data_double(efuse, doub);
215
216	/*
217	* Enable the auto-check function to validate if the programming is
218	* successful.
219	*/
220	sprd_efuse_set_auto_check(efuse, true);
221
222	writel(*data, efuse->base + SPRD_EFUSE_MEM(blk));
223
224	/* Disable auto-check and data double after programming */
225	sprd_efuse_set_auto_check(efuse, false);
226	sprd_efuse_set_data_double(efuse, false);
227
228	/*
229	* Check the efuse error status, if the programming is successful,
230	* we should lock this efuse block to avoid programming again.
231	*/
232	status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
233	if (status) {
234	dev_err(efuse->dev,
235	"write error status %d of block %d\n", ret, blk);
236
237	writel(SPRD_EFUSE_ERR_CLR_MASK,
238	efuse->base + SPRD_EFUSE_ERR_CLR);
239	ret = -EBUSY;
240	} else {
241	sprd_efuse_set_prog_lock(efuse, lock);
242	writel(*data, efuse->base + SPRD_EFUSE_MEM(blk));
243	sprd_efuse_set_prog_lock(efuse, false);
244	}
245
246	sprd_efuse_set_prog_power(efuse, false);
247	writel(0, efuse->base + SPRD_EFUSE_MAGIC_NUM);
248
249	return ret;
250	}
251
252	static int sprd_efuse_raw_read(struct sprd_efuse efuse, int blk, u32 val,
253	bool doub)
254	{
255	u32 status;
256
257	/*
258	* Need power on the efuse before reading data from efuse, and will
259	* power off the efuse after reading process.
260	*/
261	sprd_efuse_set_read_power(efuse, true);
262
263	/* Enable double data if asked */
264	sprd_efuse_set_data_double(efuse, doub);
265
266	/* Start to read data from efuse block */
267	*val = readl(efuse->base + SPRD_EFUSE_MEM(blk));
268
269	/* Disable double data */
270	sprd_efuse_set_data_double(efuse, false);
271
272	/* Power off the efuse */
273	sprd_efuse_set_read_power(efuse, false);
274
275	/*
276	* Check the efuse error status and clear them if there are some
277	* errors occurred.
278	*/
279	status = readl(efuse->base + SPRD_EFUSE_ERR_FLAG);
280	if (status) {
281	dev_err(efuse->dev,
282	"read error status %d of block %d\n", status, blk);
283
284	writel(SPRD_EFUSE_ERR_CLR_MASK,
285	efuse->base + SPRD_EFUSE_ERR_CLR);
286	return -EBUSY;
287	}
288
289	return 0;
290	}
291
292	static int sprd_efuse_read(void context, u32 offset, void val, size_t bytes)
293	{
294	struct sprd_efuse *efuse = context;
295	bool blk_double = efuse->data->blk_double;
296	u32 index = offset / SPRD_EFUSE_BLOCK_WIDTH + efuse->data->blk_offset;
297	u32 blk_offset = (offset % SPRD_EFUSE_BLOCK_WIDTH) * BITS_PER_BYTE;
298	u32 data;
299	int ret;
300
301	ret = sprd_efuse_lock(efuse);
302	if (ret)
303	return ret;
304
305	ret = clk_prepare_enable(efuse->clk);
306	if (ret)
307	goto unlock;
308
309	ret = sprd_efuse_raw_read(efuse, index, &data, blk_double);
310	if (!ret) {
311	data >>= blk_offset;
312	memcpy(val, &data, bytes);
313	}
314
315	clk_disable_unprepare(efuse->clk);
316
317	unlock:
318	sprd_efuse_unlock(efuse);
319	return ret;
320	}
321
322	static int sprd_efuse_write(void context, u32 offset, void val, size_t bytes)
323	{
324	struct sprd_efuse *efuse = context;
325	int ret;
326
327	ret = sprd_efuse_lock(efuse);
328	if (ret)
329	return ret;
330
331	ret = clk_prepare_enable(efuse->clk);
332	if (ret)
333	goto unlock;
334
335	ret = sprd_efuse_raw_prog(efuse, offset, false, false, val);
336
337	clk_disable_unprepare(efuse->clk);
338
339	unlock:
340	sprd_efuse_unlock(efuse);
341	return ret;
342	}
343
344	static int sprd_efuse_probe(struct platform_device *pdev)
345	{
346	struct device_node *np = pdev->dev.of_node;
347	struct nvmem_device *nvmem;
348	struct nvmem_config econfig = { };
349	struct sprd_efuse *efuse;
350	const struct sprd_efuse_variant_data *pdata;
351	int ret;
352
353	pdata = of_device_get_match_data(&pdev->dev);
354	if (!pdata) {
355	dev_err(&pdev->dev, "No matching driver data found\n");
356	return -EINVAL;
357	}
358
359	efuse = devm_kzalloc(&pdev->dev, sizeof(*efuse), GFP_KERNEL);
360	if (!efuse)
361	return -ENOMEM;
362
363	efuse->base = devm_platform_ioremap_resource(pdev, 0);
364	if (!efuse->base)
365	return -ENOMEM;
366
367	ret = of_hwspin_lock_get_id(np, 0);
368	if (ret < 0) {
369	dev_err(&pdev->dev, "failed to get hwlock id\n");
370	return ret;
371	}
372
373	efuse->hwlock = devm_hwspin_lock_request_specific(&pdev->dev, ret);
374	if (!efuse->hwlock) {
375	dev_err(&pdev->dev, "failed to request hwlock\n");
376	return -ENXIO;
377	}
378
379	efuse->clk = devm_clk_get(&pdev->dev, "enable");
380	if (IS_ERR(efuse->clk)) {
381	dev_err(&pdev->dev, "failed to get enable clock\n");
382	return PTR_ERR(efuse->clk);
383	}
384
385	mutex_init(&efuse->mutex);
386	efuse->dev = &pdev->dev;
387	efuse->data = pdata;
388
389	econfig.stride = 1;
390	econfig.word_size = 1;
391	econfig.read_only = false;
392	econfig.name = "sprd-efuse";
393	econfig.size = efuse->data->blk_nums * SPRD_EFUSE_BLOCK_WIDTH;
394	econfig.reg_read = sprd_efuse_read;
395	econfig.reg_write = sprd_efuse_write;
396	econfig.priv = efuse;
397	econfig.dev = &pdev->dev;
398	nvmem = devm_nvmem_register(&pdev->dev, &econfig);
399	if (IS_ERR(nvmem)) {
400	dev_err(&pdev->dev, "failed to register nvmem\n");
401	return PTR_ERR(nvmem);
402	}
403
404	return 0;
405	}
406
407	static const struct of_device_id sprd_efuse_of_match[] = {
408	{ .compatible = "sprd,ums312-efuse", .data = &ums312_data },
409	{ }
410	};
411
412	static struct platform_driver sprd_efuse_driver = {
413	.probe = sprd_efuse_probe,
414	.driver = {
415	.name = "sprd-efuse",
416	.of_match_table = sprd_efuse_of_match,
417	},
418	};
419
420	module_platform_driver(sprd_efuse_driver);
421
422	MODULE_AUTHOR("Freeman Liu <freeman.liu@spreadtrum.com>");
423	MODULE_DESCRIPTION("Spreadtrum AP efuse driver");
424	MODULE_LICENSE("GPL v2");