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Merge tag 'for-linus-2021-01-24' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / drivers / nvme / target / rdma.c
CommitLineData
3641bd32 1// SPDX-License-Identifier: GPL-2.0
8f000cac
CH		 2/*
3 * NVMe over Fabrics RDMA target.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
8f000cac
CH		 5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7#include <linux/atomic.h>
8#include <linux/ctype.h>
9#include <linux/delay.h>
10#include <linux/err.h>
11#include <linux/init.h>
12#include <linux/module.h>
13#include <linux/nvme.h>
14#include <linux/slab.h>
15#include <linux/string.h>
16#include <linux/wait.h>
17#include <linux/inet.h>
18#include <asm/unaligned.h>
19
20#include <rdma/ib_verbs.h>
21#include <rdma/rdma_cm.h>
22#include <rdma/rw.h>
8094ba0a 23#include <rdma/ib_cm.h>
8f000cac
CH		 24
25#include <linux/nvme-rdma.h>
26#include "nvmet.h"
27
28/*
0d5ee2b2 29 * We allow at least 1 page, up to 4 SGEs, and up to 16KB of inline data
8f000cac 30 */
0d5ee2b2
SW		 31#define NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE PAGE_SIZE
32#define NVMET_RDMA_MAX_INLINE_SGE 4
33#define NVMET_RDMA_MAX_INLINE_DATA_SIZE max_t(int, SZ_16K, PAGE_SIZE)
8f000cac 34
ec6d20e1
MG		 35/* Assume mpsmin == device_page_size == 4KB */
36#define NVMET_RDMA_MAX_MDTS 8
b09160c3 37#define NVMET_RDMA_MAX_METADATA_MDTS 5
ec6d20e1 38
b0012dd3
MG		 39struct nvmet_rdma_srq;
40
8f000cac 41struct nvmet_rdma_cmd {
0d5ee2b2 42 struct ib_sge sge[NVMET_RDMA_MAX_INLINE_SGE + 1];
8f000cac
CH		 43 struct ib_cqe cqe;
44 struct ib_recv_wr wr;
0d5ee2b2 45 struct scatterlist inline_sg[NVMET_RDMA_MAX_INLINE_SGE];
8f000cac
CH		 46 struct nvme_command *nvme_cmd;
47 struct nvmet_rdma_queue *queue;
b0012dd3 48 struct nvmet_rdma_srq *nsrq;
8f000cac
CH		 49};
50
51enum {
52 NVMET_RDMA_REQ_INLINE_DATA = (1 << 0),
53 NVMET_RDMA_REQ_INVALIDATE_RKEY = (1 << 1),
54};
55
56struct nvmet_rdma_rsp {
57 struct ib_sge send_sge;
58 struct ib_cqe send_cqe;
59 struct ib_send_wr send_wr;
60
61 struct nvmet_rdma_cmd *cmd;
62 struct nvmet_rdma_queue *queue;
63
64 struct ib_cqe read_cqe;
b09160c3 65 struct ib_cqe write_cqe;
8f000cac
CH		 66 struct rdma_rw_ctx rw;
67
68 struct nvmet_req req;
69
8407879c 70 bool allocated;
8f000cac
CH		 71 u8 n_rdma;
72 u32 flags;
73 u32 invalidate_rkey;
74
75 struct list_head wait_list;
76 struct list_head free_list;
77};
78
79enum nvmet_rdma_queue_state {
80 NVMET_RDMA_Q_CONNECTING,
81 NVMET_RDMA_Q_LIVE,
82 NVMET_RDMA_Q_DISCONNECTING,
83};
84
85struct nvmet_rdma_queue {
86 struct rdma_cm_id *cm_id;
21f90243 87 struct ib_qp *qp;
8f000cac
CH		 88 struct nvmet_port *port;
89 struct ib_cq *cq;
90 atomic_t sq_wr_avail;
91 struct nvmet_rdma_device *dev;
b0012dd3 92 struct nvmet_rdma_srq *nsrq;
8f000cac
CH		 93 spinlock_t state_lock;
94 enum nvmet_rdma_queue_state state;
95 struct nvmet_cq nvme_cq;
96 struct nvmet_sq nvme_sq;
97
98 struct nvmet_rdma_rsp *rsps;
99 struct list_head free_rsps;
100 spinlock_t rsps_lock;
101 struct nvmet_rdma_cmd *cmds;
102
103 struct work_struct release_work;
104 struct list_head rsp_wait_list;
105 struct list_head rsp_wr_wait_list;
106 spinlock_t rsp_wr_wait_lock;
107
108 int idx;
109 int host_qid;
b0012dd3 110 int comp_vector;
8f000cac
CH		 111 int recv_queue_size;
112 int send_queue_size;
113
114 struct list_head queue_list;
115};
116
a032e4f6
SG		 117struct nvmet_rdma_port {
118 struct nvmet_port *nport;
119 struct sockaddr_storage addr;
120 struct rdma_cm_id *cm_id;
121 struct delayed_work repair_work;
122};
123
b0012dd3
MG		 124struct nvmet_rdma_srq {
125 struct ib_srq *srq;
126 struct nvmet_rdma_cmd *cmds;
127 struct nvmet_rdma_device *ndev;
128};
129
8f000cac
CH		 130struct nvmet_rdma_device {
131 struct ib_device *device;
132 struct ib_pd *pd;
b0012dd3
MG		 133 struct nvmet_rdma_srq **srqs;
134 int srq_count;
8f000cac
CH		 135 size_t srq_size;
136 struct kref ref;
137 struct list_head entry;
0d5ee2b2
SW		 138 int inline_data_size;
139 int inline_page_count;
8f000cac
CH		 140};
141
142static bool nvmet_rdma_use_srq;
143module_param_named(use_srq, nvmet_rdma_use_srq, bool, 0444);
144MODULE_PARM_DESC(use_srq, "Use shared receive queue.");
145
b0012dd3
MG		 146static int srq_size_set(const char *val, const struct kernel_param *kp);
147static const struct kernel_param_ops srq_size_ops = {
148 .set = srq_size_set,
149 .get = param_get_int,
150};
151
152static int nvmet_rdma_srq_size = 1024;
153module_param_cb(srq_size, &srq_size_ops, &nvmet_rdma_srq_size, 0644);
154MODULE_PARM_DESC(srq_size, "set Shared Receive Queue (SRQ) size, should >= 256 (default: 1024)");
155
8f000cac
CH		 156static DEFINE_IDA(nvmet_rdma_queue_ida);
157static LIST_HEAD(nvmet_rdma_queue_list);
158static DEFINE_MUTEX(nvmet_rdma_queue_mutex);
159
160static LIST_HEAD(device_list);
161static DEFINE_MUTEX(device_list_mutex);
162
163static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp);
164static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc);
165static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
166static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc);
b09160c3 167static void nvmet_rdma_write_data_done(struct ib_cq *cq, struct ib_wc *wc);
8f000cac
CH		 168static void nvmet_rdma_qp_event(struct ib_event *event, void *priv);
169static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue);
5cbab630
RR		 170static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev,
171 struct nvmet_rdma_rsp *r);
172static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev,
173 struct nvmet_rdma_rsp *r);
8f000cac 174
e929f06d 175static const struct nvmet_fabrics_ops nvmet_rdma_ops;
8f000cac 176
b0012dd3
MG		 177static int srq_size_set(const char *val, const struct kernel_param *kp)
178{
179 int n = 0, ret;
180
181 ret = kstrtoint(val, 10, &n);
182 if (ret != 0 || n < 256)
183 return -EINVAL;
184
185 return param_set_int(val, kp);
186}
187
0d5ee2b2
SW		 188static int num_pages(int len)
189{
190 return 1 + (((len - 1) & PAGE_MASK) >> PAGE_SHIFT);
191}
192
8f000cac
CH		 193static inline bool nvmet_rdma_need_data_in(struct nvmet_rdma_rsp *rsp)
194{
195 return nvme_is_write(rsp->req.cmd) &&
5e62d5c9 196 rsp->req.transfer_len &&
8f000cac
CH		 197 !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
198}
199
200static inline bool nvmet_rdma_need_data_out(struct nvmet_rdma_rsp *rsp)
201{
202 return !nvme_is_write(rsp->req.cmd) &&
5e62d5c9 203 rsp->req.transfer_len &&
fc6c9730 204 !rsp->req.cqe->status &&
8f000cac
CH		 205 !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
206}
207
208static inline struct nvmet_rdma_rsp *
209nvmet_rdma_get_rsp(struct nvmet_rdma_queue *queue)
210{
211 struct nvmet_rdma_rsp *rsp;
212 unsigned long flags;
213
214 spin_lock_irqsave(&queue->rsps_lock, flags);
8407879c 215 rsp = list_first_entry_or_null(&queue->free_rsps,
8f000cac 216 struct nvmet_rdma_rsp, free_list);
8407879c
SG		 217 if (likely(rsp))
218 list_del(&rsp->free_list);
8f000cac
CH		 219 spin_unlock_irqrestore(&queue->rsps_lock, flags);
220
8407879c 221 if (unlikely(!rsp)) {
5cbab630
RR		 222 int ret;
223
224 rsp = kzalloc(sizeof(*rsp), GFP_KERNEL);
8407879c
SG		 225 if (unlikely(!rsp))
226 return NULL;
5cbab630
RR		 227 ret = nvmet_rdma_alloc_rsp(queue->dev, rsp);
228 if (unlikely(ret)) {
229 kfree(rsp);
230 return NULL;
231 }
232
8407879c
SG		 233 rsp->allocated = true;
234 }
235
8f000cac
CH		 236 return rsp;
237}
238
239static inline void
240nvmet_rdma_put_rsp(struct nvmet_rdma_rsp *rsp)
241{
242 unsigned long flags;
243
ad1f8249 244 if (unlikely(rsp->allocated)) {
5cbab630 245 nvmet_rdma_free_rsp(rsp->queue->dev, rsp);
8407879c
SG		 246 kfree(rsp);
247 return;
248 }
249
8f000cac
CH		 250 spin_lock_irqsave(&rsp->queue->rsps_lock, flags);
251 list_add_tail(&rsp->free_list, &rsp->queue->free_rsps);
252 spin_unlock_irqrestore(&rsp->queue->rsps_lock, flags);
253}
254
0d5ee2b2
SW		 255static void nvmet_rdma_free_inline_pages(struct nvmet_rdma_device *ndev,
256 struct nvmet_rdma_cmd *c)
257{
258 struct scatterlist *sg;
259 struct ib_sge *sge;
260 int i;
261
262 if (!ndev->inline_data_size)
263 return;
264
265 sg = c->inline_sg;
266 sge = &c->sge[1];
267
268 for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) {
269 if (sge->length)
270 ib_dma_unmap_page(ndev->device, sge->addr,
271 sge->length, DMA_FROM_DEVICE);
272 if (sg_page(sg))
273 __free_page(sg_page(sg));
274 }
275}
276
277static int nvmet_rdma_alloc_inline_pages(struct nvmet_rdma_device *ndev,
278 struct nvmet_rdma_cmd *c)
279{
280 struct scatterlist *sg;
281 struct ib_sge *sge;
282 struct page *pg;
283 int len;
284 int i;
285
286 if (!ndev->inline_data_size)
287 return 0;
288
289 sg = c->inline_sg;
290 sg_init_table(sg, ndev->inline_page_count);
291 sge = &c->sge[1];
292 len = ndev->inline_data_size;
293
294 for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) {
295 pg = alloc_page(GFP_KERNEL);
296 if (!pg)
297 goto out_err;
298 sg_assign_page(sg, pg);
299 sge->addr = ib_dma_map_page(ndev->device,
300 pg, 0, PAGE_SIZE, DMA_FROM_DEVICE);
301 if (ib_dma_mapping_error(ndev->device, sge->addr))
302 goto out_err;
303 sge->length = min_t(int, len, PAGE_SIZE);
304 sge->lkey = ndev->pd->local_dma_lkey;
305 len -= sge->length;
306 }
307
308 return 0;
309out_err:
310 for (; i >= 0; i--, sg--, sge--) {
311 if (sge->length)
312 ib_dma_unmap_page(ndev->device, sge->addr,
313 sge->length, DMA_FROM_DEVICE);
314 if (sg_page(sg))
315 __free_page(sg_page(sg));
316 }
317 return -ENOMEM;
318}
319
8f000cac
CH		 320static int nvmet_rdma_alloc_cmd(struct nvmet_rdma_device *ndev,
321 struct nvmet_rdma_cmd *c, bool admin)
322{
323 /* NVMe command / RDMA RECV */
324 c->nvme_cmd = kmalloc(sizeof(*c->nvme_cmd), GFP_KERNEL);
325 if (!c->nvme_cmd)
326 goto out;
327
328 c->sge[0].addr = ib_dma_map_single(ndev->device, c->nvme_cmd,
329 sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
330 if (ib_dma_mapping_error(ndev->device, c->sge[0].addr))
331 goto out_free_cmd;
332
333 c->sge[0].length = sizeof(*c->nvme_cmd);
334 c->sge[0].lkey = ndev->pd->local_dma_lkey;
335
0d5ee2b2
SW		 336 if (!admin && nvmet_rdma_alloc_inline_pages(ndev, c))
337 goto out_unmap_cmd;
8f000cac
CH		 338
339 c->cqe.done = nvmet_rdma_recv_done;
340
341 c->wr.wr_cqe = &c->cqe;
342 c->wr.sg_list = c->sge;
0d5ee2b2 343 c->wr.num_sge = admin ? 1 : ndev->inline_page_count + 1;
8f000cac
CH		 344
345 return 0;
346
8f000cac
CH		 347out_unmap_cmd:
348 ib_dma_unmap_single(ndev->device, c->sge[0].addr,
349 sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
350out_free_cmd:
351 kfree(c->nvme_cmd);
352
353out:
354 return -ENOMEM;
355}
356
357static void nvmet_rdma_free_cmd(struct nvmet_rdma_device *ndev,
358 struct nvmet_rdma_cmd *c, bool admin)
359{
0d5ee2b2
SW		 360 if (!admin)
361 nvmet_rdma_free_inline_pages(ndev, c);
8f000cac
CH		 362 ib_dma_unmap_single(ndev->device, c->sge[0].addr,
363 sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
364 kfree(c->nvme_cmd);
365}
366
367static struct nvmet_rdma_cmd *
368nvmet_rdma_alloc_cmds(struct nvmet_rdma_device *ndev,
369 int nr_cmds, bool admin)
370{
371 struct nvmet_rdma_cmd *cmds;
372 int ret = -EINVAL, i;
373
374 cmds = kcalloc(nr_cmds, sizeof(struct nvmet_rdma_cmd), GFP_KERNEL);
375 if (!cmds)
376 goto out;
377
378 for (i = 0; i < nr_cmds; i++) {
379 ret = nvmet_rdma_alloc_cmd(ndev, cmds + i, admin);
380 if (ret)
381 goto out_free;
382 }
383
384 return cmds;
385
386out_free:
387 while (--i >= 0)
388 nvmet_rdma_free_cmd(ndev, cmds + i, admin);
389 kfree(cmds);
390out:
391 return ERR_PTR(ret);
392}
393
394static void nvmet_rdma_free_cmds(struct nvmet_rdma_device *ndev,
395 struct nvmet_rdma_cmd *cmds, int nr_cmds, bool admin)
396{
397 int i;
398
399 for (i = 0; i < nr_cmds; i++)
400 nvmet_rdma_free_cmd(ndev, cmds + i, admin);
401 kfree(cmds);
402}
403
404static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev,
405 struct nvmet_rdma_rsp *r)
406{
407 /* NVMe CQE / RDMA SEND */
fc6c9730
MG		 408 r->req.cqe = kmalloc(sizeof(*r->req.cqe), GFP_KERNEL);
409 if (!r->req.cqe)
8f000cac
CH		 410 goto out;
411
fc6c9730
MG		 412 r->send_sge.addr = ib_dma_map_single(ndev->device, r->req.cqe,
413 sizeof(*r->req.cqe), DMA_TO_DEVICE);
8f000cac
CH		 414 if (ib_dma_mapping_error(ndev->device, r->send_sge.addr))
415 goto out_free_rsp;
416
5a7a9e03
CH		 417 if (!ib_uses_virt_dma(ndev->device))
418 r->req.p2p_client = &ndev->device->dev;
fc6c9730 419 r->send_sge.length = sizeof(*r->req.cqe);
8f000cac
CH		 420 r->send_sge.lkey = ndev->pd->local_dma_lkey;
421
422 r->send_cqe.done = nvmet_rdma_send_done;
423
424 r->send_wr.wr_cqe = &r->send_cqe;
425 r->send_wr.sg_list = &r->send_sge;
426 r->send_wr.num_sge = 1;
427 r->send_wr.send_flags = IB_SEND_SIGNALED;
428
429 /* Data In / RDMA READ */
430 r->read_cqe.done = nvmet_rdma_read_data_done;
b09160c3
IR		 431 /* Data Out / RDMA WRITE */
432 r->write_cqe.done = nvmet_rdma_write_data_done;
433
8f000cac
CH		 434 return 0;
435
436out_free_rsp:
fc6c9730 437 kfree(r->req.cqe);
8f000cac
CH		 438out:
439 return -ENOMEM;
440}
441
442static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev,
443 struct nvmet_rdma_rsp *r)
444{
445 ib_dma_unmap_single(ndev->device, r->send_sge.addr,
fc6c9730
MG		 446 sizeof(*r->req.cqe), DMA_TO_DEVICE);
447 kfree(r->req.cqe);
8f000cac
CH		 448}
449
450static int
451nvmet_rdma_alloc_rsps(struct nvmet_rdma_queue *queue)
452{
453 struct nvmet_rdma_device *ndev = queue->dev;
454 int nr_rsps = queue->recv_queue_size * 2;
455 int ret = -EINVAL, i;
456
457 queue->rsps = kcalloc(nr_rsps, sizeof(struct nvmet_rdma_rsp),
458 GFP_KERNEL);
459 if (!queue->rsps)
460 goto out;
461
462 for (i = 0; i < nr_rsps; i++) {
463 struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
464
465 ret = nvmet_rdma_alloc_rsp(ndev, rsp);
466 if (ret)
467 goto out_free;
468
469 list_add_tail(&rsp->free_list, &queue->free_rsps);
470 }
471
472 return 0;
473
474out_free:
475 while (--i >= 0) {
476 struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
477
478 list_del(&rsp->free_list);
479 nvmet_rdma_free_rsp(ndev, rsp);
480 }
481 kfree(queue->rsps);
482out:
483 return ret;
484}
485
486static void nvmet_rdma_free_rsps(struct nvmet_rdma_queue *queue)
487{
488 struct nvmet_rdma_device *ndev = queue->dev;
489 int i, nr_rsps = queue->recv_queue_size * 2;
490
491 for (i = 0; i < nr_rsps; i++) {
492 struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
493
494 list_del(&rsp->free_list);
495 nvmet_rdma_free_rsp(ndev, rsp);
496 }
497 kfree(queue->rsps);
498}
499
500static int nvmet_rdma_post_recv(struct nvmet_rdma_device *ndev,
501 struct nvmet_rdma_cmd *cmd)
502{
20209384 503 int ret;
8f000cac 504
748ff840
PP		 505 ib_dma_sync_single_for_device(ndev->device,
506 cmd->sge[0].addr, cmd->sge[0].length,
507 DMA_FROM_DEVICE);
508
b0012dd3
MG		 509 if (cmd->nsrq)
510 ret = ib_post_srq_recv(cmd->nsrq->srq, &cmd->wr, NULL);
20209384 511 else
21f90243 512 ret = ib_post_recv(cmd->queue->qp, &cmd->wr, NULL);
20209384
MG		 513
514 if (unlikely(ret))
515 pr_err("post_recv cmd failed\n");
516
517 return ret;
8f000cac
CH		 518}
519
520static void nvmet_rdma_process_wr_wait_list(struct nvmet_rdma_queue *queue)
521{
522 spin_lock(&queue->rsp_wr_wait_lock);
523 while (!list_empty(&queue->rsp_wr_wait_list)) {
524 struct nvmet_rdma_rsp *rsp;
525 bool ret;
526
527 rsp = list_entry(queue->rsp_wr_wait_list.next,
528 struct nvmet_rdma_rsp, wait_list);
529 list_del(&rsp->wait_list);
530
531 spin_unlock(&queue->rsp_wr_wait_lock);
532 ret = nvmet_rdma_execute_command(rsp);
533 spin_lock(&queue->rsp_wr_wait_lock);
534
535 if (!ret) {
536 list_add(&rsp->wait_list, &queue->rsp_wr_wait_list);
537 break;
538 }
539 }
540 spin_unlock(&queue->rsp_wr_wait_lock);
541}
542
b09160c3
IR		 543static u16 nvmet_rdma_check_pi_status(struct ib_mr *sig_mr)
544{
545 struct ib_mr_status mr_status;
546 int ret;
547 u16 status = 0;
548
549 ret = ib_check_mr_status(sig_mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
550 if (ret) {
551 pr_err("ib_check_mr_status failed, ret %d\n", ret);
552 return NVME_SC_INVALID_PI;
553 }
554
555 if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
556 switch (mr_status.sig_err.err_type) {
557 case IB_SIG_BAD_GUARD:
558 status = NVME_SC_GUARD_CHECK;
559 break;
560 case IB_SIG_BAD_REFTAG:
561 status = NVME_SC_REFTAG_CHECK;
562 break;
563 case IB_SIG_BAD_APPTAG:
564 status = NVME_SC_APPTAG_CHECK;
565 break;
566 }
567 pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
568 mr_status.sig_err.err_type,
569 mr_status.sig_err.expected,
570 mr_status.sig_err.actual);
571 }
572
573 return status;
574}
575
576static void nvmet_rdma_set_sig_domain(struct blk_integrity *bi,
577 struct nvme_command *cmd, struct ib_sig_domain *domain,
578 u16 control, u8 pi_type)
579{
580 domain->sig_type = IB_SIG_TYPE_T10_DIF;
581 domain->sig.dif.bg_type = IB_T10DIF_CRC;
582 domain->sig.dif.pi_interval = 1 << bi->interval_exp;
583 domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
584 if (control & NVME_RW_PRINFO_PRCHK_REF)
585 domain->sig.dif.ref_remap = true;
586
587 domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag);
588 domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask);
589 domain->sig.dif.app_escape = true;
590 if (pi_type == NVME_NS_DPS_PI_TYPE3)
591 domain->sig.dif.ref_escape = true;
592}
593
594static void nvmet_rdma_set_sig_attrs(struct nvmet_req *req,
595 struct ib_sig_attrs *sig_attrs)
596{
597 struct nvme_command *cmd = req->cmd;
598 u16 control = le16_to_cpu(cmd->rw.control);
599 u8 pi_type = req->ns->pi_type;
600 struct blk_integrity *bi;
601
602 bi = bdev_get_integrity(req->ns->bdev);
603
604 memset(sig_attrs, 0, sizeof(*sig_attrs));
605
606 if (control & NVME_RW_PRINFO_PRACT) {
607 /* for WRITE_INSERT/READ_STRIP no wire domain */
608 sig_attrs->wire.sig_type = IB_SIG_TYPE_NONE;
609 nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
610 pi_type);
611 /* Clear the PRACT bit since HCA will generate/verify the PI */
612 control &= ~NVME_RW_PRINFO_PRACT;
613 cmd->rw.control = cpu_to_le16(control);
614 /* PI is added by the HW */
615 req->transfer_len += req->metadata_len;
616 } else {
617 /* for WRITE_PASS/READ_PASS both wire/memory domains exist */
618 nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
619 pi_type);
620 nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
621 pi_type);
622 }
623
624 if (control & NVME_RW_PRINFO_PRCHK_REF)
625 sig_attrs->check_mask |= IB_SIG_CHECK_REFTAG;
626 if (control & NVME_RW_PRINFO_PRCHK_GUARD)
627 sig_attrs->check_mask |= IB_SIG_CHECK_GUARD;
628 if (control & NVME_RW_PRINFO_PRCHK_APP)
629 sig_attrs->check_mask |= IB_SIG_CHECK_APPTAG;
630}
631
632static int nvmet_rdma_rw_ctx_init(struct nvmet_rdma_rsp *rsp, u64 addr, u32 key,
633 struct ib_sig_attrs *sig_attrs)
634{
635 struct rdma_cm_id *cm_id = rsp->queue->cm_id;
636 struct nvmet_req *req = &rsp->req;
637 int ret;
638
639 if (req->metadata_len)
640 ret = rdma_rw_ctx_signature_init(&rsp->rw, cm_id->qp,
641 cm_id->port_num, req->sg, req->sg_cnt,
642 req->metadata_sg, req->metadata_sg_cnt, sig_attrs,
643 addr, key, nvmet_data_dir(req));
644 else
645 ret = rdma_rw_ctx_init(&rsp->rw, cm_id->qp, cm_id->port_num,
646 req->sg, req->sg_cnt, 0, addr, key,
647 nvmet_data_dir(req));
648
649 return ret;
650}
651
652static void nvmet_rdma_rw_ctx_destroy(struct nvmet_rdma_rsp *rsp)
653{
654 struct rdma_cm_id *cm_id = rsp->queue->cm_id;
655 struct nvmet_req *req = &rsp->req;
656
657 if (req->metadata_len)
658 rdma_rw_ctx_destroy_signature(&rsp->rw, cm_id->qp,
659 cm_id->port_num, req->sg, req->sg_cnt,
660 req->metadata_sg, req->metadata_sg_cnt,
661 nvmet_data_dir(req));
662 else
663 rdma_rw_ctx_destroy(&rsp->rw, cm_id->qp, cm_id->port_num,
664 req->sg, req->sg_cnt, nvmet_data_dir(req));
665}
8f000cac
CH		 666
667static void nvmet_rdma_release_rsp(struct nvmet_rdma_rsp *rsp)
668{
669 struct nvmet_rdma_queue *queue = rsp->queue;
670
671 atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
672
b09160c3
IR		 673 if (rsp->n_rdma)
674 nvmet_rdma_rw_ctx_destroy(rsp);
8f000cac 675
0d5ee2b2 676 if (rsp->req.sg != rsp->cmd->inline_sg)
c6e3f133 677 nvmet_req_free_sgls(&rsp->req);
8f000cac
CH		 678
679 if (unlikely(!list_empty_careful(&queue->rsp_wr_wait_list)))
680 nvmet_rdma_process_wr_wait_list(queue);
681
682 nvmet_rdma_put_rsp(rsp);
683}
684
685static void nvmet_rdma_error_comp(struct nvmet_rdma_queue *queue)
686{
687 if (queue->nvme_sq.ctrl) {
688 nvmet_ctrl_fatal_error(queue->nvme_sq.ctrl);
689 } else {
690 /*
691 * we didn't setup the controller yet in case
692 * of admin connect error, just disconnect and
693 * cleanup the queue
694 */
695 nvmet_rdma_queue_disconnect(queue);
696 }
697}
698
699static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
700{
701 struct nvmet_rdma_rsp *rsp =
702 container_of(wc->wr_cqe, struct nvmet_rdma_rsp, send_cqe);
d7dcdf9d 703 struct nvmet_rdma_queue *queue = cq->cq_context;
8f000cac
CH		 704
705 nvmet_rdma_release_rsp(rsp);
706
707 if (unlikely(wc->status != IB_WC_SUCCESS &&
708 wc->status != IB_WC_WR_FLUSH_ERR)) {
709 pr_err("SEND for CQE 0x%p failed with status %s (%d).\n",
710 wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
d7dcdf9d 711 nvmet_rdma_error_comp(queue);
8f000cac
CH		 712 }
713}
714
715static void nvmet_rdma_queue_response(struct nvmet_req *req)
716{
717 struct nvmet_rdma_rsp *rsp =
718 container_of(req, struct nvmet_rdma_rsp, req);
719 struct rdma_cm_id *cm_id = rsp->queue->cm_id;
23f96d1f 720 struct ib_send_wr *first_wr;
8f000cac
CH		 721
722 if (rsp->flags & NVMET_RDMA_REQ_INVALIDATE_RKEY) {
723 rsp->send_wr.opcode = IB_WR_SEND_WITH_INV;
724 rsp->send_wr.ex.invalidate_rkey = rsp->invalidate_rkey;
725 } else {
726 rsp->send_wr.opcode = IB_WR_SEND;
727 }
728
b09160c3
IR		 729 if (nvmet_rdma_need_data_out(rsp)) {
730 if (rsp->req.metadata_len)
731 first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp,
732 cm_id->port_num, &rsp->write_cqe, NULL);
733 else
734 first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp,
735 cm_id->port_num, NULL, &rsp->send_wr);
736 } else {
8f000cac 737 first_wr = &rsp->send_wr;
b09160c3 738 }
8f000cac
CH		 739
740 nvmet_rdma_post_recv(rsp->queue->dev, rsp->cmd);
748ff840
PP		 741
742 ib_dma_sync_single_for_device(rsp->queue->dev->device,
743 rsp->send_sge.addr, rsp->send_sge.length,
744 DMA_TO_DEVICE);
745
0a3173a5 746 if (unlikely(ib_post_send(cm_id->qp, first_wr, NULL))) {
8f000cac
CH		 747 pr_err("sending cmd response failed\n");
748 nvmet_rdma_release_rsp(rsp);
749 }
750}
751
752static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc)
753{
754 struct nvmet_rdma_rsp *rsp =
755 container_of(wc->wr_cqe, struct nvmet_rdma_rsp, read_cqe);
ca0f1a80 756 struct nvmet_rdma_queue *queue = wc->qp->qp_context;
b09160c3 757 u16 status = 0;
8f000cac
CH		 758
759 WARN_ON(rsp->n_rdma <= 0);
760 atomic_add(rsp->n_rdma, &queue->sq_wr_avail);
8f000cac
CH		 761 rsp->n_rdma = 0;
762
763 if (unlikely(wc->status != IB_WC_SUCCESS)) {
b09160c3 764 nvmet_rdma_rw_ctx_destroy(rsp);
549f01ae 765 nvmet_req_uninit(&rsp->req);
8f000cac
CH		 766 nvmet_rdma_release_rsp(rsp);
767 if (wc->status != IB_WC_WR_FLUSH_ERR) {
768 pr_info("RDMA READ for CQE 0x%p failed with status %s (%d).\n",
769 wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
770 nvmet_rdma_error_comp(queue);
771 }
772 return;
773 }
774
b09160c3
IR		 775 if (rsp->req.metadata_len)
776 status = nvmet_rdma_check_pi_status(rsp->rw.reg->mr);
777 nvmet_rdma_rw_ctx_destroy(rsp);
778
779 if (unlikely(status))
780 nvmet_req_complete(&rsp->req, status);
781 else
782 rsp->req.execute(&rsp->req);
783}
784
785static void nvmet_rdma_write_data_done(struct ib_cq *cq, struct ib_wc *wc)
786{
787 struct nvmet_rdma_rsp *rsp =
788 container_of(wc->wr_cqe, struct nvmet_rdma_rsp, write_cqe);
789 struct nvmet_rdma_queue *queue = cq->cq_context;
790 struct rdma_cm_id *cm_id = rsp->queue->cm_id;
791 u16 status;
792
793 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY))
794 return;
795
796 WARN_ON(rsp->n_rdma <= 0);
797 atomic_add(rsp->n_rdma, &queue->sq_wr_avail);
798 rsp->n_rdma = 0;
799
800 if (unlikely(wc->status != IB_WC_SUCCESS)) {
801 nvmet_rdma_rw_ctx_destroy(rsp);
802 nvmet_req_uninit(&rsp->req);
803 nvmet_rdma_release_rsp(rsp);
804 if (wc->status != IB_WC_WR_FLUSH_ERR) {
805 pr_info("RDMA WRITE for CQE 0x%p failed with status %s (%d).\n",
806 wc->wr_cqe, ib_wc_status_msg(wc->status),
807 wc->status);
808 nvmet_rdma_error_comp(queue);
809 }
810 return;
811 }
812
813 /*
814 * Upon RDMA completion check the signature status
815 * - if succeeded send good NVMe response
816 * - if failed send bad NVMe response with appropriate error
817 */
818 status = nvmet_rdma_check_pi_status(rsp->rw.reg->mr);
819 if (unlikely(status))
820 rsp->req.cqe->status = cpu_to_le16(status << 1);
821 nvmet_rdma_rw_ctx_destroy(rsp);
822
823 if (unlikely(ib_post_send(cm_id->qp, &rsp->send_wr, NULL))) {
824 pr_err("sending cmd response failed\n");
825 nvmet_rdma_release_rsp(rsp);
826 }
8f000cac
CH		 827}
828
829static void nvmet_rdma_use_inline_sg(struct nvmet_rdma_rsp *rsp, u32 len,
830 u64 off)
831{
0d5ee2b2
SW		 832 int sg_count = num_pages(len);
833 struct scatterlist *sg;
834 int i;
835
836 sg = rsp->cmd->inline_sg;
837 for (i = 0; i < sg_count; i++, sg++) {
838 if (i < sg_count - 1)
839 sg_unmark_end(sg);
840 else
841 sg_mark_end(sg);
842 sg->offset = off;
843 sg->length = min_t(int, len, PAGE_SIZE - off);
844 len -= sg->length;
845 if (!i)
846 off = 0;
847 }
848
849 rsp->req.sg = rsp->cmd->inline_sg;
850 rsp->req.sg_cnt = sg_count;
8f000cac
CH		 851}
852
853static u16 nvmet_rdma_map_sgl_inline(struct nvmet_rdma_rsp *rsp)
854{
855 struct nvme_sgl_desc *sgl = &rsp->req.cmd->common.dptr.sgl;
856 u64 off = le64_to_cpu(sgl->addr);
857 u32 len = le32_to_cpu(sgl->length);
858
762a11df
CK		 859 if (!nvme_is_write(rsp->req.cmd)) {
860 rsp->req.error_loc =
861 offsetof(struct nvme_common_command, opcode);
8f000cac 862 return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
762a11df 863 }
8f000cac 864
0d5ee2b2 865 if (off + len > rsp->queue->dev->inline_data_size) {
8f000cac
CH		 866 pr_err("invalid inline data offset!\n");
867 return NVME_SC_SGL_INVALID_OFFSET | NVME_SC_DNR;
868 }
869
870 /* no data command? */
871 if (!len)
872 return 0;
873
874 nvmet_rdma_use_inline_sg(rsp, len, off);
875 rsp->flags |= NVMET_RDMA_REQ_INLINE_DATA;
5e62d5c9 876 rsp->req.transfer_len += len;
8f000cac
CH		 877 return 0;
878}
879
880static u16 nvmet_rdma_map_sgl_keyed(struct nvmet_rdma_rsp *rsp,
881 struct nvme_keyed_sgl_desc *sgl, bool invalidate)
882{
8f000cac 883 u64 addr = le64_to_cpu(sgl->addr);
8f000cac 884 u32 key = get_unaligned_le32(sgl->key);
b09160c3 885 struct ib_sig_attrs sig_attrs;
8f000cac 886 int ret;
8f000cac 887
5b2322e4
LG		 888 rsp->req.transfer_len = get_unaligned_le24(sgl->length);
889
8f000cac 890 /* no data command? */
5b2322e4 891 if (!rsp->req.transfer_len)
8f000cac
CH		 892 return 0;
893
b09160c3
IR		 894 if (rsp->req.metadata_len)
895 nvmet_rdma_set_sig_attrs(&rsp->req, &sig_attrs);
896
c6e3f133 897 ret = nvmet_req_alloc_sgls(&rsp->req);
59534b9d 898 if (unlikely(ret < 0))
5b2322e4 899 goto error_out;
8f000cac 900
b09160c3 901 ret = nvmet_rdma_rw_ctx_init(rsp, addr, key, &sig_attrs);
59534b9d 902 if (unlikely(ret < 0))
5b2322e4 903 goto error_out;
8f000cac
CH		 904 rsp->n_rdma += ret;
905
906 if (invalidate) {
907 rsp->invalidate_rkey = key;
908 rsp->flags |= NVMET_RDMA_REQ_INVALIDATE_RKEY;
909 }
910
911 return 0;
5b2322e4
LG		 912
913error_out:
914 rsp->req.transfer_len = 0;
915 return NVME_SC_INTERNAL;
8f000cac
CH		 916}
917
918static u16 nvmet_rdma_map_sgl(struct nvmet_rdma_rsp *rsp)
919{
920 struct nvme_keyed_sgl_desc *sgl = &rsp->req.cmd->common.dptr.ksgl;
921
922 switch (sgl->type >> 4) {
923 case NVME_SGL_FMT_DATA_DESC:
924 switch (sgl->type & 0xf) {
925 case NVME_SGL_FMT_OFFSET:
926 return nvmet_rdma_map_sgl_inline(rsp);
927 default:
928 pr_err("invalid SGL subtype: %#x\n", sgl->type);
762a11df
CK		 929 rsp->req.error_loc =
930 offsetof(struct nvme_common_command, dptr);
8f000cac
CH		 931 return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
932 }
933 case NVME_KEY_SGL_FMT_DATA_DESC:
934 switch (sgl->type & 0xf) {
935 case NVME_SGL_FMT_ADDRESS | NVME_SGL_FMT_INVALIDATE:
936 return nvmet_rdma_map_sgl_keyed(rsp, sgl, true);
937 case NVME_SGL_FMT_ADDRESS:
938 return nvmet_rdma_map_sgl_keyed(rsp, sgl, false);
939 default:
940 pr_err("invalid SGL subtype: %#x\n", sgl->type);
762a11df
CK		 941 rsp->req.error_loc =
942 offsetof(struct nvme_common_command, dptr);
8f000cac
CH		 943 return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
944 }
945 default:
946 pr_err("invalid SGL type: %#x\n", sgl->type);
762a11df 947 rsp->req.error_loc = offsetof(struct nvme_common_command, dptr);
8f000cac
CH		 948 return NVME_SC_SGL_INVALID_TYPE | NVME_SC_DNR;
949 }
950}
951
952static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp)
953{
954 struct nvmet_rdma_queue *queue = rsp->queue;
955
956 if (unlikely(atomic_sub_return(1 + rsp->n_rdma,
957 &queue->sq_wr_avail) < 0)) {
958 pr_debug("IB send queue full (needed %d): queue %u cntlid %u\n",
959 1 + rsp->n_rdma, queue->idx,
960 queue->nvme_sq.ctrl->cntlid);
961 atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
962 return false;
963 }
964
965 if (nvmet_rdma_need_data_in(rsp)) {
21f90243 966 if (rdma_rw_ctx_post(&rsp->rw, queue->qp,
8f000cac
CH		 967 queue->cm_id->port_num, &rsp->read_cqe, NULL))
968 nvmet_req_complete(&rsp->req, NVME_SC_DATA_XFER_ERROR);
969 } else {
be3f3114 970 rsp->req.execute(&rsp->req);
8f000cac
CH		 971 }
972
973 return true;
974}
975
976static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue,
977 struct nvmet_rdma_rsp *cmd)
978{
979 u16 status;
980
748ff840
PP		 981 ib_dma_sync_single_for_cpu(queue->dev->device,
982 cmd->cmd->sge[0].addr, cmd->cmd->sge[0].length,
983 DMA_FROM_DEVICE);
984 ib_dma_sync_single_for_cpu(queue->dev->device,
985 cmd->send_sge.addr, cmd->send_sge.length,
986 DMA_TO_DEVICE);
987
8f000cac
CH		 988 if (!nvmet_req_init(&cmd->req, &queue->nvme_cq,
989 &queue->nvme_sq, &nvmet_rdma_ops))
990 return;
991
992 status = nvmet_rdma_map_sgl(cmd);
993 if (status)
994 goto out_err;
995
996 if (unlikely(!nvmet_rdma_execute_command(cmd))) {
997 spin_lock(&queue->rsp_wr_wait_lock);
998 list_add_tail(&cmd->wait_list, &queue->rsp_wr_wait_list);
999 spin_unlock(&queue->rsp_wr_wait_lock);
1000 }
1001
1002 return;
1003
1004out_err:
1005 nvmet_req_complete(&cmd->req, status);
1006}
1007
1008static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
1009{
1010 struct nvmet_rdma_cmd *cmd =
1011 container_of(wc->wr_cqe, struct nvmet_rdma_cmd, cqe);
ca0f1a80 1012 struct nvmet_rdma_queue *queue = wc->qp->qp_context;
8f000cac
CH		 1013 struct nvmet_rdma_rsp *rsp;
1014
1015 if (unlikely(wc->status != IB_WC_SUCCESS)) {
1016 if (wc->status != IB_WC_WR_FLUSH_ERR) {
1017 pr_err("RECV for CQE 0x%p failed with status %s (%d)\n",
1018 wc->wr_cqe, ib_wc_status_msg(wc->status),
1019 wc->status);
1020 nvmet_rdma_error_comp(queue);
1021 }
1022 return;
1023 }
1024
1025 if (unlikely(wc->byte_len < sizeof(struct nvme_command))) {
1026 pr_err("Ctrl Fatal Error: capsule size less than 64 bytes\n");
1027 nvmet_rdma_error_comp(queue);
1028 return;
1029 }
1030
1031 cmd->queue = queue;
1032 rsp = nvmet_rdma_get_rsp(queue);
8407879c
SG		 1033 if (unlikely(!rsp)) {
1034 /*
1035 * we get here only under memory pressure,
1036 * silently drop and have the host retry
1037 * as we can't even fail it.
1038 */
1039 nvmet_rdma_post_recv(queue->dev, cmd);
1040 return;
1041 }
8d61413d 1042 rsp->queue = queue;
8f000cac
CH		 1043 rsp->cmd = cmd;
1044 rsp->flags = 0;
1045 rsp->req.cmd = cmd->nvme_cmd;
8d61413d
SG		 1046 rsp->req.port = queue->port;
1047 rsp->n_rdma = 0;
8f000cac
CH		 1048
1049 if (unlikely(queue->state != NVMET_RDMA_Q_LIVE)) {
1050 unsigned long flags;
1051
1052 spin_lock_irqsave(&queue->state_lock, flags);
1053 if (queue->state == NVMET_RDMA_Q_CONNECTING)
1054 list_add_tail(&rsp->wait_list, &queue->rsp_wait_list);
1055 else
1056 nvmet_rdma_put_rsp(rsp);
1057 spin_unlock_irqrestore(&queue->state_lock, flags);
1058 return;
1059 }
1060
1061 nvmet_rdma_handle_command(queue, rsp);
1062}
1063
b0012dd3
MG		 1064static void nvmet_rdma_destroy_srq(struct nvmet_rdma_srq *nsrq)
1065{
1066 nvmet_rdma_free_cmds(nsrq->ndev, nsrq->cmds, nsrq->ndev->srq_size,
1067 false);
1068 ib_destroy_srq(nsrq->srq);
1069
1070 kfree(nsrq);
1071}
1072
1073static void nvmet_rdma_destroy_srqs(struct nvmet_rdma_device *ndev)
8f000cac 1074{
b0012dd3
MG		 1075 int i;
1076
1077 if (!ndev->srqs)
8f000cac
CH		 1078 return;
1079
b0012dd3
MG		 1080 for (i = 0; i < ndev->srq_count; i++)
1081 nvmet_rdma_destroy_srq(ndev->srqs[i]);
1082
1083 kfree(ndev->srqs);
8f000cac
CH		 1084}
1085
b0012dd3
MG		 1086static struct nvmet_rdma_srq *
1087nvmet_rdma_init_srq(struct nvmet_rdma_device *ndev)
8f000cac
CH		 1088{
1089 struct ib_srq_init_attr srq_attr = { NULL, };
b0012dd3
MG		 1090 size_t srq_size = ndev->srq_size;
1091 struct nvmet_rdma_srq *nsrq;
8f000cac 1092 struct ib_srq *srq;
8f000cac
CH		 1093 int ret, i;
1094
b0012dd3
MG		 1095 nsrq = kzalloc(sizeof(*nsrq), GFP_KERNEL);
1096 if (!nsrq)
1097 return ERR_PTR(-ENOMEM);
8f000cac
CH		 1098
1099 srq_attr.attr.max_wr = srq_size;
0d5ee2b2 1100 srq_attr.attr.max_sge = 1 + ndev->inline_page_count;
8f000cac
CH		 1101 srq_attr.attr.srq_limit = 0;
1102 srq_attr.srq_type = IB_SRQT_BASIC;
1103 srq = ib_create_srq(ndev->pd, &srq_attr);
1104 if (IS_ERR(srq)) {
b0012dd3
MG		 1105 ret = PTR_ERR(srq);
1106 goto out_free;
8f000cac
CH		 1107 }
1108
b0012dd3
MG		 1109 nsrq->cmds = nvmet_rdma_alloc_cmds(ndev, srq_size, false);
1110 if (IS_ERR(nsrq->cmds)) {
1111 ret = PTR_ERR(nsrq->cmds);
8f000cac
CH		 1112 goto out_destroy_srq;
1113 }
1114
b0012dd3
MG		 1115 nsrq->srq = srq;
1116 nsrq->ndev = ndev;
8f000cac 1117
20209384 1118 for (i = 0; i < srq_size; i++) {
b0012dd3
MG		 1119 nsrq->cmds[i].nsrq = nsrq;
1120 ret = nvmet_rdma_post_recv(ndev, &nsrq->cmds[i]);
20209384
MG		 1121 if (ret)
1122 goto out_free_cmds;
1123 }
8f000cac 1124
b0012dd3 1125 return nsrq;
8f000cac 1126
20209384 1127out_free_cmds:
b0012dd3 1128 nvmet_rdma_free_cmds(ndev, nsrq->cmds, srq_size, false);
8f000cac
CH		 1129out_destroy_srq:
1130 ib_destroy_srq(srq);
b0012dd3
MG		 1131out_free:
1132 kfree(nsrq);
1133 return ERR_PTR(ret);
1134}
1135
1136static int nvmet_rdma_init_srqs(struct nvmet_rdma_device *ndev)
1137{
1138 int i, ret;
1139
1140 if (!ndev->device->attrs.max_srq_wr || !ndev->device->attrs.max_srq) {
1141 /*
1142 * If SRQs aren't supported we just go ahead and use normal
1143 * non-shared receive queues.
1144 */
1145 pr_info("SRQ requested but not supported.\n");
1146 return 0;
1147 }
1148
1149 ndev->srq_size = min(ndev->device->attrs.max_srq_wr,
1150 nvmet_rdma_srq_size);
1151 ndev->srq_count = min(ndev->device->num_comp_vectors,
1152 ndev->device->attrs.max_srq);
1153
1154 ndev->srqs = kcalloc(ndev->srq_count, sizeof(*ndev->srqs), GFP_KERNEL);
1155 if (!ndev->srqs)
1156 return -ENOMEM;
1157
1158 for (i = 0; i < ndev->srq_count; i++) {
1159 ndev->srqs[i] = nvmet_rdma_init_srq(ndev);
1160 if (IS_ERR(ndev->srqs[i])) {
1161 ret = PTR_ERR(ndev->srqs[i]);
1162 goto err_srq;
1163 }
1164 }
1165
1166 return 0;
1167
1168err_srq:
1169 while (--i >= 0)
1170 nvmet_rdma_destroy_srq(ndev->srqs[i]);
1171 kfree(ndev->srqs);
8f000cac
CH		 1172 return ret;
1173}
1174
1175static void nvmet_rdma_free_dev(struct kref *ref)
1176{
1177 struct nvmet_rdma_device *ndev =
1178 container_of(ref, struct nvmet_rdma_device, ref);
1179
1180 mutex_lock(&device_list_mutex);
1181 list_del(&ndev->entry);
1182 mutex_unlock(&device_list_mutex);
1183
b0012dd3 1184 nvmet_rdma_destroy_srqs(ndev);
8f000cac
CH		 1185 ib_dealloc_pd(ndev->pd);
1186
1187 kfree(ndev);
1188}
1189
1190static struct nvmet_rdma_device *
1191nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id)
1192{
a032e4f6
SG		 1193 struct nvmet_rdma_port *port = cm_id->context;
1194 struct nvmet_port *nport = port->nport;
8f000cac 1195 struct nvmet_rdma_device *ndev;
0d5ee2b2
SW		 1196 int inline_page_count;
1197 int inline_sge_count;
8f000cac
CH		 1198 int ret;
1199
1200 mutex_lock(&device_list_mutex);
1201 list_for_each_entry(ndev, &device_list, entry) {
1202 if (ndev->device->node_guid == cm_id->device->node_guid &&
1203 kref_get_unless_zero(&ndev->ref))
1204 goto out_unlock;
1205 }
1206
1207 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
1208 if (!ndev)
1209 goto out_err;
1210
a032e4f6 1211 inline_page_count = num_pages(nport->inline_data_size);
0d5ee2b2 1212 inline_sge_count = max(cm_id->device->attrs.max_sge_rd,
0a3173a5 1213 cm_id->device->attrs.max_recv_sge) - 1;
0d5ee2b2
SW		 1214 if (inline_page_count > inline_sge_count) {
1215 pr_warn("inline_data_size %d cannot be supported by device %s. Reducing to %lu.\n",
a032e4f6 1216 nport->inline_data_size, cm_id->device->name,
0d5ee2b2 1217 inline_sge_count * PAGE_SIZE);
a032e4f6 1218 nport->inline_data_size = inline_sge_count * PAGE_SIZE;
0d5ee2b2
SW		 1219 inline_page_count = inline_sge_count;
1220 }
a032e4f6 1221 ndev->inline_data_size = nport->inline_data_size;
0d5ee2b2 1222 ndev->inline_page_count = inline_page_count;
7a846656
IR		 1223
1224 if (nport->pi_enable && !(cm_id->device->attrs.device_cap_flags &
1225 IB_DEVICE_INTEGRITY_HANDOVER)) {
1226 pr_warn("T10-PI is not supported by device %s. Disabling it\n",
1227 cm_id->device->name);
1228 nport->pi_enable = false;
1229 }
1230
8f000cac
CH		 1231 ndev->device = cm_id->device;
1232 kref_init(&ndev->ref);
1233
ed082d36 1234 ndev->pd = ib_alloc_pd(ndev->device, 0);
8f000cac
CH		 1235 if (IS_ERR(ndev->pd))
1236 goto out_free_dev;
1237
1238 if (nvmet_rdma_use_srq) {
b0012dd3 1239 ret = nvmet_rdma_init_srqs(ndev);
8f000cac
CH		 1240 if (ret)
1241 goto out_free_pd;
1242 }
1243
1244 list_add(&ndev->entry, &device_list);
1245out_unlock:
1246 mutex_unlock(&device_list_mutex);
1247 pr_debug("added %s.\n", ndev->device->name);
1248 return ndev;
1249
1250out_free_pd:
1251 ib_dealloc_pd(ndev->pd);
1252out_free_dev:
1253 kfree(ndev);
1254out_err:
1255 mutex_unlock(&device_list_mutex);
1256 return NULL;
1257}
1258
1259static int nvmet_rdma_create_queue_ib(struct nvmet_rdma_queue *queue)
1260{
1261 struct ib_qp_init_attr qp_attr;
1262 struct nvmet_rdma_device *ndev = queue->dev;
b0012dd3 1263 int nr_cqe, ret, i, factor;
8f000cac
CH		 1264
1265 /*
1266 * Reserve CQ slots for RECV + RDMA_READ/RDMA_WRITE + RDMA_SEND.
1267 */
1268 nr_cqe = queue->recv_queue_size + 2 * queue->send_queue_size;
1269
ca0f1a80
YF		 1270 queue->cq = ib_cq_pool_get(ndev->device, nr_cqe + 1,
1271 queue->comp_vector, IB_POLL_WORKQUEUE);
8f000cac
CH		 1272 if (IS_ERR(queue->cq)) {
1273 ret = PTR_ERR(queue->cq);
1274 pr_err("failed to create CQ cqe= %d ret= %d\n",
1275 nr_cqe + 1, ret);
1276 goto out;
1277 }
1278
1279 memset(&qp_attr, 0, sizeof(qp_attr));
1280 qp_attr.qp_context = queue;
1281 qp_attr.event_handler = nvmet_rdma_qp_event;
1282 qp_attr.send_cq = queue->cq;
1283 qp_attr.recv_cq = queue->cq;
1284 qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
1285 qp_attr.qp_type = IB_QPT_RC;
1286 /* +1 for drain */
1287 qp_attr.cap.max_send_wr = queue->send_queue_size + 1;
c363f249
MG		 1288 factor = rdma_rw_mr_factor(ndev->device, queue->cm_id->port_num,
1289 1 << NVMET_RDMA_MAX_MDTS);
1290 qp_attr.cap.max_rdma_ctxs = queue->send_queue_size * factor;
8f000cac 1291 qp_attr.cap.max_send_sge = max(ndev->device->attrs.max_sge_rd,
33023fb8 1292 ndev->device->attrs.max_send_sge);
8f000cac 1293
b0012dd3
MG		 1294 if (queue->nsrq) {
1295 qp_attr.srq = queue->nsrq->srq;
8f000cac
CH		 1296 } else {
1297 /* +1 for drain */
1298 qp_attr.cap.max_recv_wr = 1 + queue->recv_queue_size;
0d5ee2b2 1299 qp_attr.cap.max_recv_sge = 1 + ndev->inline_page_count;
8f000cac
CH		 1300 }
1301
b09160c3
IR		 1302 if (queue->port->pi_enable && queue->host_qid)
1303 qp_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
1304
8f000cac
CH		 1305 ret = rdma_create_qp(queue->cm_id, ndev->pd, &qp_attr);
1306 if (ret) {
1307 pr_err("failed to create_qp ret= %d\n", ret);
1308 goto err_destroy_cq;
1309 }
21f90243 1310 queue->qp = queue->cm_id->qp;
8f000cac
CH		 1311
1312 atomic_set(&queue->sq_wr_avail, qp_attr.cap.max_send_wr);
1313
1314 pr_debug("%s: max_cqe= %d max_sge= %d sq_size = %d cm_id= %p\n",
1315 __func__, queue->cq->cqe, qp_attr.cap.max_send_sge,
1316 qp_attr.cap.max_send_wr, queue->cm_id);
1317
b0012dd3 1318 if (!queue->nsrq) {
8f000cac
CH		 1319 for (i = 0; i < queue->recv_queue_size; i++) {
1320 queue->cmds[i].queue = queue;
20209384
MG		 1321 ret = nvmet_rdma_post_recv(ndev, &queue->cmds[i]);
1322 if (ret)
1323 goto err_destroy_qp;
8f000cac
CH		 1324 }
1325 }
1326
1327out:
1328 return ret;
1329
20209384
MG		 1330err_destroy_qp:
1331 rdma_destroy_qp(queue->cm_id);
8f000cac 1332err_destroy_cq:
ca0f1a80 1333 ib_cq_pool_put(queue->cq, nr_cqe + 1);
8f000cac
CH		 1334 goto out;
1335}
1336
1337static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue)
1338{
21f90243
IR		 1339 ib_drain_qp(queue->qp);
1340 if (queue->cm_id)
1341 rdma_destroy_id(queue->cm_id);
1342 ib_destroy_qp(queue->qp);
ca0f1a80
YF		 1343 ib_cq_pool_put(queue->cq, queue->recv_queue_size + 2 *
1344 queue->send_queue_size + 1);
8f000cac
CH		 1345}
1346
1347static void nvmet_rdma_free_queue(struct nvmet_rdma_queue *queue)
1348{
424125a0 1349 pr_debug("freeing queue %d\n", queue->idx);
8f000cac
CH		 1350
1351 nvmet_sq_destroy(&queue->nvme_sq);
1352
1353 nvmet_rdma_destroy_queue_ib(queue);
b0012dd3 1354 if (!queue->nsrq) {
8f000cac
CH		 1355 nvmet_rdma_free_cmds(queue->dev, queue->cmds,
1356 queue->recv_queue_size,
1357 !queue->host_qid);
1358 }
1359 nvmet_rdma_free_rsps(queue);
1360 ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
1361 kfree(queue);
1362}
1363
1364static void nvmet_rdma_release_queue_work(struct work_struct *w)
1365{
1366 struct nvmet_rdma_queue *queue =
1367 container_of(w, struct nvmet_rdma_queue, release_work);
8f000cac
CH		 1368 struct nvmet_rdma_device *dev = queue->dev;
1369
1370 nvmet_rdma_free_queue(queue);
d8f7750a 1371
8f000cac
CH		 1372 kref_put(&dev->ref, nvmet_rdma_free_dev);
1373}
1374
1375static int
1376nvmet_rdma_parse_cm_connect_req(struct rdma_conn_param *conn,
1377 struct nvmet_rdma_queue *queue)
1378{
1379 struct nvme_rdma_cm_req *req;
1380
1381 req = (struct nvme_rdma_cm_req *)conn->private_data;
1382 if (!req || conn->private_data_len == 0)
1383 return NVME_RDMA_CM_INVALID_LEN;
1384
1385 if (le16_to_cpu(req->recfmt) != NVME_RDMA_CM_FMT_1_0)
1386 return NVME_RDMA_CM_INVALID_RECFMT;
1387
1388 queue->host_qid = le16_to_cpu(req->qid);
1389
1390 /*
b825b44c 1391 * req->hsqsize corresponds to our recv queue size plus 1
8f000cac
CH		 1392 * req->hrqsize corresponds to our send queue size
1393 */
b825b44c 1394 queue->recv_queue_size = le16_to_cpu(req->hsqsize) + 1;
8f000cac
CH		 1395 queue->send_queue_size = le16_to_cpu(req->hrqsize);
1396
7aa1f427 1397 if (!queue->host_qid && queue->recv_queue_size > NVME_AQ_DEPTH)
8f000cac
CH		 1398 return NVME_RDMA_CM_INVALID_HSQSIZE;
1399
1400 /* XXX: Should we enforce some kind of max for IO queues? */
1401
1402 return 0;
1403}
1404
1405static int nvmet_rdma_cm_reject(struct rdma_cm_id *cm_id,
1406 enum nvme_rdma_cm_status status)
1407{
1408 struct nvme_rdma_cm_rej rej;
1409
7a01a6ea
MG		 1410 pr_debug("rejecting connect request: status %d (%s)\n",
1411 status, nvme_rdma_cm_msg(status));
1412
8f000cac
CH		 1413 rej.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1414 rej.sts = cpu_to_le16(status);
1415
8094ba0a
LR		 1416 return rdma_reject(cm_id, (void *)&rej, sizeof(rej),
1417 IB_CM_REJ_CONSUMER_DEFINED);
8f000cac
CH		 1418}
1419
1420static struct nvmet_rdma_queue *
1421nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev,
1422 struct rdma_cm_id *cm_id,
1423 struct rdma_cm_event *event)
1424{
b09160c3 1425 struct nvmet_rdma_port *port = cm_id->context;
8f000cac
CH		 1426 struct nvmet_rdma_queue *queue;
1427 int ret;
1428
1429 queue = kzalloc(sizeof(*queue), GFP_KERNEL);
1430 if (!queue) {
1431 ret = NVME_RDMA_CM_NO_RSC;
1432 goto out_reject;
1433 }
1434
1435 ret = nvmet_sq_init(&queue->nvme_sq);
70d4281c
BVA		 1436 if (ret) {
1437 ret = NVME_RDMA_CM_NO_RSC;
8f000cac 1438 goto out_free_queue;
70d4281c 1439 }
8f000cac
CH		 1440
1441 ret = nvmet_rdma_parse_cm_connect_req(&event->param.conn, queue);
1442 if (ret)
1443 goto out_destroy_sq;
1444
1445 /*
1446 * Schedules the actual release because calling rdma_destroy_id from
1447 * inside a CM callback would trigger a deadlock. (great API design..)
1448 */
1449 INIT_WORK(&queue->release_work, nvmet_rdma_release_queue_work);
1450 queue->dev = ndev;
1451 queue->cm_id = cm_id;
b09160c3 1452 queue->port = port->nport;
8f000cac
CH		 1453
1454 spin_lock_init(&queue->state_lock);
1455 queue->state = NVMET_RDMA_Q_CONNECTING;
1456 INIT_LIST_HEAD(&queue->rsp_wait_list);
1457 INIT_LIST_HEAD(&queue->rsp_wr_wait_list);
1458 spin_lock_init(&queue->rsp_wr_wait_lock);
1459 INIT_LIST_HEAD(&queue->free_rsps);
1460 spin_lock_init(&queue->rsps_lock);
766dbb17 1461 INIT_LIST_HEAD(&queue->queue_list);
8f000cac
CH		 1462
1463 queue->idx = ida_simple_get(&nvmet_rdma_queue_ida, 0, 0, GFP_KERNEL);
1464 if (queue->idx < 0) {
1465 ret = NVME_RDMA_CM_NO_RSC;
6ccaeb56 1466 goto out_destroy_sq;
8f000cac
CH		 1467 }
1468
b0012dd3
MG		 1469 /*
1470 * Spread the io queues across completion vectors,
1471 * but still keep all admin queues on vector 0.
1472 */
1473 queue->comp_vector = !queue->host_qid ? 0 :
1474 queue->idx % ndev->device->num_comp_vectors;
1475
1476
8f000cac
CH		 1477 ret = nvmet_rdma_alloc_rsps(queue);
1478 if (ret) {
1479 ret = NVME_RDMA_CM_NO_RSC;
1480 goto out_ida_remove;
1481 }
1482
b0012dd3
MG		 1483 if (ndev->srqs) {
1484 queue->nsrq = ndev->srqs[queue->comp_vector % ndev->srq_count];
1485 } else {
8f000cac
CH		 1486 queue->cmds = nvmet_rdma_alloc_cmds(ndev,
1487 queue->recv_queue_size,
1488 !queue->host_qid);
1489 if (IS_ERR(queue->cmds)) {
1490 ret = NVME_RDMA_CM_NO_RSC;
1491 goto out_free_responses;
1492 }
1493 }
1494
1495 ret = nvmet_rdma_create_queue_ib(queue);
1496 if (ret) {
1497 pr_err("%s: creating RDMA queue failed (%d).\n",
1498 __func__, ret);
1499 ret = NVME_RDMA_CM_NO_RSC;
1500 goto out_free_cmds;
1501 }
1502
1503 return queue;
1504
1505out_free_cmds:
b0012dd3 1506 if (!queue->nsrq) {
8f000cac
CH		 1507 nvmet_rdma_free_cmds(queue->dev, queue->cmds,
1508 queue->recv_queue_size,
1509 !queue->host_qid);
1510 }
1511out_free_responses:
1512 nvmet_rdma_free_rsps(queue);
1513out_ida_remove:
1514 ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
1515out_destroy_sq:
1516 nvmet_sq_destroy(&queue->nvme_sq);
1517out_free_queue:
1518 kfree(queue);
1519out_reject:
1520 nvmet_rdma_cm_reject(cm_id, ret);
1521 return NULL;
1522}
1523
1524static void nvmet_rdma_qp_event(struct ib_event *event, void *priv)
1525{
1526 struct nvmet_rdma_queue *queue = priv;
1527
1528 switch (event->event) {
1529 case IB_EVENT_COMM_EST:
1530 rdma_notify(queue->cm_id, event->event);
1531 break;
b0012dd3
MG		 1532 case IB_EVENT_QP_LAST_WQE_REACHED:
1533 pr_debug("received last WQE reached event for queue=0x%p\n",
1534 queue);
1535 break;
8f000cac 1536 default:
675796be
MG		 1537 pr_err("received IB QP event: %s (%d)\n",
1538 ib_event_msg(event->event), event->event);
8f000cac
CH		 1539 break;
1540 }
1541}
1542
1543static int nvmet_rdma_cm_accept(struct rdma_cm_id *cm_id,
1544 struct nvmet_rdma_queue *queue,
1545 struct rdma_conn_param *p)
1546{
1547 struct rdma_conn_param param = { };
1548 struct nvme_rdma_cm_rep priv = { };
1549 int ret = -ENOMEM;
1550
1551 param.rnr_retry_count = 7;
1552 param.flow_control = 1;
1553 param.initiator_depth = min_t(u8, p->initiator_depth,
1554 queue->dev->device->attrs.max_qp_init_rd_atom);
1555 param.private_data = &priv;
1556 param.private_data_len = sizeof(priv);
1557 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1558 priv.crqsize = cpu_to_le16(queue->recv_queue_size);
1559
1560 ret = rdma_accept(cm_id, &param);
1561 if (ret)
1562 pr_err("rdma_accept failed (error code = %d)\n", ret);
1563
1564 return ret;
1565}
1566
1567static int nvmet_rdma_queue_connect(struct rdma_cm_id *cm_id,
1568 struct rdma_cm_event *event)
1569{
1570 struct nvmet_rdma_device *ndev;
1571 struct nvmet_rdma_queue *queue;
1572 int ret = -EINVAL;
1573
1574 ndev = nvmet_rdma_find_get_device(cm_id);
1575 if (!ndev) {
8f000cac
CH		 1576 nvmet_rdma_cm_reject(cm_id, NVME_RDMA_CM_NO_RSC);
1577 return -ECONNREFUSED;
1578 }
1579
1580 queue = nvmet_rdma_alloc_queue(ndev, cm_id, event);
1581 if (!queue) {
1582 ret = -ENOMEM;
1583 goto put_device;
1584 }
8f000cac 1585
777dc823
SG		 1586 if (queue->host_qid == 0) {
1587 /* Let inflight controller teardown complete */
d39aa497 1588 flush_scheduled_work();
777dc823
SG		 1589 }
1590
8f000cac 1591 ret = nvmet_rdma_cm_accept(cm_id, queue, &event->param.conn);
e1a2ee24 1592 if (ret) {
21f90243
IR		 1593 /*
1594 * Don't destroy the cm_id in free path, as we implicitly
1595 * destroy the cm_id here with non-zero ret code.
1596 */
1597 queue->cm_id = NULL;
1598 goto free_queue;
e1a2ee24 1599 }
8f000cac
CH		 1600
1601 mutex_lock(&nvmet_rdma_queue_mutex);
1602 list_add_tail(&queue->queue_list, &nvmet_rdma_queue_list);
1603 mutex_unlock(&nvmet_rdma_queue_mutex);
1604
1605 return 0;
1606
21f90243
IR		 1607free_queue:
1608 nvmet_rdma_free_queue(queue);
8f000cac
CH		 1609put_device:
1610 kref_put(&ndev->ref, nvmet_rdma_free_dev);
1611
1612 return ret;
1613}
1614
1615static void nvmet_rdma_queue_established(struct nvmet_rdma_queue *queue)
1616{
1617 unsigned long flags;
1618
1619 spin_lock_irqsave(&queue->state_lock, flags);
1620 if (queue->state != NVMET_RDMA_Q_CONNECTING) {
1621 pr_warn("trying to establish a connected queue\n");
1622 goto out_unlock;
1623 }
1624 queue->state = NVMET_RDMA_Q_LIVE;
1625
1626 while (!list_empty(&queue->rsp_wait_list)) {
1627 struct nvmet_rdma_rsp *cmd;
1628
1629 cmd = list_first_entry(&queue->rsp_wait_list,
1630 struct nvmet_rdma_rsp, wait_list);
1631 list_del(&cmd->wait_list);
1632
1633 spin_unlock_irqrestore(&queue->state_lock, flags);
1634 nvmet_rdma_handle_command(queue, cmd);
1635 spin_lock_irqsave(&queue->state_lock, flags);
1636 }
1637
1638out_unlock:
1639 spin_unlock_irqrestore(&queue->state_lock, flags);
1640}
1641
1642static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
1643{
1644 bool disconnect = false;
1645 unsigned long flags;
1646
1647 pr_debug("cm_id= %p queue->state= %d\n", queue->cm_id, queue->state);
1648
1649 spin_lock_irqsave(&queue->state_lock, flags);
1650 switch (queue->state) {
1651 case NVMET_RDMA_Q_CONNECTING:
9ceb7863
IR		 1652 while (!list_empty(&queue->rsp_wait_list)) {
1653 struct nvmet_rdma_rsp *rsp;
1654
1655 rsp = list_first_entry(&queue->rsp_wait_list,
1656 struct nvmet_rdma_rsp,
1657 wait_list);
1658 list_del(&rsp->wait_list);
1659 nvmet_rdma_put_rsp(rsp);
1660 }
1661 fallthrough;
8f000cac 1662 case NVMET_RDMA_Q_LIVE:
8f000cac 1663 queue->state = NVMET_RDMA_Q_DISCONNECTING;
d8f7750a 1664 disconnect = true;
8f000cac
CH		 1665 break;
1666 case NVMET_RDMA_Q_DISCONNECTING:
1667 break;
1668 }
1669 spin_unlock_irqrestore(&queue->state_lock, flags);
1670
1671 if (disconnect) {
1672 rdma_disconnect(queue->cm_id);
d39aa497 1673 schedule_work(&queue->release_work);
8f000cac
CH		 1674 }
1675}
1676
1677static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
1678{
1679 bool disconnect = false;
1680
1681 mutex_lock(&nvmet_rdma_queue_mutex);
1682 if (!list_empty(&queue->queue_list)) {
1683 list_del_init(&queue->queue_list);
1684 disconnect = true;
1685 }
1686 mutex_unlock(&nvmet_rdma_queue_mutex);
1687
1688 if (disconnect)
1689 __nvmet_rdma_queue_disconnect(queue);
1690}
1691
1692static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id,
1693 struct nvmet_rdma_queue *queue)
1694{
1695 WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING);
1696
766dbb17
SG		 1697 mutex_lock(&nvmet_rdma_queue_mutex);
1698 if (!list_empty(&queue->queue_list))
1699 list_del_init(&queue->queue_list);
1700 mutex_unlock(&nvmet_rdma_queue_mutex);
1701
1702 pr_err("failed to connect queue %d\n", queue->idx);
d39aa497 1703 schedule_work(&queue->release_work);
8f000cac
CH		 1704}
1705
d8f7750a
SG		 1706/**
1707 * nvme_rdma_device_removal() - Handle RDMA device removal
f1d4ef7d 1708 * @cm_id: rdma_cm id, used for nvmet port
d8f7750a 1709 * @queue: nvmet rdma queue (cm id qp_context)
d8f7750a
SG		 1710 *
1711 * DEVICE_REMOVAL event notifies us that the RDMA device is about
f1d4ef7d
SG		 1712 * to unplug. Note that this event can be generated on a normal
1713 * queue cm_id and/or a device bound listener cm_id (where in this
1714 * case queue will be null).
d8f7750a 1715 *
f1d4ef7d
SG		 1716 * We registered an ib_client to handle device removal for queues,
1717 * so we only need to handle the listening port cm_ids. In this case
d8f7750a
SG		 1718 * we nullify the priv to prevent double cm_id destruction and destroying
1719 * the cm_id implicitely by returning a non-zero rc to the callout.
1720 */
1721static int nvmet_rdma_device_removal(struct rdma_cm_id *cm_id,
1722 struct nvmet_rdma_queue *queue)
1723{
a032e4f6 1724 struct nvmet_rdma_port *port;
d8f7750a 1725
f1d4ef7d 1726 if (queue) {
d8f7750a 1727 /*
f1d4ef7d
SG		 1728 * This is a queue cm_id. we have registered
1729 * an ib_client to handle queues removal
1730 * so don't interfear and just return.
d8f7750a 1731 */
f1d4ef7d 1732 return 0;
d8f7750a
SG		 1733 }
1734
f1d4ef7d
SG		 1735 port = cm_id->context;
1736
1737 /*
1738 * This is a listener cm_id. Make sure that
1739 * future remove_port won't invoke a double
1740 * cm_id destroy. use atomic xchg to make sure
1741 * we don't compete with remove_port.
1742 */
a032e4f6 1743 if (xchg(&port->cm_id, NULL) != cm_id)
f1d4ef7d
SG		 1744 return 0;
1745
d8f7750a
SG		 1746 /*
1747 * We need to return 1 so that the core will destroy
1748 * it's own ID. What a great API design..
1749 */
1750 return 1;
1751}
1752
8f000cac
CH		 1753static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id,
1754 struct rdma_cm_event *event)
1755{
1756 struct nvmet_rdma_queue *queue = NULL;
1757 int ret = 0;
1758
1759 if (cm_id->qp)
1760 queue = cm_id->qp->qp_context;
1761
1762 pr_debug("%s (%d): status %d id %p\n",
1763 rdma_event_msg(event->event), event->event,
1764 event->status, cm_id);
1765
1766 switch (event->event) {
1767 case RDMA_CM_EVENT_CONNECT_REQUEST:
1768 ret = nvmet_rdma_queue_connect(cm_id, event);
1769 break;
1770 case RDMA_CM_EVENT_ESTABLISHED:
1771 nvmet_rdma_queue_established(queue);
1772 break;
1773 case RDMA_CM_EVENT_ADDR_CHANGE:
a032e4f6
SG		 1774 if (!queue) {
1775 struct nvmet_rdma_port *port = cm_id->context;
1776
1777 schedule_delayed_work(&port->repair_work, 0);
1778 break;
1779 }
df561f66 1780 fallthrough;
8f000cac 1781 case RDMA_CM_EVENT_DISCONNECTED:
8f000cac 1782 case RDMA_CM_EVENT_TIMEWAIT_EXIT:
e1a2ee24 1783 nvmet_rdma_queue_disconnect(queue);
d8f7750a
SG		 1784 break;
1785 case RDMA_CM_EVENT_DEVICE_REMOVAL:
1786 ret = nvmet_rdma_device_removal(cm_id, queue);
8f000cac
CH		 1787 break;
1788 case RDMA_CM_EVENT_REJECTED:
512fb1b3
SW		 1789 pr_debug("Connection rejected: %s\n",
1790 rdma_reject_msg(cm_id, event->status));
df561f66 1791 fallthrough;
8f000cac
CH		 1792 case RDMA_CM_EVENT_UNREACHABLE:
1793 case RDMA_CM_EVENT_CONNECT_ERROR:
1794 nvmet_rdma_queue_connect_fail(cm_id, queue);
1795 break;
1796 default:
1797 pr_err("received unrecognized RDMA CM event %d\n",
1798 event->event);
1799 break;
1800 }
1801
1802 return ret;
1803}
1804
1805static void nvmet_rdma_delete_ctrl(struct nvmet_ctrl *ctrl)
1806{
1807 struct nvmet_rdma_queue *queue;
1808
1809restart:
1810 mutex_lock(&nvmet_rdma_queue_mutex);
1811 list_for_each_entry(queue, &nvmet_rdma_queue_list, queue_list) {
1812 if (queue->nvme_sq.ctrl == ctrl) {
1813 list_del_init(&queue->queue_list);
1814 mutex_unlock(&nvmet_rdma_queue_mutex);
1815
1816 __nvmet_rdma_queue_disconnect(queue);
1817 goto restart;
1818 }
1819 }
1820 mutex_unlock(&nvmet_rdma_queue_mutex);
1821}
1822
a032e4f6 1823static void nvmet_rdma_disable_port(struct nvmet_rdma_port *port)
8f000cac 1824{
a032e4f6 1825 struct rdma_cm_id *cm_id = xchg(&port->cm_id, NULL);
8f000cac 1826
a032e4f6
SG		 1827 if (cm_id)
1828 rdma_destroy_id(cm_id);
1829}
0d5ee2b2 1830
a032e4f6
SG		 1831static int nvmet_rdma_enable_port(struct nvmet_rdma_port *port)
1832{
1833 struct sockaddr *addr = (struct sockaddr *)&port->addr;
1834 struct rdma_cm_id *cm_id;
1835 int ret;
8f000cac
CH		 1836
1837 cm_id = rdma_create_id(&init_net, nvmet_rdma_cm_handler, port,
1838 RDMA_PS_TCP, IB_QPT_RC);
1839 if (IS_ERR(cm_id)) {
1840 pr_err("CM ID creation failed\n");
1841 return PTR_ERR(cm_id);
1842 }
1843
670c2a3a
SG		 1844 /*
1845 * Allow both IPv4 and IPv6 sockets to bind a single port
1846 * at the same time.
1847 */
1848 ret = rdma_set_afonly(cm_id, 1);
1849 if (ret) {
1850 pr_err("rdma_set_afonly failed (%d)\n", ret);
1851 goto out_destroy_id;
1852 }
1853
a032e4f6 1854 ret = rdma_bind_addr(cm_id, addr);
8f000cac 1855 if (ret) {
a032e4f6 1856 pr_err("binding CM ID to %pISpcs failed (%d)\n", addr, ret);
8f000cac
CH		 1857 goto out_destroy_id;
1858 }
1859
1860 ret = rdma_listen(cm_id, 128);
1861 if (ret) {
a032e4f6 1862 pr_err("listening to %pISpcs failed (%d)\n", addr, ret);
8f000cac
CH		 1863 goto out_destroy_id;
1864 }
1865
a032e4f6 1866 port->cm_id = cm_id;
8f000cac
CH		 1867 return 0;
1868
1869out_destroy_id:
1870 rdma_destroy_id(cm_id);
1871 return ret;
1872}
1873
a032e4f6 1874static void nvmet_rdma_repair_port_work(struct work_struct *w)
8f000cac 1875{
a032e4f6
SG		 1876 struct nvmet_rdma_port *port = container_of(to_delayed_work(w),
1877 struct nvmet_rdma_port, repair_work);
1878 int ret;
8f000cac 1879
a032e4f6
SG		 1880 nvmet_rdma_disable_port(port);
1881 ret = nvmet_rdma_enable_port(port);
1882 if (ret)
1883 schedule_delayed_work(&port->repair_work, 5 * HZ);
1884}
1885
1886static int nvmet_rdma_add_port(struct nvmet_port *nport)
1887{
1888 struct nvmet_rdma_port *port;
1889 __kernel_sa_family_t af;
1890 int ret;
1891
1892 port = kzalloc(sizeof(*port), GFP_KERNEL);
1893 if (!port)
1894 return -ENOMEM;
1895
1896 nport->priv = port;
1897 port->nport = nport;
1898 INIT_DELAYED_WORK(&port->repair_work, nvmet_rdma_repair_port_work);
1899
1900 switch (nport->disc_addr.adrfam) {
1901 case NVMF_ADDR_FAMILY_IP4:
1902 af = AF_INET;
1903 break;
1904 case NVMF_ADDR_FAMILY_IP6:
1905 af = AF_INET6;
1906 break;
1907 default:
1908 pr_err("address family %d not supported\n",
1909 nport->disc_addr.adrfam);
1910 ret = -EINVAL;
1911 goto out_free_port;
1912 }
1913
1914 if (nport->inline_data_size < 0) {
1915 nport->inline_data_size = NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE;
1916 } else if (nport->inline_data_size > NVMET_RDMA_MAX_INLINE_DATA_SIZE) {
1917 pr_warn("inline_data_size %u is too large, reducing to %u\n",
1918 nport->inline_data_size,
1919 NVMET_RDMA_MAX_INLINE_DATA_SIZE);
1920 nport->inline_data_size = NVMET_RDMA_MAX_INLINE_DATA_SIZE;
1921 }
1922
1923 ret = inet_pton_with_scope(&init_net, af, nport->disc_addr.traddr,
1924 nport->disc_addr.trsvcid, &port->addr);
1925 if (ret) {
1926 pr_err("malformed ip/port passed: %s:%s\n",
1927 nport->disc_addr.traddr, nport->disc_addr.trsvcid);
1928 goto out_free_port;
1929 }
1930
1931 ret = nvmet_rdma_enable_port(port);
1932 if (ret)
1933 goto out_free_port;
1934
1935 pr_info("enabling port %d (%pISpcs)\n",
1936 le16_to_cpu(nport->disc_addr.portid),
1937 (struct sockaddr *)&port->addr);
1938
1939 return 0;
1940
1941out_free_port:
1942 kfree(port);
1943 return ret;
1944}
1945
1946static void nvmet_rdma_remove_port(struct nvmet_port *nport)
8f000cac 1947{
a032e4f6 1948 struct nvmet_rdma_port *port = nport->priv;
8f000cac 1949
a032e4f6
SG		 1950 cancel_delayed_work_sync(&port->repair_work);
1951 nvmet_rdma_disable_port(port);
1952 kfree(port);
8f000cac
CH		 1953}
1954
4c652685 1955static void nvmet_rdma_disc_port_addr(struct nvmet_req *req,
a032e4f6 1956 struct nvmet_port *nport, char *traddr)
4c652685 1957{
a032e4f6
SG		 1958 struct nvmet_rdma_port *port = nport->priv;
1959 struct rdma_cm_id *cm_id = port->cm_id;
4c652685
SG		 1960
1961 if (inet_addr_is_any((struct sockaddr *)&cm_id->route.addr.src_addr)) {
1962 struct nvmet_rdma_rsp *rsp =
1963 container_of(req, struct nvmet_rdma_rsp, req);
1964 struct rdma_cm_id *req_cm_id = rsp->queue->cm_id;
1965 struct sockaddr *addr = (void *)&req_cm_id->route.addr.src_addr;
1966
1967 sprintf(traddr, "%pISc", addr);
1968 } else {
a032e4f6 1969 memcpy(traddr, nport->disc_addr.traddr, NVMF_TRADDR_SIZE);
4c652685
SG		 1970 }
1971}
1972
ec6d20e1
MG		 1973static u8 nvmet_rdma_get_mdts(const struct nvmet_ctrl *ctrl)
1974{
b09160c3
IR		 1975 if (ctrl->pi_support)
1976 return NVMET_RDMA_MAX_METADATA_MDTS;
ec6d20e1
MG		 1977 return NVMET_RDMA_MAX_MDTS;
1978}
1979
e929f06d 1980static const struct nvmet_fabrics_ops nvmet_rdma_ops = {
8f000cac
CH		 1981 .owner = THIS_MODULE,
1982 .type = NVMF_TRTYPE_RDMA,
8f000cac 1983 .msdbd = 1,
6fa350f7 1984 .flags = NVMF_KEYED_SGLS | NVMF_METADATA_SUPPORTED,
8f000cac
CH		 1985 .add_port = nvmet_rdma_add_port,
1986 .remove_port = nvmet_rdma_remove_port,
1987 .queue_response = nvmet_rdma_queue_response,
1988 .delete_ctrl = nvmet_rdma_delete_ctrl,
4c652685 1989 .disc_traddr = nvmet_rdma_disc_port_addr,
ec6d20e1 1990 .get_mdts = nvmet_rdma_get_mdts,
8f000cac
CH		 1991};
1992
f1d4ef7d
SG		 1993static void nvmet_rdma_remove_one(struct ib_device *ib_device, void *client_data)
1994{
43b92fd2 1995 struct nvmet_rdma_queue *queue, *tmp;
a3dd7d00
MG		 1996 struct nvmet_rdma_device *ndev;
1997 bool found = false;
1998
1999 mutex_lock(&device_list_mutex);
2000 list_for_each_entry(ndev, &device_list, entry) {
2001 if (ndev->device == ib_device) {
2002 found = true;
2003 break;
2004 }
2005 }
2006 mutex_unlock(&device_list_mutex);
2007
2008 if (!found)
2009 return;
f1d4ef7d 2010
a3dd7d00
MG		 2011 /*
2012 * IB Device that is used by nvmet controllers is being removed,
2013 * delete all queues using this device.
2014 */
f1d4ef7d 2015 mutex_lock(&nvmet_rdma_queue_mutex);
43b92fd2
IR		 2016 list_for_each_entry_safe(queue, tmp, &nvmet_rdma_queue_list,
2017 queue_list) {
f1d4ef7d
SG		 2018 if (queue->dev->device != ib_device)
2019 continue;
2020
2021 pr_info("Removing queue %d\n", queue->idx);
43b92fd2 2022 list_del_init(&queue->queue_list);
f1d4ef7d
SG		 2023 __nvmet_rdma_queue_disconnect(queue);
2024 }
2025 mutex_unlock(&nvmet_rdma_queue_mutex);
2026
2027 flush_scheduled_work();
2028}
2029
2030static struct ib_client nvmet_rdma_ib_client = {
2031 .name = "nvmet_rdma",
f1d4ef7d
SG		 2032 .remove = nvmet_rdma_remove_one
2033};
2034
8f000cac
CH		 2035static int __init nvmet_rdma_init(void)
2036{
f1d4ef7d
SG		 2037 int ret;
2038
2039 ret = ib_register_client(&nvmet_rdma_ib_client);
2040 if (ret)
2041 return ret;
2042
2043 ret = nvmet_register_transport(&nvmet_rdma_ops);
2044 if (ret)
2045 goto err_ib_client;
2046
2047 return 0;
2048
2049err_ib_client:
2050 ib_unregister_client(&nvmet_rdma_ib_client);
2051 return ret;
8f000cac
CH		 2052}
2053
2054static void __exit nvmet_rdma_exit(void)
2055{
8f000cac 2056 nvmet_unregister_transport(&nvmet_rdma_ops);
f1d4ef7d 2057 ib_unregister_client(&nvmet_rdma_ib_client);
cb4876e8 2058 WARN_ON_ONCE(!list_empty(&nvmet_rdma_queue_list));
8f000cac
CH		 2059 ida_destroy(&nvmet_rdma_queue_ida);
2060}
2061
2062module_init(nvmet_rdma_init);
2063module_exit(nvmet_rdma_exit);
2064
2065MODULE_LICENSE("GPL v2");
2066MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */
Linux 6.x block layer and io_uring tree(s)