nvmet: Introduce nvmet_dsm_len() helper
[linux-2.6-block.git] / drivers / nvme / target / admin-cmd.c
CommitLineData
77141dc6 1// SPDX-License-Identifier: GPL-2.0
a07b4970
CH
2/*
3 * NVMe admin command implementation.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
a07b4970
CH
5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7#include <linux/module.h>
b2d09103
IM
8#include <linux/rculist.h>
9
a07b4970 10#include <generated/utsrelease.h>
2d79c7dc 11#include <asm/unaligned.h>
a07b4970
CH
12#include "nvmet.h"
13
14u32 nvmet_get_log_page_len(struct nvme_command *cmd)
15{
16 u32 len = le16_to_cpu(cmd->get_log_page.numdu);
17
18 len <<= 16;
19 len += le16_to_cpu(cmd->get_log_page.numdl);
20 /* NUMD is a 0's based value */
21 len += 1;
22 len *= sizeof(u32);
23
24 return len;
25}
26
d808b7f7
KB
27u64 nvmet_get_log_page_offset(struct nvme_command *cmd)
28{
29 return le64_to_cpu(cmd->get_log_page.lpo);
30}
31
8ab0805f
CH
32static void nvmet_execute_get_log_page_noop(struct nvmet_req *req)
33{
34 nvmet_req_complete(req, nvmet_zero_sgl(req, 0, req->data_len));
35}
36
11ad5077
CK
37static void nvmet_execute_get_log_page_error(struct nvmet_req *req)
38{
39 struct nvmet_ctrl *ctrl = req->sq->ctrl;
11ad5077
CK
40 unsigned long flags;
41 off_t offset = 0;
42 u64 slot;
43 u64 i;
44
45 spin_lock_irqsave(&ctrl->error_lock, flags);
46 slot = ctrl->err_counter % NVMET_ERROR_LOG_SLOTS;
47
48 for (i = 0; i < NVMET_ERROR_LOG_SLOTS; i++) {
5f8badbc
A
49 if (nvmet_copy_to_sgl(req, offset, &ctrl->slots[slot],
50 sizeof(struct nvme_error_slot)))
11ad5077
CK
51 break;
52
53 if (slot == 0)
54 slot = NVMET_ERROR_LOG_SLOTS - 1;
55 else
56 slot--;
57 offset += sizeof(struct nvme_error_slot);
58 }
59 spin_unlock_irqrestore(&ctrl->error_lock, flags);
5f8badbc 60 nvmet_req_complete(req, 0);
11ad5077
CK
61}
62
2d79c7dc
CK
63static u16 nvmet_get_smart_log_nsid(struct nvmet_req *req,
64 struct nvme_smart_log *slog)
65{
2d79c7dc
CK
66 struct nvmet_ns *ns;
67 u64 host_reads, host_writes, data_units_read, data_units_written;
68
2d79c7dc
CK
69 ns = nvmet_find_namespace(req->sq->ctrl, req->cmd->get_log_page.nsid);
70 if (!ns) {
d93cb392 71 pr_err("Could not find namespace id : %d\n",
2d79c7dc 72 le32_to_cpu(req->cmd->get_log_page.nsid));
2da6e005 73 req->error_loc = offsetof(struct nvme_rw_command, nsid);
4185f25a 74 return NVME_SC_INVALID_NS;
2d79c7dc
CK
75 }
76
d5eff33e
CK
77 /* we don't have the right data for file backed ns */
78 if (!ns->bdev)
79 goto out;
80
2d79c7dc 81 host_reads = part_stat_read(ns->bdev->bd_part, ios[READ]);
3bec2e37
TW
82 data_units_read = DIV_ROUND_UP(part_stat_read(ns->bdev->bd_part,
83 sectors[READ]), 1000);
2d79c7dc 84 host_writes = part_stat_read(ns->bdev->bd_part, ios[WRITE]);
3bec2e37
TW
85 data_units_written = DIV_ROUND_UP(part_stat_read(ns->bdev->bd_part,
86 sectors[WRITE]), 1000);
2d79c7dc
CK
87
88 put_unaligned_le64(host_reads, &slog->host_reads[0]);
89 put_unaligned_le64(data_units_read, &slog->data_units_read[0]);
90 put_unaligned_le64(host_writes, &slog->host_writes[0]);
91 put_unaligned_le64(data_units_written, &slog->data_units_written[0]);
d5eff33e 92out:
2d79c7dc 93 nvmet_put_namespace(ns);
4185f25a
SG
94
95 return NVME_SC_SUCCESS;
2d79c7dc
CK
96}
97
98static u16 nvmet_get_smart_log_all(struct nvmet_req *req,
99 struct nvme_smart_log *slog)
100{
2d79c7dc
CK
101 u64 host_reads = 0, host_writes = 0;
102 u64 data_units_read = 0, data_units_written = 0;
103 struct nvmet_ns *ns;
104 struct nvmet_ctrl *ctrl;
105
2d79c7dc
CK
106 ctrl = req->sq->ctrl;
107
108 rcu_read_lock();
109 list_for_each_entry_rcu(ns, &ctrl->subsys->namespaces, dev_link) {
d5eff33e
CK
110 /* we don't have the right data for file backed ns */
111 if (!ns->bdev)
112 continue;
2d79c7dc 113 host_reads += part_stat_read(ns->bdev->bd_part, ios[READ]);
3bec2e37
TW
114 data_units_read += DIV_ROUND_UP(
115 part_stat_read(ns->bdev->bd_part, sectors[READ]), 1000);
2d79c7dc 116 host_writes += part_stat_read(ns->bdev->bd_part, ios[WRITE]);
3bec2e37
TW
117 data_units_written += DIV_ROUND_UP(
118 part_stat_read(ns->bdev->bd_part, sectors[WRITE]), 1000);
2d79c7dc
CK
119
120 }
121 rcu_read_unlock();
122
123 put_unaligned_le64(host_reads, &slog->host_reads[0]);
124 put_unaligned_le64(data_units_read, &slog->data_units_read[0]);
125 put_unaligned_le64(host_writes, &slog->host_writes[0]);
126 put_unaligned_le64(data_units_written, &slog->data_units_written[0]);
127
4185f25a 128 return NVME_SC_SUCCESS;
2d79c7dc
CK
129}
130
8ab0805f 131static void nvmet_execute_get_log_page_smart(struct nvmet_req *req)
a07b4970 132{
8ab0805f
CH
133 struct nvme_smart_log *log;
134 u16 status = NVME_SC_INTERNAL;
23454d59 135 unsigned long flags;
a07b4970 136
8ab0805f 137 if (req->data_len != sizeof(*log))
a07b4970 138 goto out;
a07b4970 139
8ab0805f
CH
140 log = kzalloc(sizeof(*log), GFP_KERNEL);
141 if (!log)
142 goto out;
a07b4970 143
8ab0805f
CH
144 if (req->cmd->get_log_page.nsid == cpu_to_le32(NVME_NSID_ALL))
145 status = nvmet_get_smart_log_all(req, log);
146 else
147 status = nvmet_get_smart_log_nsid(req, log);
148 if (status)
c42d7a30 149 goto out_free_log;
a07b4970 150
23454d59
CK
151 spin_lock_irqsave(&req->sq->ctrl->error_lock, flags);
152 put_unaligned_le64(req->sq->ctrl->err_counter,
153 &log->num_err_log_entries);
154 spin_unlock_irqrestore(&req->sq->ctrl->error_lock, flags);
155
8ab0805f 156 status = nvmet_copy_to_sgl(req, 0, log, sizeof(*log));
c42d7a30
CK
157out_free_log:
158 kfree(log);
a07b4970
CH
159out:
160 nvmet_req_complete(req, status);
161}
162
0866bf0c
CK
163static void nvmet_execute_get_log_cmd_effects_ns(struct nvmet_req *req)
164{
165 u16 status = NVME_SC_INTERNAL;
166 struct nvme_effects_log *log;
167
168 log = kzalloc(sizeof(*log), GFP_KERNEL);
169 if (!log)
170 goto out;
171
172 log->acs[nvme_admin_get_log_page] = cpu_to_le32(1 << 0);
173 log->acs[nvme_admin_identify] = cpu_to_le32(1 << 0);
174 log->acs[nvme_admin_abort_cmd] = cpu_to_le32(1 << 0);
175 log->acs[nvme_admin_set_features] = cpu_to_le32(1 << 0);
176 log->acs[nvme_admin_get_features] = cpu_to_le32(1 << 0);
177 log->acs[nvme_admin_async_event] = cpu_to_le32(1 << 0);
178 log->acs[nvme_admin_keep_alive] = cpu_to_le32(1 << 0);
179
180 log->iocs[nvme_cmd_read] = cpu_to_le32(1 << 0);
181 log->iocs[nvme_cmd_write] = cpu_to_le32(1 << 0);
182 log->iocs[nvme_cmd_flush] = cpu_to_le32(1 << 0);
183 log->iocs[nvme_cmd_dsm] = cpu_to_le32(1 << 0);
184 log->iocs[nvme_cmd_write_zeroes] = cpu_to_le32(1 << 0);
185
186 status = nvmet_copy_to_sgl(req, 0, log, sizeof(*log));
187
188 kfree(log);
189out:
190 nvmet_req_complete(req, status);
191}
192
c16734ea
CH
193static void nvmet_execute_get_log_changed_ns(struct nvmet_req *req)
194{
195 struct nvmet_ctrl *ctrl = req->sq->ctrl;
196 u16 status = NVME_SC_INTERNAL;
197 size_t len;
198
199 if (req->data_len != NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32))
200 goto out;
201
202 mutex_lock(&ctrl->lock);
203 if (ctrl->nr_changed_ns == U32_MAX)
204 len = sizeof(__le32);
205 else
206 len = ctrl->nr_changed_ns * sizeof(__le32);
207 status = nvmet_copy_to_sgl(req, 0, ctrl->changed_ns_list, len);
208 if (!status)
209 status = nvmet_zero_sgl(req, len, req->data_len - len);
210 ctrl->nr_changed_ns = 0;
7114ddeb 211 nvmet_clear_aen_bit(req, NVME_AEN_BIT_NS_ATTR);
c16734ea
CH
212 mutex_unlock(&ctrl->lock);
213out:
214 nvmet_req_complete(req, status);
215}
216
72efd25d
CH
217static u32 nvmet_format_ana_group(struct nvmet_req *req, u32 grpid,
218 struct nvme_ana_group_desc *desc)
219{
220 struct nvmet_ctrl *ctrl = req->sq->ctrl;
221 struct nvmet_ns *ns;
222 u32 count = 0;
223
224 if (!(req->cmd->get_log_page.lsp & NVME_ANA_LOG_RGO)) {
225 rcu_read_lock();
226 list_for_each_entry_rcu(ns, &ctrl->subsys->namespaces, dev_link)
227 if (ns->anagrpid == grpid)
228 desc->nsids[count++] = cpu_to_le32(ns->nsid);
229 rcu_read_unlock();
230 }
231
232 desc->grpid = cpu_to_le32(grpid);
233 desc->nnsids = cpu_to_le32(count);
234 desc->chgcnt = cpu_to_le64(nvmet_ana_chgcnt);
235 desc->state = req->port->ana_state[grpid];
236 memset(desc->rsvd17, 0, sizeof(desc->rsvd17));
237 return sizeof(struct nvme_ana_group_desc) + count * sizeof(__le32);
238}
239
240static void nvmet_execute_get_log_page_ana(struct nvmet_req *req)
241{
242 struct nvme_ana_rsp_hdr hdr = { 0, };
243 struct nvme_ana_group_desc *desc;
244 size_t offset = sizeof(struct nvme_ana_rsp_hdr); /* start beyond hdr */
245 size_t len;
246 u32 grpid;
247 u16 ngrps = 0;
248 u16 status;
249
250 status = NVME_SC_INTERNAL;
251 desc = kmalloc(sizeof(struct nvme_ana_group_desc) +
252 NVMET_MAX_NAMESPACES * sizeof(__le32), GFP_KERNEL);
253 if (!desc)
254 goto out;
255
256 down_read(&nvmet_ana_sem);
257 for (grpid = 1; grpid <= NVMET_MAX_ANAGRPS; grpid++) {
258 if (!nvmet_ana_group_enabled[grpid])
259 continue;
260 len = nvmet_format_ana_group(req, grpid, desc);
261 status = nvmet_copy_to_sgl(req, offset, desc, len);
262 if (status)
263 break;
264 offset += len;
265 ngrps++;
266 }
be1277f5
HR
267 for ( ; grpid <= NVMET_MAX_ANAGRPS; grpid++) {
268 if (nvmet_ana_group_enabled[grpid])
269 ngrps++;
270 }
72efd25d
CH
271
272 hdr.chgcnt = cpu_to_le64(nvmet_ana_chgcnt);
273 hdr.ngrps = cpu_to_le16(ngrps);
7114ddeb 274 nvmet_clear_aen_bit(req, NVME_AEN_BIT_ANA_CHANGE);
72efd25d
CH
275 up_read(&nvmet_ana_sem);
276
277 kfree(desc);
278
279 /* copy the header last once we know the number of groups */
280 status = nvmet_copy_to_sgl(req, 0, &hdr, sizeof(hdr));
281out:
282 nvmet_req_complete(req, status);
283}
284
2cb6963a
CH
285static void nvmet_execute_get_log_page(struct nvmet_req *req)
286{
287 switch (req->cmd->get_log_page.lid) {
288 case NVME_LOG_ERROR:
289 return nvmet_execute_get_log_page_error(req);
290 case NVME_LOG_SMART:
291 return nvmet_execute_get_log_page_smart(req);
292 case NVME_LOG_FW_SLOT:
293 /*
294 * We only support a single firmware slot which always is
295 * active, so we can zero out the whole firmware slot log and
296 * still claim to fully implement this mandatory log page.
297 */
298 return nvmet_execute_get_log_page_noop(req);
299 case NVME_LOG_CHANGED_NS:
300 return nvmet_execute_get_log_changed_ns(req);
301 case NVME_LOG_CMD_EFFECTS:
302 return nvmet_execute_get_log_cmd_effects_ns(req);
303 case NVME_LOG_ANA:
304 return nvmet_execute_get_log_page_ana(req);
305 }
306 pr_err("unhandled lid %d on qid %d\n",
307 req->cmd->get_log_page.lid, req->sq->qid);
308 req->error_loc = offsetof(struct nvme_get_log_page_command, lid);
309 nvmet_req_complete(req, NVME_SC_INVALID_FIELD | NVME_SC_DNR);
310}
311
a07b4970
CH
312static void nvmet_execute_identify_ctrl(struct nvmet_req *req)
313{
314 struct nvmet_ctrl *ctrl = req->sq->ctrl;
315 struct nvme_id_ctrl *id;
a07b4970 316 u16 status = 0;
42de82a8 317 const char model[] = "Linux";
a07b4970
CH
318
319 id = kzalloc(sizeof(*id), GFP_KERNEL);
320 if (!id) {
321 status = NVME_SC_INTERNAL;
322 goto out;
323 }
324
325 /* XXX: figure out how to assign real vendors IDs. */
326 id->vid = 0;
327 id->ssvid = 0;
328
c7399698 329 memset(id->sn, ' ', sizeof(id->sn));
42de82a8
MW
330 bin2hex(id->sn, &ctrl->subsys->serial,
331 min(sizeof(ctrl->subsys->serial), sizeof(id->sn) / 2));
17c39d05
MW
332 memcpy_and_pad(id->mn, sizeof(id->mn), model, sizeof(model) - 1, ' ');
333 memcpy_and_pad(id->fr, sizeof(id->fr),
334 UTS_RELEASE, strlen(UTS_RELEASE), ' ');
a07b4970 335
a07b4970
CH
336 id->rab = 6;
337
338 /*
339 * XXX: figure out how we can assign a IEEE OUI, but until then
340 * the safest is to leave it as zeroes.
341 */
342
72efd25d
CH
343 /* we support multiple ports, multiples hosts and ANA: */
344 id->cmic = (1 << 0) | (1 << 1) | (1 << 3);
a07b4970
CH
345
346 /* no limit on data transfer sizes for now */
347 id->mdts = 0;
348 id->cntlid = cpu_to_le16(ctrl->cntlid);
349 id->ver = cpu_to_le32(ctrl->subsys->ver);
350
351 /* XXX: figure out what to do about RTD3R/RTD3 */
c86b8f7b 352 id->oaes = cpu_to_le32(NVMET_AEN_CFG_OPTIONAL);
c09305ae
SG
353 id->ctratt = cpu_to_le32(NVME_CTRL_ATTR_HID_128_BIT |
354 NVME_CTRL_ATTR_TBKAS);
a07b4970
CH
355
356 id->oacs = 0;
357
358 /*
359 * We don't really have a practical limit on the number of abort
360 * comands. But we don't do anything useful for abort either, so
361 * no point in allowing more abort commands than the spec requires.
362 */
363 id->acl = 3;
364
365 id->aerl = NVMET_ASYNC_EVENTS - 1;
366
367 /* first slot is read-only, only one slot supported */
368 id->frmw = (1 << 0) | (1 << 1);
0866bf0c 369 id->lpa = (1 << 0) | (1 << 1) | (1 << 2);
a07b4970
CH
370 id->elpe = NVMET_ERROR_LOG_SLOTS - 1;
371 id->npss = 0;
372
373 /* We support keep-alive timeout in granularity of seconds */
374 id->kas = cpu_to_le16(NVMET_KAS);
375
376 id->sqes = (0x6 << 4) | 0x6;
377 id->cqes = (0x4 << 4) | 0x4;
378
379 /* no enforcement soft-limit for maxcmd - pick arbitrary high value */
380 id->maxcmd = cpu_to_le16(NVMET_MAX_CMD);
381
382 id->nn = cpu_to_le32(ctrl->subsys->max_nsid);
793c7cfc 383 id->mnan = cpu_to_le32(NVMET_MAX_NAMESPACES);
d2629209
CK
384 id->oncs = cpu_to_le16(NVME_CTRL_ONCS_DSM |
385 NVME_CTRL_ONCS_WRITE_ZEROES);
a07b4970
CH
386
387 /* XXX: don't report vwc if the underlying device is write through */
388 id->vwc = NVME_CTRL_VWC_PRESENT;
389
390 /*
391 * We can't support atomic writes bigger than a LBA without support
392 * from the backend device.
393 */
394 id->awun = 0;
395 id->awupf = 0;
396
397 id->sgls = cpu_to_le32(1 << 0); /* we always support SGLs */
398 if (ctrl->ops->has_keyed_sgls)
399 id->sgls |= cpu_to_le32(1 << 2);
0d5ee2b2 400 if (req->port->inline_data_size)
a07b4970
CH
401 id->sgls |= cpu_to_le32(1 << 20);
402
5eadc9cc 403 strlcpy(id->subnqn, ctrl->subsys->subsysnqn, sizeof(id->subnqn));
a07b4970
CH
404
405 /* Max command capsule size is sqe + single page of in-capsule data */
406 id->ioccsz = cpu_to_le32((sizeof(struct nvme_command) +
0d5ee2b2 407 req->port->inline_data_size) / 16);
a07b4970
CH
408 /* Max response capsule size is cqe */
409 id->iorcsz = cpu_to_le32(sizeof(struct nvme_completion) / 16);
410
411 id->msdbd = ctrl->ops->msdbd;
412
72efd25d
CH
413 id->anacap = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4);
414 id->anatt = 10; /* random value */
415 id->anagrpmax = cpu_to_le32(NVMET_MAX_ANAGRPS);
416 id->nanagrpid = cpu_to_le32(NVMET_MAX_ANAGRPS);
417
a07b4970
CH
418 /*
419 * Meh, we don't really support any power state. Fake up the same
420 * values that qemu does.
421 */
422 id->psd[0].max_power = cpu_to_le16(0x9c4);
423 id->psd[0].entry_lat = cpu_to_le32(0x10);
424 id->psd[0].exit_lat = cpu_to_le32(0x4);
425
dedf0be5
CK
426 id->nwpc = 1 << 0; /* write protect and no write protect */
427
a07b4970
CH
428 status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id));
429
430 kfree(id);
431out:
432 nvmet_req_complete(req, status);
433}
434
435static void nvmet_execute_identify_ns(struct nvmet_req *req)
436{
437 struct nvmet_ns *ns;
438 struct nvme_id_ns *id;
439 u16 status = 0;
440
f39ae471 441 if (le32_to_cpu(req->cmd->identify.nsid) == NVME_NSID_ALL) {
2da6e005 442 req->error_loc = offsetof(struct nvme_identify, nsid);
a07b4970
CH
443 status = NVME_SC_INVALID_NS | NVME_SC_DNR;
444 goto out;
445 }
446
447 id = kzalloc(sizeof(*id), GFP_KERNEL);
448 if (!id) {
449 status = NVME_SC_INTERNAL;
f39ae471 450 goto out;
a07b4970
CH
451 }
452
f39ae471
CH
453 /* return an all zeroed buffer if we can't find an active namespace */
454 ns = nvmet_find_namespace(req->sq->ctrl, req->cmd->identify.nsid);
455 if (!ns)
456 goto done;
457
a07b4970 458 /*
18c53e40 459 * nuse = ncap = nsze isn't always true, but we have no way to find
a07b4970
CH
460 * that out from the underlying device.
461 */
72efd25d
CH
462 id->ncap = id->nsze = cpu_to_le64(ns->size >> ns->blksize_shift);
463 switch (req->port->ana_state[ns->anagrpid]) {
464 case NVME_ANA_INACCESSIBLE:
465 case NVME_ANA_PERSISTENT_LOSS:
466 break;
467 default:
468 id->nuse = id->nsze;
469 break;
470 }
a07b4970 471
9d05a96e
BVA
472 if (ns->bdev)
473 nvmet_bdev_set_limits(ns->bdev, id);
474
a07b4970
CH
475 /*
476 * We just provide a single LBA format that matches what the
477 * underlying device reports.
478 */
479 id->nlbaf = 0;
480 id->flbas = 0;
481
482 /*
483 * Our namespace might always be shared. Not just with other
484 * controllers, but also with any other user of the block device.
485 */
486 id->nmic = (1 << 0);
72efd25d 487 id->anagrpid = cpu_to_le32(ns->anagrpid);
a07b4970 488
1b0d2745 489 memcpy(&id->nguid, &ns->nguid, sizeof(id->nguid));
a07b4970
CH
490
491 id->lbaf[0].ds = ns->blksize_shift;
492
dedf0be5
CK
493 if (ns->readonly)
494 id->nsattr |= (1 << 0);
f39ae471
CH
495 nvmet_put_namespace(ns);
496done:
a07b4970 497 status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id));
a07b4970 498 kfree(id);
a07b4970
CH
499out:
500 nvmet_req_complete(req, status);
501}
502
503static void nvmet_execute_identify_nslist(struct nvmet_req *req)
504{
0add5e8e 505 static const int buf_size = NVME_IDENTIFY_DATA_SIZE;
a07b4970
CH
506 struct nvmet_ctrl *ctrl = req->sq->ctrl;
507 struct nvmet_ns *ns;
508 u32 min_nsid = le32_to_cpu(req->cmd->identify.nsid);
509 __le32 *list;
510 u16 status = 0;
511 int i = 0;
512
513 list = kzalloc(buf_size, GFP_KERNEL);
514 if (!list) {
515 status = NVME_SC_INTERNAL;
516 goto out;
517 }
518
519 rcu_read_lock();
520 list_for_each_entry_rcu(ns, &ctrl->subsys->namespaces, dev_link) {
521 if (ns->nsid <= min_nsid)
522 continue;
523 list[i++] = cpu_to_le32(ns->nsid);
524 if (i == buf_size / sizeof(__le32))
525 break;
526 }
527 rcu_read_unlock();
528
529 status = nvmet_copy_to_sgl(req, 0, list, buf_size);
530
531 kfree(list);
532out:
533 nvmet_req_complete(req, status);
534}
535
637dc0f3
JT
536static u16 nvmet_copy_ns_identifier(struct nvmet_req *req, u8 type, u8 len,
537 void *id, off_t *off)
538{
539 struct nvme_ns_id_desc desc = {
540 .nidt = type,
541 .nidl = len,
542 };
543 u16 status;
544
545 status = nvmet_copy_to_sgl(req, *off, &desc, sizeof(desc));
546 if (status)
547 return status;
548 *off += sizeof(desc);
549
550 status = nvmet_copy_to_sgl(req, *off, id, len);
551 if (status)
552 return status;
553 *off += len;
554
555 return 0;
556}
557
558static void nvmet_execute_identify_desclist(struct nvmet_req *req)
559{
560 struct nvmet_ns *ns;
561 u16 status = 0;
562 off_t off = 0;
563
564 ns = nvmet_find_namespace(req->sq->ctrl, req->cmd->identify.nsid);
565 if (!ns) {
2da6e005 566 req->error_loc = offsetof(struct nvme_identify, nsid);
637dc0f3
JT
567 status = NVME_SC_INVALID_NS | NVME_SC_DNR;
568 goto out;
569 }
570
571 if (memchr_inv(&ns->uuid, 0, sizeof(ns->uuid))) {
572 status = nvmet_copy_ns_identifier(req, NVME_NIDT_UUID,
573 NVME_NIDT_UUID_LEN,
574 &ns->uuid, &off);
575 if (status)
576 goto out_put_ns;
577 }
578 if (memchr_inv(ns->nguid, 0, sizeof(ns->nguid))) {
579 status = nvmet_copy_ns_identifier(req, NVME_NIDT_NGUID,
580 NVME_NIDT_NGUID_LEN,
581 &ns->nguid, &off);
582 if (status)
583 goto out_put_ns;
584 }
585
586 if (sg_zero_buffer(req->sg, req->sg_cnt, NVME_IDENTIFY_DATA_SIZE - off,
587 off) != NVME_IDENTIFY_DATA_SIZE - off)
588 status = NVME_SC_INTERNAL | NVME_SC_DNR;
589out_put_ns:
590 nvmet_put_namespace(ns);
591out:
592 nvmet_req_complete(req, status);
593}
594
2cb6963a
CH
595static void nvmet_execute_identify(struct nvmet_req *req)
596{
597 switch (req->cmd->identify.cns) {
598 case NVME_ID_CNS_NS:
599 return nvmet_execute_identify_ns(req);
600 case NVME_ID_CNS_CTRL:
601 return nvmet_execute_identify_ctrl(req);
602 case NVME_ID_CNS_NS_ACTIVE_LIST:
603 return nvmet_execute_identify_nslist(req);
604 case NVME_ID_CNS_NS_DESC_LIST:
605 return nvmet_execute_identify_desclist(req);
606 }
607
608 pr_err("unhandled identify cns %d on qid %d\n",
609 req->cmd->identify.cns, req->sq->qid);
610 req->error_loc = offsetof(struct nvme_identify, cns);
611 nvmet_req_complete(req, NVME_SC_INVALID_FIELD | NVME_SC_DNR);
612}
613
a07b4970 614/*
18c53e40 615 * A "minimum viable" abort implementation: the command is mandatory in the
a07b4970
CH
616 * spec, but we are not required to do any useful work. We couldn't really
617 * do a useful abort, so don't bother even with waiting for the command
618 * to be exectuted and return immediately telling the command to abort
619 * wasn't found.
620 */
621static void nvmet_execute_abort(struct nvmet_req *req)
622{
623 nvmet_set_result(req, 1);
624 nvmet_req_complete(req, 0);
625}
626
dedf0be5
CK
627static u16 nvmet_write_protect_flush_sync(struct nvmet_req *req)
628{
629 u16 status;
630
631 if (req->ns->file)
632 status = nvmet_file_flush(req);
633 else
634 status = nvmet_bdev_flush(req);
635
636 if (status)
637 pr_err("write protect flush failed nsid: %u\n", req->ns->nsid);
638 return status;
639}
640
641static u16 nvmet_set_feat_write_protect(struct nvmet_req *req)
642{
b7c8f366 643 u32 write_protect = le32_to_cpu(req->cmd->common.cdw11);
dedf0be5
CK
644 struct nvmet_subsys *subsys = req->sq->ctrl->subsys;
645 u16 status = NVME_SC_FEATURE_NOT_CHANGEABLE;
646
647 req->ns = nvmet_find_namespace(req->sq->ctrl, req->cmd->rw.nsid);
2da6e005
CK
648 if (unlikely(!req->ns)) {
649 req->error_loc = offsetof(struct nvme_common_command, nsid);
dedf0be5 650 return status;
2da6e005 651 }
dedf0be5
CK
652
653 mutex_lock(&subsys->lock);
654 switch (write_protect) {
655 case NVME_NS_WRITE_PROTECT:
656 req->ns->readonly = true;
657 status = nvmet_write_protect_flush_sync(req);
658 if (status)
659 req->ns->readonly = false;
660 break;
661 case NVME_NS_NO_WRITE_PROTECT:
662 req->ns->readonly = false;
663 status = 0;
664 break;
665 default:
666 break;
667 }
668
669 if (!status)
670 nvmet_ns_changed(subsys, req->ns->nsid);
671 mutex_unlock(&subsys->lock);
672 return status;
673}
674
90107455
JS
675u16 nvmet_set_feat_kato(struct nvmet_req *req)
676{
b7c8f366 677 u32 val32 = le32_to_cpu(req->cmd->common.cdw11);
90107455
JS
678
679 req->sq->ctrl->kato = DIV_ROUND_UP(val32, 1000);
680
681 nvmet_set_result(req, req->sq->ctrl->kato);
682
683 return 0;
684}
685
686u16 nvmet_set_feat_async_event(struct nvmet_req *req, u32 mask)
687{
b7c8f366 688 u32 val32 = le32_to_cpu(req->cmd->common.cdw11);
90107455 689
2da6e005
CK
690 if (val32 & ~mask) {
691 req->error_loc = offsetof(struct nvme_common_command, cdw11);
90107455 692 return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
2da6e005 693 }
90107455
JS
694
695 WRITE_ONCE(req->sq->ctrl->aen_enabled, val32);
696 nvmet_set_result(req, val32);
697
698 return 0;
699}
700
a07b4970
CH
701static void nvmet_execute_set_features(struct nvmet_req *req)
702{
703 struct nvmet_subsys *subsys = req->sq->ctrl->subsys;
b7c8f366 704 u32 cdw10 = le32_to_cpu(req->cmd->common.cdw10);
a07b4970
CH
705 u16 status = 0;
706
28dd5cf7 707 switch (cdw10 & 0xff) {
a07b4970
CH
708 case NVME_FEAT_NUM_QUEUES:
709 nvmet_set_result(req,
710 (subsys->max_qid - 1) | ((subsys->max_qid - 1) << 16));
711 break;
712 case NVME_FEAT_KATO:
90107455 713 status = nvmet_set_feat_kato(req);
a07b4970 714 break;
c86b8f7b 715 case NVME_FEAT_ASYNC_EVENT:
90107455 716 status = nvmet_set_feat_async_event(req, NVMET_AEN_CFG_ALL);
c86b8f7b 717 break;
28dd5cf7
OM
718 case NVME_FEAT_HOST_ID:
719 status = NVME_SC_CMD_SEQ_ERROR | NVME_SC_DNR;
720 break;
dedf0be5
CK
721 case NVME_FEAT_WRITE_PROTECT:
722 status = nvmet_set_feat_write_protect(req);
723 break;
a07b4970 724 default:
2da6e005 725 req->error_loc = offsetof(struct nvme_common_command, cdw10);
a07b4970
CH
726 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR;
727 break;
728 }
729
730 nvmet_req_complete(req, status);
731}
732
dedf0be5
CK
733static u16 nvmet_get_feat_write_protect(struct nvmet_req *req)
734{
735 struct nvmet_subsys *subsys = req->sq->ctrl->subsys;
736 u32 result;
737
738 req->ns = nvmet_find_namespace(req->sq->ctrl, req->cmd->common.nsid);
2da6e005
CK
739 if (!req->ns) {
740 req->error_loc = offsetof(struct nvme_common_command, nsid);
dedf0be5 741 return NVME_SC_INVALID_NS | NVME_SC_DNR;
2da6e005 742 }
dedf0be5
CK
743 mutex_lock(&subsys->lock);
744 if (req->ns->readonly == true)
745 result = NVME_NS_WRITE_PROTECT;
746 else
747 result = NVME_NS_NO_WRITE_PROTECT;
748 nvmet_set_result(req, result);
749 mutex_unlock(&subsys->lock);
750
751 return 0;
752}
753
90107455
JS
754void nvmet_get_feat_kato(struct nvmet_req *req)
755{
756 nvmet_set_result(req, req->sq->ctrl->kato * 1000);
757}
758
759void nvmet_get_feat_async_event(struct nvmet_req *req)
760{
761 nvmet_set_result(req, READ_ONCE(req->sq->ctrl->aen_enabled));
762}
763
a07b4970
CH
764static void nvmet_execute_get_features(struct nvmet_req *req)
765{
766 struct nvmet_subsys *subsys = req->sq->ctrl->subsys;
b7c8f366 767 u32 cdw10 = le32_to_cpu(req->cmd->common.cdw10);
a07b4970
CH
768 u16 status = 0;
769
28dd5cf7 770 switch (cdw10 & 0xff) {
a07b4970
CH
771 /*
772 * These features are mandatory in the spec, but we don't
773 * have a useful way to implement them. We'll eventually
774 * need to come up with some fake values for these.
775 */
776#if 0
777 case NVME_FEAT_ARBITRATION:
778 break;
779 case NVME_FEAT_POWER_MGMT:
780 break;
781 case NVME_FEAT_TEMP_THRESH:
782 break;
783 case NVME_FEAT_ERR_RECOVERY:
784 break;
785 case NVME_FEAT_IRQ_COALESCE:
786 break;
787 case NVME_FEAT_IRQ_CONFIG:
788 break;
789 case NVME_FEAT_WRITE_ATOMIC:
790 break;
c86b8f7b 791#endif
a07b4970 792 case NVME_FEAT_ASYNC_EVENT:
90107455 793 nvmet_get_feat_async_event(req);
a07b4970 794 break;
a07b4970
CH
795 case NVME_FEAT_VOLATILE_WC:
796 nvmet_set_result(req, 1);
797 break;
798 case NVME_FEAT_NUM_QUEUES:
799 nvmet_set_result(req,
800 (subsys->max_qid-1) | ((subsys->max_qid-1) << 16));
801 break;
802 case NVME_FEAT_KATO:
90107455 803 nvmet_get_feat_kato(req);
a07b4970 804 break;
28dd5cf7
OM
805 case NVME_FEAT_HOST_ID:
806 /* need 128-bit host identifier flag */
b7c8f366 807 if (!(req->cmd->common.cdw11 & cpu_to_le32(1 << 0))) {
2da6e005
CK
808 req->error_loc =
809 offsetof(struct nvme_common_command, cdw11);
28dd5cf7
OM
810 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR;
811 break;
812 }
813
814 status = nvmet_copy_to_sgl(req, 0, &req->sq->ctrl->hostid,
815 sizeof(req->sq->ctrl->hostid));
816 break;
dedf0be5
CK
817 case NVME_FEAT_WRITE_PROTECT:
818 status = nvmet_get_feat_write_protect(req);
819 break;
a07b4970 820 default:
2da6e005
CK
821 req->error_loc =
822 offsetof(struct nvme_common_command, cdw10);
a07b4970
CH
823 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR;
824 break;
825 }
826
827 nvmet_req_complete(req, status);
828}
829
90107455 830void nvmet_execute_async_event(struct nvmet_req *req)
a07b4970
CH
831{
832 struct nvmet_ctrl *ctrl = req->sq->ctrl;
833
834 mutex_lock(&ctrl->lock);
835 if (ctrl->nr_async_event_cmds >= NVMET_ASYNC_EVENTS) {
836 mutex_unlock(&ctrl->lock);
837 nvmet_req_complete(req, NVME_SC_ASYNC_LIMIT | NVME_SC_DNR);
838 return;
839 }
840 ctrl->async_event_cmds[ctrl->nr_async_event_cmds++] = req;
841 mutex_unlock(&ctrl->lock);
842
843 schedule_work(&ctrl->async_event_work);
844}
845
f9362ac1 846void nvmet_execute_keep_alive(struct nvmet_req *req)
a07b4970
CH
847{
848 struct nvmet_ctrl *ctrl = req->sq->ctrl;
849
850 pr_debug("ctrl %d update keep-alive timer for %d secs\n",
851 ctrl->cntlid, ctrl->kato);
852
853 mod_delayed_work(system_wq, &ctrl->ka_work, ctrl->kato * HZ);
854 nvmet_req_complete(req, 0);
855}
856
64a0ca88 857u16 nvmet_parse_admin_cmd(struct nvmet_req *req)
a07b4970
CH
858{
859 struct nvme_command *cmd = req->cmd;
64a0ca88 860 u16 ret;
a07b4970 861
64a0ca88
PP
862 ret = nvmet_check_ctrl_status(req, cmd);
863 if (unlikely(ret))
864 return ret;
a07b4970
CH
865
866 switch (cmd->common.opcode) {
867 case nvme_admin_get_log_page:
2cb6963a 868 req->execute = nvmet_execute_get_log_page;
a07b4970 869 req->data_len = nvmet_get_log_page_len(cmd);
2cb6963a 870 return 0;
a07b4970 871 case nvme_admin_identify:
2cb6963a 872 req->execute = nvmet_execute_identify;
0add5e8e 873 req->data_len = NVME_IDENTIFY_DATA_SIZE;
2cb6963a 874 return 0;
a07b4970
CH
875 case nvme_admin_abort_cmd:
876 req->execute = nvmet_execute_abort;
877 req->data_len = 0;
878 return 0;
879 case nvme_admin_set_features:
880 req->execute = nvmet_execute_set_features;
881 req->data_len = 0;
882 return 0;
883 case nvme_admin_get_features:
884 req->execute = nvmet_execute_get_features;
885 req->data_len = 0;
886 return 0;
887 case nvme_admin_async_event:
888 req->execute = nvmet_execute_async_event;
889 req->data_len = 0;
890 return 0;
891 case nvme_admin_keep_alive:
892 req->execute = nvmet_execute_keep_alive;
893 req->data_len = 0;
894 return 0;
895 }
896
64a0ca88
PP
897 pr_err("unhandled cmd %d on qid %d\n", cmd->common.opcode,
898 req->sq->qid);
2da6e005 899 req->error_loc = offsetof(struct nvme_common_command, opcode);
a07b4970
CH
900 return NVME_SC_INVALID_OPCODE | NVME_SC_DNR;
901}