Merge branch 'core-objtool-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-block.git] / drivers / nvme / host / rdma.c
CommitLineData
5d8762d5 1// SPDX-License-Identifier: GPL-2.0
71102307
CH
2/*
3 * NVMe over Fabrics RDMA host code.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
71102307
CH
5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
71102307
CH
7#include <linux/module.h>
8#include <linux/init.h>
9#include <linux/slab.h>
f41725bb 10#include <rdma/mr_pool.h>
71102307
CH
11#include <linux/err.h>
12#include <linux/string.h>
71102307
CH
13#include <linux/atomic.h>
14#include <linux/blk-mq.h>
0b36658c 15#include <linux/blk-mq-rdma.h>
71102307
CH
16#include <linux/types.h>
17#include <linux/list.h>
18#include <linux/mutex.h>
19#include <linux/scatterlist.h>
20#include <linux/nvme.h>
71102307
CH
21#include <asm/unaligned.h>
22
23#include <rdma/ib_verbs.h>
24#include <rdma/rdma_cm.h>
71102307
CH
25#include <linux/nvme-rdma.h>
26
27#include "nvme.h"
28#include "fabrics.h"
29
30
782d820c 31#define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */
71102307 32
71102307
CH
33#define NVME_RDMA_MAX_SEGMENTS 256
34
64a741c1 35#define NVME_RDMA_MAX_INLINE_SEGMENTS 4
71102307 36
71102307 37struct nvme_rdma_device {
f87c89ad
MG
38 struct ib_device *dev;
39 struct ib_pd *pd;
71102307
CH
40 struct kref ref;
41 struct list_head entry;
64a741c1 42 unsigned int num_inline_segments;
71102307
CH
43};
44
45struct nvme_rdma_qe {
46 struct ib_cqe cqe;
47 void *data;
48 u64 dma;
49};
50
51struct nvme_rdma_queue;
52struct nvme_rdma_request {
d49187e9 53 struct nvme_request req;
71102307
CH
54 struct ib_mr *mr;
55 struct nvme_rdma_qe sqe;
4af7f7ff
SG
56 union nvme_result result;
57 __le16 status;
58 refcount_t ref;
71102307
CH
59 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
60 u32 num_sge;
61 int nents;
71102307
CH
62 struct ib_reg_wr reg_wr;
63 struct ib_cqe reg_cqe;
64 struct nvme_rdma_queue *queue;
65 struct sg_table sg_table;
66 struct scatterlist first_sgl[];
67};
68
69enum nvme_rdma_queue_flags {
5013e98b
SG
70 NVME_RDMA_Q_ALLOCATED = 0,
71 NVME_RDMA_Q_LIVE = 1,
eb1bd249 72 NVME_RDMA_Q_TR_READY = 2,
71102307
CH
73};
74
75struct nvme_rdma_queue {
76 struct nvme_rdma_qe *rsp_ring;
71102307
CH
77 int queue_size;
78 size_t cmnd_capsule_len;
79 struct nvme_rdma_ctrl *ctrl;
80 struct nvme_rdma_device *device;
81 struct ib_cq *ib_cq;
82 struct ib_qp *qp;
83
84 unsigned long flags;
85 struct rdma_cm_id *cm_id;
86 int cm_error;
87 struct completion cm_done;
88};
89
90struct nvme_rdma_ctrl {
71102307
CH
91 /* read only in the hot path */
92 struct nvme_rdma_queue *queues;
71102307
CH
93
94 /* other member variables */
71102307 95 struct blk_mq_tag_set tag_set;
71102307
CH
96 struct work_struct err_work;
97
98 struct nvme_rdma_qe async_event_sqe;
99
71102307
CH
100 struct delayed_work reconnect_work;
101
102 struct list_head list;
103
104 struct blk_mq_tag_set admin_tag_set;
105 struct nvme_rdma_device *device;
106
71102307
CH
107 u32 max_fr_pages;
108
0928f9b4
SG
109 struct sockaddr_storage addr;
110 struct sockaddr_storage src_addr;
71102307
CH
111
112 struct nvme_ctrl ctrl;
64a741c1 113 bool use_inline_data;
b1064d3e 114 u32 io_queues[HCTX_MAX_TYPES];
71102307
CH
115};
116
117static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
118{
119 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
120}
121
122static LIST_HEAD(device_list);
123static DEFINE_MUTEX(device_list_mutex);
124
125static LIST_HEAD(nvme_rdma_ctrl_list);
126static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
127
71102307
CH
128/*
129 * Disabling this option makes small I/O goes faster, but is fundamentally
130 * unsafe. With it turned off we will have to register a global rkey that
131 * allows read and write access to all physical memory.
132 */
133static bool register_always = true;
134module_param(register_always, bool, 0444);
135MODULE_PARM_DESC(register_always,
136 "Use memory registration even for contiguous memory regions");
137
138static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
139 struct rdma_cm_event *event);
140static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
71102307 141
90af3512
SG
142static const struct blk_mq_ops nvme_rdma_mq_ops;
143static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
144
71102307
CH
145/* XXX: really should move to a generic header sooner or later.. */
146static inline void put_unaligned_le24(u32 val, u8 *p)
147{
148 *p++ = val;
149 *p++ = val >> 8;
150 *p++ = val >> 16;
151}
152
153static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
154{
155 return queue - queue->ctrl->queues;
156}
157
ff8519f9
SG
158static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
159{
160 return nvme_rdma_queue_idx(queue) >
b1064d3e
SG
161 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
162 queue->ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
163}
164
71102307
CH
165static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
166{
167 return queue->cmnd_capsule_len - sizeof(struct nvme_command);
168}
169
170static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
171 size_t capsule_size, enum dma_data_direction dir)
172{
173 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
174 kfree(qe->data);
175}
176
177static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
178 size_t capsule_size, enum dma_data_direction dir)
179{
180 qe->data = kzalloc(capsule_size, GFP_KERNEL);
181 if (!qe->data)
182 return -ENOMEM;
183
184 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
185 if (ib_dma_mapping_error(ibdev, qe->dma)) {
186 kfree(qe->data);
6344d02d 187 qe->data = NULL;
71102307
CH
188 return -ENOMEM;
189 }
190
191 return 0;
192}
193
194static void nvme_rdma_free_ring(struct ib_device *ibdev,
195 struct nvme_rdma_qe *ring, size_t ib_queue_size,
196 size_t capsule_size, enum dma_data_direction dir)
197{
198 int i;
199
200 for (i = 0; i < ib_queue_size; i++)
201 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
202 kfree(ring);
203}
204
205static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
206 size_t ib_queue_size, size_t capsule_size,
207 enum dma_data_direction dir)
208{
209 struct nvme_rdma_qe *ring;
210 int i;
211
212 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
213 if (!ring)
214 return NULL;
215
62f99b62
MG
216 /*
217 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
218 * lifetime. It's safe, since any chage in the underlying RDMA device
219 * will issue error recovery and queue re-creation.
220 */
71102307
CH
221 for (i = 0; i < ib_queue_size; i++) {
222 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
223 goto out_free_ring;
224 }
225
226 return ring;
227
228out_free_ring:
229 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
230 return NULL;
231}
232
233static void nvme_rdma_qp_event(struct ib_event *event, void *context)
234{
27a4beef
MG
235 pr_debug("QP event %s (%d)\n",
236 ib_event_msg(event->event), event->event);
237
71102307
CH
238}
239
240static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
241{
35da77d5
BVA
242 int ret;
243
244 ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
71102307 245 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
35da77d5
BVA
246 if (ret < 0)
247 return ret;
248 if (ret == 0)
249 return -ETIMEDOUT;
250 WARN_ON_ONCE(queue->cm_error > 0);
71102307
CH
251 return queue->cm_error;
252}
253
254static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
255{
256 struct nvme_rdma_device *dev = queue->device;
257 struct ib_qp_init_attr init_attr;
258 int ret;
259
260 memset(&init_attr, 0, sizeof(init_attr));
261 init_attr.event_handler = nvme_rdma_qp_event;
262 /* +1 for drain */
263 init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
264 /* +1 for drain */
265 init_attr.cap.max_recv_wr = queue->queue_size + 1;
266 init_attr.cap.max_recv_sge = 1;
64a741c1 267 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
71102307
CH
268 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
269 init_attr.qp_type = IB_QPT_RC;
270 init_attr.send_cq = queue->ib_cq;
271 init_attr.recv_cq = queue->ib_cq;
272
273 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
274
275 queue->qp = queue->cm_id->qp;
276 return ret;
277}
278
385475ee
CH
279static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
280 struct request *rq, unsigned int hctx_idx)
71102307
CH
281{
282 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307 283
62f99b62 284 kfree(req->sqe.data);
71102307
CH
285}
286
385475ee
CH
287static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
288 struct request *rq, unsigned int hctx_idx,
289 unsigned int numa_node)
71102307 290{
385475ee 291 struct nvme_rdma_ctrl *ctrl = set->driver_data;
71102307 292 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
385475ee 293 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
71102307 294 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
71102307 295
59e29ce6 296 nvme_req(rq)->ctrl = &ctrl->ctrl;
62f99b62
MG
297 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
298 if (!req->sqe.data)
299 return -ENOMEM;
71102307 300
71102307
CH
301 req->queue = queue;
302
303 return 0;
71102307
CH
304}
305
71102307
CH
306static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
307 unsigned int hctx_idx)
308{
309 struct nvme_rdma_ctrl *ctrl = data;
310 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
311
d858e5f0 312 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
71102307
CH
313
314 hctx->driver_data = queue;
315 return 0;
316}
317
318static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
319 unsigned int hctx_idx)
320{
321 struct nvme_rdma_ctrl *ctrl = data;
322 struct nvme_rdma_queue *queue = &ctrl->queues[0];
323
324 BUG_ON(hctx_idx != 0);
325
326 hctx->driver_data = queue;
327 return 0;
328}
329
330static void nvme_rdma_free_dev(struct kref *ref)
331{
332 struct nvme_rdma_device *ndev =
333 container_of(ref, struct nvme_rdma_device, ref);
334
335 mutex_lock(&device_list_mutex);
336 list_del(&ndev->entry);
337 mutex_unlock(&device_list_mutex);
338
71102307 339 ib_dealloc_pd(ndev->pd);
71102307
CH
340 kfree(ndev);
341}
342
343static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
344{
345 kref_put(&dev->ref, nvme_rdma_free_dev);
346}
347
348static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
349{
350 return kref_get_unless_zero(&dev->ref);
351}
352
353static struct nvme_rdma_device *
354nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
355{
356 struct nvme_rdma_device *ndev;
357
358 mutex_lock(&device_list_mutex);
359 list_for_each_entry(ndev, &device_list, entry) {
360 if (ndev->dev->node_guid == cm_id->device->node_guid &&
361 nvme_rdma_dev_get(ndev))
362 goto out_unlock;
363 }
364
365 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
366 if (!ndev)
367 goto out_err;
368
369 ndev->dev = cm_id->device;
370 kref_init(&ndev->ref);
371
11975e01
CH
372 ndev->pd = ib_alloc_pd(ndev->dev,
373 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
71102307
CH
374 if (IS_ERR(ndev->pd))
375 goto out_free_dev;
376
71102307
CH
377 if (!(ndev->dev->attrs.device_cap_flags &
378 IB_DEVICE_MEM_MGT_EXTENSIONS)) {
379 dev_err(&ndev->dev->dev,
380 "Memory registrations not supported.\n");
11975e01 381 goto out_free_pd;
71102307
CH
382 }
383
64a741c1 384 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
0a3173a5 385 ndev->dev->attrs.max_send_sge - 1);
71102307
CH
386 list_add(&ndev->entry, &device_list);
387out_unlock:
388 mutex_unlock(&device_list_mutex);
389 return ndev;
390
71102307
CH
391out_free_pd:
392 ib_dealloc_pd(ndev->pd);
393out_free_dev:
394 kfree(ndev);
395out_err:
396 mutex_unlock(&device_list_mutex);
397 return NULL;
398}
399
400static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
401{
eb1bd249
MG
402 struct nvme_rdma_device *dev;
403 struct ib_device *ibdev;
404
405 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
406 return;
407
408 dev = queue->device;
409 ibdev = dev->dev;
71102307 410
f41725bb
IR
411 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
412
eb1bd249
MG
413 /*
414 * The cm_id object might have been destroyed during RDMA connection
415 * establishment error flow to avoid getting other cma events, thus
416 * the destruction of the QP shouldn't use rdma_cm API.
417 */
418 ib_destroy_qp(queue->qp);
71102307
CH
419 ib_free_cq(queue->ib_cq);
420
421 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
422 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
423
424 nvme_rdma_dev_put(dev);
425}
426
f41725bb
IR
427static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev)
428{
429 return min_t(u32, NVME_RDMA_MAX_SEGMENTS,
ff13c1b8 430 ibdev->attrs.max_fast_reg_page_list_len - 1);
f41725bb
IR
431}
432
ca6e95bb 433static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
71102307 434{
ca6e95bb 435 struct ib_device *ibdev;
71102307
CH
436 const int send_wr_factor = 3; /* MR, SEND, INV */
437 const int cq_factor = send_wr_factor + 1; /* + RECV */
438 int comp_vector, idx = nvme_rdma_queue_idx(queue);
ff8519f9 439 enum ib_poll_context poll_ctx;
ff13c1b8 440 int ret, pages_per_mr;
71102307 441
ca6e95bb
SG
442 queue->device = nvme_rdma_find_get_device(queue->cm_id);
443 if (!queue->device) {
444 dev_err(queue->cm_id->device->dev.parent,
445 "no client data found!\n");
446 return -ECONNREFUSED;
447 }
448 ibdev = queue->device->dev;
71102307
CH
449
450 /*
0b36658c
SG
451 * Spread I/O queues completion vectors according their queue index.
452 * Admin queues can always go on completion vector 0.
71102307 453 */
0b36658c 454 comp_vector = idx == 0 ? idx : idx - 1;
71102307 455
ff8519f9
SG
456 /* Polling queues need direct cq polling context */
457 if (nvme_rdma_poll_queue(queue))
458 poll_ctx = IB_POLL_DIRECT;
459 else
460 poll_ctx = IB_POLL_SOFTIRQ;
461
71102307 462 /* +1 for ib_stop_cq */
ca6e95bb
SG
463 queue->ib_cq = ib_alloc_cq(ibdev, queue,
464 cq_factor * queue->queue_size + 1,
ff8519f9 465 comp_vector, poll_ctx);
71102307
CH
466 if (IS_ERR(queue->ib_cq)) {
467 ret = PTR_ERR(queue->ib_cq);
ca6e95bb 468 goto out_put_dev;
71102307
CH
469 }
470
471 ret = nvme_rdma_create_qp(queue, send_wr_factor);
472 if (ret)
473 goto out_destroy_ib_cq;
474
475 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
476 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
477 if (!queue->rsp_ring) {
478 ret = -ENOMEM;
479 goto out_destroy_qp;
480 }
481
ff13c1b8
MG
482 /*
483 * Currently we don't use SG_GAPS MR's so if the first entry is
484 * misaligned we'll end up using two entries for a single data page,
485 * so one additional entry is required.
486 */
487 pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev) + 1;
f41725bb
IR
488 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
489 queue->queue_size,
490 IB_MR_TYPE_MEM_REG,
ff13c1b8 491 pages_per_mr, 0);
f41725bb
IR
492 if (ret) {
493 dev_err(queue->ctrl->ctrl.device,
494 "failed to initialize MR pool sized %d for QID %d\n",
495 queue->queue_size, idx);
496 goto out_destroy_ring;
497 }
498
eb1bd249
MG
499 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
500
71102307
CH
501 return 0;
502
f41725bb
IR
503out_destroy_ring:
504 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
505 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
71102307 506out_destroy_qp:
1f61def9 507 rdma_destroy_qp(queue->cm_id);
71102307
CH
508out_destroy_ib_cq:
509 ib_free_cq(queue->ib_cq);
ca6e95bb
SG
510out_put_dev:
511 nvme_rdma_dev_put(queue->device);
71102307
CH
512 return ret;
513}
514
41e8cfa1 515static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
71102307
CH
516 int idx, size_t queue_size)
517{
518 struct nvme_rdma_queue *queue;
8f4e8dac 519 struct sockaddr *src_addr = NULL;
71102307
CH
520 int ret;
521
522 queue = &ctrl->queues[idx];
523 queue->ctrl = ctrl;
524 init_completion(&queue->cm_done);
525
526 if (idx > 0)
527 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
528 else
529 queue->cmnd_capsule_len = sizeof(struct nvme_command);
530
531 queue->queue_size = queue_size;
532
533 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
534 RDMA_PS_TCP, IB_QPT_RC);
535 if (IS_ERR(queue->cm_id)) {
536 dev_info(ctrl->ctrl.device,
537 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
538 return PTR_ERR(queue->cm_id);
539 }
540
8f4e8dac 541 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
0928f9b4 542 src_addr = (struct sockaddr *)&ctrl->src_addr;
8f4e8dac 543
0928f9b4
SG
544 queue->cm_error = -ETIMEDOUT;
545 ret = rdma_resolve_addr(queue->cm_id, src_addr,
546 (struct sockaddr *)&ctrl->addr,
71102307
CH
547 NVME_RDMA_CONNECT_TIMEOUT_MS);
548 if (ret) {
549 dev_info(ctrl->ctrl.device,
550 "rdma_resolve_addr failed (%d).\n", ret);
551 goto out_destroy_cm_id;
552 }
553
554 ret = nvme_rdma_wait_for_cm(queue);
555 if (ret) {
556 dev_info(ctrl->ctrl.device,
d8bfceeb 557 "rdma connection establishment failed (%d)\n", ret);
71102307
CH
558 goto out_destroy_cm_id;
559 }
560
5013e98b 561 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
71102307
CH
562
563 return 0;
564
565out_destroy_cm_id:
566 rdma_destroy_id(queue->cm_id);
eb1bd249 567 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
568 return ret;
569}
570
d94211b8
SG
571static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
572{
573 rdma_disconnect(queue->cm_id);
574 ib_drain_qp(queue->qp);
575}
576
71102307
CH
577static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
578{
a57bd541
SG
579 if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
580 return;
d94211b8 581 __nvme_rdma_stop_queue(queue);
71102307
CH
582}
583
584static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
585{
5013e98b 586 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
a57bd541
SG
587 return;
588
71102307
CH
589 nvme_rdma_destroy_queue_ib(queue);
590 rdma_destroy_id(queue->cm_id);
591}
592
a57bd541 593static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 594{
a57bd541
SG
595 int i;
596
597 for (i = 1; i < ctrl->ctrl.queue_count; i++)
598 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
599}
600
a57bd541 601static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
602{
603 int i;
604
d858e5f0 605 for (i = 1; i < ctrl->ctrl.queue_count; i++)
a57bd541 606 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
607}
608
68e16fcf
SG
609static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
610{
ff8519f9
SG
611 struct nvme_rdma_queue *queue = &ctrl->queues[idx];
612 bool poll = nvme_rdma_poll_queue(queue);
68e16fcf
SG
613 int ret;
614
615 if (idx)
ff8519f9 616 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll);
68e16fcf
SG
617 else
618 ret = nvmf_connect_admin_queue(&ctrl->ctrl);
619
d94211b8 620 if (!ret) {
ff8519f9 621 set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
d94211b8 622 } else {
67b483dd
SG
623 if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
624 __nvme_rdma_stop_queue(queue);
68e16fcf
SG
625 dev_info(ctrl->ctrl.device,
626 "failed to connect queue: %d ret=%d\n", idx, ret);
d94211b8 627 }
68e16fcf
SG
628 return ret;
629}
630
631static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
632{
633 int i, ret = 0;
634
d858e5f0 635 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
68e16fcf
SG
636 ret = nvme_rdma_start_queue(ctrl, i);
637 if (ret)
a57bd541 638 goto out_stop_queues;
71102307
CH
639 }
640
c8dbc37c
SW
641 return 0;
642
a57bd541 643out_stop_queues:
68e16fcf
SG
644 for (i--; i >= 1; i--)
645 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
646 return ret;
647}
648
41e8cfa1 649static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 650{
c248c643 651 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
0b36658c 652 struct ib_device *ibdev = ctrl->device->dev;
5651cd3c
SG
653 unsigned int nr_io_queues, nr_default_queues;
654 unsigned int nr_read_queues, nr_poll_queues;
71102307
CH
655 int i, ret;
656
5651cd3c
SG
657 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors,
658 min(opts->nr_io_queues, num_online_cpus()));
659 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors,
660 min(opts->nr_write_queues, num_online_cpus()));
661 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus());
662 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues;
b65bb777 663
c248c643
SG
664 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
665 if (ret)
666 return ret;
667
d858e5f0
SG
668 ctrl->ctrl.queue_count = nr_io_queues + 1;
669 if (ctrl->ctrl.queue_count < 2)
c248c643
SG
670 return 0;
671
672 dev_info(ctrl->ctrl.device,
673 "creating %d I/O queues.\n", nr_io_queues);
674
5651cd3c
SG
675 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) {
676 /*
677 * separate read/write queues
678 * hand out dedicated default queues only after we have
679 * sufficient read queues.
680 */
681 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues;
682 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ];
683 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
684 min(nr_default_queues, nr_io_queues);
685 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
686 } else {
687 /*
688 * shared read/write queues
689 * either no write queues were requested, or we don't have
690 * sufficient queue count to have dedicated default queues.
691 */
692 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
693 min(nr_read_queues, nr_io_queues);
694 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
695 }
696
697 if (opts->nr_poll_queues && nr_io_queues) {
698 /* map dedicated poll queues only if we have queues left */
699 ctrl->io_queues[HCTX_TYPE_POLL] =
700 min(nr_poll_queues, nr_io_queues);
701 }
702
d858e5f0 703 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
41e8cfa1
SG
704 ret = nvme_rdma_alloc_queue(ctrl, i,
705 ctrl->ctrl.sqsize + 1);
706 if (ret)
71102307 707 goto out_free_queues;
71102307
CH
708 }
709
710 return 0;
711
712out_free_queues:
f361e5a0 713 for (i--; i >= 1; i--)
a57bd541 714 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
715
716 return ret;
717}
718
b28a308e
SG
719static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
720 bool admin)
721{
722 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
723 struct blk_mq_tag_set *set;
724 int ret;
725
726 if (admin) {
727 set = &ctrl->admin_tag_set;
728 memset(set, 0, sizeof(*set));
729 set->ops = &nvme_rdma_admin_mq_ops;
38dabe21 730 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
b28a308e 731 set->reserved_tags = 2; /* connect + keep-alive */
103e515e 732 set->numa_node = nctrl->numa_node;
b28a308e 733 set->cmd_size = sizeof(struct nvme_rdma_request) +
38e18002 734 NVME_INLINE_SG_CNT * sizeof(struct scatterlist);
b28a308e
SG
735 set->driver_data = ctrl;
736 set->nr_hw_queues = 1;
737 set->timeout = ADMIN_TIMEOUT;
94f29d4f 738 set->flags = BLK_MQ_F_NO_SCHED;
b28a308e
SG
739 } else {
740 set = &ctrl->tag_set;
741 memset(set, 0, sizeof(*set));
742 set->ops = &nvme_rdma_mq_ops;
5e77d61c 743 set->queue_depth = nctrl->sqsize + 1;
b28a308e 744 set->reserved_tags = 1; /* fabric connect */
103e515e 745 set->numa_node = nctrl->numa_node;
b28a308e
SG
746 set->flags = BLK_MQ_F_SHOULD_MERGE;
747 set->cmd_size = sizeof(struct nvme_rdma_request) +
38e18002 748 NVME_INLINE_SG_CNT * sizeof(struct scatterlist);
b28a308e
SG
749 set->driver_data = ctrl;
750 set->nr_hw_queues = nctrl->queue_count - 1;
751 set->timeout = NVME_IO_TIMEOUT;
ff8519f9 752 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
b28a308e
SG
753 }
754
755 ret = blk_mq_alloc_tag_set(set);
756 if (ret)
87fd1253 757 return ERR_PTR(ret);
b28a308e
SG
758
759 return set;
b28a308e
SG
760}
761
3f02fffb
SG
762static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
763 bool remove)
71102307 764{
3f02fffb
SG
765 if (remove) {
766 blk_cleanup_queue(ctrl->ctrl.admin_q);
e7832cb4 767 blk_cleanup_queue(ctrl->ctrl.fabrics_q);
87fd1253 768 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
3f02fffb 769 }
682630f0
SG
770 if (ctrl->async_event_sqe.data) {
771 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
772 sizeof(struct nvme_command), DMA_TO_DEVICE);
773 ctrl->async_event_sqe.data = NULL;
774 }
a57bd541 775 nvme_rdma_free_queue(&ctrl->queues[0]);
71102307
CH
776}
777
3f02fffb
SG
778static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
779 bool new)
90af3512
SG
780{
781 int error;
782
41e8cfa1 783 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
90af3512
SG
784 if (error)
785 return error;
786
787 ctrl->device = ctrl->queues[0].device;
103e515e 788 ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device);
90af3512 789
f41725bb 790 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev);
90af3512 791
62f99b62
MG
792 /*
793 * Bind the async event SQE DMA mapping to the admin queue lifetime.
794 * It's safe, since any chage in the underlying RDMA device will issue
795 * error recovery and queue re-creation.
796 */
94e42213
SG
797 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
798 sizeof(struct nvme_command), DMA_TO_DEVICE);
799 if (error)
800 goto out_free_queue;
801
3f02fffb
SG
802 if (new) {
803 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
f04b9cc8
SG
804 if (IS_ERR(ctrl->ctrl.admin_tagset)) {
805 error = PTR_ERR(ctrl->ctrl.admin_tagset);
94e42213 806 goto out_free_async_qe;
f04b9cc8 807 }
90af3512 808
e7832cb4
SG
809 ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set);
810 if (IS_ERR(ctrl->ctrl.fabrics_q)) {
811 error = PTR_ERR(ctrl->ctrl.fabrics_q);
812 goto out_free_tagset;
813 }
814
3f02fffb
SG
815 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
816 if (IS_ERR(ctrl->ctrl.admin_q)) {
817 error = PTR_ERR(ctrl->ctrl.admin_q);
e7832cb4 818 goto out_cleanup_fabrics_q;
3f02fffb 819 }
90af3512
SG
820 }
821
68e16fcf 822 error = nvme_rdma_start_queue(ctrl, 0);
90af3512
SG
823 if (error)
824 goto out_cleanup_queue;
825
c0f2f45b 826 error = nvme_enable_ctrl(&ctrl->ctrl);
90af3512 827 if (error)
2e050f00 828 goto out_stop_queue;
90af3512 829
ff13c1b8
MG
830 ctrl->ctrl.max_segments = ctrl->max_fr_pages;
831 ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
90af3512 832
e7832cb4
SG
833 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
834
90af3512
SG
835 error = nvme_init_identify(&ctrl->ctrl);
836 if (error)
2e050f00 837 goto out_stop_queue;
90af3512 838
90af3512
SG
839 return 0;
840
2e050f00
JW
841out_stop_queue:
842 nvme_rdma_stop_queue(&ctrl->queues[0]);
90af3512 843out_cleanup_queue:
3f02fffb
SG
844 if (new)
845 blk_cleanup_queue(ctrl->ctrl.admin_q);
e7832cb4
SG
846out_cleanup_fabrics_q:
847 if (new)
848 blk_cleanup_queue(ctrl->ctrl.fabrics_q);
90af3512 849out_free_tagset:
3f02fffb 850 if (new)
87fd1253 851 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
94e42213 852out_free_async_qe:
9134ae2a
PS
853 if (ctrl->async_event_sqe.data) {
854 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
855 sizeof(struct nvme_command), DMA_TO_DEVICE);
856 ctrl->async_event_sqe.data = NULL;
857 }
90af3512
SG
858out_free_queue:
859 nvme_rdma_free_queue(&ctrl->queues[0]);
860 return error;
861}
862
a57bd541
SG
863static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
864 bool remove)
865{
a57bd541
SG
866 if (remove) {
867 blk_cleanup_queue(ctrl->ctrl.connect_q);
87fd1253 868 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
869 }
870 nvme_rdma_free_io_queues(ctrl);
871}
872
873static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
874{
875 int ret;
876
41e8cfa1 877 ret = nvme_rdma_alloc_io_queues(ctrl);
a57bd541
SG
878 if (ret)
879 return ret;
880
881 if (new) {
882 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
f04b9cc8
SG
883 if (IS_ERR(ctrl->ctrl.tagset)) {
884 ret = PTR_ERR(ctrl->ctrl.tagset);
a57bd541 885 goto out_free_io_queues;
f04b9cc8 886 }
a57bd541
SG
887
888 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
889 if (IS_ERR(ctrl->ctrl.connect_q)) {
890 ret = PTR_ERR(ctrl->ctrl.connect_q);
891 goto out_free_tag_set;
892 }
893 } else {
a57bd541
SG
894 blk_mq_update_nr_hw_queues(&ctrl->tag_set,
895 ctrl->ctrl.queue_count - 1);
896 }
897
68e16fcf 898 ret = nvme_rdma_start_io_queues(ctrl);
a57bd541
SG
899 if (ret)
900 goto out_cleanup_connect_q;
901
902 return 0;
903
904out_cleanup_connect_q:
905 if (new)
906 blk_cleanup_queue(ctrl->ctrl.connect_q);
907out_free_tag_set:
908 if (new)
87fd1253 909 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
910out_free_io_queues:
911 nvme_rdma_free_io_queues(ctrl);
912 return ret;
71102307
CH
913}
914
75862c72
SG
915static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
916 bool remove)
917{
918 blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
919 nvme_rdma_stop_queue(&ctrl->queues[0]);
622b8b68 920 if (ctrl->ctrl.admin_tagset) {
1007709d
SG
921 blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset,
922 nvme_cancel_request, &ctrl->ctrl);
622b8b68
ML
923 blk_mq_tagset_wait_completed_request(ctrl->ctrl.admin_tagset);
924 }
e7832cb4
SG
925 if (remove)
926 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
75862c72
SG
927 nvme_rdma_destroy_admin_queue(ctrl, remove);
928}
929
930static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
931 bool remove)
932{
933 if (ctrl->ctrl.queue_count > 1) {
934 nvme_stop_queues(&ctrl->ctrl);
935 nvme_rdma_stop_io_queues(ctrl);
622b8b68 936 if (ctrl->ctrl.tagset) {
1007709d
SG
937 blk_mq_tagset_busy_iter(ctrl->ctrl.tagset,
938 nvme_cancel_request, &ctrl->ctrl);
622b8b68
ML
939 blk_mq_tagset_wait_completed_request(ctrl->ctrl.tagset);
940 }
75862c72
SG
941 if (remove)
942 nvme_start_queues(&ctrl->ctrl);
943 nvme_rdma_destroy_io_queues(ctrl, remove);
944 }
945}
946
71102307
CH
947static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
948{
949 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
950
951 if (list_empty(&ctrl->list))
952 goto free_ctrl;
953
954 mutex_lock(&nvme_rdma_ctrl_mutex);
955 list_del(&ctrl->list);
956 mutex_unlock(&nvme_rdma_ctrl_mutex);
957
71102307
CH
958 nvmf_free_options(nctrl->opts);
959free_ctrl:
3d064101 960 kfree(ctrl->queues);
71102307
CH
961 kfree(ctrl);
962}
963
fd8563ce
SG
964static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
965{
966 /* If we are resetting/deleting then do nothing */
ad6a0a52 967 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
fd8563ce
SG
968 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
969 ctrl->ctrl.state == NVME_CTRL_LIVE);
970 return;
971 }
972
973 if (nvmf_should_reconnect(&ctrl->ctrl)) {
974 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
975 ctrl->ctrl.opts->reconnect_delay);
9a6327d2 976 queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
fd8563ce
SG
977 ctrl->ctrl.opts->reconnect_delay * HZ);
978 } else {
12fa1304 979 nvme_delete_ctrl(&ctrl->ctrl);
fd8563ce
SG
980 }
981}
982
c66e2998 983static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
71102307 984{
c66e2998 985 int ret = -EINVAL;
71102307 986 bool changed;
71102307 987
c66e2998 988 ret = nvme_rdma_configure_admin_queue(ctrl, new);
71102307 989 if (ret)
c66e2998
SG
990 return ret;
991
992 if (ctrl->ctrl.icdoff) {
993 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
994 goto destroy_admin;
995 }
996
997 if (!(ctrl->ctrl.sgls & (1 << 2))) {
998 dev_err(ctrl->ctrl.device,
999 "Mandatory keyed sgls are not supported!\n");
1000 goto destroy_admin;
1001 }
1002
1003 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1004 dev_warn(ctrl->ctrl.device,
1005 "queue_size %zu > ctrl sqsize %u, clamping down\n",
1006 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1007 }
1008
1009 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1010 dev_warn(ctrl->ctrl.device,
1011 "sqsize %u > ctrl maxcmd %u, clamping down\n",
1012 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1013 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1014 }
71102307 1015
64a741c1
SW
1016 if (ctrl->ctrl.sgls & (1 << 20))
1017 ctrl->use_inline_data = true;
71102307 1018
d858e5f0 1019 if (ctrl->ctrl.queue_count > 1) {
c66e2998 1020 ret = nvme_rdma_configure_io_queues(ctrl, new);
71102307 1021 if (ret)
5e1fe61d 1022 goto destroy_admin;
71102307
CH
1023 }
1024
1025 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
0a960afd 1026 if (!changed) {
96135862
IR
1027 /*
1028 * state change failure is ok if we're in DELETING state,
1029 * unless we're during creation of a new controller to
1030 * avoid races with teardown flow.
1031 */
0a960afd 1032 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
96135862 1033 WARN_ON_ONCE(new);
c66e2998
SG
1034 ret = -EINVAL;
1035 goto destroy_io;
0a960afd
SG
1036 }
1037
d09f2b45 1038 nvme_start_ctrl(&ctrl->ctrl);
c66e2998
SG
1039 return 0;
1040
1041destroy_io:
1042 if (ctrl->ctrl.queue_count > 1)
1043 nvme_rdma_destroy_io_queues(ctrl, new);
1044destroy_admin:
1045 nvme_rdma_stop_queue(&ctrl->queues[0]);
1046 nvme_rdma_destroy_admin_queue(ctrl, new);
1047 return ret;
1048}
1049
1050static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1051{
1052 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1053 struct nvme_rdma_ctrl, reconnect_work);
1054
1055 ++ctrl->ctrl.nr_reconnects;
1056
1057 if (nvme_rdma_setup_ctrl(ctrl, false))
1058 goto requeue;
71102307 1059
5e1fe61d
SG
1060 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1061 ctrl->ctrl.nr_reconnects);
1062
1063 ctrl->ctrl.nr_reconnects = 0;
71102307
CH
1064
1065 return;
1066
71102307 1067requeue:
fd8563ce 1068 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
fdf9dfa8 1069 ctrl->ctrl.nr_reconnects);
fd8563ce 1070 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1071}
1072
1073static void nvme_rdma_error_recovery_work(struct work_struct *work)
1074{
1075 struct nvme_rdma_ctrl *ctrl = container_of(work,
1076 struct nvme_rdma_ctrl, err_work);
1077
e4d753d7 1078 nvme_stop_keep_alive(&ctrl->ctrl);
75862c72 1079 nvme_rdma_teardown_io_queues(ctrl, false);
e818a5b4 1080 nvme_start_queues(&ctrl->ctrl);
75862c72 1081 nvme_rdma_teardown_admin_queue(ctrl, false);
e7832cb4 1082 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
e818a5b4 1083
ad6a0a52 1084 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
187c0832
NC
1085 /* state change failure is ok if we're in DELETING state */
1086 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
d5bf4b7f
SG
1087 return;
1088 }
1089
fd8563ce 1090 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1091}
1092
1093static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1094{
d5bf4b7f 1095 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
71102307
CH
1096 return;
1097
97b2512a 1098 queue_work(nvme_reset_wq, &ctrl->err_work);
71102307
CH
1099}
1100
1101static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1102 const char *op)
1103{
1104 struct nvme_rdma_queue *queue = cq->cq_context;
1105 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1106
1107 if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1108 dev_info(ctrl->ctrl.device,
1109 "%s for CQE 0x%p failed with status %s (%d)\n",
1110 op, wc->wr_cqe,
1111 ib_wc_status_msg(wc->status), wc->status);
1112 nvme_rdma_error_recovery(ctrl);
1113}
1114
1115static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1116{
1117 if (unlikely(wc->status != IB_WC_SUCCESS))
1118 nvme_rdma_wr_error(cq, wc, "MEMREG");
1119}
1120
1121static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1122{
2f122e4f
SG
1123 struct nvme_rdma_request *req =
1124 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1125 struct request *rq = blk_mq_rq_from_pdu(req);
1126
1127 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1128 nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
2f122e4f
SG
1129 return;
1130 }
1131
1132 if (refcount_dec_and_test(&req->ref))
1133 nvme_end_request(rq, req->status, req->result);
1134
71102307
CH
1135}
1136
1137static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1138 struct nvme_rdma_request *req)
1139{
71102307
CH
1140 struct ib_send_wr wr = {
1141 .opcode = IB_WR_LOCAL_INV,
1142 .next = NULL,
1143 .num_sge = 0,
2f122e4f 1144 .send_flags = IB_SEND_SIGNALED,
71102307
CH
1145 .ex.invalidate_rkey = req->mr->rkey,
1146 };
1147
1148 req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1149 wr.wr_cqe = &req->reg_cqe;
1150
45e3cc1a 1151 return ib_post_send(queue->qp, &wr, NULL);
71102307
CH
1152}
1153
1154static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1155 struct request *rq)
1156{
1157 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307
CH
1158 struct nvme_rdma_device *dev = queue->device;
1159 struct ib_device *ibdev = dev->dev;
71102307 1160
34e08191 1161 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1162 return;
1163
f41725bb
IR
1164 if (req->mr) {
1165 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1166 req->mr = NULL;
1167 }
1168
bc31c1ee 1169 ib_dma_unmap_sg(ibdev, req->sg_table.sgl, req->nents, rq_dma_dir(rq));
38e18002 1170 sg_free_table_chained(&req->sg_table, NVME_INLINE_SG_CNT);
71102307
CH
1171}
1172
1173static int nvme_rdma_set_sg_null(struct nvme_command *c)
1174{
1175 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1176
1177 sg->addr = 0;
1178 put_unaligned_le24(0, sg->length);
1179 put_unaligned_le32(0, sg->key);
1180 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1181 return 0;
1182}
1183
1184static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
64a741c1
SW
1185 struct nvme_rdma_request *req, struct nvme_command *c,
1186 int count)
71102307
CH
1187{
1188 struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
64a741c1
SW
1189 struct scatterlist *sgl = req->sg_table.sgl;
1190 struct ib_sge *sge = &req->sge[1];
1191 u32 len = 0;
1192 int i;
71102307 1193
64a741c1
SW
1194 for (i = 0; i < count; i++, sgl++, sge++) {
1195 sge->addr = sg_dma_address(sgl);
1196 sge->length = sg_dma_len(sgl);
1197 sge->lkey = queue->device->pd->local_dma_lkey;
1198 len += sge->length;
1199 }
71102307
CH
1200
1201 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
64a741c1 1202 sg->length = cpu_to_le32(len);
71102307
CH
1203 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1204
64a741c1 1205 req->num_sge += count;
71102307
CH
1206 return 0;
1207}
1208
1209static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1210 struct nvme_rdma_request *req, struct nvme_command *c)
1211{
1212 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1213
1214 sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
1215 put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
11975e01 1216 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
71102307
CH
1217 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1218 return 0;
1219}
1220
1221static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1222 struct nvme_rdma_request *req, struct nvme_command *c,
1223 int count)
1224{
1225 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1226 int nr;
1227
f41725bb
IR
1228 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1229 if (WARN_ON_ONCE(!req->mr))
1230 return -EAGAIN;
1231
b925a2dc
MG
1232 /*
1233 * Align the MR to a 4K page size to match the ctrl page size and
1234 * the block virtual boundary.
1235 */
1236 nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K);
a7b7c7a1 1237 if (unlikely(nr < count)) {
f41725bb
IR
1238 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1239 req->mr = NULL;
71102307
CH
1240 if (nr < 0)
1241 return nr;
1242 return -EINVAL;
1243 }
1244
1245 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1246
1247 req->reg_cqe.done = nvme_rdma_memreg_done;
1248 memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1249 req->reg_wr.wr.opcode = IB_WR_REG_MR;
1250 req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1251 req->reg_wr.wr.num_sge = 0;
1252 req->reg_wr.mr = req->mr;
1253 req->reg_wr.key = req->mr->rkey;
1254 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1255 IB_ACCESS_REMOTE_READ |
1256 IB_ACCESS_REMOTE_WRITE;
1257
71102307
CH
1258 sg->addr = cpu_to_le64(req->mr->iova);
1259 put_unaligned_le24(req->mr->length, sg->length);
1260 put_unaligned_le32(req->mr->rkey, sg->key);
1261 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1262 NVME_SGL_FMT_INVALIDATE;
1263
1264 return 0;
1265}
1266
1267static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
b131c61d 1268 struct request *rq, struct nvme_command *c)
71102307
CH
1269{
1270 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1271 struct nvme_rdma_device *dev = queue->device;
1272 struct ib_device *ibdev = dev->dev;
f9d03f96 1273 int count, ret;
71102307
CH
1274
1275 req->num_sge = 1;
4af7f7ff 1276 refcount_set(&req->ref, 2); /* send and recv completions */
71102307
CH
1277
1278 c->common.flags |= NVME_CMD_SGL_METABUF;
1279
34e08191 1280 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1281 return nvme_rdma_set_sg_null(c);
1282
1283 req->sg_table.sgl = req->first_sgl;
f9d03f96 1284 ret = sg_alloc_table_chained(&req->sg_table,
4635873c 1285 blk_rq_nr_phys_segments(rq), req->sg_table.sgl,
38e18002 1286 NVME_INLINE_SG_CNT);
71102307
CH
1287 if (ret)
1288 return -ENOMEM;
1289
f9d03f96 1290 req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
71102307 1291
f9d03f96 1292 count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
bc31c1ee 1293 rq_dma_dir(rq));
71102307 1294 if (unlikely(count <= 0)) {
94423a8f
MG
1295 ret = -EIO;
1296 goto out_free_table;
71102307
CH
1297 }
1298
64a741c1 1299 if (count <= dev->num_inline_segments) {
b131c61d 1300 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
64a741c1 1301 queue->ctrl->use_inline_data &&
b131c61d 1302 blk_rq_payload_bytes(rq) <=
94423a8f 1303 nvme_rdma_inline_data_size(queue)) {
64a741c1 1304 ret = nvme_rdma_map_sg_inline(queue, req, c, count);
94423a8f
MG
1305 goto out;
1306 }
71102307 1307
64a741c1 1308 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
94423a8f
MG
1309 ret = nvme_rdma_map_sg_single(queue, req, c);
1310 goto out;
1311 }
71102307
CH
1312 }
1313
94423a8f
MG
1314 ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1315out:
1316 if (unlikely(ret))
1317 goto out_unmap_sg;
1318
1319 return 0;
1320
1321out_unmap_sg:
bc31c1ee 1322 ib_dma_unmap_sg(ibdev, req->sg_table.sgl, req->nents, rq_dma_dir(rq));
94423a8f 1323out_free_table:
38e18002 1324 sg_free_table_chained(&req->sg_table, NVME_INLINE_SG_CNT);
94423a8f 1325 return ret;
71102307
CH
1326}
1327
1328static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1329{
4af7f7ff
SG
1330 struct nvme_rdma_qe *qe =
1331 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1332 struct nvme_rdma_request *req =
1333 container_of(qe, struct nvme_rdma_request, sqe);
1334 struct request *rq = blk_mq_rq_from_pdu(req);
1335
1336 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1337 nvme_rdma_wr_error(cq, wc, "SEND");
4af7f7ff
SG
1338 return;
1339 }
1340
1341 if (refcount_dec_and_test(&req->ref))
1342 nvme_end_request(rq, req->status, req->result);
71102307
CH
1343}
1344
1345static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1346 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
b4b591c8 1347 struct ib_send_wr *first)
71102307 1348{
45e3cc1a 1349 struct ib_send_wr wr;
71102307
CH
1350 int ret;
1351
1352 sge->addr = qe->dma;
1353 sge->length = sizeof(struct nvme_command),
1354 sge->lkey = queue->device->pd->local_dma_lkey;
1355
71102307
CH
1356 wr.next = NULL;
1357 wr.wr_cqe = &qe->cqe;
1358 wr.sg_list = sge;
1359 wr.num_sge = num_sge;
1360 wr.opcode = IB_WR_SEND;
b4b591c8 1361 wr.send_flags = IB_SEND_SIGNALED;
71102307
CH
1362
1363 if (first)
1364 first->next = &wr;
1365 else
1366 first = &wr;
1367
45e3cc1a 1368 ret = ib_post_send(queue->qp, first, NULL);
a7b7c7a1 1369 if (unlikely(ret)) {
71102307
CH
1370 dev_err(queue->ctrl->ctrl.device,
1371 "%s failed with error code %d\n", __func__, ret);
1372 }
1373 return ret;
1374}
1375
1376static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1377 struct nvme_rdma_qe *qe)
1378{
45e3cc1a 1379 struct ib_recv_wr wr;
71102307
CH
1380 struct ib_sge list;
1381 int ret;
1382
1383 list.addr = qe->dma;
1384 list.length = sizeof(struct nvme_completion);
1385 list.lkey = queue->device->pd->local_dma_lkey;
1386
1387 qe->cqe.done = nvme_rdma_recv_done;
1388
1389 wr.next = NULL;
1390 wr.wr_cqe = &qe->cqe;
1391 wr.sg_list = &list;
1392 wr.num_sge = 1;
1393
45e3cc1a 1394 ret = ib_post_recv(queue->qp, &wr, NULL);
a7b7c7a1 1395 if (unlikely(ret)) {
71102307
CH
1396 dev_err(queue->ctrl->ctrl.device,
1397 "%s failed with error code %d\n", __func__, ret);
1398 }
1399 return ret;
1400}
1401
1402static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1403{
1404 u32 queue_idx = nvme_rdma_queue_idx(queue);
1405
1406 if (queue_idx == 0)
1407 return queue->ctrl->admin_tag_set.tags[queue_idx];
1408 return queue->ctrl->tag_set.tags[queue_idx - 1];
1409}
1410
b4b591c8
SG
1411static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1412{
1413 if (unlikely(wc->status != IB_WC_SUCCESS))
1414 nvme_rdma_wr_error(cq, wc, "ASYNC");
1415}
1416
ad22c355 1417static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
71102307
CH
1418{
1419 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1420 struct nvme_rdma_queue *queue = &ctrl->queues[0];
1421 struct ib_device *dev = queue->device->dev;
1422 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1423 struct nvme_command *cmd = sqe->data;
1424 struct ib_sge sge;
1425 int ret;
1426
71102307
CH
1427 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1428
1429 memset(cmd, 0, sizeof(*cmd));
1430 cmd->common.opcode = nvme_admin_async_event;
38dabe21 1431 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
71102307
CH
1432 cmd->common.flags |= NVME_CMD_SGL_METABUF;
1433 nvme_rdma_set_sg_null(cmd);
1434
b4b591c8
SG
1435 sqe->cqe.done = nvme_rdma_async_done;
1436
71102307
CH
1437 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1438 DMA_TO_DEVICE);
1439
b4b591c8 1440 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
71102307
CH
1441 WARN_ON_ONCE(ret);
1442}
1443
1052b8ac
JA
1444static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1445 struct nvme_completion *cqe, struct ib_wc *wc)
71102307 1446{
71102307
CH
1447 struct request *rq;
1448 struct nvme_rdma_request *req;
71102307 1449
71102307
CH
1450 rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
1451 if (!rq) {
1452 dev_err(queue->ctrl->ctrl.device,
1453 "tag 0x%x on QP %#x not found\n",
1454 cqe->command_id, queue->qp->qp_num);
1455 nvme_rdma_error_recovery(queue->ctrl);
1052b8ac 1456 return;
71102307
CH
1457 }
1458 req = blk_mq_rq_to_pdu(rq);
1459
4af7f7ff
SG
1460 req->status = cqe->status;
1461 req->result = cqe->result;
71102307 1462
3ef0279b
SG
1463 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1464 if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) {
1465 dev_err(queue->ctrl->ctrl.device,
1466 "Bogus remote invalidation for rkey %#x\n",
1467 req->mr->rkey);
1468 nvme_rdma_error_recovery(queue->ctrl);
1469 }
f41725bb 1470 } else if (req->mr) {
1052b8ac
JA
1471 int ret;
1472
2f122e4f
SG
1473 ret = nvme_rdma_inv_rkey(queue, req);
1474 if (unlikely(ret < 0)) {
1475 dev_err(queue->ctrl->ctrl.device,
1476 "Queueing INV WR for rkey %#x failed (%d)\n",
1477 req->mr->rkey, ret);
1478 nvme_rdma_error_recovery(queue->ctrl);
1479 }
1480 /* the local invalidation completion will end the request */
1052b8ac 1481 return;
2f122e4f 1482 }
71102307 1483
1052b8ac 1484 if (refcount_dec_and_test(&req->ref))
4af7f7ff 1485 nvme_end_request(rq, req->status, req->result);
71102307
CH
1486}
1487
1052b8ac 1488static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
71102307
CH
1489{
1490 struct nvme_rdma_qe *qe =
1491 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1492 struct nvme_rdma_queue *queue = cq->cq_context;
1493 struct ib_device *ibdev = queue->device->dev;
1494 struct nvme_completion *cqe = qe->data;
1495 const size_t len = sizeof(struct nvme_completion);
71102307
CH
1496
1497 if (unlikely(wc->status != IB_WC_SUCCESS)) {
1498 nvme_rdma_wr_error(cq, wc, "RECV");
1052b8ac 1499 return;
71102307
CH
1500 }
1501
1502 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1503 /*
1504 * AEN requests are special as they don't time out and can
1505 * survive any kind of queue freeze and often don't respond to
1506 * aborts. We don't even bother to allocate a struct request
1507 * for them but rather special case them here.
1508 */
58a8df67
IR
1509 if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue),
1510 cqe->command_id)))
7bf58533
CH
1511 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1512 &cqe->result);
71102307 1513 else
1052b8ac 1514 nvme_rdma_process_nvme_rsp(queue, cqe, wc);
71102307
CH
1515 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1516
1517 nvme_rdma_post_recv(queue, qe);
71102307
CH
1518}
1519
1520static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1521{
1522 int ret, i;
1523
1524 for (i = 0; i < queue->queue_size; i++) {
1525 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1526 if (ret)
1527 goto out_destroy_queue_ib;
1528 }
1529
1530 return 0;
1531
1532out_destroy_queue_ib:
1533 nvme_rdma_destroy_queue_ib(queue);
1534 return ret;
1535}
1536
1537static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1538 struct rdma_cm_event *ev)
1539{
7f03953c
SW
1540 struct rdma_cm_id *cm_id = queue->cm_id;
1541 int status = ev->status;
1542 const char *rej_msg;
1543 const struct nvme_rdma_cm_rej *rej_data;
1544 u8 rej_data_len;
1545
1546 rej_msg = rdma_reject_msg(cm_id, status);
1547 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1548
1549 if (rej_data && rej_data_len >= sizeof(u16)) {
1550 u16 sts = le16_to_cpu(rej_data->sts);
71102307
CH
1551
1552 dev_err(queue->ctrl->ctrl.device,
7f03953c
SW
1553 "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1554 status, rej_msg, sts, nvme_rdma_cm_msg(sts));
71102307
CH
1555 } else {
1556 dev_err(queue->ctrl->ctrl.device,
7f03953c 1557 "Connect rejected: status %d (%s).\n", status, rej_msg);
71102307
CH
1558 }
1559
1560 return -ECONNRESET;
1561}
1562
1563static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1564{
e63440d6 1565 struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
71102307
CH
1566 int ret;
1567
ca6e95bb
SG
1568 ret = nvme_rdma_create_queue_ib(queue);
1569 if (ret)
1570 return ret;
71102307 1571
e63440d6
IR
1572 if (ctrl->opts->tos >= 0)
1573 rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
71102307
CH
1574 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1575 if (ret) {
e63440d6 1576 dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
71102307
CH
1577 queue->cm_error);
1578 goto out_destroy_queue;
1579 }
1580
1581 return 0;
1582
1583out_destroy_queue:
1584 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1585 return ret;
1586}
1587
1588static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1589{
1590 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1591 struct rdma_conn_param param = { };
0b857b44 1592 struct nvme_rdma_cm_req priv = { };
71102307
CH
1593 int ret;
1594
1595 param.qp_num = queue->qp->qp_num;
1596 param.flow_control = 1;
1597
1598 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
2ac17c28
SG
1599 /* maximum retry count */
1600 param.retry_count = 7;
71102307
CH
1601 param.rnr_retry_count = 7;
1602 param.private_data = &priv;
1603 param.private_data_len = sizeof(priv);
1604
1605 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1606 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
f994d9dc
JF
1607 /*
1608 * set the admin queue depth to the minimum size
1609 * specified by the Fabrics standard.
1610 */
1611 if (priv.qid == 0) {
7aa1f427
SG
1612 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1613 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
f994d9dc 1614 } else {
c5af8654
JF
1615 /*
1616 * current interpretation of the fabrics spec
1617 * is at minimum you make hrqsize sqsize+1, or a
1618 * 1's based representation of sqsize.
1619 */
f994d9dc 1620 priv.hrqsize = cpu_to_le16(queue->queue_size);
c5af8654 1621 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
f994d9dc 1622 }
71102307
CH
1623
1624 ret = rdma_connect(queue->cm_id, &param);
1625 if (ret) {
1626 dev_err(ctrl->ctrl.device,
1627 "rdma_connect failed (%d).\n", ret);
1628 goto out_destroy_queue_ib;
1629 }
1630
1631 return 0;
1632
1633out_destroy_queue_ib:
1634 nvme_rdma_destroy_queue_ib(queue);
1635 return ret;
1636}
1637
71102307
CH
1638static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1639 struct rdma_cm_event *ev)
1640{
1641 struct nvme_rdma_queue *queue = cm_id->context;
1642 int cm_error = 0;
1643
1644 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1645 rdma_event_msg(ev->event), ev->event,
1646 ev->status, cm_id);
1647
1648 switch (ev->event) {
1649 case RDMA_CM_EVENT_ADDR_RESOLVED:
1650 cm_error = nvme_rdma_addr_resolved(queue);
1651 break;
1652 case RDMA_CM_EVENT_ROUTE_RESOLVED:
1653 cm_error = nvme_rdma_route_resolved(queue);
1654 break;
1655 case RDMA_CM_EVENT_ESTABLISHED:
1656 queue->cm_error = nvme_rdma_conn_established(queue);
1657 /* complete cm_done regardless of success/failure */
1658 complete(&queue->cm_done);
1659 return 0;
1660 case RDMA_CM_EVENT_REJECTED:
abf87d5e 1661 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1662 cm_error = nvme_rdma_conn_rejected(queue, ev);
1663 break;
71102307
CH
1664 case RDMA_CM_EVENT_ROUTE_ERROR:
1665 case RDMA_CM_EVENT_CONNECT_ERROR:
1666 case RDMA_CM_EVENT_UNREACHABLE:
abf87d5e 1667 nvme_rdma_destroy_queue_ib(queue);
249090f9 1668 /* fall through */
abf87d5e 1669 case RDMA_CM_EVENT_ADDR_ERROR:
71102307
CH
1670 dev_dbg(queue->ctrl->ctrl.device,
1671 "CM error event %d\n", ev->event);
1672 cm_error = -ECONNRESET;
1673 break;
1674 case RDMA_CM_EVENT_DISCONNECTED:
1675 case RDMA_CM_EVENT_ADDR_CHANGE:
1676 case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1677 dev_dbg(queue->ctrl->ctrl.device,
1678 "disconnect received - connection closed\n");
1679 nvme_rdma_error_recovery(queue->ctrl);
1680 break;
1681 case RDMA_CM_EVENT_DEVICE_REMOVAL:
e87a911f
SW
1682 /* device removal is handled via the ib_client API */
1683 break;
71102307
CH
1684 default:
1685 dev_err(queue->ctrl->ctrl.device,
1686 "Unexpected RDMA CM event (%d)\n", ev->event);
1687 nvme_rdma_error_recovery(queue->ctrl);
1688 break;
1689 }
1690
1691 if (cm_error) {
1692 queue->cm_error = cm_error;
1693 complete(&queue->cm_done);
1694 }
1695
1696 return 0;
1697}
1698
1699static enum blk_eh_timer_return
1700nvme_rdma_timeout(struct request *rq, bool reserved)
1701{
1702 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
4c174e63
SG
1703 struct nvme_rdma_queue *queue = req->queue;
1704 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
71102307 1705
4c174e63
SG
1706 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
1707 rq->tag, nvme_rdma_queue_idx(queue));
e62a538d 1708
92b98e88
KB
1709 /*
1710 * Restart the timer if a controller reset is already scheduled. Any
1711 * timed out commands would be handled before entering the connecting
1712 * state.
1713 */
1714 if (ctrl->ctrl.state == NVME_CTRL_RESETTING)
1715 return BLK_EH_RESET_TIMER;
1716
4c174e63
SG
1717 if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
1718 /*
1719 * Teardown immediately if controller times out while starting
1720 * or we are already started error recovery. all outstanding
1721 * requests are completed on shutdown, so we return BLK_EH_DONE.
1722 */
1723 flush_work(&ctrl->err_work);
1724 nvme_rdma_teardown_io_queues(ctrl, false);
1725 nvme_rdma_teardown_admin_queue(ctrl, false);
1726 return BLK_EH_DONE;
1727 }
71102307 1728
4c174e63
SG
1729 dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1730 nvme_rdma_error_recovery(ctrl);
71102307 1731
4c174e63 1732 return BLK_EH_RESET_TIMER;
71102307
CH
1733}
1734
fc17b653 1735static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
71102307
CH
1736 const struct blk_mq_queue_data *bd)
1737{
1738 struct nvme_ns *ns = hctx->queue->queuedata;
1739 struct nvme_rdma_queue *queue = hctx->driver_data;
1740 struct request *rq = bd->rq;
1741 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1742 struct nvme_rdma_qe *sqe = &req->sqe;
1743 struct nvme_command *c = sqe->data;
71102307 1744 struct ib_device *dev;
3bc32bb1 1745 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
fc17b653
CH
1746 blk_status_t ret;
1747 int err;
71102307
CH
1748
1749 WARN_ON_ONCE(rq->tag < 0);
1750
3bc32bb1 1751 if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
6cdefc6e 1752 return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq);
553cd9ef 1753
71102307 1754 dev = queue->device->dev;
62f99b62
MG
1755
1756 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
1757 sizeof(struct nvme_command),
1758 DMA_TO_DEVICE);
1759 err = ib_dma_mapping_error(dev, req->sqe.dma);
1760 if (unlikely(err))
1761 return BLK_STS_RESOURCE;
1762
71102307
CH
1763 ib_dma_sync_single_for_cpu(dev, sqe->dma,
1764 sizeof(struct nvme_command), DMA_TO_DEVICE);
1765
1766 ret = nvme_setup_cmd(ns, rq, c);
fc17b653 1767 if (ret)
62f99b62 1768 goto unmap_qe;
71102307 1769
71102307
CH
1770 blk_mq_start_request(rq);
1771
fc17b653 1772 err = nvme_rdma_map_data(queue, rq, c);
a7b7c7a1 1773 if (unlikely(err < 0)) {
71102307 1774 dev_err(queue->ctrl->ctrl.device,
fc17b653 1775 "Failed to map data (%d)\n", err);
71102307
CH
1776 goto err;
1777 }
1778
b4b591c8
SG
1779 sqe->cqe.done = nvme_rdma_send_done;
1780
71102307
CH
1781 ib_dma_sync_single_for_device(dev, sqe->dma,
1782 sizeof(struct nvme_command), DMA_TO_DEVICE);
1783
fc17b653 1784 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
f41725bb 1785 req->mr ? &req->reg_wr.wr : NULL);
16686f3a
MG
1786 if (unlikely(err))
1787 goto err_unmap;
71102307 1788
fc17b653 1789 return BLK_STS_OK;
62f99b62 1790
16686f3a
MG
1791err_unmap:
1792 nvme_rdma_unmap_data(queue, rq);
71102307 1793err:
fc17b653 1794 if (err == -ENOMEM || err == -EAGAIN)
62f99b62
MG
1795 ret = BLK_STS_RESOURCE;
1796 else
1797 ret = BLK_STS_IOERR;
16686f3a 1798 nvme_cleanup_cmd(rq);
62f99b62
MG
1799unmap_qe:
1800 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
1801 DMA_TO_DEVICE);
1802 return ret;
71102307
CH
1803}
1804
ff8519f9
SG
1805static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx)
1806{
1807 struct nvme_rdma_queue *queue = hctx->driver_data;
1808
1809 return ib_process_cq_direct(queue->ib_cq, -1);
1810}
1811
71102307
CH
1812static void nvme_rdma_complete_rq(struct request *rq)
1813{
1814 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
62f99b62
MG
1815 struct nvme_rdma_queue *queue = req->queue;
1816 struct ib_device *ibdev = queue->device->dev;
71102307 1817
62f99b62
MG
1818 nvme_rdma_unmap_data(queue, rq);
1819 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
1820 DMA_TO_DEVICE);
77f02a7a 1821 nvme_complete_rq(rq);
71102307
CH
1822}
1823
0b36658c
SG
1824static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
1825{
1826 struct nvme_rdma_ctrl *ctrl = set->driver_data;
5651cd3c 1827 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
0b36658c 1828
5651cd3c 1829 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) {
b65bb777 1830 /* separate read/write queues */
5651cd3c
SG
1831 set->map[HCTX_TYPE_DEFAULT].nr_queues =
1832 ctrl->io_queues[HCTX_TYPE_DEFAULT];
1833 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
1834 set->map[HCTX_TYPE_READ].nr_queues =
1835 ctrl->io_queues[HCTX_TYPE_READ];
b65bb777 1836 set->map[HCTX_TYPE_READ].queue_offset =
5651cd3c 1837 ctrl->io_queues[HCTX_TYPE_DEFAULT];
b65bb777 1838 } else {
5651cd3c
SG
1839 /* shared read/write queues */
1840 set->map[HCTX_TYPE_DEFAULT].nr_queues =
1841 ctrl->io_queues[HCTX_TYPE_DEFAULT];
1842 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
1843 set->map[HCTX_TYPE_READ].nr_queues =
1844 ctrl->io_queues[HCTX_TYPE_DEFAULT];
b65bb777
SG
1845 set->map[HCTX_TYPE_READ].queue_offset = 0;
1846 }
1847 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
1848 ctrl->device->dev, 0);
1849 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
1850 ctrl->device->dev, 0);
ff8519f9 1851
5651cd3c
SG
1852 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) {
1853 /* map dedicated poll queues only if we have queues left */
ff8519f9 1854 set->map[HCTX_TYPE_POLL].nr_queues =
b1064d3e 1855 ctrl->io_queues[HCTX_TYPE_POLL];
ff8519f9 1856 set->map[HCTX_TYPE_POLL].queue_offset =
5651cd3c
SG
1857 ctrl->io_queues[HCTX_TYPE_DEFAULT] +
1858 ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
1859 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
1860 }
5651cd3c
SG
1861
1862 dev_info(ctrl->ctrl.device,
1863 "mapped %d/%d/%d default/read/poll queues.\n",
1864 ctrl->io_queues[HCTX_TYPE_DEFAULT],
1865 ctrl->io_queues[HCTX_TYPE_READ],
1866 ctrl->io_queues[HCTX_TYPE_POLL]);
1867
b65bb777 1868 return 0;
0b36658c
SG
1869}
1870
f363b089 1871static const struct blk_mq_ops nvme_rdma_mq_ops = {
71102307
CH
1872 .queue_rq = nvme_rdma_queue_rq,
1873 .complete = nvme_rdma_complete_rq,
71102307
CH
1874 .init_request = nvme_rdma_init_request,
1875 .exit_request = nvme_rdma_exit_request,
71102307 1876 .init_hctx = nvme_rdma_init_hctx,
71102307 1877 .timeout = nvme_rdma_timeout,
0b36658c 1878 .map_queues = nvme_rdma_map_queues,
ff8519f9 1879 .poll = nvme_rdma_poll,
71102307
CH
1880};
1881
f363b089 1882static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
71102307
CH
1883 .queue_rq = nvme_rdma_queue_rq,
1884 .complete = nvme_rdma_complete_rq,
385475ee
CH
1885 .init_request = nvme_rdma_init_request,
1886 .exit_request = nvme_rdma_exit_request,
71102307
CH
1887 .init_hctx = nvme_rdma_init_admin_hctx,
1888 .timeout = nvme_rdma_timeout,
1889};
1890
18398af2 1891static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
71102307 1892{
794a4cb3
SG
1893 cancel_work_sync(&ctrl->err_work);
1894 cancel_delayed_work_sync(&ctrl->reconnect_work);
1895
75862c72 1896 nvme_rdma_teardown_io_queues(ctrl, shutdown);
e7832cb4 1897 blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
18398af2 1898 if (shutdown)
71102307 1899 nvme_shutdown_ctrl(&ctrl->ctrl);
18398af2 1900 else
b5b05048 1901 nvme_disable_ctrl(&ctrl->ctrl);
75862c72 1902 nvme_rdma_teardown_admin_queue(ctrl, shutdown);
71102307
CH
1903}
1904
c5017e85 1905static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2461a8dd 1906{
e9bc2587 1907 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
71102307
CH
1908}
1909
71102307
CH
1910static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
1911{
d86c4d8e
CH
1912 struct nvme_rdma_ctrl *ctrl =
1913 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
71102307 1914
d09f2b45 1915 nvme_stop_ctrl(&ctrl->ctrl);
18398af2 1916 nvme_rdma_shutdown_ctrl(ctrl, false);
71102307 1917
ad6a0a52 1918 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
d5bf4b7f
SG
1919 /* state change failure should never happen */
1920 WARN_ON_ONCE(1);
1921 return;
1922 }
1923
c66e2998 1924 if (nvme_rdma_setup_ctrl(ctrl, false))
370ae6e4 1925 goto out_fail;
71102307 1926
71102307
CH
1927 return;
1928
370ae6e4 1929out_fail:
8000d1fd
NC
1930 ++ctrl->ctrl.nr_reconnects;
1931 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1932}
1933
71102307
CH
1934static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
1935 .name = "rdma",
1936 .module = THIS_MODULE,
d3d5b87d 1937 .flags = NVME_F_FABRICS,
71102307
CH
1938 .reg_read32 = nvmf_reg_read32,
1939 .reg_read64 = nvmf_reg_read64,
1940 .reg_write32 = nvmf_reg_write32,
71102307
CH
1941 .free_ctrl = nvme_rdma_free_ctrl,
1942 .submit_async_event = nvme_rdma_submit_async_event,
c5017e85 1943 .delete_ctrl = nvme_rdma_delete_ctrl,
71102307
CH
1944 .get_address = nvmf_get_address,
1945};
1946
36e835f2
JS
1947/*
1948 * Fails a connection request if it matches an existing controller
1949 * (association) with the same tuple:
1950 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
1951 *
1952 * if local address is not specified in the request, it will match an
1953 * existing controller with all the other parameters the same and no
1954 * local port address specified as well.
1955 *
1956 * The ports don't need to be compared as they are intrinsically
1957 * already matched by the port pointers supplied.
1958 */
1959static bool
1960nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
1961{
1962 struct nvme_rdma_ctrl *ctrl;
1963 bool found = false;
1964
1965 mutex_lock(&nvme_rdma_ctrl_mutex);
1966 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
b7c7be6f 1967 found = nvmf_ip_options_match(&ctrl->ctrl, opts);
36e835f2
JS
1968 if (found)
1969 break;
1970 }
1971 mutex_unlock(&nvme_rdma_ctrl_mutex);
1972
1973 return found;
1974}
1975
71102307
CH
1976static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
1977 struct nvmf_ctrl_options *opts)
1978{
1979 struct nvme_rdma_ctrl *ctrl;
1980 int ret;
1981 bool changed;
1982
1983 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
1984 if (!ctrl)
1985 return ERR_PTR(-ENOMEM);
1986 ctrl->ctrl.opts = opts;
1987 INIT_LIST_HEAD(&ctrl->list);
1988
bb59b8e5
SG
1989 if (!(opts->mask & NVMF_OPT_TRSVCID)) {
1990 opts->trsvcid =
1991 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
1992 if (!opts->trsvcid) {
1993 ret = -ENOMEM;
1994 goto out_free_ctrl;
1995 }
1996 opts->mask |= NVMF_OPT_TRSVCID;
1997 }
0928f9b4
SG
1998
1999 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
bb59b8e5 2000 opts->traddr, opts->trsvcid, &ctrl->addr);
71102307 2001 if (ret) {
bb59b8e5
SG
2002 pr_err("malformed address passed: %s:%s\n",
2003 opts->traddr, opts->trsvcid);
71102307
CH
2004 goto out_free_ctrl;
2005 }
2006
8f4e8dac 2007 if (opts->mask & NVMF_OPT_HOST_TRADDR) {
0928f9b4
SG
2008 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2009 opts->host_traddr, NULL, &ctrl->src_addr);
8f4e8dac 2010 if (ret) {
0928f9b4 2011 pr_err("malformed src address passed: %s\n",
8f4e8dac
MG
2012 opts->host_traddr);
2013 goto out_free_ctrl;
2014 }
2015 }
2016
36e835f2
JS
2017 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
2018 ret = -EALREADY;
2019 goto out_free_ctrl;
2020 }
2021
71102307
CH
2022 INIT_DELAYED_WORK(&ctrl->reconnect_work,
2023 nvme_rdma_reconnect_ctrl_work);
2024 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
d86c4d8e 2025 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
71102307 2026
ff8519f9
SG
2027 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2028 opts->nr_poll_queues + 1;
c5af8654 2029 ctrl->ctrl.sqsize = opts->queue_size - 1;
71102307
CH
2030 ctrl->ctrl.kato = opts->kato;
2031
2032 ret = -ENOMEM;
d858e5f0 2033 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
71102307
CH
2034 GFP_KERNEL);
2035 if (!ctrl->queues)
3d064101
SG
2036 goto out_free_ctrl;
2037
2038 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2039 0 /* no quirks, we're perfect! */);
2040 if (ret)
2041 goto out_kfree_queues;
71102307 2042
b754a32c
MG
2043 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2044 WARN_ON_ONCE(!changed);
2045
c66e2998 2046 ret = nvme_rdma_setup_ctrl(ctrl, true);
71102307 2047 if (ret)
3d064101 2048 goto out_uninit_ctrl;
71102307 2049
0928f9b4 2050 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
71102307
CH
2051 ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
2052
71102307
CH
2053 mutex_lock(&nvme_rdma_ctrl_mutex);
2054 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2055 mutex_unlock(&nvme_rdma_ctrl_mutex);
2056
71102307
CH
2057 return &ctrl->ctrl;
2058
71102307
CH
2059out_uninit_ctrl:
2060 nvme_uninit_ctrl(&ctrl->ctrl);
2061 nvme_put_ctrl(&ctrl->ctrl);
2062 if (ret > 0)
2063 ret = -EIO;
2064 return ERR_PTR(ret);
3d064101
SG
2065out_kfree_queues:
2066 kfree(ctrl->queues);
71102307
CH
2067out_free_ctrl:
2068 kfree(ctrl);
2069 return ERR_PTR(ret);
2070}
2071
2072static struct nvmf_transport_ops nvme_rdma_transport = {
2073 .name = "rdma",
0de5cd36 2074 .module = THIS_MODULE,
71102307 2075 .required_opts = NVMF_OPT_TRADDR,
8f4e8dac 2076 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
b65bb777 2077 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
e63440d6
IR
2078 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2079 NVMF_OPT_TOS,
71102307
CH
2080 .create_ctrl = nvme_rdma_create_ctrl,
2081};
2082
e87a911f
SW
2083static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2084{
2085 struct nvme_rdma_ctrl *ctrl;
9bad0404
MG
2086 struct nvme_rdma_device *ndev;
2087 bool found = false;
2088
2089 mutex_lock(&device_list_mutex);
2090 list_for_each_entry(ndev, &device_list, entry) {
2091 if (ndev->dev == ib_device) {
2092 found = true;
2093 break;
2094 }
2095 }
2096 mutex_unlock(&device_list_mutex);
2097
2098 if (!found)
2099 return;
e87a911f
SW
2100
2101 /* Delete all controllers using this device */
2102 mutex_lock(&nvme_rdma_ctrl_mutex);
2103 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2104 if (ctrl->device->dev != ib_device)
2105 continue;
c5017e85 2106 nvme_delete_ctrl(&ctrl->ctrl);
e87a911f
SW
2107 }
2108 mutex_unlock(&nvme_rdma_ctrl_mutex);
2109
b227c59b 2110 flush_workqueue(nvme_delete_wq);
e87a911f
SW
2111}
2112
2113static struct ib_client nvme_rdma_ib_client = {
2114 .name = "nvme_rdma",
e87a911f
SW
2115 .remove = nvme_rdma_remove_one
2116};
2117
71102307
CH
2118static int __init nvme_rdma_init_module(void)
2119{
e87a911f
SW
2120 int ret;
2121
e87a911f 2122 ret = ib_register_client(&nvme_rdma_ib_client);
a56c79cf 2123 if (ret)
9a6327d2 2124 return ret;
a56c79cf
SG
2125
2126 ret = nvmf_register_transport(&nvme_rdma_transport);
2127 if (ret)
2128 goto err_unreg_client;
e87a911f 2129
a56c79cf 2130 return 0;
e87a911f 2131
a56c79cf
SG
2132err_unreg_client:
2133 ib_unregister_client(&nvme_rdma_ib_client);
a56c79cf 2134 return ret;
71102307
CH
2135}
2136
2137static void __exit nvme_rdma_cleanup_module(void)
2138{
9ad9e8d6
MG
2139 struct nvme_rdma_ctrl *ctrl;
2140
71102307 2141 nvmf_unregister_transport(&nvme_rdma_transport);
e87a911f 2142 ib_unregister_client(&nvme_rdma_ib_client);
9ad9e8d6
MG
2143
2144 mutex_lock(&nvme_rdma_ctrl_mutex);
2145 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list)
2146 nvme_delete_ctrl(&ctrl->ctrl);
2147 mutex_unlock(&nvme_rdma_ctrl_mutex);
2148 flush_workqueue(nvme_delete_wq);
71102307
CH
2149}
2150
2151module_init(nvme_rdma_init_module);
2152module_exit(nvme_rdma_cleanup_module);
2153
2154MODULE_LICENSE("GPL v2");