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f11bb3e2 CH |
1 | /* |
2 | * Copyright (c) 2011-2014, Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | */ | |
13 | ||
14 | #ifndef _NVME_H | |
15 | #define _NVME_H | |
16 | ||
17 | #include <linux/nvme.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/kref.h> | |
20 | #include <linux/blk-mq.h> | |
21 | ||
297465c8 CH |
22 | enum { |
23 | /* | |
24 | * Driver internal status code for commands that were cancelled due | |
25 | * to timeouts or controller shutdown. The value is negative so | |
26 | * that it a) doesn't overlap with the unsigned hardware error codes, | |
27 | * and b) can easily be tested for. | |
28 | */ | |
29 | NVME_SC_CANCELLED = -EINTR, | |
30 | }; | |
31 | ||
f11bb3e2 CH |
32 | extern unsigned char nvme_io_timeout; |
33 | #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) | |
34 | ||
21d34711 CH |
35 | extern unsigned char admin_timeout; |
36 | #define ADMIN_TIMEOUT (admin_timeout * HZ) | |
37 | ||
5fd4ce1b CH |
38 | extern unsigned char shutdown_timeout; |
39 | #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) | |
40 | ||
ca064085 MB |
41 | enum { |
42 | NVME_NS_LBA = 0, | |
43 | NVME_NS_LIGHTNVM = 1, | |
44 | }; | |
45 | ||
106198ed CH |
46 | /* |
47 | * List of workarounds for devices that required behavior not specified in | |
48 | * the standard. | |
49 | */ | |
50 | enum nvme_quirks { | |
51 | /* | |
52 | * Prefers I/O aligned to a stripe size specified in a vendor | |
53 | * specific Identify field. | |
54 | */ | |
55 | NVME_QUIRK_STRIPE_SIZE = (1 << 0), | |
540c801c KB |
56 | |
57 | /* | |
58 | * The controller doesn't handle Identify value others than 0 or 1 | |
59 | * correctly. | |
60 | */ | |
61 | NVME_QUIRK_IDENTIFY_CNS = (1 << 1), | |
106198ed CH |
62 | }; |
63 | ||
1c63dc66 CH |
64 | struct nvme_ctrl { |
65 | const struct nvme_ctrl_ops *ops; | |
f11bb3e2 | 66 | struct request_queue *admin_q; |
f11bb3e2 | 67 | struct device *dev; |
1673f1f0 | 68 | struct kref kref; |
f11bb3e2 | 69 | int instance; |
5bae7f73 CH |
70 | struct blk_mq_tag_set *tagset; |
71 | struct list_head namespaces; | |
72 | struct device *device; /* char device */ | |
f3ca80fc | 73 | struct list_head node; |
1c63dc66 | 74 | |
f11bb3e2 CH |
75 | char name[12]; |
76 | char serial[20]; | |
77 | char model[40]; | |
78 | char firmware_rev[8]; | |
5fd4ce1b CH |
79 | |
80 | u32 ctrl_config; | |
81 | ||
82 | u32 page_size; | |
7fd8930f CH |
83 | u32 max_hw_sectors; |
84 | u32 stripe_size; | |
f11bb3e2 | 85 | u16 oncs; |
6bf25d16 | 86 | atomic_t abort_limit; |
f11bb3e2 CH |
87 | u8 event_limit; |
88 | u8 vwc; | |
f3ca80fc CH |
89 | u32 vs; |
90 | bool subsystem; | |
106198ed | 91 | unsigned long quirks; |
f11bb3e2 CH |
92 | }; |
93 | ||
94 | /* | |
95 | * An NVM Express namespace is equivalent to a SCSI LUN | |
96 | */ | |
97 | struct nvme_ns { | |
98 | struct list_head list; | |
99 | ||
1c63dc66 | 100 | struct nvme_ctrl *ctrl; |
f11bb3e2 CH |
101 | struct request_queue *queue; |
102 | struct gendisk *disk; | |
103 | struct kref kref; | |
104 | ||
105 | unsigned ns_id; | |
106 | int lba_shift; | |
107 | u16 ms; | |
108 | bool ext; | |
109 | u8 pi_type; | |
ca064085 | 110 | int type; |
f11bb3e2 CH |
111 | u64 mode_select_num_blocks; |
112 | u32 mode_select_block_len; | |
113 | }; | |
114 | ||
1c63dc66 CH |
115 | struct nvme_ctrl_ops { |
116 | int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); | |
5fd4ce1b | 117 | int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); |
7fd8930f | 118 | int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); |
5bae7f73 | 119 | bool (*io_incapable)(struct nvme_ctrl *ctrl); |
f3ca80fc | 120 | int (*reset_ctrl)(struct nvme_ctrl *ctrl); |
1673f1f0 | 121 | void (*free_ctrl)(struct nvme_ctrl *ctrl); |
1c63dc66 CH |
122 | }; |
123 | ||
124 | static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) | |
125 | { | |
126 | u32 val = 0; | |
127 | ||
128 | if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) | |
129 | return false; | |
130 | return val & NVME_CSTS_RDY; | |
131 | } | |
132 | ||
5bae7f73 CH |
133 | static inline bool nvme_io_incapable(struct nvme_ctrl *ctrl) |
134 | { | |
135 | u32 val = 0; | |
136 | ||
137 | if (ctrl->ops->io_incapable(ctrl)) | |
138 | return false; | |
139 | if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) | |
140 | return false; | |
141 | return val & NVME_CSTS_CFS; | |
142 | } | |
143 | ||
f3ca80fc CH |
144 | static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) |
145 | { | |
146 | if (!ctrl->subsystem) | |
147 | return -ENOTTY; | |
148 | return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); | |
149 | } | |
150 | ||
f11bb3e2 CH |
151 | static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) |
152 | { | |
153 | return (sector >> (ns->lba_shift - 9)); | |
154 | } | |
155 | ||
22944e99 CH |
156 | static inline void nvme_setup_flush(struct nvme_ns *ns, |
157 | struct nvme_command *cmnd) | |
158 | { | |
159 | memset(cmnd, 0, sizeof(*cmnd)); | |
160 | cmnd->common.opcode = nvme_cmd_flush; | |
161 | cmnd->common.nsid = cpu_to_le32(ns->ns_id); | |
162 | } | |
163 | ||
164 | static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req, | |
165 | struct nvme_command *cmnd) | |
166 | { | |
167 | u16 control = 0; | |
168 | u32 dsmgmt = 0; | |
169 | ||
170 | if (req->cmd_flags & REQ_FUA) | |
171 | control |= NVME_RW_FUA; | |
172 | if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) | |
173 | control |= NVME_RW_LR; | |
174 | ||
175 | if (req->cmd_flags & REQ_RAHEAD) | |
176 | dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; | |
177 | ||
178 | memset(cmnd, 0, sizeof(*cmnd)); | |
179 | cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read); | |
180 | cmnd->rw.command_id = req->tag; | |
181 | cmnd->rw.nsid = cpu_to_le32(ns->ns_id); | |
182 | cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); | |
183 | cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); | |
184 | ||
185 | if (ns->ms) { | |
186 | switch (ns->pi_type) { | |
187 | case NVME_NS_DPS_PI_TYPE3: | |
188 | control |= NVME_RW_PRINFO_PRCHK_GUARD; | |
189 | break; | |
190 | case NVME_NS_DPS_PI_TYPE1: | |
191 | case NVME_NS_DPS_PI_TYPE2: | |
192 | control |= NVME_RW_PRINFO_PRCHK_GUARD | | |
193 | NVME_RW_PRINFO_PRCHK_REF; | |
194 | cmnd->rw.reftag = cpu_to_le32( | |
195 | nvme_block_nr(ns, blk_rq_pos(req))); | |
196 | break; | |
197 | } | |
198 | if (!blk_integrity_rq(req)) | |
199 | control |= NVME_RW_PRINFO_PRACT; | |
200 | } | |
201 | ||
202 | cmnd->rw.control = cpu_to_le16(control); | |
203 | cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); | |
204 | } | |
205 | ||
206 | ||
15a190f7 CH |
207 | static inline int nvme_error_status(u16 status) |
208 | { | |
209 | switch (status & 0x7ff) { | |
210 | case NVME_SC_SUCCESS: | |
211 | return 0; | |
212 | case NVME_SC_CAP_EXCEEDED: | |
213 | return -ENOSPC; | |
214 | default: | |
215 | return -EIO; | |
216 | } | |
217 | } | |
218 | ||
5fd4ce1b CH |
219 | int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); |
220 | int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); | |
221 | int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); | |
f3ca80fc CH |
222 | int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, |
223 | const struct nvme_ctrl_ops *ops, unsigned long quirks); | |
53029b04 | 224 | void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); |
1673f1f0 | 225 | void nvme_put_ctrl(struct nvme_ctrl *ctrl); |
7fd8930f | 226 | int nvme_init_identify(struct nvme_ctrl *ctrl); |
5bae7f73 CH |
227 | |
228 | void nvme_scan_namespaces(struct nvme_ctrl *ctrl); | |
229 | void nvme_remove_namespaces(struct nvme_ctrl *ctrl); | |
1673f1f0 | 230 | |
4160982e CH |
231 | struct request *nvme_alloc_request(struct request_queue *q, |
232 | struct nvme_command *cmd, unsigned int flags); | |
f11bb3e2 CH |
233 | int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, |
234 | void *buf, unsigned bufflen); | |
235 | int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, | |
4160982e CH |
236 | void *buffer, unsigned bufflen, u32 *result, unsigned timeout); |
237 | int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, | |
238 | void __user *ubuffer, unsigned bufflen, u32 *result, | |
239 | unsigned timeout); | |
0b7f1f26 KB |
240 | int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
241 | void __user *ubuffer, unsigned bufflen, | |
242 | void __user *meta_buffer, unsigned meta_len, u32 meta_seed, | |
243 | u32 *result, unsigned timeout); | |
1c63dc66 CH |
244 | int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id); |
245 | int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, | |
f11bb3e2 | 246 | struct nvme_id_ns **id); |
1c63dc66 CH |
247 | int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log); |
248 | int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, | |
f11bb3e2 | 249 | dma_addr_t dma_addr, u32 *result); |
1c63dc66 | 250 | int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, |
f11bb3e2 | 251 | dma_addr_t dma_addr, u32 *result); |
9a0be7ab | 252 | int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); |
f11bb3e2 | 253 | |
1673f1f0 CH |
254 | extern spinlock_t dev_list_lock; |
255 | ||
f11bb3e2 CH |
256 | struct sg_io_hdr; |
257 | ||
258 | int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); | |
259 | int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); | |
260 | int nvme_sg_get_version_num(int __user *ip); | |
261 | ||
ca064085 MB |
262 | int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); |
263 | int nvme_nvm_register(struct request_queue *q, char *disk_name); | |
264 | void nvme_nvm_unregister(struct request_queue *q, char *disk_name); | |
265 | ||
5bae7f73 CH |
266 | int __init nvme_core_init(void); |
267 | void nvme_core_exit(void); | |
268 | ||
f11bb3e2 | 269 | #endif /* _NVME_H */ |