nbd: use correct div_s64 helper
[linux-2.6-block.git] / drivers / nvme / host / core.c
CommitLineData
21d34711
CH
1/*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/blkdev.h>
16#include <linux/blk-mq.h>
5fd4ce1b 17#include <linux/delay.h>
21d34711 18#include <linux/errno.h>
1673f1f0 19#include <linux/hdreg.h>
21d34711 20#include <linux/kernel.h>
5bae7f73
CH
21#include <linux/module.h>
22#include <linux/list_sort.h>
21d34711
CH
23#include <linux/slab.h>
24#include <linux/types.h>
1673f1f0
CH
25#include <linux/pr.h>
26#include <linux/ptrace.h>
27#include <linux/nvme_ioctl.h>
28#include <linux/t10-pi.h>
29#include <scsi/sg.h>
30#include <asm/unaligned.h>
21d34711
CH
31
32#include "nvme.h"
33
f3ca80fc
CH
34#define NVME_MINORS (1U << MINORBITS)
35
ba0ba7d3
ML
36unsigned char admin_timeout = 60;
37module_param(admin_timeout, byte, 0644);
38MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
576d55d6 39EXPORT_SYMBOL_GPL(admin_timeout);
ba0ba7d3
ML
40
41unsigned char nvme_io_timeout = 30;
42module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
43MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
576d55d6 44EXPORT_SYMBOL_GPL(nvme_io_timeout);
ba0ba7d3
ML
45
46unsigned char shutdown_timeout = 5;
47module_param(shutdown_timeout, byte, 0644);
48MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
49
5bae7f73
CH
50static int nvme_major;
51module_param(nvme_major, int, 0);
52
f3ca80fc
CH
53static int nvme_char_major;
54module_param(nvme_char_major, int, 0);
55
56static LIST_HEAD(nvme_ctrl_list);
9f2482b9 57static DEFINE_SPINLOCK(dev_list_lock);
1673f1f0 58
f3ca80fc
CH
59static struct class *nvme_class;
60
1673f1f0
CH
61static void nvme_free_ns(struct kref *kref)
62{
63 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
64
65 if (ns->type == NVME_NS_LIGHTNVM)
66 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
67
68 spin_lock(&dev_list_lock);
69 ns->disk->private_data = NULL;
70 spin_unlock(&dev_list_lock);
71
72 nvme_put_ctrl(ns->ctrl);
73 put_disk(ns->disk);
74 kfree(ns);
75}
76
5bae7f73 77static void nvme_put_ns(struct nvme_ns *ns)
1673f1f0
CH
78{
79 kref_put(&ns->kref, nvme_free_ns);
80}
81
82static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
83{
84 struct nvme_ns *ns;
85
86 spin_lock(&dev_list_lock);
87 ns = disk->private_data;
e439bb12
SG
88 if (ns) {
89 if (!kref_get_unless_zero(&ns->kref))
90 goto fail;
91 if (!try_module_get(ns->ctrl->ops->module))
92 goto fail_put_ns;
93 }
1673f1f0
CH
94 spin_unlock(&dev_list_lock);
95
96 return ns;
e439bb12
SG
97
98fail_put_ns:
99 kref_put(&ns->kref, nvme_free_ns);
100fail:
101 spin_unlock(&dev_list_lock);
102 return NULL;
1673f1f0
CH
103}
104
7688faa6
CH
105void nvme_requeue_req(struct request *req)
106{
107 unsigned long flags;
108
109 blk_mq_requeue_request(req);
110 spin_lock_irqsave(req->q->queue_lock, flags);
111 if (!blk_queue_stopped(req->q))
112 blk_mq_kick_requeue_list(req->q);
113 spin_unlock_irqrestore(req->q->queue_lock, flags);
114}
576d55d6 115EXPORT_SYMBOL_GPL(nvme_requeue_req);
7688faa6 116
4160982e
CH
117struct request *nvme_alloc_request(struct request_queue *q,
118 struct nvme_command *cmd, unsigned int flags)
21d34711
CH
119{
120 bool write = cmd->common.opcode & 1;
21d34711 121 struct request *req;
21d34711 122
4160982e 123 req = blk_mq_alloc_request(q, write, flags);
21d34711 124 if (IS_ERR(req))
4160982e 125 return req;
21d34711
CH
126
127 req->cmd_type = REQ_TYPE_DRV_PRIV;
128 req->cmd_flags |= REQ_FAILFAST_DRIVER;
129 req->__data_len = 0;
130 req->__sector = (sector_t) -1;
131 req->bio = req->biotail = NULL;
132
21d34711
CH
133 req->cmd = (unsigned char *)cmd;
134 req->cmd_len = sizeof(struct nvme_command);
21d34711 135
4160982e
CH
136 return req;
137}
576d55d6 138EXPORT_SYMBOL_GPL(nvme_alloc_request);
4160982e
CH
139
140/*
141 * Returns 0 on success. If the result is negative, it's a Linux error code;
142 * if the result is positive, it's an NVM Express status code
143 */
144int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1cb3cce5
CH
145 struct nvme_completion *cqe, void *buffer, unsigned bufflen,
146 unsigned timeout)
4160982e
CH
147{
148 struct request *req;
149 int ret;
150
151 req = nvme_alloc_request(q, cmd, 0);
152 if (IS_ERR(req))
153 return PTR_ERR(req);
154
155 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 156 req->special = cqe;
4160982e 157
21d34711
CH
158 if (buffer && bufflen) {
159 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
160 if (ret)
161 goto out;
4160982e
CH
162 }
163
164 blk_execute_rq(req->q, NULL, req, 0);
4160982e
CH
165 ret = req->errors;
166 out:
167 blk_mq_free_request(req);
168 return ret;
169}
170
171int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
172 void *buffer, unsigned bufflen)
173{
1cb3cce5 174 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0);
4160982e 175}
576d55d6 176EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
4160982e 177
0b7f1f26
KB
178int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
179 void __user *ubuffer, unsigned bufflen,
180 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
181 u32 *result, unsigned timeout)
4160982e 182{
0b7f1f26 183 bool write = cmd->common.opcode & 1;
1cb3cce5 184 struct nvme_completion cqe;
0b7f1f26
KB
185 struct nvme_ns *ns = q->queuedata;
186 struct gendisk *disk = ns ? ns->disk : NULL;
4160982e 187 struct request *req;
0b7f1f26
KB
188 struct bio *bio = NULL;
189 void *meta = NULL;
4160982e
CH
190 int ret;
191
192 req = nvme_alloc_request(q, cmd, 0);
193 if (IS_ERR(req))
194 return PTR_ERR(req);
195
196 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 197 req->special = &cqe;
4160982e
CH
198
199 if (ubuffer && bufflen) {
21d34711
CH
200 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
201 GFP_KERNEL);
202 if (ret)
203 goto out;
204 bio = req->bio;
21d34711 205
0b7f1f26
KB
206 if (!disk)
207 goto submit;
208 bio->bi_bdev = bdget_disk(disk, 0);
209 if (!bio->bi_bdev) {
210 ret = -ENODEV;
211 goto out_unmap;
212 }
213
214 if (meta_buffer) {
215 struct bio_integrity_payload *bip;
216
217 meta = kmalloc(meta_len, GFP_KERNEL);
218 if (!meta) {
219 ret = -ENOMEM;
220 goto out_unmap;
221 }
222
223 if (write) {
224 if (copy_from_user(meta, meta_buffer,
225 meta_len)) {
226 ret = -EFAULT;
227 goto out_free_meta;
228 }
229 }
230
231 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
06c1e390
KB
232 if (IS_ERR(bip)) {
233 ret = PTR_ERR(bip);
0b7f1f26
KB
234 goto out_free_meta;
235 }
236
237 bip->bip_iter.bi_size = meta_len;
238 bip->bip_iter.bi_sector = meta_seed;
239
240 ret = bio_integrity_add_page(bio, virt_to_page(meta),
241 meta_len, offset_in_page(meta));
242 if (ret != meta_len) {
243 ret = -ENOMEM;
244 goto out_free_meta;
245 }
246 }
247 }
248 submit:
249 blk_execute_rq(req->q, disk, req, 0);
250 ret = req->errors;
21d34711 251 if (result)
1cb3cce5 252 *result = le32_to_cpu(cqe.result);
0b7f1f26
KB
253 if (meta && !ret && !write) {
254 if (copy_to_user(meta_buffer, meta, meta_len))
255 ret = -EFAULT;
256 }
257 out_free_meta:
258 kfree(meta);
259 out_unmap:
260 if (bio) {
261 if (disk && bio->bi_bdev)
262 bdput(bio->bi_bdev);
263 blk_rq_unmap_user(bio);
264 }
21d34711
CH
265 out:
266 blk_mq_free_request(req);
267 return ret;
268}
269
0b7f1f26
KB
270int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
271 void __user *ubuffer, unsigned bufflen, u32 *result,
272 unsigned timeout)
273{
274 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
275 result, timeout);
276}
277
1c63dc66 278int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
21d34711
CH
279{
280 struct nvme_command c = { };
281 int error;
282
283 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
284 c.identify.opcode = nvme_admin_identify;
285 c.identify.cns = cpu_to_le32(1);
286
287 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
288 if (!*id)
289 return -ENOMEM;
290
291 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
292 sizeof(struct nvme_id_ctrl));
293 if (error)
294 kfree(*id);
295 return error;
296}
297
540c801c
KB
298static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
299{
300 struct nvme_command c = { };
301
302 c.identify.opcode = nvme_admin_identify;
303 c.identify.cns = cpu_to_le32(2);
304 c.identify.nsid = cpu_to_le32(nsid);
305 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
306}
307
1c63dc66 308int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
21d34711
CH
309 struct nvme_id_ns **id)
310{
311 struct nvme_command c = { };
312 int error;
313
314 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
315 c.identify.opcode = nvme_admin_identify,
316 c.identify.nsid = cpu_to_le32(nsid),
317
318 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
319 if (!*id)
320 return -ENOMEM;
321
322 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
323 sizeof(struct nvme_id_ns));
324 if (error)
325 kfree(*id);
326 return error;
327}
328
1c63dc66 329int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
21d34711
CH
330 dma_addr_t dma_addr, u32 *result)
331{
332 struct nvme_command c;
1cb3cce5
CH
333 struct nvme_completion cqe;
334 int ret;
21d34711
CH
335
336 memset(&c, 0, sizeof(c));
337 c.features.opcode = nvme_admin_get_features;
338 c.features.nsid = cpu_to_le32(nsid);
339 c.features.prp1 = cpu_to_le64(dma_addr);
340 c.features.fid = cpu_to_le32(fid);
341
1cb3cce5
CH
342 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0);
343 if (ret >= 0)
344 *result = le32_to_cpu(cqe.result);
345 return ret;
21d34711
CH
346}
347
1c63dc66 348int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
21d34711
CH
349 dma_addr_t dma_addr, u32 *result)
350{
351 struct nvme_command c;
1cb3cce5
CH
352 struct nvme_completion cqe;
353 int ret;
21d34711
CH
354
355 memset(&c, 0, sizeof(c));
356 c.features.opcode = nvme_admin_set_features;
357 c.features.prp1 = cpu_to_le64(dma_addr);
358 c.features.fid = cpu_to_le32(fid);
359 c.features.dword11 = cpu_to_le32(dword11);
360
1cb3cce5
CH
361 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0);
362 if (ret >= 0)
363 *result = le32_to_cpu(cqe.result);
364 return ret;
21d34711
CH
365}
366
1c63dc66 367int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
21d34711
CH
368{
369 struct nvme_command c = { };
370 int error;
371
372 c.common.opcode = nvme_admin_get_log_page,
373 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
374 c.common.cdw10[0] = cpu_to_le32(
375 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
376 NVME_LOG_SMART),
377
378 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
379 if (!*log)
380 return -ENOMEM;
381
382 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
383 sizeof(struct nvme_smart_log));
384 if (error)
385 kfree(*log);
386 return error;
387}
1673f1f0 388
9a0be7ab
CH
389int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
390{
391 u32 q_count = (*count - 1) | ((*count - 1) << 16);
392 u32 result;
393 int status, nr_io_queues;
394
395 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, 0,
396 &result);
397 if (status)
398 return status;
399
400 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
401 *count = min(*count, nr_io_queues);
402 return 0;
403}
576d55d6 404EXPORT_SYMBOL_GPL(nvme_set_queue_count);
9a0be7ab 405
1673f1f0
CH
406static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
407{
408 struct nvme_user_io io;
409 struct nvme_command c;
410 unsigned length, meta_len;
411 void __user *metadata;
412
413 if (copy_from_user(&io, uio, sizeof(io)))
414 return -EFAULT;
415
416 switch (io.opcode) {
417 case nvme_cmd_write:
418 case nvme_cmd_read:
419 case nvme_cmd_compare:
420 break;
421 default:
422 return -EINVAL;
423 }
424
425 length = (io.nblocks + 1) << ns->lba_shift;
426 meta_len = (io.nblocks + 1) * ns->ms;
427 metadata = (void __user *)(uintptr_t)io.metadata;
428
429 if (ns->ext) {
430 length += meta_len;
431 meta_len = 0;
432 } else if (meta_len) {
433 if ((io.metadata & 3) || !io.metadata)
434 return -EINVAL;
435 }
436
437 memset(&c, 0, sizeof(c));
438 c.rw.opcode = io.opcode;
439 c.rw.flags = io.flags;
440 c.rw.nsid = cpu_to_le32(ns->ns_id);
441 c.rw.slba = cpu_to_le64(io.slba);
442 c.rw.length = cpu_to_le16(io.nblocks);
443 c.rw.control = cpu_to_le16(io.control);
444 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
445 c.rw.reftag = cpu_to_le32(io.reftag);
446 c.rw.apptag = cpu_to_le16(io.apptag);
447 c.rw.appmask = cpu_to_le16(io.appmask);
448
449 return __nvme_submit_user_cmd(ns->queue, &c,
450 (void __user *)(uintptr_t)io.addr, length,
451 metadata, meta_len, io.slba, NULL, 0);
452}
453
f3ca80fc 454static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1673f1f0
CH
455 struct nvme_passthru_cmd __user *ucmd)
456{
457 struct nvme_passthru_cmd cmd;
458 struct nvme_command c;
459 unsigned timeout = 0;
460 int status;
461
462 if (!capable(CAP_SYS_ADMIN))
463 return -EACCES;
464 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
465 return -EFAULT;
466
467 memset(&c, 0, sizeof(c));
468 c.common.opcode = cmd.opcode;
469 c.common.flags = cmd.flags;
470 c.common.nsid = cpu_to_le32(cmd.nsid);
471 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
472 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
473 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
474 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
475 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
476 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
477 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
478 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
479
480 if (cmd.timeout_ms)
481 timeout = msecs_to_jiffies(cmd.timeout_ms);
482
483 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
d1ea7be5 484 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1673f1f0
CH
485 &cmd.result, timeout);
486 if (status >= 0) {
487 if (put_user(cmd.result, &ucmd->result))
488 return -EFAULT;
489 }
490
491 return status;
492}
493
494static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
495 unsigned int cmd, unsigned long arg)
496{
497 struct nvme_ns *ns = bdev->bd_disk->private_data;
498
499 switch (cmd) {
500 case NVME_IOCTL_ID:
501 force_successful_syscall_return();
502 return ns->ns_id;
503 case NVME_IOCTL_ADMIN_CMD:
504 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
505 case NVME_IOCTL_IO_CMD:
506 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
507 case NVME_IOCTL_SUBMIT_IO:
508 return nvme_submit_io(ns, (void __user *)arg);
44907332 509#ifdef CONFIG_BLK_DEV_NVME_SCSI
1673f1f0
CH
510 case SG_GET_VERSION_NUM:
511 return nvme_sg_get_version_num((void __user *)arg);
512 case SG_IO:
513 return nvme_sg_io(ns, (void __user *)arg);
44907332 514#endif
1673f1f0
CH
515 default:
516 return -ENOTTY;
517 }
518}
519
520#ifdef CONFIG_COMPAT
521static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
522 unsigned int cmd, unsigned long arg)
523{
524 switch (cmd) {
525 case SG_IO:
526 return -ENOIOCTLCMD;
527 }
528 return nvme_ioctl(bdev, mode, cmd, arg);
529}
530#else
531#define nvme_compat_ioctl NULL
532#endif
533
534static int nvme_open(struct block_device *bdev, fmode_t mode)
535{
536 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
537}
538
539static void nvme_release(struct gendisk *disk, fmode_t mode)
540{
e439bb12
SG
541 struct nvme_ns *ns = disk->private_data;
542
543 module_put(ns->ctrl->ops->module);
544 nvme_put_ns(ns);
1673f1f0
CH
545}
546
547static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
548{
549 /* some standard values */
550 geo->heads = 1 << 6;
551 geo->sectors = 1 << 5;
552 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
553 return 0;
554}
555
556#ifdef CONFIG_BLK_DEV_INTEGRITY
557static void nvme_init_integrity(struct nvme_ns *ns)
558{
559 struct blk_integrity integrity;
560
561 switch (ns->pi_type) {
562 case NVME_NS_DPS_PI_TYPE3:
563 integrity.profile = &t10_pi_type3_crc;
564 break;
565 case NVME_NS_DPS_PI_TYPE1:
566 case NVME_NS_DPS_PI_TYPE2:
567 integrity.profile = &t10_pi_type1_crc;
568 break;
569 default:
570 integrity.profile = NULL;
571 break;
572 }
573 integrity.tuple_size = ns->ms;
574 blk_integrity_register(ns->disk, &integrity);
575 blk_queue_max_integrity_segments(ns->queue, 1);
576}
577#else
578static void nvme_init_integrity(struct nvme_ns *ns)
579{
580}
581#endif /* CONFIG_BLK_DEV_INTEGRITY */
582
583static void nvme_config_discard(struct nvme_ns *ns)
584{
585 u32 logical_block_size = queue_logical_block_size(ns->queue);
586 ns->queue->limits.discard_zeroes_data = 0;
587 ns->queue->limits.discard_alignment = logical_block_size;
588 ns->queue->limits.discard_granularity = logical_block_size;
589 blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
590 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
591}
592
5bae7f73 593static int nvme_revalidate_disk(struct gendisk *disk)
1673f1f0
CH
594{
595 struct nvme_ns *ns = disk->private_data;
596 struct nvme_id_ns *id;
597 u8 lbaf, pi_type;
598 u16 old_ms;
599 unsigned short bs;
600
601 if (nvme_identify_ns(ns->ctrl, ns->ns_id, &id)) {
1b3c47c1
SG
602 dev_warn(disk_to_dev(ns->disk), "%s: Identify failure\n",
603 __func__);
1673f1f0
CH
604 return -ENODEV;
605 }
606 if (id->ncap == 0) {
607 kfree(id);
608 return -ENODEV;
609 }
610
611 if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
612 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
1b3c47c1 613 dev_warn(disk_to_dev(ns->disk),
1673f1f0
CH
614 "%s: LightNVM init failure\n", __func__);
615 kfree(id);
616 return -ENODEV;
617 }
618 ns->type = NVME_NS_LIGHTNVM;
619 }
620
2b9b6e86
KB
621 if (ns->ctrl->vs >= NVME_VS(1, 1))
622 memcpy(ns->eui, id->eui64, sizeof(ns->eui));
623 if (ns->ctrl->vs >= NVME_VS(1, 2))
624 memcpy(ns->uuid, id->nguid, sizeof(ns->uuid));
625
1673f1f0
CH
626 old_ms = ns->ms;
627 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
628 ns->lba_shift = id->lbaf[lbaf].ds;
629 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
630 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
631
632 /*
633 * If identify namespace failed, use default 512 byte block size so
634 * block layer can use before failing read/write for 0 capacity.
635 */
636 if (ns->lba_shift == 0)
637 ns->lba_shift = 9;
638 bs = 1 << ns->lba_shift;
1673f1f0
CH
639 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
640 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
641 id->dps & NVME_NS_DPS_PI_MASK : 0;
642
643 blk_mq_freeze_queue(disk->queue);
644 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
645 ns->ms != old_ms ||
646 bs != queue_logical_block_size(disk->queue) ||
647 (ns->ms && ns->ext)))
648 blk_integrity_unregister(disk);
649
650 ns->pi_type = pi_type;
651 blk_queue_logical_block_size(ns->queue, bs);
652
4b9d5b15 653 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
1673f1f0 654 nvme_init_integrity(ns);
1673f1f0
CH
655 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
656 set_capacity(disk, 0);
657 else
658 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
659
660 if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
661 nvme_config_discard(ns);
662 blk_mq_unfreeze_queue(disk->queue);
663
664 kfree(id);
665 return 0;
666}
667
668static char nvme_pr_type(enum pr_type type)
669{
670 switch (type) {
671 case PR_WRITE_EXCLUSIVE:
672 return 1;
673 case PR_EXCLUSIVE_ACCESS:
674 return 2;
675 case PR_WRITE_EXCLUSIVE_REG_ONLY:
676 return 3;
677 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
678 return 4;
679 case PR_WRITE_EXCLUSIVE_ALL_REGS:
680 return 5;
681 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
682 return 6;
683 default:
684 return 0;
685 }
686};
687
688static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
689 u64 key, u64 sa_key, u8 op)
690{
691 struct nvme_ns *ns = bdev->bd_disk->private_data;
692 struct nvme_command c;
693 u8 data[16] = { 0, };
694
695 put_unaligned_le64(key, &data[0]);
696 put_unaligned_le64(sa_key, &data[8]);
697
698 memset(&c, 0, sizeof(c));
699 c.common.opcode = op;
700 c.common.nsid = cpu_to_le32(ns->ns_id);
701 c.common.cdw10[0] = cpu_to_le32(cdw10);
702
703 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
704}
705
706static int nvme_pr_register(struct block_device *bdev, u64 old,
707 u64 new, unsigned flags)
708{
709 u32 cdw10;
710
711 if (flags & ~PR_FL_IGNORE_KEY)
712 return -EOPNOTSUPP;
713
714 cdw10 = old ? 2 : 0;
715 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
716 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
717 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
718}
719
720static int nvme_pr_reserve(struct block_device *bdev, u64 key,
721 enum pr_type type, unsigned flags)
722{
723 u32 cdw10;
724
725 if (flags & ~PR_FL_IGNORE_KEY)
726 return -EOPNOTSUPP;
727
728 cdw10 = nvme_pr_type(type) << 8;
729 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
730 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
731}
732
733static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
734 enum pr_type type, bool abort)
735{
736 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
737 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
738}
739
740static int nvme_pr_clear(struct block_device *bdev, u64 key)
741{
8c0b3915 742 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
1673f1f0
CH
743 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
744}
745
746static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
747{
748 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
749 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
750}
751
752static const struct pr_ops nvme_pr_ops = {
753 .pr_register = nvme_pr_register,
754 .pr_reserve = nvme_pr_reserve,
755 .pr_release = nvme_pr_release,
756 .pr_preempt = nvme_pr_preempt,
757 .pr_clear = nvme_pr_clear,
758};
759
5bae7f73 760static const struct block_device_operations nvme_fops = {
1673f1f0
CH
761 .owner = THIS_MODULE,
762 .ioctl = nvme_ioctl,
763 .compat_ioctl = nvme_compat_ioctl,
764 .open = nvme_open,
765 .release = nvme_release,
766 .getgeo = nvme_getgeo,
767 .revalidate_disk= nvme_revalidate_disk,
768 .pr_ops = &nvme_pr_ops,
769};
770
5fd4ce1b
CH
771static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
772{
773 unsigned long timeout =
774 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
775 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
776 int ret;
777
778 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
779 if ((csts & NVME_CSTS_RDY) == bit)
780 break;
781
782 msleep(100);
783 if (fatal_signal_pending(current))
784 return -EINTR;
785 if (time_after(jiffies, timeout)) {
1b3c47c1 786 dev_err(ctrl->device,
5fd4ce1b
CH
787 "Device not ready; aborting %s\n", enabled ?
788 "initialisation" : "reset");
789 return -ENODEV;
790 }
791 }
792
793 return ret;
794}
795
796/*
797 * If the device has been passed off to us in an enabled state, just clear
798 * the enabled bit. The spec says we should set the 'shutdown notification
799 * bits', but doing so may cause the device to complete commands to the
800 * admin queue ... and we don't know what memory that might be pointing at!
801 */
802int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
803{
804 int ret;
805
806 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
807 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
808
809 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
810 if (ret)
811 return ret;
812 return nvme_wait_ready(ctrl, cap, false);
813}
576d55d6 814EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
5fd4ce1b
CH
815
816int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
817{
818 /*
819 * Default to a 4K page size, with the intention to update this
820 * path in the future to accomodate architectures with differing
821 * kernel and IO page sizes.
822 */
823 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
824 int ret;
825
826 if (page_shift < dev_page_min) {
1b3c47c1 827 dev_err(ctrl->device,
5fd4ce1b
CH
828 "Minimum device page size %u too large for host (%u)\n",
829 1 << dev_page_min, 1 << page_shift);
830 return -ENODEV;
831 }
832
833 ctrl->page_size = 1 << page_shift;
834
835 ctrl->ctrl_config = NVME_CC_CSS_NVM;
836 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
837 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
838 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
839 ctrl->ctrl_config |= NVME_CC_ENABLE;
840
841 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
842 if (ret)
843 return ret;
844 return nvme_wait_ready(ctrl, cap, true);
845}
576d55d6 846EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
5fd4ce1b
CH
847
848int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
849{
850 unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
851 u32 csts;
852 int ret;
853
854 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
855 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
856
857 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
858 if (ret)
859 return ret;
860
861 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
862 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
863 break;
864
865 msleep(100);
866 if (fatal_signal_pending(current))
867 return -EINTR;
868 if (time_after(jiffies, timeout)) {
1b3c47c1 869 dev_err(ctrl->device,
5fd4ce1b
CH
870 "Device shutdown incomplete; abort shutdown\n");
871 return -ENODEV;
872 }
873 }
874
875 return ret;
876}
576d55d6 877EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
5fd4ce1b 878
7fd8930f
CH
879/*
880 * Initialize the cached copies of the Identify data and various controller
881 * register in our nvme_ctrl structure. This should be called as soon as
882 * the admin queue is fully up and running.
883 */
884int nvme_init_identify(struct nvme_ctrl *ctrl)
885{
886 struct nvme_id_ctrl *id;
887 u64 cap;
888 int ret, page_shift;
889
f3ca80fc
CH
890 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
891 if (ret) {
1b3c47c1 892 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
f3ca80fc
CH
893 return ret;
894 }
895
7fd8930f
CH
896 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
897 if (ret) {
1b3c47c1 898 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
7fd8930f
CH
899 return ret;
900 }
901 page_shift = NVME_CAP_MPSMIN(cap) + 12;
902
f3ca80fc
CH
903 if (ctrl->vs >= NVME_VS(1, 1))
904 ctrl->subsystem = NVME_CAP_NSSRC(cap);
905
7fd8930f
CH
906 ret = nvme_identify_ctrl(ctrl, &id);
907 if (ret) {
1b3c47c1 908 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
7fd8930f
CH
909 return -EIO;
910 }
911
912 ctrl->oncs = le16_to_cpup(&id->oncs);
6bf25d16 913 atomic_set(&ctrl->abort_limit, id->acl + 1);
7fd8930f 914 ctrl->vwc = id->vwc;
931e1c22 915 ctrl->cntlid = le16_to_cpup(&id->cntlid);
7fd8930f
CH
916 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
917 memcpy(ctrl->model, id->mn, sizeof(id->mn));
918 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
919 if (id->mdts)
920 ctrl->max_hw_sectors = 1 << (id->mdts + page_shift - 9);
921 else
922 ctrl->max_hw_sectors = UINT_MAX;
923
924 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) {
925 unsigned int max_hw_sectors;
926
927 ctrl->stripe_size = 1 << (id->vs[3] + page_shift);
928 max_hw_sectors = ctrl->stripe_size >> (page_shift - 9);
929 if (ctrl->max_hw_sectors) {
930 ctrl->max_hw_sectors = min(max_hw_sectors,
931 ctrl->max_hw_sectors);
932 } else {
933 ctrl->max_hw_sectors = max_hw_sectors;
934 }
935 }
936
937 kfree(id);
938 return 0;
939}
576d55d6 940EXPORT_SYMBOL_GPL(nvme_init_identify);
7fd8930f 941
f3ca80fc 942static int nvme_dev_open(struct inode *inode, struct file *file)
1673f1f0 943{
f3ca80fc
CH
944 struct nvme_ctrl *ctrl;
945 int instance = iminor(inode);
946 int ret = -ENODEV;
1673f1f0 947
f3ca80fc
CH
948 spin_lock(&dev_list_lock);
949 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
950 if (ctrl->instance != instance)
951 continue;
952
953 if (!ctrl->admin_q) {
954 ret = -EWOULDBLOCK;
955 break;
956 }
957 if (!kref_get_unless_zero(&ctrl->kref))
958 break;
959 file->private_data = ctrl;
960 ret = 0;
961 break;
962 }
963 spin_unlock(&dev_list_lock);
964
965 return ret;
1673f1f0
CH
966}
967
f3ca80fc 968static int nvme_dev_release(struct inode *inode, struct file *file)
1673f1f0 969{
f3ca80fc
CH
970 nvme_put_ctrl(file->private_data);
971 return 0;
972}
973
bfd89471
CH
974static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
975{
976 struct nvme_ns *ns;
977 int ret;
978
979 mutex_lock(&ctrl->namespaces_mutex);
980 if (list_empty(&ctrl->namespaces)) {
981 ret = -ENOTTY;
982 goto out_unlock;
983 }
984
985 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
986 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
1b3c47c1 987 dev_warn(ctrl->device,
bfd89471
CH
988 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
989 ret = -EINVAL;
990 goto out_unlock;
991 }
992
1b3c47c1 993 dev_warn(ctrl->device,
bfd89471
CH
994 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
995 kref_get(&ns->kref);
996 mutex_unlock(&ctrl->namespaces_mutex);
997
998 ret = nvme_user_cmd(ctrl, ns, argp);
999 nvme_put_ns(ns);
1000 return ret;
1001
1002out_unlock:
1003 mutex_unlock(&ctrl->namespaces_mutex);
1004 return ret;
1005}
1006
f3ca80fc
CH
1007static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1008 unsigned long arg)
1009{
1010 struct nvme_ctrl *ctrl = file->private_data;
1011 void __user *argp = (void __user *)arg;
f3ca80fc
CH
1012
1013 switch (cmd) {
1014 case NVME_IOCTL_ADMIN_CMD:
1015 return nvme_user_cmd(ctrl, NULL, argp);
1016 case NVME_IOCTL_IO_CMD:
bfd89471 1017 return nvme_dev_user_cmd(ctrl, argp);
f3ca80fc 1018 case NVME_IOCTL_RESET:
1b3c47c1 1019 dev_warn(ctrl->device, "resetting controller\n");
f3ca80fc
CH
1020 return ctrl->ops->reset_ctrl(ctrl);
1021 case NVME_IOCTL_SUBSYS_RESET:
1022 return nvme_reset_subsystem(ctrl);
1023 default:
1024 return -ENOTTY;
1025 }
1026}
1027
1028static const struct file_operations nvme_dev_fops = {
1029 .owner = THIS_MODULE,
1030 .open = nvme_dev_open,
1031 .release = nvme_dev_release,
1032 .unlocked_ioctl = nvme_dev_ioctl,
1033 .compat_ioctl = nvme_dev_ioctl,
1034};
1035
1036static ssize_t nvme_sysfs_reset(struct device *dev,
1037 struct device_attribute *attr, const char *buf,
1038 size_t count)
1039{
1040 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1041 int ret;
1042
1043 ret = ctrl->ops->reset_ctrl(ctrl);
1044 if (ret < 0)
1045 return ret;
1046 return count;
1673f1f0 1047}
f3ca80fc 1048static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
1673f1f0 1049
2b9b6e86
KB
1050static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
1051 char *buf)
1052{
1053 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1054 return sprintf(buf, "%pU\n", ns->uuid);
1055}
1056static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
1057
1058static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
1059 char *buf)
1060{
1061 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1062 return sprintf(buf, "%8phd\n", ns->eui);
1063}
1064static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
1065
1066static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
1067 char *buf)
1068{
1069 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1070 return sprintf(buf, "%d\n", ns->ns_id);
1071}
1072static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
1073
1074static struct attribute *nvme_ns_attrs[] = {
1075 &dev_attr_uuid.attr,
1076 &dev_attr_eui.attr,
1077 &dev_attr_nsid.attr,
1078 NULL,
1079};
1080
1081static umode_t nvme_attrs_are_visible(struct kobject *kobj,
1082 struct attribute *a, int n)
1083{
1084 struct device *dev = container_of(kobj, struct device, kobj);
1085 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1086
1087 if (a == &dev_attr_uuid.attr) {
1088 if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1089 return 0;
1090 }
1091 if (a == &dev_attr_eui.attr) {
1092 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1093 return 0;
1094 }
1095 return a->mode;
1096}
1097
1098static const struct attribute_group nvme_ns_attr_group = {
1099 .attrs = nvme_ns_attrs,
1100 .is_visible = nvme_attrs_are_visible,
1101};
1102
931e1c22 1103#define nvme_show_str_function(field) \
779ff756
KB
1104static ssize_t field##_show(struct device *dev, \
1105 struct device_attribute *attr, char *buf) \
1106{ \
1107 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1108 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
1109} \
1110static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1111
931e1c22
ML
1112#define nvme_show_int_function(field) \
1113static ssize_t field##_show(struct device *dev, \
1114 struct device_attribute *attr, char *buf) \
1115{ \
1116 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1117 return sprintf(buf, "%d\n", ctrl->field); \
1118} \
1119static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1120
1121nvme_show_str_function(model);
1122nvme_show_str_function(serial);
1123nvme_show_str_function(firmware_rev);
1124nvme_show_int_function(cntlid);
779ff756
KB
1125
1126static struct attribute *nvme_dev_attrs[] = {
1127 &dev_attr_reset_controller.attr,
1128 &dev_attr_model.attr,
1129 &dev_attr_serial.attr,
1130 &dev_attr_firmware_rev.attr,
931e1c22 1131 &dev_attr_cntlid.attr,
779ff756
KB
1132 NULL
1133};
1134
1135static struct attribute_group nvme_dev_attrs_group = {
1136 .attrs = nvme_dev_attrs,
1137};
1138
1139static const struct attribute_group *nvme_dev_attr_groups[] = {
1140 &nvme_dev_attrs_group,
1141 NULL,
1142};
1143
5bae7f73
CH
1144static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
1145{
1146 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
1147 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
1148
1149 return nsa->ns_id - nsb->ns_id;
1150}
1151
1152static struct nvme_ns *nvme_find_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1153{
1154 struct nvme_ns *ns;
1155
69d3b8ac
CH
1156 lockdep_assert_held(&ctrl->namespaces_mutex);
1157
5bae7f73
CH
1158 list_for_each_entry(ns, &ctrl->namespaces, list) {
1159 if (ns->ns_id == nsid)
1160 return ns;
1161 if (ns->ns_id > nsid)
1162 break;
1163 }
1164 return NULL;
1165}
1166
1167static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1168{
1169 struct nvme_ns *ns;
1170 struct gendisk *disk;
1171 int node = dev_to_node(ctrl->dev);
1172
69d3b8ac
CH
1173 lockdep_assert_held(&ctrl->namespaces_mutex);
1174
5bae7f73
CH
1175 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1176 if (!ns)
1177 return;
1178
1179 ns->queue = blk_mq_init_queue(ctrl->tagset);
1180 if (IS_ERR(ns->queue))
1181 goto out_free_ns;
1182 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
1183 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1184 ns->queue->queuedata = ns;
1185 ns->ctrl = ctrl;
1186
1187 disk = alloc_disk_node(0, node);
1188 if (!disk)
1189 goto out_free_queue;
1190
1191 kref_init(&ns->kref);
1192 ns->ns_id = nsid;
1193 ns->disk = disk;
1194 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
5bae7f73
CH
1195
1196 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1197 if (ctrl->max_hw_sectors) {
1198 blk_queue_max_hw_sectors(ns->queue, ctrl->max_hw_sectors);
1199 blk_queue_max_segments(ns->queue,
1200 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1);
1201 }
1202 if (ctrl->stripe_size)
1203 blk_queue_chunk_sectors(ns->queue, ctrl->stripe_size >> 9);
1204 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1205 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
1206 blk_queue_virt_boundary(ns->queue, ctrl->page_size - 1);
1207
1208 disk->major = nvme_major;
1209 disk->first_minor = 0;
1210 disk->fops = &nvme_fops;
1211 disk->private_data = ns;
1212 disk->queue = ns->queue;
1213 disk->driverfs_dev = ctrl->device;
1214 disk->flags = GENHD_FL_EXT_DEVT;
1215 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, nsid);
1216
5bae7f73
CH
1217 if (nvme_revalidate_disk(ns->disk))
1218 goto out_free_disk;
1219
4b9d5b15 1220 list_add_tail(&ns->list, &ctrl->namespaces);
5bae7f73 1221 kref_get(&ctrl->kref);
2b9b6e86
KB
1222 if (ns->type == NVME_NS_LIGHTNVM)
1223 return;
5bae7f73 1224
2b9b6e86
KB
1225 add_disk(ns->disk);
1226 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
1227 &nvme_ns_attr_group))
1228 pr_warn("%s: failed to create sysfs group for identification\n",
1229 ns->disk->disk_name);
5bae7f73
CH
1230 return;
1231 out_free_disk:
1232 kfree(disk);
5bae7f73
CH
1233 out_free_queue:
1234 blk_cleanup_queue(ns->queue);
1235 out_free_ns:
1236 kfree(ns);
1237}
1238
1239static void nvme_ns_remove(struct nvme_ns *ns)
1240{
1241 bool kill = nvme_io_incapable(ns->ctrl) &&
1242 !blk_queue_dying(ns->queue);
1243
69d3b8ac
CH
1244 lockdep_assert_held(&ns->ctrl->namespaces_mutex);
1245
3e1e21c7 1246 if (kill) {
5bae7f73 1247 blk_set_queue_dying(ns->queue);
3e1e21c7
LT
1248
1249 /*
1250 * The controller was shutdown first if we got here through
1251 * device removal. The shutdown may requeue outstanding
1252 * requests. These need to be aborted immediately so
1253 * del_gendisk doesn't block indefinitely for their completion.
1254 */
1255 blk_mq_abort_requeue_list(ns->queue);
1256 }
5bae7f73
CH
1257 if (ns->disk->flags & GENHD_FL_UP) {
1258 if (blk_get_integrity(ns->disk))
1259 blk_integrity_unregister(ns->disk);
2b9b6e86
KB
1260 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
1261 &nvme_ns_attr_group);
5bae7f73
CH
1262 del_gendisk(ns->disk);
1263 }
1264 if (kill || !blk_queue_dying(ns->queue)) {
1265 blk_mq_abort_requeue_list(ns->queue);
1266 blk_cleanup_queue(ns->queue);
1267 }
1268 list_del_init(&ns->list);
1269 nvme_put_ns(ns);
1270}
1271
540c801c
KB
1272static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1273{
1274 struct nvme_ns *ns;
1275
1276 ns = nvme_find_ns(ctrl, nsid);
1277 if (ns) {
1278 if (revalidate_disk(ns->disk))
1279 nvme_ns_remove(ns);
1280 } else
1281 nvme_alloc_ns(ctrl, nsid);
1282}
1283
1284static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
1285{
1286 struct nvme_ns *ns;
1287 __le32 *ns_list;
1288 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
1289 int ret = 0;
1290
1291 ns_list = kzalloc(0x1000, GFP_KERNEL);
1292 if (!ns_list)
1293 return -ENOMEM;
1294
1295 for (i = 0; i < num_lists; i++) {
1296 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
1297 if (ret)
1298 goto out;
1299
1300 for (j = 0; j < min(nn, 1024U); j++) {
1301 nsid = le32_to_cpu(ns_list[j]);
1302 if (!nsid)
1303 goto out;
1304
1305 nvme_validate_ns(ctrl, nsid);
1306
1307 while (++prev < nsid) {
1308 ns = nvme_find_ns(ctrl, prev);
1309 if (ns)
1310 nvme_ns_remove(ns);
1311 }
1312 }
1313 nn -= j;
1314 }
1315 out:
1316 kfree(ns_list);
1317 return ret;
1318}
1319
5bae7f73
CH
1320static void __nvme_scan_namespaces(struct nvme_ctrl *ctrl, unsigned nn)
1321{
1322 struct nvme_ns *ns, *next;
1323 unsigned i;
1324
69d3b8ac
CH
1325 lockdep_assert_held(&ctrl->namespaces_mutex);
1326
540c801c
KB
1327 for (i = 1; i <= nn; i++)
1328 nvme_validate_ns(ctrl, i);
1329
5bae7f73
CH
1330 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
1331 if (ns->ns_id > nn)
1332 nvme_ns_remove(ns);
1333 }
5bae7f73
CH
1334}
1335
1336void nvme_scan_namespaces(struct nvme_ctrl *ctrl)
1337{
1338 struct nvme_id_ctrl *id;
540c801c 1339 unsigned nn;
5bae7f73
CH
1340
1341 if (nvme_identify_ctrl(ctrl, &id))
1342 return;
540c801c 1343
69d3b8ac 1344 mutex_lock(&ctrl->namespaces_mutex);
540c801c
KB
1345 nn = le32_to_cpu(id->nn);
1346 if (ctrl->vs >= NVME_VS(1, 1) &&
1347 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
1348 if (!nvme_scan_ns_list(ctrl, nn))
1349 goto done;
1350 }
5bae7f73 1351 __nvme_scan_namespaces(ctrl, le32_to_cpup(&id->nn));
540c801c
KB
1352 done:
1353 list_sort(NULL, &ctrl->namespaces, ns_cmp);
69d3b8ac 1354 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73
CH
1355 kfree(id);
1356}
576d55d6 1357EXPORT_SYMBOL_GPL(nvme_scan_namespaces);
5bae7f73
CH
1358
1359void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1360{
1361 struct nvme_ns *ns, *next;
1362
69d3b8ac 1363 mutex_lock(&ctrl->namespaces_mutex);
5bae7f73
CH
1364 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
1365 nvme_ns_remove(ns);
69d3b8ac 1366 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1367}
576d55d6 1368EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
5bae7f73 1369
f3ca80fc
CH
1370static DEFINE_IDA(nvme_instance_ida);
1371
1372static int nvme_set_instance(struct nvme_ctrl *ctrl)
1373{
1374 int instance, error;
1375
1376 do {
1377 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
1378 return -ENODEV;
1379
1380 spin_lock(&dev_list_lock);
1381 error = ida_get_new(&nvme_instance_ida, &instance);
1382 spin_unlock(&dev_list_lock);
1383 } while (error == -EAGAIN);
1384
1385 if (error)
1386 return -ENODEV;
1387
1388 ctrl->instance = instance;
1389 return 0;
1390}
1391
1392static void nvme_release_instance(struct nvme_ctrl *ctrl)
1393{
1394 spin_lock(&dev_list_lock);
1395 ida_remove(&nvme_instance_ida, ctrl->instance);
1396 spin_unlock(&dev_list_lock);
1397}
1398
53029b04 1399void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
576d55d6 1400{
53029b04 1401 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
f3ca80fc
CH
1402
1403 spin_lock(&dev_list_lock);
1404 list_del(&ctrl->node);
1405 spin_unlock(&dev_list_lock);
53029b04 1406}
576d55d6 1407EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
53029b04
KB
1408
1409static void nvme_free_ctrl(struct kref *kref)
1410{
1411 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
f3ca80fc
CH
1412
1413 put_device(ctrl->device);
1414 nvme_release_instance(ctrl);
f3ca80fc
CH
1415
1416 ctrl->ops->free_ctrl(ctrl);
1417}
1418
1419void nvme_put_ctrl(struct nvme_ctrl *ctrl)
1420{
1421 kref_put(&ctrl->kref, nvme_free_ctrl);
1422}
576d55d6 1423EXPORT_SYMBOL_GPL(nvme_put_ctrl);
f3ca80fc
CH
1424
1425/*
1426 * Initialize a NVMe controller structures. This needs to be called during
1427 * earliest initialization so that we have the initialized structured around
1428 * during probing.
1429 */
1430int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
1431 const struct nvme_ctrl_ops *ops, unsigned long quirks)
1432{
1433 int ret;
1434
1435 INIT_LIST_HEAD(&ctrl->namespaces);
69d3b8ac 1436 mutex_init(&ctrl->namespaces_mutex);
f3ca80fc
CH
1437 kref_init(&ctrl->kref);
1438 ctrl->dev = dev;
1439 ctrl->ops = ops;
1440 ctrl->quirks = quirks;
1441
1442 ret = nvme_set_instance(ctrl);
1443 if (ret)
1444 goto out;
1445
779ff756 1446 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
f3ca80fc 1447 MKDEV(nvme_char_major, ctrl->instance),
f4f0f63e 1448 ctrl, nvme_dev_attr_groups,
779ff756 1449 "nvme%d", ctrl->instance);
f3ca80fc
CH
1450 if (IS_ERR(ctrl->device)) {
1451 ret = PTR_ERR(ctrl->device);
1452 goto out_release_instance;
1453 }
1454 get_device(ctrl->device);
f3ca80fc 1455
f3ca80fc
CH
1456 spin_lock(&dev_list_lock);
1457 list_add_tail(&ctrl->node, &nvme_ctrl_list);
1458 spin_unlock(&dev_list_lock);
1459
1460 return 0;
f3ca80fc
CH
1461out_release_instance:
1462 nvme_release_instance(ctrl);
1463out:
1464 return ret;
1465}
576d55d6 1466EXPORT_SYMBOL_GPL(nvme_init_ctrl);
f3ca80fc 1467
25646264 1468void nvme_stop_queues(struct nvme_ctrl *ctrl)
363c9aac
SG
1469{
1470 struct nvme_ns *ns;
1471
69d3b8ac 1472 mutex_lock(&ctrl->namespaces_mutex);
363c9aac 1473 list_for_each_entry(ns, &ctrl->namespaces, list) {
363c9aac
SG
1474 spin_lock_irq(ns->queue->queue_lock);
1475 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
1476 spin_unlock_irq(ns->queue->queue_lock);
1477
1478 blk_mq_cancel_requeue_work(ns->queue);
1479 blk_mq_stop_hw_queues(ns->queue);
1480 }
69d3b8ac 1481 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 1482}
576d55d6 1483EXPORT_SYMBOL_GPL(nvme_stop_queues);
363c9aac 1484
25646264 1485void nvme_start_queues(struct nvme_ctrl *ctrl)
363c9aac
SG
1486{
1487 struct nvme_ns *ns;
1488
69d3b8ac 1489 mutex_lock(&ctrl->namespaces_mutex);
363c9aac
SG
1490 list_for_each_entry(ns, &ctrl->namespaces, list) {
1491 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
363c9aac
SG
1492 blk_mq_start_stopped_hw_queues(ns->queue, true);
1493 blk_mq_kick_requeue_list(ns->queue);
1494 }
69d3b8ac 1495 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 1496}
576d55d6 1497EXPORT_SYMBOL_GPL(nvme_start_queues);
363c9aac 1498
5bae7f73
CH
1499int __init nvme_core_init(void)
1500{
1501 int result;
1502
1503 result = register_blkdev(nvme_major, "nvme");
1504 if (result < 0)
1505 return result;
1506 else if (result > 0)
1507 nvme_major = result;
1508
f3ca80fc
CH
1509 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
1510 &nvme_dev_fops);
1511 if (result < 0)
1512 goto unregister_blkdev;
1513 else if (result > 0)
1514 nvme_char_major = result;
1515
1516 nvme_class = class_create(THIS_MODULE, "nvme");
1517 if (IS_ERR(nvme_class)) {
1518 result = PTR_ERR(nvme_class);
1519 goto unregister_chrdev;
1520 }
1521
5bae7f73 1522 return 0;
f3ca80fc
CH
1523
1524 unregister_chrdev:
1525 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
1526 unregister_blkdev:
1527 unregister_blkdev(nvme_major, "nvme");
1528 return result;
5bae7f73
CH
1529}
1530
1531void nvme_core_exit(void)
1532{
1533 unregister_blkdev(nvme_major, "nvme");
f3ca80fc
CH
1534 class_destroy(nvme_class);
1535 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
5bae7f73 1536}
576d55d6
ML
1537
1538MODULE_LICENSE("GPL");
1539MODULE_VERSION("1.0");
1540module_init(nvme_core_init);
1541module_exit(nvme_core_exit);