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blk-mq: add blk_mq_alloc_request_hctx
[linux-2.6-block.git] / drivers / nvme / host / core.c
CommitLineData
21d34711
CH		 1/*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/blkdev.h>
16#include <linux/blk-mq.h>
5fd4ce1b 17#include <linux/delay.h>
21d34711 18#include <linux/errno.h>
1673f1f0 19#include <linux/hdreg.h>
21d34711 20#include <linux/kernel.h>
5bae7f73
CH		 21#include <linux/module.h>
22#include <linux/list_sort.h>
21d34711
CH		 23#include <linux/slab.h>
24#include <linux/types.h>
1673f1f0
CH		 25#include <linux/pr.h>
26#include <linux/ptrace.h>
27#include <linux/nvme_ioctl.h>
28#include <linux/t10-pi.h>
29#include <scsi/sg.h>
30#include <asm/unaligned.h>
21d34711
CH		 31
32#include "nvme.h"
33
f3ca80fc
CH		 34#define NVME_MINORS (1U << MINORBITS)
35
ba0ba7d3
ML		 36unsigned char admin_timeout = 60;
37module_param(admin_timeout, byte, 0644);
38MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
576d55d6 39EXPORT_SYMBOL_GPL(admin_timeout);
ba0ba7d3
ML		 40
41unsigned char nvme_io_timeout = 30;
42module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
43MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
576d55d6 44EXPORT_SYMBOL_GPL(nvme_io_timeout);
ba0ba7d3
ML		 45
46unsigned char shutdown_timeout = 5;
47module_param(shutdown_timeout, byte, 0644);
48MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
49
5bae7f73
CH		 50static int nvme_major;
51module_param(nvme_major, int, 0);
52
f3ca80fc
CH		 53static int nvme_char_major;
54module_param(nvme_char_major, int, 0);
55
56static LIST_HEAD(nvme_ctrl_list);
9f2482b9 57static DEFINE_SPINLOCK(dev_list_lock);
1673f1f0 58
f3ca80fc
CH		 59static struct class *nvme_class;
60
c55a2fd4
ML		 61void nvme_cancel_request(struct request *req, void *data, bool reserved)
62{
63 int status;
64
65 if (!blk_mq_request_started(req))
66 return;
67
68 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
69 "Cancelling I/O %d", req->tag);
70
71 status = NVME_SC_ABORT_REQ;
72 if (blk_queue_dying(req->q))
73 status |= NVME_SC_DNR;
74 blk_mq_complete_request(req, status);
75}
76EXPORT_SYMBOL_GPL(nvme_cancel_request);
77
bb8d261e
CH		 78bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
79 enum nvme_ctrl_state new_state)
80{
81 enum nvme_ctrl_state old_state = ctrl->state;
82 bool changed = false;
83
84 spin_lock_irq(&ctrl->lock);
85 switch (new_state) {
86 case NVME_CTRL_LIVE:
87 switch (old_state) {
88 case NVME_CTRL_RESETTING:
89 changed = true;
90 /* FALLTHRU */
91 default:
92 break;
93 }
94 break;
95 case NVME_CTRL_RESETTING:
96 switch (old_state) {
97 case NVME_CTRL_NEW:
98 case NVME_CTRL_LIVE:
99 changed = true;
100 /* FALLTHRU */
101 default:
102 break;
103 }
104 break;
105 case NVME_CTRL_DELETING:
106 switch (old_state) {
107 case NVME_CTRL_LIVE:
108 case NVME_CTRL_RESETTING:
109 changed = true;
110 /* FALLTHRU */
111 default:
112 break;
113 }
114 break;
0ff9d4e1
KB		 115 case NVME_CTRL_DEAD:
116 switch (old_state) {
117 case NVME_CTRL_DELETING:
118 changed = true;
119 /* FALLTHRU */
120 default:
121 break;
122 }
123 break;
bb8d261e
CH		 124 default:
125 break;
126 }
127 spin_unlock_irq(&ctrl->lock);
128
129 if (changed)
130 ctrl->state = new_state;
131
132 return changed;
133}
134EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
135
1673f1f0
CH		 136static void nvme_free_ns(struct kref *kref)
137{
138 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
139
140 if (ns->type == NVME_NS_LIGHTNVM)
141 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
142
143 spin_lock(&dev_list_lock);
144 ns->disk->private_data = NULL;
145 spin_unlock(&dev_list_lock);
146
1673f1f0 147 put_disk(ns->disk);
075790eb
KB		 148 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
149 nvme_put_ctrl(ns->ctrl);
1673f1f0
CH		 150 kfree(ns);
151}
152
5bae7f73 153static void nvme_put_ns(struct nvme_ns *ns)
1673f1f0
CH		 154{
155 kref_put(&ns->kref, nvme_free_ns);
156}
157
158static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
159{
160 struct nvme_ns *ns;
161
162 spin_lock(&dev_list_lock);
163 ns = disk->private_data;
e439bb12
SG		 164 if (ns) {
165 if (!kref_get_unless_zero(&ns->kref))
166 goto fail;
167 if (!try_module_get(ns->ctrl->ops->module))
168 goto fail_put_ns;
169 }
1673f1f0
CH		 170 spin_unlock(&dev_list_lock);
171
172 return ns;
e439bb12
SG		 173
174fail_put_ns:
175 kref_put(&ns->kref, nvme_free_ns);
176fail:
177 spin_unlock(&dev_list_lock);
178 return NULL;
1673f1f0
CH		 179}
180
7688faa6
CH		 181void nvme_requeue_req(struct request *req)
182{
183 unsigned long flags;
184
185 blk_mq_requeue_request(req);
186 spin_lock_irqsave(req->q->queue_lock, flags);
187 if (!blk_queue_stopped(req->q))
188 blk_mq_kick_requeue_list(req->q);
189 spin_unlock_irqrestore(req->q->queue_lock, flags);
190}
576d55d6 191EXPORT_SYMBOL_GPL(nvme_requeue_req);
7688faa6 192
4160982e
CH		 193struct request *nvme_alloc_request(struct request_queue *q,
194 struct nvme_command *cmd, unsigned int flags)
21d34711 195{
21d34711 196 struct request *req;
21d34711 197
7a5abb4b 198 req = blk_mq_alloc_request(q, nvme_is_write(cmd), flags);
21d34711 199 if (IS_ERR(req))
4160982e 200 return req;
21d34711
CH		 201
202 req->cmd_type = REQ_TYPE_DRV_PRIV;
203 req->cmd_flags |= REQ_FAILFAST_DRIVER;
204 req->__data_len = 0;
205 req->__sector = (sector_t) -1;
206 req->bio = req->biotail = NULL;
207
21d34711
CH		 208 req->cmd = (unsigned char *)cmd;
209 req->cmd_len = sizeof(struct nvme_command);
21d34711 210
4160982e
CH		 211 return req;
212}
576d55d6 213EXPORT_SYMBOL_GPL(nvme_alloc_request);
4160982e 214
8093f7ca
ML		 215static inline void nvme_setup_flush(struct nvme_ns *ns,
216 struct nvme_command *cmnd)
217{
218 memset(cmnd, 0, sizeof(*cmnd));
219 cmnd->common.opcode = nvme_cmd_flush;
220 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
221}
222
223static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
224 struct nvme_command *cmnd)
225{
226 struct nvme_dsm_range *range;
227 struct page *page;
228 int offset;
229 unsigned int nr_bytes = blk_rq_bytes(req);
230
231 range = kmalloc(sizeof(*range), GFP_ATOMIC);
232 if (!range)
233 return BLK_MQ_RQ_QUEUE_BUSY;
234
235 range->cattr = cpu_to_le32(0);
236 range->nlb = cpu_to_le32(nr_bytes >> ns->lba_shift);
237 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
238
239 memset(cmnd, 0, sizeof(*cmnd));
240 cmnd->dsm.opcode = nvme_cmd_dsm;
241 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
242 cmnd->dsm.nr = 0;
243 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
244
245 req->completion_data = range;
246 page = virt_to_page(range);
247 offset = offset_in_page(range);
248 blk_add_request_payload(req, page, offset, sizeof(*range));
249
250 /*
251 * we set __data_len back to the size of the area to be discarded
252 * on disk. This allows us to report completion on the full amount
253 * of blocks described by the request.
254 */
255 req->__data_len = nr_bytes;
256
257 return 0;
258}
259
260static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
261 struct nvme_command *cmnd)
262{
263 u16 control = 0;
264 u32 dsmgmt = 0;
265
266 if (req->cmd_flags & REQ_FUA)
267 control |= NVME_RW_FUA;
268 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
269 control |= NVME_RW_LR;
270
271 if (req->cmd_flags & REQ_RAHEAD)
272 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
273
274 memset(cmnd, 0, sizeof(*cmnd));
275 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
276 cmnd->rw.command_id = req->tag;
277 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
278 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
279 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
280
281 if (ns->ms) {
282 switch (ns->pi_type) {
283 case NVME_NS_DPS_PI_TYPE3:
284 control |= NVME_RW_PRINFO_PRCHK_GUARD;
285 break;
286 case NVME_NS_DPS_PI_TYPE1:
287 case NVME_NS_DPS_PI_TYPE2:
288 control |= NVME_RW_PRINFO_PRCHK_GUARD |
289 NVME_RW_PRINFO_PRCHK_REF;
290 cmnd->rw.reftag = cpu_to_le32(
291 nvme_block_nr(ns, blk_rq_pos(req)));
292 break;
293 }
294 if (!blk_integrity_rq(req))
295 control |= NVME_RW_PRINFO_PRACT;
296 }
297
298 cmnd->rw.control = cpu_to_le16(control);
299 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
300}
301
302int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
303 struct nvme_command *cmd)
304{
305 int ret = 0;
306
307 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
308 memcpy(cmd, req->cmd, sizeof(*cmd));
3a5e02ce 309 else if (req_op(req) == REQ_OP_FLUSH)
8093f7ca 310 nvme_setup_flush(ns, cmd);
c2df40df 311 else if (req_op(req) == REQ_OP_DISCARD)
8093f7ca
ML		 312 ret = nvme_setup_discard(ns, req, cmd);
313 else
314 nvme_setup_rw(ns, req, cmd);
315
316 return ret;
317}
318EXPORT_SYMBOL_GPL(nvme_setup_cmd);
319
4160982e
CH		 320/*
321 * Returns 0 on success. If the result is negative, it's a Linux error code;
322 * if the result is positive, it's an NVM Express status code
323 */
324int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1cb3cce5
CH		 325 struct nvme_completion *cqe, void *buffer, unsigned bufflen,
326 unsigned timeout)
4160982e
CH		 327{
328 struct request *req;
329 int ret;
330
331 req = nvme_alloc_request(q, cmd, 0);
332 if (IS_ERR(req))
333 return PTR_ERR(req);
334
335 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 336 req->special = cqe;
4160982e 337
21d34711
CH		 338 if (buffer && bufflen) {
339 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
340 if (ret)
341 goto out;
4160982e
CH		 342 }
343
344 blk_execute_rq(req->q, NULL, req, 0);
4160982e
CH		 345 ret = req->errors;
346 out:
347 blk_mq_free_request(req);
348 return ret;
349}
350
351int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
352 void *buffer, unsigned bufflen)
353{
1cb3cce5 354 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0);
4160982e 355}
576d55d6 356EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
4160982e 357
0b7f1f26
KB		 358int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
359 void __user *ubuffer, unsigned bufflen,
360 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
361 u32 *result, unsigned timeout)
4160982e 362{
7a5abb4b 363 bool write = nvme_is_write(cmd);
1cb3cce5 364 struct nvme_completion cqe;
0b7f1f26
KB		 365 struct nvme_ns *ns = q->queuedata;
366 struct gendisk *disk = ns ? ns->disk : NULL;
4160982e 367 struct request *req;
0b7f1f26
KB		 368 struct bio *bio = NULL;
369 void *meta = NULL;
4160982e
CH		 370 int ret;
371
372 req = nvme_alloc_request(q, cmd, 0);
373 if (IS_ERR(req))
374 return PTR_ERR(req);
375
376 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 377 req->special = &cqe;
4160982e
CH		 378
379 if (ubuffer && bufflen) {
21d34711
CH		 380 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
381 GFP_KERNEL);
382 if (ret)
383 goto out;
384 bio = req->bio;
21d34711 385
0b7f1f26
KB		 386 if (!disk)
387 goto submit;
388 bio->bi_bdev = bdget_disk(disk, 0);
389 if (!bio->bi_bdev) {
390 ret = -ENODEV;
391 goto out_unmap;
392 }
393
e9fc63d6 394 if (meta_buffer && meta_len) {
0b7f1f26
KB		 395 struct bio_integrity_payload *bip;
396
397 meta = kmalloc(meta_len, GFP_KERNEL);
398 if (!meta) {
399 ret = -ENOMEM;
400 goto out_unmap;
401 }
402
403 if (write) {
404 if (copy_from_user(meta, meta_buffer,
405 meta_len)) {
406 ret = -EFAULT;
407 goto out_free_meta;
408 }
409 }
410
411 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
06c1e390
KB		 412 if (IS_ERR(bip)) {
413 ret = PTR_ERR(bip);
0b7f1f26
KB		 414 goto out_free_meta;
415 }
416
417 bip->bip_iter.bi_size = meta_len;
418 bip->bip_iter.bi_sector = meta_seed;
419
420 ret = bio_integrity_add_page(bio, virt_to_page(meta),
421 meta_len, offset_in_page(meta));
422 if (ret != meta_len) {
423 ret = -ENOMEM;
424 goto out_free_meta;
425 }
426 }
427 }
428 submit:
429 blk_execute_rq(req->q, disk, req, 0);
430 ret = req->errors;
21d34711 431 if (result)
1cb3cce5 432 *result = le32_to_cpu(cqe.result);
0b7f1f26
KB		 433 if (meta && !ret && !write) {
434 if (copy_to_user(meta_buffer, meta, meta_len))
435 ret = -EFAULT;
436 }
437 out_free_meta:
438 kfree(meta);
439 out_unmap:
440 if (bio) {
441 if (disk && bio->bi_bdev)
442 bdput(bio->bi_bdev);
443 blk_rq_unmap_user(bio);
444 }
21d34711
CH		 445 out:
446 blk_mq_free_request(req);
447 return ret;
448}
449
0b7f1f26
KB		 450int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
451 void __user *ubuffer, unsigned bufflen, u32 *result,
452 unsigned timeout)
453{
454 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
455 result, timeout);
456}
457
1c63dc66 458int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
21d34711
CH		 459{
460 struct nvme_command c = { };
461 int error;
462
463 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
464 c.identify.opcode = nvme_admin_identify;
465 c.identify.cns = cpu_to_le32(1);
466
467 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
468 if (!*id)
469 return -ENOMEM;
470
471 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
472 sizeof(struct nvme_id_ctrl));
473 if (error)
474 kfree(*id);
475 return error;
476}
477
540c801c
KB		 478static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
479{
480 struct nvme_command c = { };
481
482 c.identify.opcode = nvme_admin_identify;
483 c.identify.cns = cpu_to_le32(2);
484 c.identify.nsid = cpu_to_le32(nsid);
485 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
486}
487
1c63dc66 488int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
21d34711
CH		 489 struct nvme_id_ns **id)
490{
491 struct nvme_command c = { };
492 int error;
493
494 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
495 c.identify.opcode = nvme_admin_identify,
496 c.identify.nsid = cpu_to_le32(nsid),
497
498 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
499 if (!*id)
500 return -ENOMEM;
501
502 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
503 sizeof(struct nvme_id_ns));
504 if (error)
505 kfree(*id);
506 return error;
507}
508
1c63dc66 509int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
21d34711
CH		 510 dma_addr_t dma_addr, u32 *result)
511{
512 struct nvme_command c;
1cb3cce5
CH		 513 struct nvme_completion cqe;
514 int ret;
21d34711
CH		 515
516 memset(&c, 0, sizeof(c));
517 c.features.opcode = nvme_admin_get_features;
518 c.features.nsid = cpu_to_le32(nsid);
519 c.features.prp1 = cpu_to_le64(dma_addr);
520 c.features.fid = cpu_to_le32(fid);
521
1cb3cce5
CH		 522 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0);
523 if (ret >= 0)
524 *result = le32_to_cpu(cqe.result);
525 return ret;
21d34711
CH		 526}
527
1c63dc66 528int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
21d34711
CH		 529 dma_addr_t dma_addr, u32 *result)
530{
531 struct nvme_command c;
1cb3cce5
CH		 532 struct nvme_completion cqe;
533 int ret;
21d34711
CH		 534
535 memset(&c, 0, sizeof(c));
536 c.features.opcode = nvme_admin_set_features;
537 c.features.prp1 = cpu_to_le64(dma_addr);
538 c.features.fid = cpu_to_le32(fid);
539 c.features.dword11 = cpu_to_le32(dword11);
540
1cb3cce5
CH		 541 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0);
542 if (ret >= 0)
543 *result = le32_to_cpu(cqe.result);
544 return ret;
21d34711
CH		 545}
546
1c63dc66 547int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
21d34711
CH		 548{
549 struct nvme_command c = { };
550 int error;
551
552 c.common.opcode = nvme_admin_get_log_page,
553 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
554 c.common.cdw10[0] = cpu_to_le32(
555 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
556 NVME_LOG_SMART),
557
558 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
559 if (!*log)
560 return -ENOMEM;
561
562 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
563 sizeof(struct nvme_smart_log));
564 if (error)
565 kfree(*log);
566 return error;
567}
1673f1f0 568
9a0be7ab
CH		 569int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
570{
571 u32 q_count = (*count - 1) | ((*count - 1) << 16);
572 u32 result;
573 int status, nr_io_queues;
574
575 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, 0,
576 &result);
f5fa90dc 577 if (status < 0)
9a0be7ab
CH		 578 return status;
579
f5fa90dc
CH		 580 /*
581 * Degraded controllers might return an error when setting the queue
582 * count. We still want to be able to bring them online and offer
583 * access to the admin queue, as that might be only way to fix them up.
584 */
585 if (status > 0) {
586 dev_err(ctrl->dev, "Could not set queue count (%d)\n", status);
587 *count = 0;
588 } else {
589 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
590 *count = min(*count, nr_io_queues);
591 }
592
9a0be7ab
CH		 593 return 0;
594}
576d55d6 595EXPORT_SYMBOL_GPL(nvme_set_queue_count);
9a0be7ab 596
1673f1f0
CH		 597static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
598{
599 struct nvme_user_io io;
600 struct nvme_command c;
601 unsigned length, meta_len;
602 void __user *metadata;
603
604 if (copy_from_user(&io, uio, sizeof(io)))
605 return -EFAULT;
63088ec7
KB		 606 if (io.flags)
607 return -EINVAL;
1673f1f0
CH		 608
609 switch (io.opcode) {
610 case nvme_cmd_write:
611 case nvme_cmd_read:
612 case nvme_cmd_compare:
613 break;
614 default:
615 return -EINVAL;
616 }
617
618 length = (io.nblocks + 1) << ns->lba_shift;
619 meta_len = (io.nblocks + 1) * ns->ms;
620 metadata = (void __user *)(uintptr_t)io.metadata;
621
622 if (ns->ext) {
623 length += meta_len;
624 meta_len = 0;
625 } else if (meta_len) {
626 if ((io.metadata & 3) || !io.metadata)
627 return -EINVAL;
628 }
629
630 memset(&c, 0, sizeof(c));
631 c.rw.opcode = io.opcode;
632 c.rw.flags = io.flags;
633 c.rw.nsid = cpu_to_le32(ns->ns_id);
634 c.rw.slba = cpu_to_le64(io.slba);
635 c.rw.length = cpu_to_le16(io.nblocks);
636 c.rw.control = cpu_to_le16(io.control);
637 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
638 c.rw.reftag = cpu_to_le32(io.reftag);
639 c.rw.apptag = cpu_to_le16(io.apptag);
640 c.rw.appmask = cpu_to_le16(io.appmask);
641
642 return __nvme_submit_user_cmd(ns->queue, &c,
643 (void __user *)(uintptr_t)io.addr, length,
644 metadata, meta_len, io.slba, NULL, 0);
645}
646
f3ca80fc 647static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1673f1f0
CH		 648 struct nvme_passthru_cmd __user *ucmd)
649{
650 struct nvme_passthru_cmd cmd;
651 struct nvme_command c;
652 unsigned timeout = 0;
653 int status;
654
655 if (!capable(CAP_SYS_ADMIN))
656 return -EACCES;
657 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
658 return -EFAULT;
63088ec7
KB		 659 if (cmd.flags)
660 return -EINVAL;
1673f1f0
CH		 661
662 memset(&c, 0, sizeof(c));
663 c.common.opcode = cmd.opcode;
664 c.common.flags = cmd.flags;
665 c.common.nsid = cpu_to_le32(cmd.nsid);
666 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
667 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
668 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
669 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
670 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
671 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
672 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
673 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
674
675 if (cmd.timeout_ms)
676 timeout = msecs_to_jiffies(cmd.timeout_ms);
677
678 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
d1ea7be5 679 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1673f1f0
CH		 680 &cmd.result, timeout);
681 if (status >= 0) {
682 if (put_user(cmd.result, &ucmd->result))
683 return -EFAULT;
684 }
685
686 return status;
687}
688
689static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
690 unsigned int cmd, unsigned long arg)
691{
692 struct nvme_ns *ns = bdev->bd_disk->private_data;
693
694 switch (cmd) {
695 case NVME_IOCTL_ID:
696 force_successful_syscall_return();
697 return ns->ns_id;
698 case NVME_IOCTL_ADMIN_CMD:
699 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
700 case NVME_IOCTL_IO_CMD:
701 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
702 case NVME_IOCTL_SUBMIT_IO:
703 return nvme_submit_io(ns, (void __user *)arg);
44907332 704#ifdef CONFIG_BLK_DEV_NVME_SCSI
1673f1f0
CH		 705 case SG_GET_VERSION_NUM:
706 return nvme_sg_get_version_num((void __user *)arg);
707 case SG_IO:
708 return nvme_sg_io(ns, (void __user *)arg);
44907332 709#endif
1673f1f0
CH		 710 default:
711 return -ENOTTY;
712 }
713}
714
715#ifdef CONFIG_COMPAT
716static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
717 unsigned int cmd, unsigned long arg)
718{
719 switch (cmd) {
720 case SG_IO:
721 return -ENOIOCTLCMD;
722 }
723 return nvme_ioctl(bdev, mode, cmd, arg);
724}
725#else
726#define nvme_compat_ioctl NULL
727#endif
728
729static int nvme_open(struct block_device *bdev, fmode_t mode)
730{
731 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
732}
733
734static void nvme_release(struct gendisk *disk, fmode_t mode)
735{
e439bb12
SG		 736 struct nvme_ns *ns = disk->private_data;
737
738 module_put(ns->ctrl->ops->module);
739 nvme_put_ns(ns);
1673f1f0
CH		 740}
741
742static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
743{
744 /* some standard values */
745 geo->heads = 1 << 6;
746 geo->sectors = 1 << 5;
747 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
748 return 0;
749}
750
751#ifdef CONFIG_BLK_DEV_INTEGRITY
752static void nvme_init_integrity(struct nvme_ns *ns)
753{
754 struct blk_integrity integrity;
755
756 switch (ns->pi_type) {
757 case NVME_NS_DPS_PI_TYPE3:
758 integrity.profile = &t10_pi_type3_crc;
ba36c21b
NB		 759 integrity.tag_size = sizeof(u16) + sizeof(u32);
760 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH		 761 break;
762 case NVME_NS_DPS_PI_TYPE1:
763 case NVME_NS_DPS_PI_TYPE2:
764 integrity.profile = &t10_pi_type1_crc;
ba36c21b
NB		 765 integrity.tag_size = sizeof(u16);
766 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH		 767 break;
768 default:
769 integrity.profile = NULL;
770 break;
771 }
772 integrity.tuple_size = ns->ms;
773 blk_integrity_register(ns->disk, &integrity);
774 blk_queue_max_integrity_segments(ns->queue, 1);
775}
776#else
777static void nvme_init_integrity(struct nvme_ns *ns)
778{
779}
780#endif /* CONFIG_BLK_DEV_INTEGRITY */
781
782static void nvme_config_discard(struct nvme_ns *ns)
783{
08095e70 784 struct nvme_ctrl *ctrl = ns->ctrl;
1673f1f0 785 u32 logical_block_size = queue_logical_block_size(ns->queue);
08095e70
KB		 786
787 if (ctrl->quirks & NVME_QUIRK_DISCARD_ZEROES)
788 ns->queue->limits.discard_zeroes_data = 1;
789 else
790 ns->queue->limits.discard_zeroes_data = 0;
791
1673f1f0
CH		 792 ns->queue->limits.discard_alignment = logical_block_size;
793 ns->queue->limits.discard_granularity = logical_block_size;
bd0fc288 794 blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
1673f1f0
CH		 795 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
796}
797
5bae7f73 798static int nvme_revalidate_disk(struct gendisk *disk)
1673f1f0
CH		 799{
800 struct nvme_ns *ns = disk->private_data;
801 struct nvme_id_ns *id;
802 u8 lbaf, pi_type;
803 u16 old_ms;
804 unsigned short bs;
805
69d9a99c
KB		 806 if (test_bit(NVME_NS_DEAD, &ns->flags)) {
807 set_capacity(disk, 0);
808 return -ENODEV;
809 }
1673f1f0 810 if (nvme_identify_ns(ns->ctrl, ns->ns_id, &id)) {
1b3c47c1
SG		 811 dev_warn(disk_to_dev(ns->disk), "%s: Identify failure\n",
812 __func__);
1673f1f0
CH		 813 return -ENODEV;
814 }
815 if (id->ncap == 0) {
816 kfree(id);
817 return -ENODEV;
818 }
819
820 if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
821 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
1b3c47c1 822 dev_warn(disk_to_dev(ns->disk),
1673f1f0
CH		 823 "%s: LightNVM init failure\n", __func__);
824 kfree(id);
825 return -ENODEV;
826 }
827 ns->type = NVME_NS_LIGHTNVM;
828 }
829
2b9b6e86
KB		 830 if (ns->ctrl->vs >= NVME_VS(1, 1))
831 memcpy(ns->eui, id->eui64, sizeof(ns->eui));
832 if (ns->ctrl->vs >= NVME_VS(1, 2))
833 memcpy(ns->uuid, id->nguid, sizeof(ns->uuid));
834
1673f1f0
CH		 835 old_ms = ns->ms;
836 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
837 ns->lba_shift = id->lbaf[lbaf].ds;
838 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
839 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
840
841 /*
842 * If identify namespace failed, use default 512 byte block size so
843 * block layer can use before failing read/write for 0 capacity.
844 */
845 if (ns->lba_shift == 0)
846 ns->lba_shift = 9;
847 bs = 1 << ns->lba_shift;
1673f1f0
CH		 848 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
849 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
850 id->dps & NVME_NS_DPS_PI_MASK : 0;
851
852 blk_mq_freeze_queue(disk->queue);
853 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
854 ns->ms != old_ms ||
855 bs != queue_logical_block_size(disk->queue) ||
856 (ns->ms && ns->ext)))
857 blk_integrity_unregister(disk);
858
859 ns->pi_type = pi_type;
860 blk_queue_logical_block_size(ns->queue, bs);
861
4b9d5b15 862 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
1673f1f0 863 nvme_init_integrity(ns);
1673f1f0
CH		 864 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
865 set_capacity(disk, 0);
866 else
867 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
868
869 if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
870 nvme_config_discard(ns);
871 blk_mq_unfreeze_queue(disk->queue);
872
873 kfree(id);
874 return 0;
875}
876
877static char nvme_pr_type(enum pr_type type)
878{
879 switch (type) {
880 case PR_WRITE_EXCLUSIVE:
881 return 1;
882 case PR_EXCLUSIVE_ACCESS:
883 return 2;
884 case PR_WRITE_EXCLUSIVE_REG_ONLY:
885 return 3;
886 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
887 return 4;
888 case PR_WRITE_EXCLUSIVE_ALL_REGS:
889 return 5;
890 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
891 return 6;
892 default:
893 return 0;
894 }
895};
896
897static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
898 u64 key, u64 sa_key, u8 op)
899{
900 struct nvme_ns *ns = bdev->bd_disk->private_data;
901 struct nvme_command c;
902 u8 data[16] = { 0, };
903
904 put_unaligned_le64(key, &data[0]);
905 put_unaligned_le64(sa_key, &data[8]);
906
907 memset(&c, 0, sizeof(c));
908 c.common.opcode = op;
909 c.common.nsid = cpu_to_le32(ns->ns_id);
910 c.common.cdw10[0] = cpu_to_le32(cdw10);
911
912 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
913}
914
915static int nvme_pr_register(struct block_device *bdev, u64 old,
916 u64 new, unsigned flags)
917{
918 u32 cdw10;
919
920 if (flags & ~PR_FL_IGNORE_KEY)
921 return -EOPNOTSUPP;
922
923 cdw10 = old ? 2 : 0;
924 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
925 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
926 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
927}
928
929static int nvme_pr_reserve(struct block_device *bdev, u64 key,
930 enum pr_type type, unsigned flags)
931{
932 u32 cdw10;
933
934 if (flags & ~PR_FL_IGNORE_KEY)
935 return -EOPNOTSUPP;
936
937 cdw10 = nvme_pr_type(type) << 8;
938 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
939 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
940}
941
942static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
943 enum pr_type type, bool abort)
944{
945 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
946 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
947}
948
949static int nvme_pr_clear(struct block_device *bdev, u64 key)
950{
8c0b3915 951 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
1673f1f0
CH		 952 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
953}
954
955static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
956{
957 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
958 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
959}
960
961static const struct pr_ops nvme_pr_ops = {
962 .pr_register = nvme_pr_register,
963 .pr_reserve = nvme_pr_reserve,
964 .pr_release = nvme_pr_release,
965 .pr_preempt = nvme_pr_preempt,
966 .pr_clear = nvme_pr_clear,
967};
968
5bae7f73 969static const struct block_device_operations nvme_fops = {
1673f1f0
CH		 970 .owner = THIS_MODULE,
971 .ioctl = nvme_ioctl,
972 .compat_ioctl = nvme_compat_ioctl,
973 .open = nvme_open,
974 .release = nvme_release,
975 .getgeo = nvme_getgeo,
976 .revalidate_disk= nvme_revalidate_disk,
977 .pr_ops = &nvme_pr_ops,
978};
979
5fd4ce1b
CH		 980static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
981{
982 unsigned long timeout =
983 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
984 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
985 int ret;
986
987 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
988 if ((csts & NVME_CSTS_RDY) == bit)
989 break;
990
991 msleep(100);
992 if (fatal_signal_pending(current))
993 return -EINTR;
994 if (time_after(jiffies, timeout)) {
1b3c47c1 995 dev_err(ctrl->device,
5fd4ce1b
CH		 996 "Device not ready; aborting %s\n", enabled ?
997 "initialisation" : "reset");
998 return -ENODEV;
999 }
1000 }
1001
1002 return ret;
1003}
1004
1005/*
1006 * If the device has been passed off to us in an enabled state, just clear
1007 * the enabled bit. The spec says we should set the 'shutdown notification
1008 * bits', but doing so may cause the device to complete commands to the
1009 * admin queue ... and we don't know what memory that might be pointing at!
1010 */
1011int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1012{
1013 int ret;
1014
1015 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1016 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
1017
1018 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1019 if (ret)
1020 return ret;
1021 return nvme_wait_ready(ctrl, cap, false);
1022}
576d55d6 1023EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
5fd4ce1b
CH		 1024
1025int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1026{
1027 /*
1028 * Default to a 4K page size, with the intention to update this
1029 * path in the future to accomodate architectures with differing
1030 * kernel and IO page sizes.
1031 */
1032 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
1033 int ret;
1034
1035 if (page_shift < dev_page_min) {
1b3c47c1 1036 dev_err(ctrl->device,
5fd4ce1b
CH		 1037 "Minimum device page size %u too large for host (%u)\n",
1038 1 << dev_page_min, 1 << page_shift);
1039 return -ENODEV;
1040 }
1041
1042 ctrl->page_size = 1 << page_shift;
1043
1044 ctrl->ctrl_config = NVME_CC_CSS_NVM;
1045 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1046 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1047 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1048 ctrl->ctrl_config |= NVME_CC_ENABLE;
1049
1050 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1051 if (ret)
1052 return ret;
1053 return nvme_wait_ready(ctrl, cap, true);
1054}
576d55d6 1055EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
5fd4ce1b
CH		 1056
1057int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
1058{
1059 unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
1060 u32 csts;
1061 int ret;
1062
1063 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1064 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
1065
1066 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1067 if (ret)
1068 return ret;
1069
1070 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1071 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
1072 break;
1073
1074 msleep(100);
1075 if (fatal_signal_pending(current))
1076 return -EINTR;
1077 if (time_after(jiffies, timeout)) {
1b3c47c1 1078 dev_err(ctrl->device,
5fd4ce1b
CH		 1079 "Device shutdown incomplete; abort shutdown\n");
1080 return -ENODEV;
1081 }
1082 }
1083
1084 return ret;
1085}
576d55d6 1086EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
5fd4ce1b 1087
da35825d
CH		 1088static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1089 struct request_queue *q)
1090{
7c88cb00
JA		 1091 bool vwc = false;
1092
da35825d 1093 if (ctrl->max_hw_sectors) {
45686b61
CH		 1094 u32 max_segments =
1095 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
1096
da35825d 1097 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
45686b61 1098 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
da35825d
CH		 1099 }
1100 if (ctrl->stripe_size)
1101 blk_queue_chunk_sectors(q, ctrl->stripe_size >> 9);
da35825d 1102 blk_queue_virt_boundary(q, ctrl->page_size - 1);
7c88cb00
JA		 1103 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1104 vwc = true;
1105 blk_queue_write_cache(q, vwc, vwc);
da35825d
CH		 1106}
1107
7fd8930f
CH		 1108/*
1109 * Initialize the cached copies of the Identify data and various controller
1110 * register in our nvme_ctrl structure. This should be called as soon as
1111 * the admin queue is fully up and running.
1112 */
1113int nvme_init_identify(struct nvme_ctrl *ctrl)
1114{
1115 struct nvme_id_ctrl *id;
1116 u64 cap;
1117 int ret, page_shift;
a229dbf6 1118 u32 max_hw_sectors;
7fd8930f 1119
f3ca80fc
CH		 1120 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
1121 if (ret) {
1b3c47c1 1122 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
f3ca80fc
CH		 1123 return ret;
1124 }
1125
7fd8930f
CH		 1126 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
1127 if (ret) {
1b3c47c1 1128 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
7fd8930f
CH		 1129 return ret;
1130 }
1131 page_shift = NVME_CAP_MPSMIN(cap) + 12;
1132
f3ca80fc
CH		 1133 if (ctrl->vs >= NVME_VS(1, 1))
1134 ctrl->subsystem = NVME_CAP_NSSRC(cap);
1135
7fd8930f
CH		 1136 ret = nvme_identify_ctrl(ctrl, &id);
1137 if (ret) {
1b3c47c1 1138 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
7fd8930f
CH		 1139 return -EIO;
1140 }
1141
118472ab 1142 ctrl->vid = le16_to_cpu(id->vid);
7fd8930f 1143 ctrl->oncs = le16_to_cpup(&id->oncs);
6bf25d16 1144 atomic_set(&ctrl->abort_limit, id->acl + 1);
7fd8930f 1145 ctrl->vwc = id->vwc;
931e1c22 1146 ctrl->cntlid = le16_to_cpup(&id->cntlid);
7fd8930f
CH		 1147 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
1148 memcpy(ctrl->model, id->mn, sizeof(id->mn));
1149 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
1150 if (id->mdts)
a229dbf6 1151 max_hw_sectors = 1 << (id->mdts + page_shift - 9);
7fd8930f 1152 else
a229dbf6
CH		 1153 max_hw_sectors = UINT_MAX;
1154 ctrl->max_hw_sectors =
1155 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
7fd8930f
CH		 1156
1157 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) {
1158 unsigned int max_hw_sectors;
1159
1160 ctrl->stripe_size = 1 << (id->vs[3] + page_shift);
1161 max_hw_sectors = ctrl->stripe_size >> (page_shift - 9);
1162 if (ctrl->max_hw_sectors) {
1163 ctrl->max_hw_sectors = min(max_hw_sectors,
1164 ctrl->max_hw_sectors);
1165 } else {
1166 ctrl->max_hw_sectors = max_hw_sectors;
1167 }
1168 }
1169
da35825d
CH		 1170 nvme_set_queue_limits(ctrl, ctrl->admin_q);
1171
7fd8930f
CH		 1172 kfree(id);
1173 return 0;
1174}
576d55d6 1175EXPORT_SYMBOL_GPL(nvme_init_identify);
7fd8930f 1176
f3ca80fc 1177static int nvme_dev_open(struct inode *inode, struct file *file)
1673f1f0 1178{
f3ca80fc
CH		 1179 struct nvme_ctrl *ctrl;
1180 int instance = iminor(inode);
1181 int ret = -ENODEV;
1673f1f0 1182
f3ca80fc
CH		 1183 spin_lock(&dev_list_lock);
1184 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
1185 if (ctrl->instance != instance)
1186 continue;
1187
1188 if (!ctrl->admin_q) {
1189 ret = -EWOULDBLOCK;
1190 break;
1191 }
1192 if (!kref_get_unless_zero(&ctrl->kref))
1193 break;
1194 file->private_data = ctrl;
1195 ret = 0;
1196 break;
1197 }
1198 spin_unlock(&dev_list_lock);
1199
1200 return ret;
1673f1f0
CH		 1201}
1202
f3ca80fc 1203static int nvme_dev_release(struct inode *inode, struct file *file)
1673f1f0 1204{
f3ca80fc
CH		 1205 nvme_put_ctrl(file->private_data);
1206 return 0;
1207}
1208
bfd89471
CH		 1209static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
1210{
1211 struct nvme_ns *ns;
1212 int ret;
1213
1214 mutex_lock(&ctrl->namespaces_mutex);
1215 if (list_empty(&ctrl->namespaces)) {
1216 ret = -ENOTTY;
1217 goto out_unlock;
1218 }
1219
1220 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
1221 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
1b3c47c1 1222 dev_warn(ctrl->device,
bfd89471
CH		 1223 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
1224 ret = -EINVAL;
1225 goto out_unlock;
1226 }
1227
1b3c47c1 1228 dev_warn(ctrl->device,
bfd89471
CH		 1229 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
1230 kref_get(&ns->kref);
1231 mutex_unlock(&ctrl->namespaces_mutex);
1232
1233 ret = nvme_user_cmd(ctrl, ns, argp);
1234 nvme_put_ns(ns);
1235 return ret;
1236
1237out_unlock:
1238 mutex_unlock(&ctrl->namespaces_mutex);
1239 return ret;
1240}
1241
f3ca80fc
CH		 1242static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1243 unsigned long arg)
1244{
1245 struct nvme_ctrl *ctrl = file->private_data;
1246 void __user *argp = (void __user *)arg;
f3ca80fc
CH		 1247
1248 switch (cmd) {
1249 case NVME_IOCTL_ADMIN_CMD:
1250 return nvme_user_cmd(ctrl, NULL, argp);
1251 case NVME_IOCTL_IO_CMD:
bfd89471 1252 return nvme_dev_user_cmd(ctrl, argp);
f3ca80fc 1253 case NVME_IOCTL_RESET:
1b3c47c1 1254 dev_warn(ctrl->device, "resetting controller\n");
f3ca80fc
CH		 1255 return ctrl->ops->reset_ctrl(ctrl);
1256 case NVME_IOCTL_SUBSYS_RESET:
1257 return nvme_reset_subsystem(ctrl);
9ec3bb2f
KB		 1258 case NVME_IOCTL_RESCAN:
1259 nvme_queue_scan(ctrl);
1260 return 0;
f3ca80fc
CH		 1261 default:
1262 return -ENOTTY;
1263 }
1264}
1265
1266static const struct file_operations nvme_dev_fops = {
1267 .owner = THIS_MODULE,
1268 .open = nvme_dev_open,
1269 .release = nvme_dev_release,
1270 .unlocked_ioctl = nvme_dev_ioctl,
1271 .compat_ioctl = nvme_dev_ioctl,
1272};
1273
1274static ssize_t nvme_sysfs_reset(struct device *dev,
1275 struct device_attribute *attr, const char *buf,
1276 size_t count)
1277{
1278 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1279 int ret;
1280
1281 ret = ctrl->ops->reset_ctrl(ctrl);
1282 if (ret < 0)
1283 return ret;
1284 return count;
1673f1f0 1285}
f3ca80fc 1286static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
1673f1f0 1287
9ec3bb2f
KB		 1288static ssize_t nvme_sysfs_rescan(struct device *dev,
1289 struct device_attribute *attr, const char *buf,
1290 size_t count)
1291{
1292 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1293
1294 nvme_queue_scan(ctrl);
1295 return count;
1296}
1297static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
1298
118472ab
KB		 1299static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
1300 char *buf)
1301{
1302 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1303 struct nvme_ctrl *ctrl = ns->ctrl;
1304 int serial_len = sizeof(ctrl->serial);
1305 int model_len = sizeof(ctrl->model);
1306
1307 if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1308 return sprintf(buf, "eui.%16phN\n", ns->uuid);
1309
1310 if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1311 return sprintf(buf, "eui.%8phN\n", ns->eui);
1312
1313 while (ctrl->serial[serial_len - 1] == ' ')
1314 serial_len--;
1315 while (ctrl->model[model_len - 1] == ' ')
1316 model_len--;
1317
1318 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
1319 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
1320}
1321static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
1322
2b9b6e86
KB		 1323static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
1324 char *buf)
1325{
1326 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1327 return sprintf(buf, "%pU\n", ns->uuid);
1328}
1329static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
1330
1331static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
1332 char *buf)
1333{
1334 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1335 return sprintf(buf, "%8phd\n", ns->eui);
1336}
1337static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
1338
1339static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
1340 char *buf)
1341{
1342 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1343 return sprintf(buf, "%d\n", ns->ns_id);
1344}
1345static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
1346
1347static struct attribute *nvme_ns_attrs[] = {
118472ab 1348 &dev_attr_wwid.attr,
2b9b6e86
KB		 1349 &dev_attr_uuid.attr,
1350 &dev_attr_eui.attr,
1351 &dev_attr_nsid.attr,
1352 NULL,
1353};
1354
1355static umode_t nvme_attrs_are_visible(struct kobject *kobj,
1356 struct attribute *a, int n)
1357{
1358 struct device *dev = container_of(kobj, struct device, kobj);
1359 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1360
1361 if (a == &dev_attr_uuid.attr) {
1362 if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1363 return 0;
1364 }
1365 if (a == &dev_attr_eui.attr) {
1366 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1367 return 0;
1368 }
1369 return a->mode;
1370}
1371
1372static const struct attribute_group nvme_ns_attr_group = {
1373 .attrs = nvme_ns_attrs,
1374 .is_visible = nvme_attrs_are_visible,
1375};
1376
931e1c22 1377#define nvme_show_str_function(field) \
779ff756
KB		 1378static ssize_t field##_show(struct device *dev, \
1379 struct device_attribute *attr, char *buf) \
1380{ \
1381 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1382 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
1383} \
1384static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1385
931e1c22
ML		 1386#define nvme_show_int_function(field) \
1387static ssize_t field##_show(struct device *dev, \
1388 struct device_attribute *attr, char *buf) \
1389{ \
1390 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1391 return sprintf(buf, "%d\n", ctrl->field); \
1392} \
1393static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1394
1395nvme_show_str_function(model);
1396nvme_show_str_function(serial);
1397nvme_show_str_function(firmware_rev);
1398nvme_show_int_function(cntlid);
779ff756
KB		 1399
1400static struct attribute *nvme_dev_attrs[] = {
1401 &dev_attr_reset_controller.attr,
9ec3bb2f 1402 &dev_attr_rescan_controller.attr,
779ff756
KB		 1403 &dev_attr_model.attr,
1404 &dev_attr_serial.attr,
1405 &dev_attr_firmware_rev.attr,
931e1c22 1406 &dev_attr_cntlid.attr,
779ff756
KB		 1407 NULL
1408};
1409
1410static struct attribute_group nvme_dev_attrs_group = {
1411 .attrs = nvme_dev_attrs,
1412};
1413
1414static const struct attribute_group *nvme_dev_attr_groups[] = {
1415 &nvme_dev_attrs_group,
1416 NULL,
1417};
1418
5bae7f73
CH		 1419static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
1420{
1421 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
1422 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
1423
1424 return nsa->ns_id - nsb->ns_id;
1425}
1426
1427static struct nvme_ns *nvme_find_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1428{
1429 struct nvme_ns *ns;
1430
69d3b8ac
CH		 1431 lockdep_assert_held(&ctrl->namespaces_mutex);
1432
5bae7f73
CH		 1433 list_for_each_entry(ns, &ctrl->namespaces, list) {
1434 if (ns->ns_id == nsid)
1435 return ns;
1436 if (ns->ns_id > nsid)
1437 break;
1438 }
1439 return NULL;
1440}
1441
1442static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1443{
1444 struct nvme_ns *ns;
1445 struct gendisk *disk;
1446 int node = dev_to_node(ctrl->dev);
1447
69d3b8ac
CH		 1448 lockdep_assert_held(&ctrl->namespaces_mutex);
1449
5bae7f73
CH		 1450 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1451 if (!ns)
1452 return;
1453
075790eb
KB		 1454 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
1455 if (ns->instance < 0)
1456 goto out_free_ns;
1457
5bae7f73
CH		 1458 ns->queue = blk_mq_init_queue(ctrl->tagset);
1459 if (IS_ERR(ns->queue))
075790eb 1460 goto out_release_instance;
5bae7f73
CH		 1461 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1462 ns->queue->queuedata = ns;
1463 ns->ctrl = ctrl;
1464
1465 disk = alloc_disk_node(0, node);
1466 if (!disk)
1467 goto out_free_queue;
1468
1469 kref_init(&ns->kref);
1470 ns->ns_id = nsid;
1471 ns->disk = disk;
1472 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
5bae7f73 1473
da35825d 1474
5bae7f73 1475 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
da35825d 1476 nvme_set_queue_limits(ctrl, ns->queue);
5bae7f73
CH		 1477
1478 disk->major = nvme_major;
1479 disk->first_minor = 0;
1480 disk->fops = &nvme_fops;
1481 disk->private_data = ns;
1482 disk->queue = ns->queue;
1483 disk->driverfs_dev = ctrl->device;
1484 disk->flags = GENHD_FL_EXT_DEVT;
075790eb 1485 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
5bae7f73 1486
5bae7f73
CH		 1487 if (nvme_revalidate_disk(ns->disk))
1488 goto out_free_disk;
1489
0bf77e9d 1490 list_add_tail_rcu(&ns->list, &ctrl->namespaces);
5bae7f73 1491 kref_get(&ctrl->kref);
2b9b6e86
KB		 1492 if (ns->type == NVME_NS_LIGHTNVM)
1493 return;
5bae7f73 1494
2b9b6e86
KB		 1495 add_disk(ns->disk);
1496 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
1497 &nvme_ns_attr_group))
1498 pr_warn("%s: failed to create sysfs group for identification\n",
1499 ns->disk->disk_name);
5bae7f73
CH		 1500 return;
1501 out_free_disk:
1502 kfree(disk);
5bae7f73
CH		 1503 out_free_queue:
1504 blk_cleanup_queue(ns->queue);
075790eb
KB		 1505 out_release_instance:
1506 ida_simple_remove(&ctrl->ns_ida, ns->instance);
5bae7f73
CH		 1507 out_free_ns:
1508 kfree(ns);
1509}
1510
1511static void nvme_ns_remove(struct nvme_ns *ns)
1512{
b7b9c227
ML		 1513 lockdep_assert_held(&ns->ctrl->namespaces_mutex);
1514
646017a6
KB		 1515 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
1516 return;
69d3b8ac 1517
5bae7f73
CH		 1518 if (ns->disk->flags & GENHD_FL_UP) {
1519 if (blk_get_integrity(ns->disk))
1520 blk_integrity_unregister(ns->disk);
2b9b6e86
KB		 1521 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
1522 &nvme_ns_attr_group);
5bae7f73 1523 del_gendisk(ns->disk);
5bae7f73
CH		 1524 blk_mq_abort_requeue_list(ns->queue);
1525 blk_cleanup_queue(ns->queue);
1526 }
1527 list_del_init(&ns->list);
0bf77e9d 1528 synchronize_rcu();
5bae7f73
CH		 1529 nvme_put_ns(ns);
1530}
1531
540c801c
KB		 1532static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1533{
1534 struct nvme_ns *ns;
1535
1536 ns = nvme_find_ns(ctrl, nsid);
1537 if (ns) {
1538 if (revalidate_disk(ns->disk))
1539 nvme_ns_remove(ns);
1540 } else
1541 nvme_alloc_ns(ctrl, nsid);
1542}
1543
47b0e50a
SB		 1544static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
1545 unsigned nsid)
1546{
1547 struct nvme_ns *ns, *next;
1548
1549 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
1550 if (ns->ns_id > nsid)
1551 nvme_ns_remove(ns);
1552 }
1553}
1554
540c801c
KB		 1555static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
1556{
1557 struct nvme_ns *ns;
1558 __le32 *ns_list;
1559 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
1560 int ret = 0;
1561
1562 ns_list = kzalloc(0x1000, GFP_KERNEL);
1563 if (!ns_list)
1564 return -ENOMEM;
1565
1566 for (i = 0; i < num_lists; i++) {
1567 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
1568 if (ret)
47b0e50a 1569 goto free;
540c801c
KB		 1570
1571 for (j = 0; j < min(nn, 1024U); j++) {
1572 nsid = le32_to_cpu(ns_list[j]);
1573 if (!nsid)
1574 goto out;
1575
1576 nvme_validate_ns(ctrl, nsid);
1577
1578 while (++prev < nsid) {
1579 ns = nvme_find_ns(ctrl, prev);
1580 if (ns)
1581 nvme_ns_remove(ns);
1582 }
1583 }
1584 nn -= j;
1585 }
1586 out:
47b0e50a
SB		 1587 nvme_remove_invalid_namespaces(ctrl, prev);
1588 free:
540c801c
KB		 1589 kfree(ns_list);
1590 return ret;
1591}
1592
5955be21 1593static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
5bae7f73 1594{
5bae7f73
CH		 1595 unsigned i;
1596
69d3b8ac
CH		 1597 lockdep_assert_held(&ctrl->namespaces_mutex);
1598
540c801c
KB		 1599 for (i = 1; i <= nn; i++)
1600 nvme_validate_ns(ctrl, i);
1601
47b0e50a 1602 nvme_remove_invalid_namespaces(ctrl, nn);
5bae7f73
CH		 1603}
1604
5955be21 1605static void nvme_scan_work(struct work_struct *work)
5bae7f73 1606{
5955be21
CH		 1607 struct nvme_ctrl *ctrl =
1608 container_of(work, struct nvme_ctrl, scan_work);
5bae7f73 1609 struct nvme_id_ctrl *id;
540c801c 1610 unsigned nn;
5bae7f73 1611
5955be21
CH		 1612 if (ctrl->state != NVME_CTRL_LIVE)
1613 return;
1614
5bae7f73
CH		 1615 if (nvme_identify_ctrl(ctrl, &id))
1616 return;
540c801c 1617
69d3b8ac 1618 mutex_lock(&ctrl->namespaces_mutex);
540c801c
KB		 1619 nn = le32_to_cpu(id->nn);
1620 if (ctrl->vs >= NVME_VS(1, 1) &&
1621 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
1622 if (!nvme_scan_ns_list(ctrl, nn))
1623 goto done;
1624 }
5955be21 1625 nvme_scan_ns_sequential(ctrl, nn);
540c801c
KB		 1626 done:
1627 list_sort(NULL, &ctrl->namespaces, ns_cmp);
69d3b8ac 1628 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1629 kfree(id);
5955be21
CH		 1630
1631 if (ctrl->ops->post_scan)
1632 ctrl->ops->post_scan(ctrl);
5bae7f73 1633}
5955be21
CH		 1634
1635void nvme_queue_scan(struct nvme_ctrl *ctrl)
1636{
1637 /*
1638 * Do not queue new scan work when a controller is reset during
1639 * removal.
1640 */
1641 if (ctrl->state == NVME_CTRL_LIVE)
1642 schedule_work(&ctrl->scan_work);
1643}
1644EXPORT_SYMBOL_GPL(nvme_queue_scan);
5bae7f73
CH		 1645
1646void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1647{
1648 struct nvme_ns *ns, *next;
1649
0ff9d4e1
KB		 1650 /*
1651 * The dead states indicates the controller was not gracefully
1652 * disconnected. In that case, we won't be able to flush any data while
1653 * removing the namespaces' disks; fail all the queues now to avoid
1654 * potentially having to clean up the failed sync later.
1655 */
1656 if (ctrl->state == NVME_CTRL_DEAD)
1657 nvme_kill_queues(ctrl);
1658
b7b9c227 1659 mutex_lock(&ctrl->namespaces_mutex);
5bae7f73
CH		 1660 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
1661 nvme_ns_remove(ns);
b7b9c227 1662 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1663}
576d55d6 1664EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
5bae7f73 1665
f866fc42
CH		 1666static void nvme_async_event_work(struct work_struct *work)
1667{
1668 struct nvme_ctrl *ctrl =
1669 container_of(work, struct nvme_ctrl, async_event_work);
1670
1671 spin_lock_irq(&ctrl->lock);
1672 while (ctrl->event_limit > 0) {
1673 int aer_idx = --ctrl->event_limit;
1674
1675 spin_unlock_irq(&ctrl->lock);
1676 ctrl->ops->submit_async_event(ctrl, aer_idx);
1677 spin_lock_irq(&ctrl->lock);
1678 }
1679 spin_unlock_irq(&ctrl->lock);
1680}
1681
1682void nvme_complete_async_event(struct nvme_ctrl *ctrl,
1683 struct nvme_completion *cqe)
1684{
1685 u16 status = le16_to_cpu(cqe->status) >> 1;
1686 u32 result = le32_to_cpu(cqe->result);
1687
1688 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ) {
1689 ++ctrl->event_limit;
1690 schedule_work(&ctrl->async_event_work);
1691 }
1692
1693 if (status != NVME_SC_SUCCESS)
1694 return;
1695
1696 switch (result & 0xff07) {
1697 case NVME_AER_NOTICE_NS_CHANGED:
1698 dev_info(ctrl->device, "rescanning\n");
1699 nvme_queue_scan(ctrl);
1700 break;
1701 default:
1702 dev_warn(ctrl->device, "async event result %08x\n", result);
1703 }
1704}
1705EXPORT_SYMBOL_GPL(nvme_complete_async_event);
1706
1707void nvme_queue_async_events(struct nvme_ctrl *ctrl)
1708{
1709 ctrl->event_limit = NVME_NR_AERS;
1710 schedule_work(&ctrl->async_event_work);
1711}
1712EXPORT_SYMBOL_GPL(nvme_queue_async_events);
1713
f3ca80fc
CH		 1714static DEFINE_IDA(nvme_instance_ida);
1715
1716static int nvme_set_instance(struct nvme_ctrl *ctrl)
1717{
1718 int instance, error;
1719
1720 do {
1721 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
1722 return -ENODEV;
1723
1724 spin_lock(&dev_list_lock);
1725 error = ida_get_new(&nvme_instance_ida, &instance);
1726 spin_unlock(&dev_list_lock);
1727 } while (error == -EAGAIN);
1728
1729 if (error)
1730 return -ENODEV;
1731
1732 ctrl->instance = instance;
1733 return 0;
1734}
1735
1736static void nvme_release_instance(struct nvme_ctrl *ctrl)
1737{
1738 spin_lock(&dev_list_lock);
1739 ida_remove(&nvme_instance_ida, ctrl->instance);
1740 spin_unlock(&dev_list_lock);
1741}
1742
53029b04 1743void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
576d55d6 1744{
f866fc42 1745 flush_work(&ctrl->async_event_work);
5955be21
CH		 1746 flush_work(&ctrl->scan_work);
1747 nvme_remove_namespaces(ctrl);
1748
53029b04 1749 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
f3ca80fc
CH		 1750
1751 spin_lock(&dev_list_lock);
1752 list_del(&ctrl->node);
1753 spin_unlock(&dev_list_lock);
53029b04 1754}
576d55d6 1755EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
53029b04
KB		 1756
1757static void nvme_free_ctrl(struct kref *kref)
1758{
1759 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
f3ca80fc
CH		 1760
1761 put_device(ctrl->device);
1762 nvme_release_instance(ctrl);
075790eb 1763 ida_destroy(&ctrl->ns_ida);
f3ca80fc
CH		 1764
1765 ctrl->ops->free_ctrl(ctrl);
1766}
1767
1768void nvme_put_ctrl(struct nvme_ctrl *ctrl)
1769{
1770 kref_put(&ctrl->kref, nvme_free_ctrl);
1771}
576d55d6 1772EXPORT_SYMBOL_GPL(nvme_put_ctrl);
f3ca80fc
CH		 1773
1774/*
1775 * Initialize a NVMe controller structures. This needs to be called during
1776 * earliest initialization so that we have the initialized structured around
1777 * during probing.
1778 */
1779int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
1780 const struct nvme_ctrl_ops *ops, unsigned long quirks)
1781{
1782 int ret;
1783
bb8d261e
CH		 1784 ctrl->state = NVME_CTRL_NEW;
1785 spin_lock_init(&ctrl->lock);
f3ca80fc 1786 INIT_LIST_HEAD(&ctrl->namespaces);
69d3b8ac 1787 mutex_init(&ctrl->namespaces_mutex);
f3ca80fc
CH		 1788 kref_init(&ctrl->kref);
1789 ctrl->dev = dev;
1790 ctrl->ops = ops;
1791 ctrl->quirks = quirks;
5955be21 1792 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
f866fc42 1793 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
f3ca80fc
CH		 1794
1795 ret = nvme_set_instance(ctrl);
1796 if (ret)
1797 goto out;
1798
779ff756 1799 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
f3ca80fc 1800 MKDEV(nvme_char_major, ctrl->instance),
f4f0f63e 1801 ctrl, nvme_dev_attr_groups,
779ff756 1802 "nvme%d", ctrl->instance);
f3ca80fc
CH		 1803 if (IS_ERR(ctrl->device)) {
1804 ret = PTR_ERR(ctrl->device);
1805 goto out_release_instance;
1806 }
1807 get_device(ctrl->device);
075790eb 1808 ida_init(&ctrl->ns_ida);
f3ca80fc 1809
f3ca80fc
CH		 1810 spin_lock(&dev_list_lock);
1811 list_add_tail(&ctrl->node, &nvme_ctrl_list);
1812 spin_unlock(&dev_list_lock);
1813
1814 return 0;
f3ca80fc
CH		 1815out_release_instance:
1816 nvme_release_instance(ctrl);
1817out:
1818 return ret;
1819}
576d55d6 1820EXPORT_SYMBOL_GPL(nvme_init_ctrl);
f3ca80fc 1821
69d9a99c
KB		 1822/**
1823 * nvme_kill_queues(): Ends all namespace queues
1824 * @ctrl: the dead controller that needs to end
1825 *
1826 * Call this function when the driver determines it is unable to get the
1827 * controller in a state capable of servicing IO.
1828 */
1829void nvme_kill_queues(struct nvme_ctrl *ctrl)
1830{
1831 struct nvme_ns *ns;
1832
0bf77e9d
ML		 1833 rcu_read_lock();
1834 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
69d9a99c
KB		 1835 if (!kref_get_unless_zero(&ns->kref))
1836 continue;
1837
1838 /*
1839 * Revalidating a dead namespace sets capacity to 0. This will
1840 * end buffered writers dirtying pages that can't be synced.
1841 */
1842 if (!test_and_set_bit(NVME_NS_DEAD, &ns->flags))
1843 revalidate_disk(ns->disk);
1844
1845 blk_set_queue_dying(ns->queue);
1846 blk_mq_abort_requeue_list(ns->queue);
1847 blk_mq_start_stopped_hw_queues(ns->queue, true);
1848
1849 nvme_put_ns(ns);
1850 }
0bf77e9d 1851 rcu_read_unlock();
69d9a99c 1852}
237045fc 1853EXPORT_SYMBOL_GPL(nvme_kill_queues);
69d9a99c 1854
25646264 1855void nvme_stop_queues(struct nvme_ctrl *ctrl)
363c9aac
SG		 1856{
1857 struct nvme_ns *ns;
1858
0bf77e9d
ML		 1859 rcu_read_lock();
1860 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
363c9aac
SG		 1861 spin_lock_irq(ns->queue->queue_lock);
1862 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
1863 spin_unlock_irq(ns->queue->queue_lock);
1864
1865 blk_mq_cancel_requeue_work(ns->queue);
1866 blk_mq_stop_hw_queues(ns->queue);
1867 }
0bf77e9d 1868 rcu_read_unlock();
363c9aac 1869}
576d55d6 1870EXPORT_SYMBOL_GPL(nvme_stop_queues);
363c9aac 1871
25646264 1872void nvme_start_queues(struct nvme_ctrl *ctrl)
363c9aac
SG		 1873{
1874 struct nvme_ns *ns;
1875
0bf77e9d
ML		 1876 rcu_read_lock();
1877 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
363c9aac 1878 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
363c9aac
SG		 1879 blk_mq_start_stopped_hw_queues(ns->queue, true);
1880 blk_mq_kick_requeue_list(ns->queue);
1881 }
0bf77e9d 1882 rcu_read_unlock();
363c9aac 1883}
576d55d6 1884EXPORT_SYMBOL_GPL(nvme_start_queues);
363c9aac 1885
5bae7f73
CH		 1886int __init nvme_core_init(void)
1887{
1888 int result;
1889
1890 result = register_blkdev(nvme_major, "nvme");
1891 if (result < 0)
1892 return result;
1893 else if (result > 0)
1894 nvme_major = result;
1895
f3ca80fc
CH		 1896 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
1897 &nvme_dev_fops);
1898 if (result < 0)
1899 goto unregister_blkdev;
1900 else if (result > 0)
1901 nvme_char_major = result;
1902
1903 nvme_class = class_create(THIS_MODULE, "nvme");
1904 if (IS_ERR(nvme_class)) {
1905 result = PTR_ERR(nvme_class);
1906 goto unregister_chrdev;
1907 }
1908
5bae7f73 1909 return 0;
f3ca80fc
CH		 1910
1911 unregister_chrdev:
1912 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
1913 unregister_blkdev:
1914 unregister_blkdev(nvme_major, "nvme");
1915 return result;
5bae7f73
CH		 1916}
1917
1918void nvme_core_exit(void)
1919{
f3ca80fc
CH		 1920 class_destroy(nvme_class);
1921 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
23bd63ce 1922 unregister_blkdev(nvme_major, "nvme");
5bae7f73 1923}
576d55d6
ML		 1924
1925MODULE_LICENSE("GPL");
1926MODULE_VERSION("1.0");
1927module_init(nvme_core_init);
1928module_exit(nvme_core_exit);
Linux 6.x block layer and io_uring tree(s)