Merge tag 'linux-kselftest-5.2-rc2' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / drivers / nvdimm / region_devs.c
CommitLineData
1f7df6f8
DW
1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
eaf96153 13#include <linux/scatterlist.h>
047fc8a1 14#include <linux/highmem.h>
eaf96153 15#include <linux/sched.h>
1f7df6f8 16#include <linux/slab.h>
0c27af60 17#include <linux/hash.h>
eaf96153 18#include <linux/sort.h>
1f7df6f8 19#include <linux/io.h>
bf9bccc1 20#include <linux/nd.h>
1f7df6f8
DW
21#include "nd-core.h"
22#include "nd.h"
23
f284a4f2
DW
24/*
25 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
26 * irrelevant.
27 */
28#include <linux/io-64-nonatomic-hi-lo.h>
29
1f7df6f8 30static DEFINE_IDA(region_ida);
0c27af60 31static DEFINE_PER_CPU(int, flush_idx);
1f7df6f8 32
e5ae3b25
DW
33static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
34 struct nd_region_data *ndrd)
35{
36 int i, j;
37
38 dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
39 nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
595c7307 40 for (i = 0; i < (1 << ndrd->hints_shift); i++) {
e5ae3b25
DW
41 struct resource *res = &nvdimm->flush_wpq[i];
42 unsigned long pfn = PHYS_PFN(res->start);
43 void __iomem *flush_page;
44
45 /* check if flush hints share a page */
46 for (j = 0; j < i; j++) {
47 struct resource *res_j = &nvdimm->flush_wpq[j];
48 unsigned long pfn_j = PHYS_PFN(res_j->start);
49
50 if (pfn == pfn_j)
51 break;
52 }
53
54 if (j < i)
55 flush_page = (void __iomem *) ((unsigned long)
595c7307
DW
56 ndrd_get_flush_wpq(ndrd, dimm, j)
57 & PAGE_MASK);
e5ae3b25
DW
58 else
59 flush_page = devm_nvdimm_ioremap(dev,
480b6837 60 PFN_PHYS(pfn), PAGE_SIZE);
e5ae3b25
DW
61 if (!flush_page)
62 return -ENXIO;
595c7307
DW
63 ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
64 + (res->start & ~PAGE_MASK));
e5ae3b25
DW
65 }
66
67 return 0;
68}
69
70int nd_region_activate(struct nd_region *nd_region)
71{
db58028e 72 int i, j, num_flush = 0;
e5ae3b25
DW
73 struct nd_region_data *ndrd;
74 struct device *dev = &nd_region->dev;
75 size_t flush_data_size = sizeof(void *);
76
77 nvdimm_bus_lock(&nd_region->dev);
78 for (i = 0; i < nd_region->ndr_mappings; i++) {
79 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
80 struct nvdimm *nvdimm = nd_mapping->nvdimm;
81
7d988097
DJ
82 if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) {
83 nvdimm_bus_unlock(&nd_region->dev);
84 return -EBUSY;
85 }
86
e5ae3b25
DW
87 /* at least one null hint slot per-dimm for the "no-hint" case */
88 flush_data_size += sizeof(void *);
0c27af60 89 num_flush = min_not_zero(num_flush, nvdimm->num_flush);
e5ae3b25
DW
90 if (!nvdimm->num_flush)
91 continue;
92 flush_data_size += nvdimm->num_flush * sizeof(void *);
93 }
94 nvdimm_bus_unlock(&nd_region->dev);
95
96 ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
97 if (!ndrd)
98 return -ENOMEM;
99 dev_set_drvdata(dev, ndrd);
100
595c7307
DW
101 if (!num_flush)
102 return 0;
103
104 ndrd->hints_shift = ilog2(num_flush);
e5ae3b25
DW
105 for (i = 0; i < nd_region->ndr_mappings; i++) {
106 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
107 struct nvdimm *nvdimm = nd_mapping->nvdimm;
108 int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
109
110 if (rc)
111 return rc;
112 }
113
db58028e
DJ
114 /*
115 * Clear out entries that are duplicates. This should prevent the
116 * extra flushings.
117 */
118 for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
119 /* ignore if NULL already */
120 if (!ndrd_get_flush_wpq(ndrd, i, 0))
121 continue;
122
123 for (j = i + 1; j < nd_region->ndr_mappings; j++)
124 if (ndrd_get_flush_wpq(ndrd, i, 0) ==
125 ndrd_get_flush_wpq(ndrd, j, 0))
126 ndrd_set_flush_wpq(ndrd, j, 0, NULL);
127 }
128
e5ae3b25
DW
129 return 0;
130}
131
1f7df6f8
DW
132static void nd_region_release(struct device *dev)
133{
134 struct nd_region *nd_region = to_nd_region(dev);
135 u16 i;
136
137 for (i = 0; i < nd_region->ndr_mappings; i++) {
138 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
139 struct nvdimm *nvdimm = nd_mapping->nvdimm;
140
141 put_device(&nvdimm->dev);
142 }
5212e11f 143 free_percpu(nd_region->lane);
1f7df6f8 144 ida_simple_remove(&region_ida, nd_region->id);
047fc8a1
RZ
145 if (is_nd_blk(dev))
146 kfree(to_nd_blk_region(dev));
147 else
148 kfree(nd_region);
1f7df6f8
DW
149}
150
151static struct device_type nd_blk_device_type = {
152 .name = "nd_blk",
153 .release = nd_region_release,
154};
155
156static struct device_type nd_pmem_device_type = {
157 .name = "nd_pmem",
158 .release = nd_region_release,
159};
160
161static struct device_type nd_volatile_device_type = {
162 .name = "nd_volatile",
163 .release = nd_region_release,
164};
165
3d88002e 166bool is_nd_pmem(struct device *dev)
1f7df6f8
DW
167{
168 return dev ? dev->type == &nd_pmem_device_type : false;
169}
170
3d88002e
DW
171bool is_nd_blk(struct device *dev)
172{
173 return dev ? dev->type == &nd_blk_device_type : false;
174}
175
c9e582aa
DW
176bool is_nd_volatile(struct device *dev)
177{
178 return dev ? dev->type == &nd_volatile_device_type : false;
179}
180
1f7df6f8
DW
181struct nd_region *to_nd_region(struct device *dev)
182{
183 struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
184
185 WARN_ON(dev->type->release != nd_region_release);
186 return nd_region;
187}
188EXPORT_SYMBOL_GPL(to_nd_region);
189
243f29fe
DW
190struct device *nd_region_dev(struct nd_region *nd_region)
191{
192 if (!nd_region)
193 return NULL;
194 return &nd_region->dev;
195}
196EXPORT_SYMBOL_GPL(nd_region_dev);
197
047fc8a1
RZ
198struct nd_blk_region *to_nd_blk_region(struct device *dev)
199{
200 struct nd_region *nd_region = to_nd_region(dev);
201
202 WARN_ON(!is_nd_blk(dev));
203 return container_of(nd_region, struct nd_blk_region, nd_region);
204}
205EXPORT_SYMBOL_GPL(to_nd_blk_region);
206
207void *nd_region_provider_data(struct nd_region *nd_region)
208{
209 return nd_region->provider_data;
210}
211EXPORT_SYMBOL_GPL(nd_region_provider_data);
212
213void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
214{
215 return ndbr->blk_provider_data;
216}
217EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
218
219void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
220{
221 ndbr->blk_provider_data = data;
222}
223EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
224
3d88002e
DW
225/**
226 * nd_region_to_nstype() - region to an integer namespace type
227 * @nd_region: region-device to interrogate
228 *
229 * This is the 'nstype' attribute of a region as well, an input to the
230 * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
231 * namespace devices with namespace drivers.
232 */
233int nd_region_to_nstype(struct nd_region *nd_region)
234{
c9e582aa 235 if (is_memory(&nd_region->dev)) {
3d88002e
DW
236 u16 i, alias;
237
238 for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
239 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
240 struct nvdimm *nvdimm = nd_mapping->nvdimm;
241
8f078b38 242 if (test_bit(NDD_ALIASING, &nvdimm->flags))
3d88002e
DW
243 alias++;
244 }
245 if (alias)
246 return ND_DEVICE_NAMESPACE_PMEM;
247 else
248 return ND_DEVICE_NAMESPACE_IO;
249 } else if (is_nd_blk(&nd_region->dev)) {
250 return ND_DEVICE_NAMESPACE_BLK;
251 }
252
253 return 0;
254}
bf9bccc1
DW
255EXPORT_SYMBOL(nd_region_to_nstype);
256
1f7df6f8
DW
257static ssize_t size_show(struct device *dev,
258 struct device_attribute *attr, char *buf)
259{
260 struct nd_region *nd_region = to_nd_region(dev);
261 unsigned long long size = 0;
262
c9e582aa 263 if (is_memory(dev)) {
1f7df6f8
DW
264 size = nd_region->ndr_size;
265 } else if (nd_region->ndr_mappings == 1) {
266 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
267
268 size = nd_mapping->size;
269 }
270
271 return sprintf(buf, "%llu\n", size);
272}
273static DEVICE_ATTR_RO(size);
274
ab630891
DW
275static ssize_t deep_flush_show(struct device *dev,
276 struct device_attribute *attr, char *buf)
277{
278 struct nd_region *nd_region = to_nd_region(dev);
279
280 /*
281 * NOTE: in the nvdimm_has_flush() error case this attribute is
282 * not visible.
283 */
284 return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
285}
286
287static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
288 const char *buf, size_t len)
289{
290 bool flush;
291 int rc = strtobool(buf, &flush);
292 struct nd_region *nd_region = to_nd_region(dev);
293
294 if (rc)
295 return rc;
296 if (!flush)
297 return -EINVAL;
298 nvdimm_flush(nd_region);
299
300 return len;
301}
302static DEVICE_ATTR_RW(deep_flush);
303
1f7df6f8
DW
304static ssize_t mappings_show(struct device *dev,
305 struct device_attribute *attr, char *buf)
306{
307 struct nd_region *nd_region = to_nd_region(dev);
308
309 return sprintf(buf, "%d\n", nd_region->ndr_mappings);
310}
311static DEVICE_ATTR_RO(mappings);
312
3d88002e
DW
313static ssize_t nstype_show(struct device *dev,
314 struct device_attribute *attr, char *buf)
315{
316 struct nd_region *nd_region = to_nd_region(dev);
317
318 return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
319}
320static DEVICE_ATTR_RO(nstype);
321
eaf96153
DW
322static ssize_t set_cookie_show(struct device *dev,
323 struct device_attribute *attr, char *buf)
324{
325 struct nd_region *nd_region = to_nd_region(dev);
326 struct nd_interleave_set *nd_set = nd_region->nd_set;
c12c48ce 327 ssize_t rc = 0;
eaf96153 328
c9e582aa 329 if (is_memory(dev) && nd_set)
eaf96153
DW
330 /* pass, should be precluded by region_visible */;
331 else
332 return -ENXIO;
333
c12c48ce
DW
334 /*
335 * The cookie to show depends on which specification of the
336 * labels we are using. If there are not labels then default to
337 * the v1.1 namespace label cookie definition. To read all this
338 * data we need to wait for probing to settle.
339 */
340 device_lock(dev);
341 nvdimm_bus_lock(dev);
342 wait_nvdimm_bus_probe_idle(dev);
343 if (nd_region->ndr_mappings) {
344 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
345 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
346
347 if (ndd) {
348 struct nd_namespace_index *nsindex;
349
350 nsindex = to_namespace_index(ndd, ndd->ns_current);
351 rc = sprintf(buf, "%#llx\n",
352 nd_region_interleave_set_cookie(nd_region,
353 nsindex));
354 }
355 }
356 nvdimm_bus_unlock(dev);
357 device_unlock(dev);
358
359 if (rc)
360 return rc;
361 return sprintf(buf, "%#llx\n", nd_set->cookie1);
eaf96153
DW
362}
363static DEVICE_ATTR_RO(set_cookie);
364
bf9bccc1
DW
365resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
366{
367 resource_size_t blk_max_overlap = 0, available, overlap;
368 int i;
369
370 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
371
372 retry:
373 available = 0;
374 overlap = blk_max_overlap;
375 for (i = 0; i < nd_region->ndr_mappings; i++) {
376 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
377 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
378
379 /* if a dimm is disabled the available capacity is zero */
380 if (!ndd)
381 return 0;
382
c9e582aa 383 if (is_memory(&nd_region->dev)) {
bf9bccc1
DW
384 available += nd_pmem_available_dpa(nd_region,
385 nd_mapping, &overlap);
386 if (overlap > blk_max_overlap) {
387 blk_max_overlap = overlap;
388 goto retry;
389 }
a1f3e4d6
DW
390 } else if (is_nd_blk(&nd_region->dev))
391 available += nd_blk_available_dpa(nd_region);
bf9bccc1
DW
392 }
393
394 return available;
395}
396
12e3129e
KB
397resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region)
398{
399 resource_size_t available = 0;
400 int i;
401
402 if (is_memory(&nd_region->dev))
403 available = PHYS_ADDR_MAX;
404
405 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
406 for (i = 0; i < nd_region->ndr_mappings; i++) {
407 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
408
409 if (is_memory(&nd_region->dev))
410 available = min(available,
411 nd_pmem_max_contiguous_dpa(nd_region,
412 nd_mapping));
413 else if (is_nd_blk(&nd_region->dev))
414 available += nd_blk_available_dpa(nd_region);
415 }
416 if (is_memory(&nd_region->dev))
417 return available * nd_region->ndr_mappings;
418 return available;
419}
420
bf9bccc1
DW
421static ssize_t available_size_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
423{
424 struct nd_region *nd_region = to_nd_region(dev);
425 unsigned long long available = 0;
426
427 /*
428 * Flush in-flight updates and grab a snapshot of the available
429 * size. Of course, this value is potentially invalidated the
430 * memory nvdimm_bus_lock() is dropped, but that's userspace's
431 * problem to not race itself.
432 */
433 nvdimm_bus_lock(dev);
434 wait_nvdimm_bus_probe_idle(dev);
435 available = nd_region_available_dpa(nd_region);
436 nvdimm_bus_unlock(dev);
437
438 return sprintf(buf, "%llu\n", available);
439}
440static DEVICE_ATTR_RO(available_size);
441
1e687220
KB
442static ssize_t max_available_extent_show(struct device *dev,
443 struct device_attribute *attr, char *buf)
444{
445 struct nd_region *nd_region = to_nd_region(dev);
446 unsigned long long available = 0;
447
448 nvdimm_bus_lock(dev);
449 wait_nvdimm_bus_probe_idle(dev);
450 available = nd_region_allocatable_dpa(nd_region);
451 nvdimm_bus_unlock(dev);
452
453 return sprintf(buf, "%llu\n", available);
454}
455static DEVICE_ATTR_RO(max_available_extent);
456
3d88002e
DW
457static ssize_t init_namespaces_show(struct device *dev,
458 struct device_attribute *attr, char *buf)
459{
e5ae3b25 460 struct nd_region_data *ndrd = dev_get_drvdata(dev);
3d88002e
DW
461 ssize_t rc;
462
463 nvdimm_bus_lock(dev);
e5ae3b25
DW
464 if (ndrd)
465 rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
3d88002e
DW
466 else
467 rc = -ENXIO;
468 nvdimm_bus_unlock(dev);
469
470 return rc;
471}
472static DEVICE_ATTR_RO(init_namespaces);
473
bf9bccc1
DW
474static ssize_t namespace_seed_show(struct device *dev,
475 struct device_attribute *attr, char *buf)
476{
477 struct nd_region *nd_region = to_nd_region(dev);
478 ssize_t rc;
479
480 nvdimm_bus_lock(dev);
481 if (nd_region->ns_seed)
482 rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
483 else
484 rc = sprintf(buf, "\n");
485 nvdimm_bus_unlock(dev);
486 return rc;
487}
488static DEVICE_ATTR_RO(namespace_seed);
489
8c2f7e86
DW
490static ssize_t btt_seed_show(struct device *dev,
491 struct device_attribute *attr, char *buf)
492{
493 struct nd_region *nd_region = to_nd_region(dev);
494 ssize_t rc;
495
496 nvdimm_bus_lock(dev);
497 if (nd_region->btt_seed)
498 rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
499 else
500 rc = sprintf(buf, "\n");
501 nvdimm_bus_unlock(dev);
502
503 return rc;
504}
505static DEVICE_ATTR_RO(btt_seed);
506
e1455744
DW
507static ssize_t pfn_seed_show(struct device *dev,
508 struct device_attribute *attr, char *buf)
509{
510 struct nd_region *nd_region = to_nd_region(dev);
511 ssize_t rc;
512
513 nvdimm_bus_lock(dev);
514 if (nd_region->pfn_seed)
515 rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
516 else
517 rc = sprintf(buf, "\n");
518 nvdimm_bus_unlock(dev);
519
520 return rc;
521}
522static DEVICE_ATTR_RO(pfn_seed);
523
cd03412a
DW
524static ssize_t dax_seed_show(struct device *dev,
525 struct device_attribute *attr, char *buf)
526{
527 struct nd_region *nd_region = to_nd_region(dev);
528 ssize_t rc;
529
530 nvdimm_bus_lock(dev);
531 if (nd_region->dax_seed)
532 rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
533 else
534 rc = sprintf(buf, "\n");
535 nvdimm_bus_unlock(dev);
536
537 return rc;
538}
539static DEVICE_ATTR_RO(dax_seed);
540
58138820
DW
541static ssize_t read_only_show(struct device *dev,
542 struct device_attribute *attr, char *buf)
543{
544 struct nd_region *nd_region = to_nd_region(dev);
545
546 return sprintf(buf, "%d\n", nd_region->ro);
547}
548
549static ssize_t read_only_store(struct device *dev,
550 struct device_attribute *attr, const char *buf, size_t len)
551{
552 bool ro;
553 int rc = strtobool(buf, &ro);
554 struct nd_region *nd_region = to_nd_region(dev);
555
556 if (rc)
557 return rc;
558
559 nd_region->ro = ro;
560 return len;
561}
562static DEVICE_ATTR_RW(read_only);
563
23f49844 564static ssize_t region_badblocks_show(struct device *dev,
6a6bef90
DJ
565 struct device_attribute *attr, char *buf)
566{
567 struct nd_region *nd_region = to_nd_region(dev);
5d394eee 568 ssize_t rc;
6a6bef90 569
5d394eee
DW
570 device_lock(dev);
571 if (dev->driver)
572 rc = badblocks_show(&nd_region->bb, buf, 0);
573 else
574 rc = -ENXIO;
575 device_unlock(dev);
23f49844 576
5d394eee
DW
577 return rc;
578}
23f49844 579static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
6a6bef90 580
802f4be6
DJ
581static ssize_t resource_show(struct device *dev,
582 struct device_attribute *attr, char *buf)
583{
584 struct nd_region *nd_region = to_nd_region(dev);
585
586 return sprintf(buf, "%#llx\n", nd_region->ndr_start);
587}
588static DEVICE_ATTR_RO(resource);
589
96c3a239
DJ
590static ssize_t persistence_domain_show(struct device *dev,
591 struct device_attribute *attr, char *buf)
592{
593 struct nd_region *nd_region = to_nd_region(dev);
96c3a239 594
fe9a552e
DW
595 if (test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags))
596 return sprintf(buf, "cpu_cache\n");
597 else if (test_bit(ND_REGION_PERSIST_MEMCTRL, &nd_region->flags))
598 return sprintf(buf, "memory_controller\n");
599 else
600 return sprintf(buf, "\n");
96c3a239
DJ
601}
602static DEVICE_ATTR_RO(persistence_domain);
603
1f7df6f8
DW
604static struct attribute *nd_region_attributes[] = {
605 &dev_attr_size.attr,
3d88002e 606 &dev_attr_nstype.attr,
1f7df6f8 607 &dev_attr_mappings.attr,
8c2f7e86 608 &dev_attr_btt_seed.attr,
e1455744 609 &dev_attr_pfn_seed.attr,
cd03412a 610 &dev_attr_dax_seed.attr,
ab630891 611 &dev_attr_deep_flush.attr,
58138820 612 &dev_attr_read_only.attr,
eaf96153 613 &dev_attr_set_cookie.attr,
bf9bccc1 614 &dev_attr_available_size.attr,
1e687220 615 &dev_attr_max_available_extent.attr,
bf9bccc1 616 &dev_attr_namespace_seed.attr,
3d88002e 617 &dev_attr_init_namespaces.attr,
23f49844 618 &dev_attr_badblocks.attr,
802f4be6 619 &dev_attr_resource.attr,
96c3a239 620 &dev_attr_persistence_domain.attr,
1f7df6f8
DW
621 NULL,
622};
623
eaf96153
DW
624static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
625{
626 struct device *dev = container_of(kobj, typeof(*dev), kobj);
627 struct nd_region *nd_region = to_nd_region(dev);
628 struct nd_interleave_set *nd_set = nd_region->nd_set;
bf9bccc1 629 int type = nd_region_to_nstype(nd_region);
eaf96153 630
c9e582aa 631 if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
6bb691ac
DK
632 return 0;
633
c9e582aa 634 if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
cd03412a
DW
635 return 0;
636
23f49844 637 if (!is_nd_pmem(dev) && a == &dev_attr_badblocks.attr)
6a6bef90
DJ
638 return 0;
639
b8ff981f
DW
640 if (a == &dev_attr_resource.attr) {
641 if (is_nd_pmem(dev))
642 return 0400;
643 else
644 return 0;
645 }
802f4be6 646
ab630891
DW
647 if (a == &dev_attr_deep_flush.attr) {
648 int has_flush = nvdimm_has_flush(nd_region);
649
650 if (has_flush == 1)
651 return a->mode;
652 else if (has_flush == 0)
653 return 0444;
654 else
655 return 0;
656 }
657
896196dc
DW
658 if (a == &dev_attr_persistence_domain.attr) {
659 if ((nd_region->flags & (BIT(ND_REGION_PERSIST_CACHE)
660 | BIT(ND_REGION_PERSIST_MEMCTRL))) == 0)
661 return 0;
662 return a->mode;
663 }
664
bf9bccc1
DW
665 if (a != &dev_attr_set_cookie.attr
666 && a != &dev_attr_available_size.attr)
eaf96153
DW
667 return a->mode;
668
bf9bccc1
DW
669 if ((type == ND_DEVICE_NAMESPACE_PMEM
670 || type == ND_DEVICE_NAMESPACE_BLK)
671 && a == &dev_attr_available_size.attr)
672 return a->mode;
c9e582aa 673 else if (is_memory(dev) && nd_set)
bf9bccc1 674 return a->mode;
eaf96153
DW
675
676 return 0;
677}
678
1f7df6f8
DW
679struct attribute_group nd_region_attribute_group = {
680 .attrs = nd_region_attributes,
eaf96153 681 .is_visible = region_visible,
1f7df6f8
DW
682};
683EXPORT_SYMBOL_GPL(nd_region_attribute_group);
684
c12c48ce
DW
685u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
686 struct nd_namespace_index *nsindex)
bf9bccc1
DW
687{
688 struct nd_interleave_set *nd_set = nd_region->nd_set;
689
c12c48ce
DW
690 if (!nd_set)
691 return 0;
692
693 if (nsindex && __le16_to_cpu(nsindex->major) == 1
694 && __le16_to_cpu(nsindex->minor) == 1)
695 return nd_set->cookie1;
696 return nd_set->cookie2;
bf9bccc1
DW
697}
698
86ef58a4
DW
699u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
700{
701 struct nd_interleave_set *nd_set = nd_region->nd_set;
702
703 if (nd_set)
704 return nd_set->altcookie;
705 return 0;
706}
707
ae8219f1
DW
708void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
709{
710 struct nd_label_ent *label_ent, *e;
711
9cf8bd52 712 lockdep_assert_held(&nd_mapping->lock);
ae8219f1
DW
713 list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
714 list_del(&label_ent->list);
715 kfree(label_ent);
716 }
717}
718
eaf96153
DW
719/*
720 * Upon successful probe/remove, take/release a reference on the
8c2f7e86 721 * associated interleave set (if present), and plant new btt + namespace
047fc8a1
RZ
722 * seeds. Also, on the removal of a BLK region, notify the provider to
723 * disable the region.
eaf96153
DW
724 */
725static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
726 struct device *dev, bool probe)
727{
8c2f7e86
DW
728 struct nd_region *nd_region;
729
c9e582aa 730 if (!probe && is_nd_region(dev)) {
eaf96153
DW
731 int i;
732
8c2f7e86 733 nd_region = to_nd_region(dev);
eaf96153
DW
734 for (i = 0; i < nd_region->ndr_mappings; i++) {
735 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
bf9bccc1 736 struct nvdimm_drvdata *ndd = nd_mapping->ndd;
eaf96153
DW
737 struct nvdimm *nvdimm = nd_mapping->nvdimm;
738
ae8219f1
DW
739 mutex_lock(&nd_mapping->lock);
740 nd_mapping_free_labels(nd_mapping);
741 mutex_unlock(&nd_mapping->lock);
742
bf9bccc1
DW
743 put_ndd(ndd);
744 nd_mapping->ndd = NULL;
047fc8a1
RZ
745 if (ndd)
746 atomic_dec(&nvdimm->busy);
eaf96153 747 }
8c2f7e86 748 }
c9e582aa 749 if (dev->parent && is_nd_region(dev->parent) && probe) {
8c2f7e86 750 nd_region = to_nd_region(dev->parent);
1b40e09a
DW
751 nvdimm_bus_lock(dev);
752 if (nd_region->ns_seed == dev)
98a29c39 753 nd_region_create_ns_seed(nd_region);
1b40e09a 754 nvdimm_bus_unlock(dev);
eaf96153 755 }
8c2f7e86 756 if (is_nd_btt(dev) && probe) {
8ca24353
DW
757 struct nd_btt *nd_btt = to_nd_btt(dev);
758
8c2f7e86
DW
759 nd_region = to_nd_region(dev->parent);
760 nvdimm_bus_lock(dev);
761 if (nd_region->btt_seed == dev)
762 nd_region_create_btt_seed(nd_region);
98a29c39
DW
763 if (nd_region->ns_seed == &nd_btt->ndns->dev)
764 nd_region_create_ns_seed(nd_region);
8c2f7e86
DW
765 nvdimm_bus_unlock(dev);
766 }
2dc43331 767 if (is_nd_pfn(dev) && probe) {
98a29c39
DW
768 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
769
2dc43331
DW
770 nd_region = to_nd_region(dev->parent);
771 nvdimm_bus_lock(dev);
772 if (nd_region->pfn_seed == dev)
773 nd_region_create_pfn_seed(nd_region);
98a29c39
DW
774 if (nd_region->ns_seed == &nd_pfn->ndns->dev)
775 nd_region_create_ns_seed(nd_region);
2dc43331
DW
776 nvdimm_bus_unlock(dev);
777 }
cd03412a 778 if (is_nd_dax(dev) && probe) {
98a29c39
DW
779 struct nd_dax *nd_dax = to_nd_dax(dev);
780
cd03412a
DW
781 nd_region = to_nd_region(dev->parent);
782 nvdimm_bus_lock(dev);
783 if (nd_region->dax_seed == dev)
784 nd_region_create_dax_seed(nd_region);
98a29c39
DW
785 if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
786 nd_region_create_ns_seed(nd_region);
cd03412a
DW
787 nvdimm_bus_unlock(dev);
788 }
eaf96153
DW
789}
790
791void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
792{
793 nd_region_notify_driver_action(nvdimm_bus, dev, true);
794}
795
796void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
797{
798 nd_region_notify_driver_action(nvdimm_bus, dev, false);
799}
800
1f7df6f8
DW
801static ssize_t mappingN(struct device *dev, char *buf, int n)
802{
803 struct nd_region *nd_region = to_nd_region(dev);
804 struct nd_mapping *nd_mapping;
805 struct nvdimm *nvdimm;
806
807 if (n >= nd_region->ndr_mappings)
808 return -ENXIO;
809 nd_mapping = &nd_region->mapping[n];
810 nvdimm = nd_mapping->nvdimm;
811
401c0a19
DW
812 return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
813 nd_mapping->start, nd_mapping->size,
814 nd_mapping->position);
1f7df6f8
DW
815}
816
817#define REGION_MAPPING(idx) \
818static ssize_t mapping##idx##_show(struct device *dev, \
819 struct device_attribute *attr, char *buf) \
820{ \
821 return mappingN(dev, buf, idx); \
822} \
823static DEVICE_ATTR_RO(mapping##idx)
824
825/*
826 * 32 should be enough for a while, even in the presence of socket
827 * interleave a 32-way interleave set is a degenerate case.
828 */
829REGION_MAPPING(0);
830REGION_MAPPING(1);
831REGION_MAPPING(2);
832REGION_MAPPING(3);
833REGION_MAPPING(4);
834REGION_MAPPING(5);
835REGION_MAPPING(6);
836REGION_MAPPING(7);
837REGION_MAPPING(8);
838REGION_MAPPING(9);
839REGION_MAPPING(10);
840REGION_MAPPING(11);
841REGION_MAPPING(12);
842REGION_MAPPING(13);
843REGION_MAPPING(14);
844REGION_MAPPING(15);
845REGION_MAPPING(16);
846REGION_MAPPING(17);
847REGION_MAPPING(18);
848REGION_MAPPING(19);
849REGION_MAPPING(20);
850REGION_MAPPING(21);
851REGION_MAPPING(22);
852REGION_MAPPING(23);
853REGION_MAPPING(24);
854REGION_MAPPING(25);
855REGION_MAPPING(26);
856REGION_MAPPING(27);
857REGION_MAPPING(28);
858REGION_MAPPING(29);
859REGION_MAPPING(30);
860REGION_MAPPING(31);
861
862static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
863{
864 struct device *dev = container_of(kobj, struct device, kobj);
865 struct nd_region *nd_region = to_nd_region(dev);
866
867 if (n < nd_region->ndr_mappings)
868 return a->mode;
869 return 0;
870}
871
872static struct attribute *mapping_attributes[] = {
873 &dev_attr_mapping0.attr,
874 &dev_attr_mapping1.attr,
875 &dev_attr_mapping2.attr,
876 &dev_attr_mapping3.attr,
877 &dev_attr_mapping4.attr,
878 &dev_attr_mapping5.attr,
879 &dev_attr_mapping6.attr,
880 &dev_attr_mapping7.attr,
881 &dev_attr_mapping8.attr,
882 &dev_attr_mapping9.attr,
883 &dev_attr_mapping10.attr,
884 &dev_attr_mapping11.attr,
885 &dev_attr_mapping12.attr,
886 &dev_attr_mapping13.attr,
887 &dev_attr_mapping14.attr,
888 &dev_attr_mapping15.attr,
889 &dev_attr_mapping16.attr,
890 &dev_attr_mapping17.attr,
891 &dev_attr_mapping18.attr,
892 &dev_attr_mapping19.attr,
893 &dev_attr_mapping20.attr,
894 &dev_attr_mapping21.attr,
895 &dev_attr_mapping22.attr,
896 &dev_attr_mapping23.attr,
897 &dev_attr_mapping24.attr,
898 &dev_attr_mapping25.attr,
899 &dev_attr_mapping26.attr,
900 &dev_attr_mapping27.attr,
901 &dev_attr_mapping28.attr,
902 &dev_attr_mapping29.attr,
903 &dev_attr_mapping30.attr,
904 &dev_attr_mapping31.attr,
905 NULL,
906};
907
908struct attribute_group nd_mapping_attribute_group = {
909 .is_visible = mapping_visible,
910 .attrs = mapping_attributes,
911};
912EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
913
047fc8a1 914int nd_blk_region_init(struct nd_region *nd_region)
1f7df6f8 915{
047fc8a1
RZ
916 struct device *dev = &nd_region->dev;
917 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
918
919 if (!is_nd_blk(dev))
920 return 0;
921
922 if (nd_region->ndr_mappings < 1) {
d5d51fec 923 dev_dbg(dev, "invalid BLK region\n");
047fc8a1
RZ
924 return -ENXIO;
925 }
926
927 return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
1f7df6f8 928}
1f7df6f8 929
5212e11f
VV
930/**
931 * nd_region_acquire_lane - allocate and lock a lane
932 * @nd_region: region id and number of lanes possible
933 *
934 * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
935 * We optimize for the common case where there are 256 lanes, one
936 * per-cpu. For larger systems we need to lock to share lanes. For now
937 * this implementation assumes the cost of maintaining an allocator for
938 * free lanes is on the order of the lock hold time, so it implements a
939 * static lane = cpu % num_lanes mapping.
940 *
941 * In the case of a BTT instance on top of a BLK namespace a lane may be
942 * acquired recursively. We lock on the first instance.
943 *
944 * In the case of a BTT instance on top of PMEM, we only acquire a lane
945 * for the BTT metadata updates.
946 */
947unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
948{
949 unsigned int cpu, lane;
950
951 cpu = get_cpu();
952 if (nd_region->num_lanes < nr_cpu_ids) {
953 struct nd_percpu_lane *ndl_lock, *ndl_count;
954
955 lane = cpu % nd_region->num_lanes;
956 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
957 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
958 if (ndl_count->count++ == 0)
959 spin_lock(&ndl_lock->lock);
960 } else
961 lane = cpu;
962
963 return lane;
964}
965EXPORT_SYMBOL(nd_region_acquire_lane);
966
967void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
968{
969 if (nd_region->num_lanes < nr_cpu_ids) {
970 unsigned int cpu = get_cpu();
971 struct nd_percpu_lane *ndl_lock, *ndl_count;
972
973 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
974 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
975 if (--ndl_count->count == 0)
976 spin_unlock(&ndl_lock->lock);
977 put_cpu();
978 }
979 put_cpu();
980}
981EXPORT_SYMBOL(nd_region_release_lane);
982
1f7df6f8
DW
983static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
984 struct nd_region_desc *ndr_desc, struct device_type *dev_type,
985 const char *caller)
986{
987 struct nd_region *nd_region;
988 struct device *dev;
047fc8a1 989 void *region_buf;
5212e11f 990 unsigned int i;
58138820 991 int ro = 0;
1f7df6f8
DW
992
993 for (i = 0; i < ndr_desc->num_mappings; i++) {
44c462eb
DW
994 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
995 struct nvdimm *nvdimm = mapping->nvdimm;
1f7df6f8 996
44c462eb 997 if ((mapping->start | mapping->size) % SZ_4K) {
1f7df6f8
DW
998 dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
999 caller, dev_name(&nvdimm->dev), i);
1000
1001 return NULL;
1002 }
58138820 1003
8f078b38 1004 if (test_bit(NDD_UNARMED, &nvdimm->flags))
58138820 1005 ro = 1;
d5d30d5a
DW
1006
1007 if (test_bit(NDD_NOBLK, &nvdimm->flags)
1008 && dev_type == &nd_blk_device_type) {
1009 dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not BLK capable\n",
1010 caller, dev_name(&nvdimm->dev), i);
1011 return NULL;
1012 }
1f7df6f8
DW
1013 }
1014
047fc8a1
RZ
1015 if (dev_type == &nd_blk_device_type) {
1016 struct nd_blk_region_desc *ndbr_desc;
1017 struct nd_blk_region *ndbr;
1018
1019 ndbr_desc = to_blk_region_desc(ndr_desc);
1020 ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
1021 * ndr_desc->num_mappings,
1022 GFP_KERNEL);
1023 if (ndbr) {
1024 nd_region = &ndbr->nd_region;
1025 ndbr->enable = ndbr_desc->enable;
047fc8a1
RZ
1026 ndbr->do_io = ndbr_desc->do_io;
1027 }
1028 region_buf = ndbr;
1029 } else {
1030 nd_region = kzalloc(sizeof(struct nd_region)
1031 + sizeof(struct nd_mapping)
1032 * ndr_desc->num_mappings,
1033 GFP_KERNEL);
1034 region_buf = nd_region;
1035 }
1036
1037 if (!region_buf)
1f7df6f8
DW
1038 return NULL;
1039 nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
5212e11f
VV
1040 if (nd_region->id < 0)
1041 goto err_id;
1042
1043 nd_region->lane = alloc_percpu(struct nd_percpu_lane);
1044 if (!nd_region->lane)
1045 goto err_percpu;
1046
1047 for (i = 0; i < nr_cpu_ids; i++) {
1048 struct nd_percpu_lane *ndl;
1049
1050 ndl = per_cpu_ptr(nd_region->lane, i);
1051 spin_lock_init(&ndl->lock);
1052 ndl->count = 0;
1f7df6f8
DW
1053 }
1054
1f7df6f8 1055 for (i = 0; i < ndr_desc->num_mappings; i++) {
44c462eb
DW
1056 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
1057 struct nvdimm *nvdimm = mapping->nvdimm;
1058
1059 nd_region->mapping[i].nvdimm = nvdimm;
1060 nd_region->mapping[i].start = mapping->start;
1061 nd_region->mapping[i].size = mapping->size;
401c0a19 1062 nd_region->mapping[i].position = mapping->position;
ae8219f1
DW
1063 INIT_LIST_HEAD(&nd_region->mapping[i].labels);
1064 mutex_init(&nd_region->mapping[i].lock);
1f7df6f8
DW
1065
1066 get_device(&nvdimm->dev);
1067 }
1068 nd_region->ndr_mappings = ndr_desc->num_mappings;
1069 nd_region->provider_data = ndr_desc->provider_data;
eaf96153 1070 nd_region->nd_set = ndr_desc->nd_set;
5212e11f 1071 nd_region->num_lanes = ndr_desc->num_lanes;
004f1afb 1072 nd_region->flags = ndr_desc->flags;
58138820 1073 nd_region->ro = ro;
41d7a6d6 1074 nd_region->numa_node = ndr_desc->numa_node;
8fc5c735 1075 nd_region->target_node = ndr_desc->target_node;
1b40e09a 1076 ida_init(&nd_region->ns_ida);
8c2f7e86 1077 ida_init(&nd_region->btt_ida);
e1455744 1078 ida_init(&nd_region->pfn_ida);
cd03412a 1079 ida_init(&nd_region->dax_ida);
1f7df6f8
DW
1080 dev = &nd_region->dev;
1081 dev_set_name(dev, "region%d", nd_region->id);
1082 dev->parent = &nvdimm_bus->dev;
1083 dev->type = dev_type;
1084 dev->groups = ndr_desc->attr_groups;
1ff19f48 1085 dev->of_node = ndr_desc->of_node;
1f7df6f8
DW
1086 nd_region->ndr_size = resource_size(ndr_desc->res);
1087 nd_region->ndr_start = ndr_desc->res->start;
1088 nd_device_register(dev);
1089
1090 return nd_region;
5212e11f
VV
1091
1092 err_percpu:
1093 ida_simple_remove(&region_ida, nd_region->id);
1094 err_id:
047fc8a1 1095 kfree(region_buf);
5212e11f 1096 return NULL;
1f7df6f8
DW
1097}
1098
1099struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
1100 struct nd_region_desc *ndr_desc)
1101{
5212e11f 1102 ndr_desc->num_lanes = ND_MAX_LANES;
1f7df6f8
DW
1103 return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
1104 __func__);
1105}
1106EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
1107
1108struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
1109 struct nd_region_desc *ndr_desc)
1110{
1111 if (ndr_desc->num_mappings > 1)
1112 return NULL;
5212e11f 1113 ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
1f7df6f8
DW
1114 return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
1115 __func__);
1116}
1117EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
1118
1119struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
1120 struct nd_region_desc *ndr_desc)
1121{
5212e11f 1122 ndr_desc->num_lanes = ND_MAX_LANES;
1f7df6f8
DW
1123 return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
1124 __func__);
1125}
1126EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
b354aba0 1127
f284a4f2
DW
1128/**
1129 * nvdimm_flush - flush any posted write queues between the cpu and pmem media
1130 * @nd_region: blk or interleaved pmem region
1131 */
1132void nvdimm_flush(struct nd_region *nd_region)
1133{
1134 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
0c27af60
DW
1135 int i, idx;
1136
1137 /*
1138 * Try to encourage some diversity in flush hint addresses
1139 * across cpus assuming a limited number of flush hints.
1140 */
1141 idx = this_cpu_read(flush_idx);
1142 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
f284a4f2
DW
1143
1144 /*
1145 * The first wmb() is needed to 'sfence' all previous writes
1146 * such that they are architecturally visible for the platform
1147 * buffer flush. Note that we've already arranged for pmem
0aed55af
DW
1148 * writes to avoid the cache via memcpy_flushcache(). The final
1149 * wmb() ensures ordering for the NVDIMM flush write.
f284a4f2
DW
1150 */
1151 wmb();
1152 for (i = 0; i < nd_region->ndr_mappings; i++)
595c7307
DW
1153 if (ndrd_get_flush_wpq(ndrd, i, 0))
1154 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
f284a4f2
DW
1155 wmb();
1156}
1157EXPORT_SYMBOL_GPL(nvdimm_flush);
1158
1159/**
1160 * nvdimm_has_flush - determine write flushing requirements
1161 * @nd_region: blk or interleaved pmem region
1162 *
1163 * Returns 1 if writes require flushing
1164 * Returns 0 if writes do not require flushing
1165 * Returns -ENXIO if flushing capability can not be determined
1166 */
1167int nvdimm_has_flush(struct nd_region *nd_region)
1168{
f284a4f2
DW
1169 int i;
1170
c00b396e
DW
1171 /* no nvdimm or pmem api == flushing capability unknown */
1172 if (nd_region->ndr_mappings == 0
1173 || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
f284a4f2
DW
1174 return -ENXIO;
1175
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1176 for (i = 0; i < nd_region->ndr_mappings; i++) {
1177 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
1178 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1179
1180 /* flush hints present / available */
1181 if (nvdimm->num_flush)
f284a4f2 1182 return 1;
bc042fdf 1183 }
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1184
1185 /*
1186 * The platform defines dimm devices without hints, assume
1187 * platform persistence mechanism like ADR
1188 */
1189 return 0;
1190}
1191EXPORT_SYMBOL_GPL(nvdimm_has_flush);
1192
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1193int nvdimm_has_cache(struct nd_region *nd_region)
1194{
546eb031
RZ
1195 return is_nd_pmem(&nd_region->dev) &&
1196 !test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags);
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1197}
1198EXPORT_SYMBOL_GPL(nvdimm_has_cache);
1199
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1200struct conflict_context {
1201 struct nd_region *nd_region;
1202 resource_size_t start, size;
1203};
1204
1205static int region_conflict(struct device *dev, void *data)
1206{
1207 struct nd_region *nd_region;
1208 struct conflict_context *ctx = data;
1209 resource_size_t res_end, region_end, region_start;
1210
1211 if (!is_memory(dev))
1212 return 0;
1213
1214 nd_region = to_nd_region(dev);
1215 if (nd_region == ctx->nd_region)
1216 return 0;
1217
1218 res_end = ctx->start + ctx->size;
1219 region_start = nd_region->ndr_start;
1220 region_end = region_start + nd_region->ndr_size;
1221 if (ctx->start >= region_start && ctx->start < region_end)
1222 return -EBUSY;
1223 if (res_end > region_start && res_end <= region_end)
1224 return -EBUSY;
1225 return 0;
1226}
1227
1228int nd_region_conflict(struct nd_region *nd_region, resource_size_t start,
1229 resource_size_t size)
1230{
1231 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev);
1232 struct conflict_context ctx = {
1233 .nd_region = nd_region,
1234 .start = start,
1235 .size = size,
1236 };
1237
1238 return device_for_each_child(&nvdimm_bus->dev, &ctx, region_conflict);
1239}
1240
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1241void __exit nd_region_devs_exit(void)
1242{
1243 ida_destroy(&region_ida);
1244}