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2025cf9e | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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2 | /* |
3 | * Copyright (c) 2014-2015, Intel Corporation. | |
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4 | */ |
5 | ||
6 | #ifndef __NVDIMM_PFN_H | |
7 | #define __NVDIMM_PFN_H | |
8 | ||
9 | #include <linux/types.h> | |
d9cbe09d | 10 | #include <linux/mmzone.h> |
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11 | |
12 | #define PFN_SIG_LEN 16 | |
13 | #define PFN_SIG "NVDIMM_PFN_INFO\0" | |
c5ed9268 | 14 | #define DAX_SIG "NVDIMM_DAX_INFO\0" |
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15 | |
16 | struct nd_pfn_sb { | |
17 | u8 signature[PFN_SIG_LEN]; | |
18 | u8 uuid[16]; | |
19 | u8 parent_uuid[16]; | |
20 | __le32 flags; | |
21 | __le16 version_major; | |
22 | __le16 version_minor; | |
cfe30b87 | 23 | __le64 dataoff; /* relative to namespace_base + start_pad */ |
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24 | __le64 npfns; |
25 | __le32 mode; | |
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26 | /* minor-version-1 additions for section alignment */ |
27 | __le32 start_pad; | |
28 | __le32 end_trunc; | |
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29 | /* minor-version-2 record the base alignment of the mapping */ |
30 | __le32 align; | |
31 | u8 padding[4000]; | |
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32 | __le64 checksum; |
33 | }; | |
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34 | |
35 | #ifdef CONFIG_SPARSEMEM | |
36 | #define PFN_SECTION_ALIGN_DOWN(x) SECTION_ALIGN_DOWN(x) | |
37 | #define PFN_SECTION_ALIGN_UP(x) SECTION_ALIGN_UP(x) | |
38 | #else | |
39 | /* | |
40 | * In this case ZONE_DEVICE=n and we will disable 'pfn' device support, | |
41 | * but we still want pmem to compile. | |
42 | */ | |
43 | #define PFN_SECTION_ALIGN_DOWN(x) (x) | |
44 | #define PFN_SECTION_ALIGN_UP(x) (x) | |
45 | #endif | |
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46 | |
47 | #define PHYS_SECTION_ALIGN_DOWN(x) PFN_PHYS(PFN_SECTION_ALIGN_DOWN(PHYS_PFN(x))) | |
48 | #define PHYS_SECTION_ALIGN_UP(x) PFN_PHYS(PFN_SECTION_ALIGN_UP(PHYS_PFN(x))) | |
e1455744 | 49 | #endif /* __NVDIMM_PFN_H */ |