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5b497af4 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
4d88a97a DW |
2 | /* |
3 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
4d88a97a DW |
4 | */ |
5 | #ifndef __ND_H__ | |
6 | #define __ND_H__ | |
1f7df6f8 | 7 | #include <linux/libnvdimm.h> |
200c79da | 8 | #include <linux/badblocks.h> |
f0dc089c | 9 | #include <linux/blkdev.h> |
4d88a97a DW |
10 | #include <linux/device.h> |
11 | #include <linux/mutex.h> | |
12 | #include <linux/ndctl.h> | |
bf9bccc1 | 13 | #include <linux/types.h> |
71999466 | 14 | #include <linux/nd.h> |
4a826c83 | 15 | #include "label.h" |
4d88a97a | 16 | |
8c2f7e86 | 17 | enum { |
5212e11f VV |
18 | /* |
19 | * Limits the maximum number of block apertures a dimm can | |
20 | * support and is an input to the geometry/on-disk-format of a | |
21 | * BTT instance | |
22 | */ | |
23 | ND_MAX_LANES = 256, | |
fcae6957 | 24 | INT_LBASIZE_ALIGNMENT = 64, |
3ae3d67b | 25 | NVDIMM_IO_ATOMIC = 1, |
8c2f7e86 DW |
26 | }; |
27 | ||
4d88a97a DW |
28 | struct nvdimm_drvdata { |
29 | struct device *dev; | |
02881768 | 30 | int nslabel_size; |
4d88a97a DW |
31 | struct nd_cmd_get_config_size nsarea; |
32 | void *data; | |
4a826c83 DW |
33 | int ns_current, ns_next; |
34 | struct resource dpa; | |
bf9bccc1 | 35 | struct kref kref; |
4d88a97a DW |
36 | }; |
37 | ||
b4366a82 DW |
38 | static inline const u8 *nsl_ref_name(struct nvdimm_drvdata *ndd, |
39 | struct nd_namespace_label *nd_label) | |
40 | { | |
41 | return nd_label->name; | |
42 | } | |
43 | ||
44 | static inline u8 *nsl_get_name(struct nvdimm_drvdata *ndd, | |
45 | struct nd_namespace_label *nd_label, u8 *name) | |
46 | { | |
47 | return memcpy(name, nd_label->name, NSLABEL_NAME_LEN); | |
48 | } | |
49 | ||
8176f147 DW |
50 | static inline u8 *nsl_set_name(struct nvdimm_drvdata *ndd, |
51 | struct nd_namespace_label *nd_label, u8 *name) | |
52 | { | |
53 | if (!name) | |
54 | return NULL; | |
55 | return memcpy(nd_label->name, name, NSLABEL_NAME_LEN); | |
56 | } | |
57 | ||
b4366a82 DW |
58 | static inline u32 nsl_get_slot(struct nvdimm_drvdata *ndd, |
59 | struct nd_namespace_label *nd_label) | |
60 | { | |
61 | return __le32_to_cpu(nd_label->slot); | |
62 | } | |
63 | ||
8176f147 DW |
64 | static inline void nsl_set_slot(struct nvdimm_drvdata *ndd, |
65 | struct nd_namespace_label *nd_label, u32 slot) | |
66 | { | |
67 | nd_label->slot = __cpu_to_le32(slot); | |
68 | } | |
69 | ||
b4366a82 DW |
70 | static inline u64 nsl_get_checksum(struct nvdimm_drvdata *ndd, |
71 | struct nd_namespace_label *nd_label) | |
72 | { | |
73 | return __le64_to_cpu(nd_label->checksum); | |
74 | } | |
75 | ||
8176f147 DW |
76 | static inline void nsl_set_checksum(struct nvdimm_drvdata *ndd, |
77 | struct nd_namespace_label *nd_label, | |
78 | u64 checksum) | |
79 | { | |
80 | nd_label->checksum = __cpu_to_le64(checksum); | |
81 | } | |
82 | ||
b4366a82 DW |
83 | static inline u32 nsl_get_flags(struct nvdimm_drvdata *ndd, |
84 | struct nd_namespace_label *nd_label) | |
85 | { | |
86 | return __le32_to_cpu(nd_label->flags); | |
87 | } | |
88 | ||
8176f147 DW |
89 | static inline void nsl_set_flags(struct nvdimm_drvdata *ndd, |
90 | struct nd_namespace_label *nd_label, u32 flags) | |
91 | { | |
92 | nd_label->flags = __cpu_to_le32(flags); | |
93 | } | |
94 | ||
b4366a82 DW |
95 | static inline u64 nsl_get_dpa(struct nvdimm_drvdata *ndd, |
96 | struct nd_namespace_label *nd_label) | |
97 | { | |
98 | return __le64_to_cpu(nd_label->dpa); | |
99 | } | |
100 | ||
8176f147 DW |
101 | static inline void nsl_set_dpa(struct nvdimm_drvdata *ndd, |
102 | struct nd_namespace_label *nd_label, u64 dpa) | |
103 | { | |
104 | nd_label->dpa = __cpu_to_le64(dpa); | |
105 | } | |
106 | ||
b4366a82 DW |
107 | static inline u64 nsl_get_rawsize(struct nvdimm_drvdata *ndd, |
108 | struct nd_namespace_label *nd_label) | |
109 | { | |
110 | return __le64_to_cpu(nd_label->rawsize); | |
111 | } | |
112 | ||
8176f147 DW |
113 | static inline void nsl_set_rawsize(struct nvdimm_drvdata *ndd, |
114 | struct nd_namespace_label *nd_label, | |
115 | u64 rawsize) | |
116 | { | |
117 | nd_label->rawsize = __cpu_to_le64(rawsize); | |
118 | } | |
119 | ||
b4366a82 DW |
120 | static inline u64 nsl_get_isetcookie(struct nvdimm_drvdata *ndd, |
121 | struct nd_namespace_label *nd_label) | |
122 | { | |
123 | return __le64_to_cpu(nd_label->isetcookie); | |
124 | } | |
125 | ||
8176f147 DW |
126 | static inline void nsl_set_isetcookie(struct nvdimm_drvdata *ndd, |
127 | struct nd_namespace_label *nd_label, | |
128 | u64 isetcookie) | |
129 | { | |
130 | nd_label->isetcookie = __cpu_to_le64(isetcookie); | |
131 | } | |
132 | ||
9761b02d DW |
133 | static inline bool nsl_validate_isetcookie(struct nvdimm_drvdata *ndd, |
134 | struct nd_namespace_label *nd_label, | |
135 | u64 cookie) | |
136 | { | |
137 | return cookie == __le64_to_cpu(nd_label->isetcookie); | |
138 | } | |
139 | ||
b4366a82 DW |
140 | static inline u16 nsl_get_position(struct nvdimm_drvdata *ndd, |
141 | struct nd_namespace_label *nd_label) | |
142 | { | |
143 | return __le16_to_cpu(nd_label->position); | |
144 | } | |
145 | ||
8176f147 DW |
146 | static inline void nsl_set_position(struct nvdimm_drvdata *ndd, |
147 | struct nd_namespace_label *nd_label, | |
148 | u16 position) | |
149 | { | |
150 | nd_label->position = __cpu_to_le16(position); | |
151 | } | |
152 | ||
153 | ||
b4366a82 DW |
154 | static inline u16 nsl_get_nlabel(struct nvdimm_drvdata *ndd, |
155 | struct nd_namespace_label *nd_label) | |
156 | { | |
157 | return __le16_to_cpu(nd_label->nlabel); | |
158 | } | |
159 | ||
8176f147 DW |
160 | static inline void nsl_set_nlabel(struct nvdimm_drvdata *ndd, |
161 | struct nd_namespace_label *nd_label, | |
162 | u16 nlabel) | |
163 | { | |
164 | nd_label->nlabel = __cpu_to_le16(nlabel); | |
165 | } | |
166 | ||
b4366a82 DW |
167 | static inline u64 nsl_get_lbasize(struct nvdimm_drvdata *ndd, |
168 | struct nd_namespace_label *nd_label) | |
169 | { | |
170 | return __le64_to_cpu(nd_label->lbasize); | |
171 | } | |
172 | ||
8176f147 DW |
173 | static inline void nsl_set_lbasize(struct nvdimm_drvdata *ndd, |
174 | struct nd_namespace_label *nd_label, | |
175 | u64 lbasize) | |
176 | { | |
177 | nd_label->lbasize = __cpu_to_le64(lbasize); | |
178 | } | |
179 | ||
f56541a7 DW |
180 | bool nsl_validate_blk_isetcookie(struct nvdimm_drvdata *ndd, |
181 | struct nd_namespace_label *nd_label, | |
182 | u64 isetcookie); | |
8b03aa0e DW |
183 | bool nsl_validate_type_guid(struct nvdimm_drvdata *ndd, |
184 | struct nd_namespace_label *nd_label, guid_t *guid); | |
f56541a7 | 185 | |
e5ae3b25 DW |
186 | struct nd_region_data { |
187 | int ns_count; | |
188 | int ns_active; | |
595c7307 | 189 | unsigned int hints_shift; |
9106137c | 190 | void __iomem *flush_wpq[]; |
3d88002e DW |
191 | }; |
192 | ||
595c7307 DW |
193 | static inline void __iomem *ndrd_get_flush_wpq(struct nd_region_data *ndrd, |
194 | int dimm, int hint) | |
195 | { | |
196 | unsigned int num = 1 << ndrd->hints_shift; | |
197 | unsigned int mask = num - 1; | |
198 | ||
199 | return ndrd->flush_wpq[dimm * num + (hint & mask)]; | |
200 | } | |
201 | ||
202 | static inline void ndrd_set_flush_wpq(struct nd_region_data *ndrd, int dimm, | |
203 | int hint, void __iomem *flush) | |
204 | { | |
205 | unsigned int num = 1 << ndrd->hints_shift; | |
206 | unsigned int mask = num - 1; | |
207 | ||
208 | ndrd->flush_wpq[dimm * num + (hint & mask)] = flush; | |
209 | } | |
210 | ||
4a826c83 DW |
211 | static inline struct nd_namespace_index *to_namespace_index( |
212 | struct nvdimm_drvdata *ndd, int i) | |
213 | { | |
214 | if (i < 0) | |
215 | return NULL; | |
216 | ||
217 | return ndd->data + sizeof_namespace_index(ndd) * i; | |
218 | } | |
219 | ||
220 | static inline struct nd_namespace_index *to_current_namespace_index( | |
221 | struct nvdimm_drvdata *ndd) | |
222 | { | |
223 | return to_namespace_index(ndd, ndd->ns_current); | |
224 | } | |
225 | ||
226 | static inline struct nd_namespace_index *to_next_namespace_index( | |
227 | struct nvdimm_drvdata *ndd) | |
228 | { | |
229 | return to_namespace_index(ndd, ndd->ns_next); | |
230 | } | |
231 | ||
564e871a DW |
232 | unsigned sizeof_namespace_label(struct nvdimm_drvdata *ndd); |
233 | ||
234 | #define namespace_label_has(ndd, field) \ | |
235 | (offsetof(struct nd_namespace_label, field) \ | |
236 | < sizeof_namespace_label(ndd)) | |
237 | ||
4a826c83 DW |
238 | #define nd_dbg_dpa(r, d, res, fmt, arg...) \ |
239 | dev_dbg((r) ? &(r)->dev : (d)->dev, "%s: %.13s: %#llx @ %#llx " fmt, \ | |
240 | (r) ? dev_name((d)->dev) : "", res ? res->name : "null", \ | |
241 | (unsigned long long) (res ? resource_size(res) : 0), \ | |
242 | (unsigned long long) (res ? res->start : 0), ##arg) | |
243 | ||
bf9bccc1 DW |
244 | #define for_each_dpa_resource(ndd, res) \ |
245 | for (res = (ndd)->dpa.child; res; res = res->sibling) | |
246 | ||
4a826c83 DW |
247 | #define for_each_dpa_resource_safe(ndd, res, next) \ |
248 | for (res = (ndd)->dpa.child, next = res ? res->sibling : NULL; \ | |
249 | res; res = next, next = next ? next->sibling : NULL) | |
250 | ||
5212e11f VV |
251 | struct nd_percpu_lane { |
252 | int count; | |
253 | spinlock_t lock; | |
254 | }; | |
255 | ||
c4703ce1 DW |
256 | enum nd_label_flags { |
257 | ND_LABEL_REAP, | |
258 | }; | |
ae8219f1 DW |
259 | struct nd_label_ent { |
260 | struct list_head list; | |
c4703ce1 | 261 | unsigned long flags; |
ae8219f1 DW |
262 | struct nd_namespace_label *label; |
263 | }; | |
264 | ||
265 | enum nd_mapping_lock_class { | |
266 | ND_MAPPING_CLASS0, | |
267 | ND_MAPPING_UUID_SCAN, | |
268 | }; | |
269 | ||
44c462eb DW |
270 | struct nd_mapping { |
271 | struct nvdimm *nvdimm; | |
44c462eb DW |
272 | u64 start; |
273 | u64 size; | |
401c0a19 | 274 | int position; |
ae8219f1 DW |
275 | struct list_head labels; |
276 | struct mutex lock; | |
44c462eb DW |
277 | /* |
278 | * @ndd is for private use at region enable / disable time for | |
279 | * get_ndd() + put_ndd(), all other nd_mapping to ndd | |
280 | * conversions use to_ndd() which respects enabled state of the | |
281 | * nvdimm. | |
282 | */ | |
283 | struct nvdimm_drvdata *ndd; | |
284 | }; | |
285 | ||
1f7df6f8 DW |
286 | struct nd_region { |
287 | struct device dev; | |
1b40e09a | 288 | struct ida ns_ida; |
8c2f7e86 | 289 | struct ida btt_ida; |
e1455744 | 290 | struct ida pfn_ida; |
cd03412a | 291 | struct ida dax_ida; |
004f1afb | 292 | unsigned long flags; |
bf9bccc1 | 293 | struct device *ns_seed; |
8c2f7e86 | 294 | struct device *btt_seed; |
e1455744 | 295 | struct device *pfn_seed; |
cd03412a | 296 | struct device *dax_seed; |
2522afb8 | 297 | unsigned long align; |
1f7df6f8 DW |
298 | u16 ndr_mappings; |
299 | u64 ndr_size; | |
300 | u64 ndr_start; | |
8fc5c735 | 301 | int id, num_lanes, ro, numa_node, target_node; |
1f7df6f8 | 302 | void *provider_data; |
975750a9 | 303 | struct kernfs_node *bb_state; |
6a6bef90 | 304 | struct badblocks bb; |
eaf96153 | 305 | struct nd_interleave_set *nd_set; |
5212e11f | 306 | struct nd_percpu_lane __percpu *lane; |
c5d4355d | 307 | int (*flush)(struct nd_region *nd_region, struct bio *bio); |
9106137c | 308 | struct nd_mapping mapping[]; |
1f7df6f8 DW |
309 | }; |
310 | ||
047fc8a1 RZ |
311 | struct nd_blk_region { |
312 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
047fc8a1 RZ |
313 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
314 | void *iobuf, u64 len, int rw); | |
315 | void *blk_provider_data; | |
316 | struct nd_region nd_region; | |
317 | }; | |
318 | ||
4a826c83 DW |
319 | /* |
320 | * Lookup next in the repeating sequence of 01, 10, and 11. | |
321 | */ | |
322 | static inline unsigned nd_inc_seq(unsigned seq) | |
323 | { | |
324 | static const unsigned next[] = { 0, 2, 3, 1 }; | |
325 | ||
326 | return next[seq & 3]; | |
327 | } | |
f524bf27 | 328 | |
5212e11f | 329 | struct btt; |
8c2f7e86 DW |
330 | struct nd_btt { |
331 | struct device dev; | |
332 | struct nd_namespace_common *ndns; | |
5212e11f | 333 | struct btt *btt; |
8c2f7e86 | 334 | unsigned long lbasize; |
abe8b4e3 | 335 | u64 size; |
8c2f7e86 DW |
336 | u8 *uuid; |
337 | int id; | |
14e49454 VV |
338 | int initial_offset; |
339 | u16 version_major; | |
340 | u16 version_minor; | |
8c2f7e86 DW |
341 | }; |
342 | ||
e1455744 DW |
343 | enum nd_pfn_mode { |
344 | PFN_MODE_NONE, | |
345 | PFN_MODE_RAM, | |
346 | PFN_MODE_PMEM, | |
347 | }; | |
348 | ||
349 | struct nd_pfn { | |
350 | int id; | |
351 | u8 *uuid; | |
352 | struct device dev; | |
315c5625 | 353 | unsigned long align; |
e1455744 DW |
354 | unsigned long npfns; |
355 | enum nd_pfn_mode mode; | |
356 | struct nd_pfn_sb *pfn_sb; | |
357 | struct nd_namespace_common *ndns; | |
358 | }; | |
359 | ||
cd03412a DW |
360 | struct nd_dax { |
361 | struct nd_pfn nd_pfn; | |
362 | }; | |
363 | ||
8f4b01fc AK |
364 | static inline u32 nd_info_block_reserve(void) |
365 | { | |
366 | return ALIGN(SZ_8K, PAGE_SIZE); | |
367 | } | |
368 | ||
4d88a97a DW |
369 | enum nd_async_mode { |
370 | ND_SYNC, | |
371 | ND_ASYNC, | |
372 | }; | |
373 | ||
41cd8b70 | 374 | int nd_integrity_init(struct gendisk *disk, unsigned long meta_size); |
bf9bccc1 | 375 | void wait_nvdimm_bus_probe_idle(struct device *dev); |
4d88a97a DW |
376 | void nd_device_register(struct device *dev); |
377 | void nd_device_unregister(struct device *dev, enum nd_async_mode mode); | |
71999466 | 378 | void nd_device_notify(struct device *dev, enum nvdimm_event event); |
bf9bccc1 DW |
379 | int nd_uuid_store(struct device *dev, u8 **uuid_out, const char *buf, |
380 | size_t len); | |
b2c48f9f | 381 | ssize_t nd_size_select_show(unsigned long current_size, |
1b40e09a | 382 | const unsigned long *supported, char *buf); |
b2c48f9f DW |
383 | ssize_t nd_size_select_store(struct device *dev, const char *buf, |
384 | unsigned long *current_size, const unsigned long *supported); | |
4d88a97a | 385 | int __init nvdimm_init(void); |
3d88002e | 386 | int __init nd_region_init(void); |
b3fde74e | 387 | int __init nd_label_init(void); |
4d88a97a | 388 | void nvdimm_exit(void); |
3d88002e | 389 | void nd_region_exit(void); |
bf9bccc1 | 390 | struct nvdimm; |
adbb6829 | 391 | extern const struct attribute_group nd_device_attribute_group; |
e2f6a0e3 | 392 | extern const struct attribute_group nd_numa_attribute_group; |
e755799a | 393 | extern const struct attribute_group *nvdimm_bus_attribute_groups[]; |
bf9bccc1 | 394 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); |
aee65987 | 395 | int nvdimm_check_config_data(struct device *dev); |
4d88a97a DW |
396 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); |
397 | int nvdimm_init_config_data(struct nvdimm_drvdata *ndd); | |
2d657d17 AD |
398 | int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf, |
399 | size_t offset, size_t len); | |
f524bf27 DW |
400 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
401 | void *buf, size_t len); | |
59e64739 DW |
402 | long nvdimm_clear_poison(struct device *dev, phys_addr_t phys, |
403 | unsigned int len); | |
a0e37452 | 404 | void nvdimm_set_labeling(struct device *dev); |
8f078b38 | 405 | void nvdimm_set_locked(struct device *dev); |
d34cb808 | 406 | void nvdimm_clear_locked(struct device *dev); |
1cd73865 | 407 | int nvdimm_security_setup_events(struct device *dev); |
4c6926a2 DJ |
408 | #if IS_ENABLED(CONFIG_NVDIMM_KEYS) |
409 | int nvdimm_security_unlock(struct device *dev); | |
410 | #else | |
411 | static inline int nvdimm_security_unlock(struct device *dev) | |
412 | { | |
413 | return 0; | |
414 | } | |
415 | #endif | |
8c2f7e86 | 416 | struct nd_btt *to_nd_btt(struct device *dev); |
e1455744 DW |
417 | |
418 | struct nd_gen_sb { | |
419 | char reserved[SZ_4K - 8]; | |
420 | __le64 checksum; | |
421 | }; | |
422 | ||
423 | u64 nd_sb_checksum(struct nd_gen_sb *sb); | |
8c2f7e86 | 424 | #if IS_ENABLED(CONFIG_BTT) |
200c79da | 425 | int nd_btt_probe(struct device *dev, struct nd_namespace_common *ndns); |
8c2f7e86 DW |
426 | bool is_nd_btt(struct device *dev); |
427 | struct device *nd_btt_create(struct nd_region *nd_region); | |
428 | #else | |
e32bc729 | 429 | static inline int nd_btt_probe(struct device *dev, |
200c79da | 430 | struct nd_namespace_common *ndns) |
8c2f7e86 DW |
431 | { |
432 | return -ENODEV; | |
433 | } | |
434 | ||
435 | static inline bool is_nd_btt(struct device *dev) | |
436 | { | |
437 | return false; | |
438 | } | |
439 | ||
440 | static inline struct device *nd_btt_create(struct nd_region *nd_region) | |
441 | { | |
442 | return NULL; | |
443 | } | |
e1455744 | 444 | #endif |
8c2f7e86 | 445 | |
e1455744 DW |
446 | struct nd_pfn *to_nd_pfn(struct device *dev); |
447 | #if IS_ENABLED(CONFIG_NVDIMM_PFN) | |
0dd69643 | 448 | |
f5376699 | 449 | #define MAX_NVDIMM_ALIGN 4 |
0dd69643 | 450 | |
200c79da | 451 | int nd_pfn_probe(struct device *dev, struct nd_namespace_common *ndns); |
e1455744 DW |
452 | bool is_nd_pfn(struct device *dev); |
453 | struct device *nd_pfn_create(struct nd_region *nd_region); | |
cd03412a DW |
454 | struct device *nd_pfn_devinit(struct nd_pfn *nd_pfn, |
455 | struct nd_namespace_common *ndns); | |
c5ed9268 | 456 | int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig); |
78c81cc8 | 457 | extern const struct attribute_group *nd_pfn_attribute_groups[]; |
e1455744 | 458 | #else |
200c79da DW |
459 | static inline int nd_pfn_probe(struct device *dev, |
460 | struct nd_namespace_common *ndns) | |
e1455744 DW |
461 | { |
462 | return -ENODEV; | |
463 | } | |
464 | ||
465 | static inline bool is_nd_pfn(struct device *dev) | |
466 | { | |
467 | return false; | |
468 | } | |
469 | ||
470 | static inline struct device *nd_pfn_create(struct nd_region *nd_region) | |
471 | { | |
472 | return NULL; | |
473 | } | |
32ab0a3f | 474 | |
c5ed9268 | 475 | static inline int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig) |
32ab0a3f DW |
476 | { |
477 | return -ENODEV; | |
478 | } | |
8c2f7e86 | 479 | #endif |
e1455744 | 480 | |
cd03412a DW |
481 | struct nd_dax *to_nd_dax(struct device *dev); |
482 | #if IS_ENABLED(CONFIG_NVDIMM_DAX) | |
c5ed9268 | 483 | int nd_dax_probe(struct device *dev, struct nd_namespace_common *ndns); |
cd03412a DW |
484 | bool is_nd_dax(struct device *dev); |
485 | struct device *nd_dax_create(struct nd_region *nd_region); | |
486 | #else | |
c5ed9268 DW |
487 | static inline int nd_dax_probe(struct device *dev, |
488 | struct nd_namespace_common *ndns) | |
489 | { | |
490 | return -ENODEV; | |
491 | } | |
492 | ||
cd03412a DW |
493 | static inline bool is_nd_dax(struct device *dev) |
494 | { | |
495 | return false; | |
496 | } | |
497 | ||
498 | static inline struct device *nd_dax_create(struct nd_region *nd_region) | |
499 | { | |
500 | return NULL; | |
501 | } | |
502 | #endif | |
503 | ||
3d88002e DW |
504 | int nd_region_to_nstype(struct nd_region *nd_region); |
505 | int nd_region_register_namespaces(struct nd_region *nd_region, int *err); | |
c12c48ce DW |
506 | u64 nd_region_interleave_set_cookie(struct nd_region *nd_region, |
507 | struct nd_namespace_index *nsindex); | |
86ef58a4 | 508 | u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region); |
3d88002e DW |
509 | void nvdimm_bus_lock(struct device *dev); |
510 | void nvdimm_bus_unlock(struct device *dev); | |
511 | bool is_nvdimm_bus_locked(struct device *dev); | |
32f61d67 | 512 | void nvdimm_check_and_set_ro(struct gendisk *disk); |
bf9bccc1 DW |
513 | void nvdimm_drvdata_release(struct kref *kref); |
514 | void put_ndd(struct nvdimm_drvdata *ndd); | |
4a826c83 DW |
515 | int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd); |
516 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res); | |
517 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, | |
518 | struct nd_label_id *label_id, resource_size_t start, | |
519 | resource_size_t n); | |
8c2f7e86 | 520 | resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns); |
08e6b3c6 | 521 | bool nvdimm_namespace_locked(struct nd_namespace_common *ndns); |
8c2f7e86 | 522 | struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev); |
5212e11f | 523 | int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns); |
298f2bc5 | 524 | int nvdimm_namespace_detach_btt(struct nd_btt *nd_btt); |
5212e11f VV |
525 | const char *nvdimm_namespace_disk_name(struct nd_namespace_common *ndns, |
526 | char *name); | |
f979b13c | 527 | unsigned int pmem_sector_size(struct nd_namespace_common *ndns); |
a4574f63 | 528 | struct range; |
a3901802 | 529 | void nvdimm_badblocks_populate(struct nd_region *nd_region, |
a4574f63 | 530 | struct badblocks *bb, const struct range *range); |
8f4b01fc AK |
531 | int devm_namespace_enable(struct device *dev, struct nd_namespace_common *ndns, |
532 | resource_size_t size); | |
533 | void devm_namespace_disable(struct device *dev, | |
534 | struct nd_namespace_common *ndns); | |
200c79da | 535 | #if IS_ENABLED(CONFIG_ND_CLAIM) |
e96f0bf2 AK |
536 | /* max struct page size independent of kernel config */ |
537 | #define MAX_STRUCT_PAGE_SIZE 64 | |
e8d51348 | 538 | int nvdimm_setup_pfn(struct nd_pfn *nd_pfn, struct dev_pagemap *pgmap); |
200c79da | 539 | #else |
e8d51348 CH |
540 | static inline int nvdimm_setup_pfn(struct nd_pfn *nd_pfn, |
541 | struct dev_pagemap *pgmap) | |
ac515c08 | 542 | { |
e8d51348 | 543 | return -ENXIO; |
ac515c08 | 544 | } |
200c79da | 545 | #endif |
047fc8a1 | 546 | int nd_blk_region_init(struct nd_region *nd_region); |
e5ae3b25 | 547 | int nd_region_activate(struct nd_region *nd_region); |
200c79da DW |
548 | static inline bool is_bad_pmem(struct badblocks *bb, sector_t sector, |
549 | unsigned int len) | |
550 | { | |
551 | if (bb->count) { | |
552 | sector_t first_bad; | |
553 | int num_bad; | |
554 | ||
555 | return !!badblocks_check(bb, sector, len / 512, &first_bad, | |
556 | &num_bad); | |
557 | } | |
558 | ||
559 | return false; | |
560 | } | |
047fc8a1 | 561 | resource_size_t nd_namespace_blk_validate(struct nd_namespace_blk *nsblk); |
6ec68954 | 562 | const u8 *nd_dev_to_uuid(struct device *dev); |
004f1afb | 563 | bool pmem_should_map_pages(struct device *dev); |
4d88a97a | 564 | #endif /* __ND_H__ */ |