Commit | Line | Data |
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e6dfb2de DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
4d88a97a | 14 | #include <linux/vmalloc.h> |
e6dfb2de | 15 | #include <linux/device.h> |
62232e45 | 16 | #include <linux/ndctl.h> |
e6dfb2de DW |
17 | #include <linux/slab.h> |
18 | #include <linux/io.h> | |
19 | #include <linux/fs.h> | |
20 | #include <linux/mm.h> | |
21 | #include "nd-core.h" | |
0ba1c634 | 22 | #include "label.h" |
ca6a4657 | 23 | #include "pmem.h" |
4d88a97a | 24 | #include "nd.h" |
e6dfb2de DW |
25 | |
26 | static DEFINE_IDA(dimm_ida); | |
27 | ||
4d88a97a DW |
28 | /* |
29 | * Retrieve bus and dimm handle and return if this bus supports | |
30 | * get_config_data commands | |
31 | */ | |
aee65987 | 32 | int nvdimm_check_config_data(struct device *dev) |
4d88a97a | 33 | { |
aee65987 | 34 | struct nvdimm *nvdimm = to_nvdimm(dev); |
4d88a97a | 35 | |
aee65987 TK |
36 | if (!nvdimm->cmd_mask || |
37 | !test_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm->cmd_mask)) { | |
8f078b38 | 38 | if (test_bit(NDD_ALIASING, &nvdimm->flags)) |
aee65987 TK |
39 | return -ENXIO; |
40 | else | |
41 | return -ENOTTY; | |
42 | } | |
4d88a97a DW |
43 | |
44 | return 0; | |
45 | } | |
46 | ||
47 | static int validate_dimm(struct nvdimm_drvdata *ndd) | |
48 | { | |
aee65987 | 49 | int rc; |
4d88a97a | 50 | |
aee65987 TK |
51 | if (!ndd) |
52 | return -EINVAL; | |
53 | ||
54 | rc = nvdimm_check_config_data(ndd->dev); | |
55 | if (rc) | |
4d88a97a DW |
56 | dev_dbg(ndd->dev, "%pf: %s error: %d\n", |
57 | __builtin_return_address(0), __func__, rc); | |
58 | return rc; | |
59 | } | |
60 | ||
61 | /** | |
62 | * nvdimm_init_nsarea - determine the geometry of a dimm's namespace area | |
63 | * @nvdimm: dimm to initialize | |
64 | */ | |
65 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd) | |
66 | { | |
67 | struct nd_cmd_get_config_size *cmd = &ndd->nsarea; | |
68 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
69 | struct nvdimm_bus_descriptor *nd_desc; | |
70 | int rc = validate_dimm(ndd); | |
9d62ed96 | 71 | int cmd_rc = 0; |
4d88a97a DW |
72 | |
73 | if (rc) | |
74 | return rc; | |
75 | ||
76 | if (cmd->config_size) | |
77 | return 0; /* already valid */ | |
78 | ||
79 | memset(cmd, 0, sizeof(*cmd)); | |
80 | nd_desc = nvdimm_bus->nd_desc; | |
9d62ed96 DW |
81 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
82 | ND_CMD_GET_CONFIG_SIZE, cmd, sizeof(*cmd), &cmd_rc); | |
83 | if (rc < 0) | |
84 | return rc; | |
85 | return cmd_rc; | |
4d88a97a DW |
86 | } |
87 | ||
2d657d17 AD |
88 | int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf, |
89 | size_t offset, size_t len) | |
4d88a97a DW |
90 | { |
91 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
2d657d17 | 92 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
e7c5a571 | 93 | int rc = validate_dimm(ndd), cmd_rc = 0; |
4d88a97a | 94 | struct nd_cmd_get_config_data_hdr *cmd; |
2d657d17 | 95 | size_t max_cmd_size, buf_offset; |
4d88a97a DW |
96 | |
97 | if (rc) | |
98 | return rc; | |
99 | ||
2d657d17 | 100 | if (offset + len > ndd->nsarea.config_size) |
4d88a97a | 101 | return -ENXIO; |
4d88a97a | 102 | |
2d657d17 | 103 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
d11cf4a7 | 104 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd), GFP_KERNEL); |
4d88a97a DW |
105 | if (!cmd) |
106 | return -ENOMEM; | |
107 | ||
2d657d17 AD |
108 | for (buf_offset = 0; len; |
109 | len -= cmd->in_length, buf_offset += cmd->in_length) { | |
110 | size_t cmd_size; | |
111 | ||
112 | cmd->in_offset = offset + buf_offset; | |
113 | cmd->in_length = min(max_cmd_size, len); | |
114 | ||
115 | cmd_size = sizeof(*cmd) + cmd->in_length; | |
116 | ||
4d88a97a | 117 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
2d657d17 | 118 | ND_CMD_GET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
e7c5a571 DW |
119 | if (rc < 0) |
120 | break; | |
121 | if (cmd_rc < 0) { | |
122 | rc = cmd_rc; | |
4d88a97a DW |
123 | break; |
124 | } | |
2d657d17 AD |
125 | |
126 | /* out_buf should be valid, copy it into our output buffer */ | |
127 | memcpy(buf + buf_offset, cmd->out_buf, cmd->in_length); | |
4d88a97a | 128 | } |
d11cf4a7 | 129 | kvfree(cmd); |
4d88a97a DW |
130 | |
131 | return rc; | |
132 | } | |
133 | ||
f524bf27 DW |
134 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
135 | void *buf, size_t len) | |
136 | { | |
f524bf27 DW |
137 | size_t max_cmd_size, buf_offset; |
138 | struct nd_cmd_set_config_hdr *cmd; | |
e7c5a571 | 139 | int rc = validate_dimm(ndd), cmd_rc = 0; |
f524bf27 DW |
140 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
141 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; | |
142 | ||
143 | if (rc) | |
144 | return rc; | |
145 | ||
f524bf27 DW |
146 | if (offset + len > ndd->nsarea.config_size) |
147 | return -ENXIO; | |
148 | ||
d11cf4a7 DW |
149 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
150 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd) + sizeof(u32), GFP_KERNEL); | |
f524bf27 DW |
151 | if (!cmd) |
152 | return -ENOMEM; | |
153 | ||
154 | for (buf_offset = 0; len; len -= cmd->in_length, | |
155 | buf_offset += cmd->in_length) { | |
156 | size_t cmd_size; | |
f524bf27 DW |
157 | |
158 | cmd->in_offset = offset + buf_offset; | |
159 | cmd->in_length = min(max_cmd_size, len); | |
160 | memcpy(cmd->in_buf, buf + buf_offset, cmd->in_length); | |
161 | ||
162 | /* status is output in the last 4-bytes of the command buffer */ | |
163 | cmd_size = sizeof(*cmd) + cmd->in_length + sizeof(u32); | |
f524bf27 DW |
164 | |
165 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), | |
e7c5a571 DW |
166 | ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
167 | if (rc < 0) | |
168 | break; | |
169 | if (cmd_rc < 0) { | |
170 | rc = cmd_rc; | |
f524bf27 DW |
171 | break; |
172 | } | |
173 | } | |
d11cf4a7 | 174 | kvfree(cmd); |
f524bf27 DW |
175 | |
176 | return rc; | |
177 | } | |
178 | ||
42237e39 DW |
179 | void nvdimm_set_aliasing(struct device *dev) |
180 | { | |
181 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
182 | ||
8f078b38 DW |
183 | set_bit(NDD_ALIASING, &nvdimm->flags); |
184 | } | |
185 | ||
186 | void nvdimm_set_locked(struct device *dev) | |
187 | { | |
188 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
189 | ||
190 | set_bit(NDD_LOCKED, &nvdimm->flags); | |
42237e39 DW |
191 | } |
192 | ||
d34cb808 DW |
193 | void nvdimm_clear_locked(struct device *dev) |
194 | { | |
195 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
196 | ||
197 | clear_bit(NDD_LOCKED, &nvdimm->flags); | |
198 | } | |
199 | ||
e6dfb2de DW |
200 | static void nvdimm_release(struct device *dev) |
201 | { | |
202 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
203 | ||
204 | ida_simple_remove(&dimm_ida, nvdimm->id); | |
205 | kfree(nvdimm); | |
206 | } | |
207 | ||
208 | static struct device_type nvdimm_device_type = { | |
209 | .name = "nvdimm", | |
210 | .release = nvdimm_release, | |
211 | }; | |
212 | ||
62232e45 | 213 | bool is_nvdimm(struct device *dev) |
e6dfb2de DW |
214 | { |
215 | return dev->type == &nvdimm_device_type; | |
216 | } | |
217 | ||
218 | struct nvdimm *to_nvdimm(struct device *dev) | |
219 | { | |
220 | struct nvdimm *nvdimm = container_of(dev, struct nvdimm, dev); | |
221 | ||
222 | WARN_ON(!is_nvdimm(dev)); | |
223 | return nvdimm; | |
224 | } | |
225 | EXPORT_SYMBOL_GPL(to_nvdimm); | |
226 | ||
047fc8a1 RZ |
227 | struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr) |
228 | { | |
229 | struct nd_region *nd_region = &ndbr->nd_region; | |
230 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; | |
231 | ||
232 | return nd_mapping->nvdimm; | |
233 | } | |
234 | EXPORT_SYMBOL_GPL(nd_blk_region_to_dimm); | |
235 | ||
ca6a4657 DW |
236 | unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr) |
237 | { | |
238 | /* pmem mapping properties are private to libnvdimm */ | |
239 | return ARCH_MEMREMAP_PMEM; | |
240 | } | |
241 | EXPORT_SYMBOL_GPL(nd_blk_memremap_flags); | |
242 | ||
bf9bccc1 DW |
243 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping) |
244 | { | |
245 | struct nvdimm *nvdimm = nd_mapping->nvdimm; | |
246 | ||
247 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); | |
248 | ||
249 | return dev_get_drvdata(&nvdimm->dev); | |
250 | } | |
251 | EXPORT_SYMBOL(to_ndd); | |
252 | ||
253 | void nvdimm_drvdata_release(struct kref *kref) | |
254 | { | |
255 | struct nvdimm_drvdata *ndd = container_of(kref, typeof(*ndd), kref); | |
256 | struct device *dev = ndd->dev; | |
257 | struct resource *res, *_r; | |
258 | ||
426824d6 | 259 | dev_dbg(dev, "trace\n"); |
bf9bccc1 DW |
260 | nvdimm_bus_lock(dev); |
261 | for_each_dpa_resource_safe(ndd, res, _r) | |
262 | nvdimm_free_dpa(ndd, res); | |
263 | nvdimm_bus_unlock(dev); | |
264 | ||
a06a7576 | 265 | kvfree(ndd->data); |
bf9bccc1 DW |
266 | kfree(ndd); |
267 | put_device(dev); | |
268 | } | |
269 | ||
270 | void get_ndd(struct nvdimm_drvdata *ndd) | |
271 | { | |
272 | kref_get(&ndd->kref); | |
273 | } | |
274 | ||
275 | void put_ndd(struct nvdimm_drvdata *ndd) | |
276 | { | |
277 | if (ndd) | |
278 | kref_put(&ndd->kref, nvdimm_drvdata_release); | |
279 | } | |
280 | ||
e6dfb2de DW |
281 | const char *nvdimm_name(struct nvdimm *nvdimm) |
282 | { | |
283 | return dev_name(&nvdimm->dev); | |
284 | } | |
285 | EXPORT_SYMBOL_GPL(nvdimm_name); | |
286 | ||
ba9c8dd3 DW |
287 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm) |
288 | { | |
289 | return &nvdimm->dev.kobj; | |
290 | } | |
291 | EXPORT_SYMBOL_GPL(nvdimm_kobj); | |
292 | ||
e3654eca DW |
293 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm) |
294 | { | |
295 | return nvdimm->cmd_mask; | |
296 | } | |
297 | EXPORT_SYMBOL_GPL(nvdimm_cmd_mask); | |
298 | ||
e6dfb2de DW |
299 | void *nvdimm_provider_data(struct nvdimm *nvdimm) |
300 | { | |
62232e45 DW |
301 | if (nvdimm) |
302 | return nvdimm->provider_data; | |
303 | return NULL; | |
e6dfb2de DW |
304 | } |
305 | EXPORT_SYMBOL_GPL(nvdimm_provider_data); | |
306 | ||
62232e45 DW |
307 | static ssize_t commands_show(struct device *dev, |
308 | struct device_attribute *attr, char *buf) | |
309 | { | |
310 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
311 | int cmd, len = 0; | |
312 | ||
e3654eca | 313 | if (!nvdimm->cmd_mask) |
62232e45 DW |
314 | return sprintf(buf, "\n"); |
315 | ||
e3654eca | 316 | for_each_set_bit(cmd, &nvdimm->cmd_mask, BITS_PER_LONG) |
62232e45 DW |
317 | len += sprintf(buf + len, "%s ", nvdimm_cmd_name(cmd)); |
318 | len += sprintf(buf + len, "\n"); | |
319 | return len; | |
320 | } | |
321 | static DEVICE_ATTR_RO(commands); | |
322 | ||
efbf6f50 DW |
323 | static ssize_t flags_show(struct device *dev, |
324 | struct device_attribute *attr, char *buf) | |
325 | { | |
326 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
327 | ||
328 | return sprintf(buf, "%s%s\n", | |
329 | test_bit(NDD_ALIASING, &nvdimm->flags) ? "alias " : "", | |
330 | test_bit(NDD_LOCKED, &nvdimm->flags) ? "lock " : ""); | |
331 | } | |
332 | static DEVICE_ATTR_RO(flags); | |
333 | ||
eaf96153 DW |
334 | static ssize_t state_show(struct device *dev, struct device_attribute *attr, |
335 | char *buf) | |
336 | { | |
337 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
338 | ||
339 | /* | |
340 | * The state may be in the process of changing, userspace should | |
341 | * quiesce probing if it wants a static answer | |
342 | */ | |
343 | nvdimm_bus_lock(dev); | |
344 | nvdimm_bus_unlock(dev); | |
345 | return sprintf(buf, "%s\n", atomic_read(&nvdimm->busy) | |
346 | ? "active" : "idle"); | |
347 | } | |
348 | static DEVICE_ATTR_RO(state); | |
349 | ||
0ba1c634 DW |
350 | static ssize_t available_slots_show(struct device *dev, |
351 | struct device_attribute *attr, char *buf) | |
352 | { | |
353 | struct nvdimm_drvdata *ndd = dev_get_drvdata(dev); | |
354 | ssize_t rc; | |
355 | u32 nfree; | |
356 | ||
357 | if (!ndd) | |
358 | return -ENXIO; | |
359 | ||
360 | nvdimm_bus_lock(dev); | |
361 | nfree = nd_label_nfree(ndd); | |
362 | if (nfree - 1 > nfree) { | |
363 | dev_WARN_ONCE(dev, 1, "we ate our last label?\n"); | |
364 | nfree = 0; | |
365 | } else | |
366 | nfree--; | |
367 | rc = sprintf(buf, "%d\n", nfree); | |
368 | nvdimm_bus_unlock(dev); | |
369 | return rc; | |
370 | } | |
371 | static DEVICE_ATTR_RO(available_slots); | |
372 | ||
62232e45 | 373 | static struct attribute *nvdimm_attributes[] = { |
eaf96153 | 374 | &dev_attr_state.attr, |
efbf6f50 | 375 | &dev_attr_flags.attr, |
62232e45 | 376 | &dev_attr_commands.attr, |
0ba1c634 | 377 | &dev_attr_available_slots.attr, |
62232e45 DW |
378 | NULL, |
379 | }; | |
380 | ||
381 | struct attribute_group nvdimm_attribute_group = { | |
382 | .attrs = nvdimm_attributes, | |
383 | }; | |
384 | EXPORT_SYMBOL_GPL(nvdimm_attribute_group); | |
385 | ||
d6548ae4 DJ |
386 | struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, |
387 | void *provider_data, const struct attribute_group **groups, | |
388 | unsigned long flags, unsigned long cmd_mask, int num_flush, | |
389 | struct resource *flush_wpq, const char *dimm_id) | |
e6dfb2de DW |
390 | { |
391 | struct nvdimm *nvdimm = kzalloc(sizeof(*nvdimm), GFP_KERNEL); | |
392 | struct device *dev; | |
393 | ||
394 | if (!nvdimm) | |
395 | return NULL; | |
396 | ||
397 | nvdimm->id = ida_simple_get(&dimm_ida, 0, 0, GFP_KERNEL); | |
398 | if (nvdimm->id < 0) { | |
399 | kfree(nvdimm); | |
400 | return NULL; | |
401 | } | |
d6548ae4 DJ |
402 | |
403 | nvdimm->dimm_id = dimm_id; | |
e6dfb2de DW |
404 | nvdimm->provider_data = provider_data; |
405 | nvdimm->flags = flags; | |
e3654eca | 406 | nvdimm->cmd_mask = cmd_mask; |
e5ae3b25 DW |
407 | nvdimm->num_flush = num_flush; |
408 | nvdimm->flush_wpq = flush_wpq; | |
eaf96153 | 409 | atomic_set(&nvdimm->busy, 0); |
e6dfb2de DW |
410 | dev = &nvdimm->dev; |
411 | dev_set_name(dev, "nmem%d", nvdimm->id); | |
412 | dev->parent = &nvdimm_bus->dev; | |
413 | dev->type = &nvdimm_device_type; | |
62232e45 | 414 | dev->devt = MKDEV(nvdimm_major, nvdimm->id); |
e6dfb2de | 415 | dev->groups = groups; |
4d88a97a | 416 | nd_device_register(dev); |
e6dfb2de DW |
417 | |
418 | return nvdimm; | |
419 | } | |
d6548ae4 | 420 | EXPORT_SYMBOL_GPL(__nvdimm_create); |
4d88a97a | 421 | |
762d067d | 422 | int alias_dpa_busy(struct device *dev, void *data) |
a1f3e4d6 | 423 | { |
fe514739 | 424 | resource_size_t map_end, blk_start, new; |
a1f3e4d6 DW |
425 | struct blk_alloc_info *info = data; |
426 | struct nd_mapping *nd_mapping; | |
427 | struct nd_region *nd_region; | |
428 | struct nvdimm_drvdata *ndd; | |
429 | struct resource *res; | |
430 | int i; | |
431 | ||
c9e582aa | 432 | if (!is_memory(dev)) |
a1f3e4d6 DW |
433 | return 0; |
434 | ||
435 | nd_region = to_nd_region(dev); | |
436 | for (i = 0; i < nd_region->ndr_mappings; i++) { | |
437 | nd_mapping = &nd_region->mapping[i]; | |
438 | if (nd_mapping->nvdimm == info->nd_mapping->nvdimm) | |
439 | break; | |
440 | } | |
441 | ||
442 | if (i >= nd_region->ndr_mappings) | |
443 | return 0; | |
444 | ||
445 | ndd = to_ndd(nd_mapping); | |
446 | map_end = nd_mapping->start + nd_mapping->size - 1; | |
447 | blk_start = nd_mapping->start; | |
762d067d DW |
448 | |
449 | /* | |
450 | * In the allocation case ->res is set to free space that we are | |
451 | * looking to validate against PMEM aliasing collision rules | |
452 | * (i.e. BLK is allocated after all aliased PMEM). | |
453 | */ | |
454 | if (info->res) { | |
455 | if (info->res->start >= nd_mapping->start | |
456 | && info->res->start < map_end) | |
457 | /* pass */; | |
458 | else | |
459 | return 0; | |
460 | } | |
461 | ||
a1f3e4d6 DW |
462 | retry: |
463 | /* | |
464 | * Find the free dpa from the end of the last pmem allocation to | |
fe514739 | 465 | * the end of the interleave-set mapping. |
a1f3e4d6 | 466 | */ |
a1f3e4d6 | 467 | for_each_dpa_resource(ndd, res) { |
fe514739 DW |
468 | if (strncmp(res->name, "pmem", 4) != 0) |
469 | continue; | |
a1f3e4d6 DW |
470 | if ((res->start >= blk_start && res->start < map_end) |
471 | || (res->end >= blk_start | |
472 | && res->end <= map_end)) { | |
fe514739 DW |
473 | new = max(blk_start, min(map_end + 1, res->end + 1)); |
474 | if (new != blk_start) { | |
475 | blk_start = new; | |
476 | goto retry; | |
477 | } | |
a1f3e4d6 DW |
478 | } |
479 | } | |
480 | ||
762d067d DW |
481 | /* update the free space range with the probed blk_start */ |
482 | if (info->res && blk_start > info->res->start) { | |
483 | info->res->start = max(info->res->start, blk_start); | |
484 | if (info->res->start > info->res->end) | |
485 | info->res->end = info->res->start - 1; | |
486 | return 1; | |
487 | } | |
488 | ||
fe514739 | 489 | info->available -= blk_start - nd_mapping->start; |
762d067d | 490 | |
a1f3e4d6 DW |
491 | return 0; |
492 | } | |
493 | ||
1b40e09a DW |
494 | /** |
495 | * nd_blk_available_dpa - account the unused dpa of BLK region | |
496 | * @nd_mapping: container of dpa-resource-root + labels | |
497 | * | |
a1f3e4d6 DW |
498 | * Unlike PMEM, BLK namespaces can occupy discontiguous DPA ranges, but |
499 | * we arrange for them to never start at an lower dpa than the last | |
500 | * PMEM allocation in an aliased region. | |
1b40e09a | 501 | */ |
a1f3e4d6 | 502 | resource_size_t nd_blk_available_dpa(struct nd_region *nd_region) |
1b40e09a | 503 | { |
a1f3e4d6 DW |
504 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev); |
505 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; | |
1b40e09a | 506 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
a1f3e4d6 DW |
507 | struct blk_alloc_info info = { |
508 | .nd_mapping = nd_mapping, | |
509 | .available = nd_mapping->size, | |
762d067d | 510 | .res = NULL, |
a1f3e4d6 | 511 | }; |
1b40e09a DW |
512 | struct resource *res; |
513 | ||
514 | if (!ndd) | |
515 | return 0; | |
516 | ||
a1f3e4d6 | 517 | device_for_each_child(&nvdimm_bus->dev, &info, alias_dpa_busy); |
1b40e09a | 518 | |
a1f3e4d6 DW |
519 | /* now account for busy blk allocations in unaliased dpa */ |
520 | for_each_dpa_resource(ndd, res) { | |
521 | if (strncmp(res->name, "blk", 3) != 0) | |
522 | continue; | |
fe514739 | 523 | info.available -= resource_size(res); |
a1f3e4d6 DW |
524 | } |
525 | ||
526 | return info.available; | |
1b40e09a DW |
527 | } |
528 | ||
12e3129e KB |
529 | /** |
530 | * nd_pmem_max_contiguous_dpa - For the given dimm+region, return the max | |
531 | * contiguous unallocated dpa range. | |
532 | * @nd_region: constrain available space check to this reference region | |
533 | * @nd_mapping: container of dpa-resource-root + labels | |
534 | */ | |
535 | resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region, | |
536 | struct nd_mapping *nd_mapping) | |
537 | { | |
538 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); | |
539 | struct nvdimm_bus *nvdimm_bus; | |
540 | resource_size_t max = 0; | |
541 | struct resource *res; | |
542 | ||
543 | /* if a dimm is disabled the available capacity is zero */ | |
544 | if (!ndd) | |
545 | return 0; | |
546 | ||
547 | nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
548 | if (__reserve_free_pmem(&nd_region->dev, nd_mapping->nvdimm)) | |
549 | return 0; | |
550 | for_each_dpa_resource(ndd, res) { | |
551 | if (strcmp(res->name, "pmem-reserve") != 0) | |
552 | continue; | |
553 | if (resource_size(res) > max) | |
554 | max = resource_size(res); | |
555 | } | |
556 | release_free_pmem(nvdimm_bus, nd_mapping); | |
557 | return max; | |
558 | } | |
559 | ||
bf9bccc1 DW |
560 | /** |
561 | * nd_pmem_available_dpa - for the given dimm+region account unallocated dpa | |
562 | * @nd_mapping: container of dpa-resource-root + labels | |
563 | * @nd_region: constrain available space check to this reference region | |
564 | * @overlap: calculate available space assuming this level of overlap | |
565 | * | |
566 | * Validate that a PMEM label, if present, aligns with the start of an | |
567 | * interleave set and truncate the available size at the lowest BLK | |
568 | * overlap point. | |
569 | * | |
570 | * The expectation is that this routine is called multiple times as it | |
571 | * probes for the largest BLK encroachment for any single member DIMM of | |
572 | * the interleave set. Once that value is determined the PMEM-limit for | |
573 | * the set can be established. | |
574 | */ | |
575 | resource_size_t nd_pmem_available_dpa(struct nd_region *nd_region, | |
576 | struct nd_mapping *nd_mapping, resource_size_t *overlap) | |
577 | { | |
578 | resource_size_t map_start, map_end, busy = 0, available, blk_start; | |
579 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); | |
580 | struct resource *res; | |
581 | const char *reason; | |
582 | ||
583 | if (!ndd) | |
584 | return 0; | |
585 | ||
586 | map_start = nd_mapping->start; | |
587 | map_end = map_start + nd_mapping->size - 1; | |
588 | blk_start = max(map_start, map_end + 1 - *overlap); | |
a1f3e4d6 | 589 | for_each_dpa_resource(ndd, res) { |
bf9bccc1 DW |
590 | if (res->start >= map_start && res->start < map_end) { |
591 | if (strncmp(res->name, "blk", 3) == 0) | |
a1f3e4d6 DW |
592 | blk_start = min(blk_start, |
593 | max(map_start, res->start)); | |
594 | else if (res->end > map_end) { | |
bf9bccc1 DW |
595 | reason = "misaligned to iset"; |
596 | goto err; | |
a1f3e4d6 | 597 | } else |
bf9bccc1 | 598 | busy += resource_size(res); |
bf9bccc1 DW |
599 | } else if (res->end >= map_start && res->end <= map_end) { |
600 | if (strncmp(res->name, "blk", 3) == 0) { | |
601 | /* | |
602 | * If a BLK allocation overlaps the start of | |
603 | * PMEM the entire interleave set may now only | |
604 | * be used for BLK. | |
605 | */ | |
606 | blk_start = map_start; | |
a1f3e4d6 DW |
607 | } else |
608 | busy += resource_size(res); | |
bf9bccc1 DW |
609 | } else if (map_start > res->start && map_start < res->end) { |
610 | /* total eclipse of the mapping */ | |
611 | busy += nd_mapping->size; | |
612 | blk_start = map_start; | |
613 | } | |
a1f3e4d6 | 614 | } |
bf9bccc1 DW |
615 | |
616 | *overlap = map_end + 1 - blk_start; | |
617 | available = blk_start - map_start; | |
618 | if (busy < available) | |
619 | return available - busy; | |
620 | return 0; | |
621 | ||
622 | err: | |
bf9bccc1 DW |
623 | nd_dbg_dpa(nd_region, ndd, res, "%s\n", reason); |
624 | return 0; | |
625 | } | |
626 | ||
4a826c83 DW |
627 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res) |
628 | { | |
629 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); | |
630 | kfree(res->name); | |
631 | __release_region(&ndd->dpa, res->start, resource_size(res)); | |
632 | } | |
633 | ||
634 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, | |
635 | struct nd_label_id *label_id, resource_size_t start, | |
636 | resource_size_t n) | |
637 | { | |
638 | char *name = kmemdup(label_id, sizeof(*label_id), GFP_KERNEL); | |
639 | struct resource *res; | |
640 | ||
641 | if (!name) | |
642 | return NULL; | |
643 | ||
644 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); | |
645 | res = __request_region(&ndd->dpa, start, n, name, 0); | |
646 | if (!res) | |
647 | kfree(name); | |
648 | return res; | |
649 | } | |
650 | ||
bf9bccc1 DW |
651 | /** |
652 | * nvdimm_allocated_dpa - sum up the dpa currently allocated to this label_id | |
653 | * @nvdimm: container of dpa-resource-root + labels | |
654 | * @label_id: dpa resource name of the form {pmem|blk}-<human readable uuid> | |
655 | */ | |
656 | resource_size_t nvdimm_allocated_dpa(struct nvdimm_drvdata *ndd, | |
657 | struct nd_label_id *label_id) | |
658 | { | |
659 | resource_size_t allocated = 0; | |
660 | struct resource *res; | |
661 | ||
662 | for_each_dpa_resource(ndd, res) | |
663 | if (strcmp(res->name, label_id->id) == 0) | |
664 | allocated += resource_size(res); | |
665 | ||
666 | return allocated; | |
667 | } | |
668 | ||
4d88a97a DW |
669 | static int count_dimms(struct device *dev, void *c) |
670 | { | |
671 | int *count = c; | |
672 | ||
673 | if (is_nvdimm(dev)) | |
674 | (*count)++; | |
675 | return 0; | |
676 | } | |
677 | ||
678 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count) | |
679 | { | |
680 | int count = 0; | |
681 | /* Flush any possible dimm registration failures */ | |
682 | nd_synchronize(); | |
683 | ||
684 | device_for_each_child(&nvdimm_bus->dev, &count, count_dimms); | |
426824d6 | 685 | dev_dbg(&nvdimm_bus->dev, "count: %d\n", count); |
4d88a97a DW |
686 | if (count != dimm_count) |
687 | return -ENXIO; | |
688 | return 0; | |
689 | } | |
690 | EXPORT_SYMBOL_GPL(nvdimm_bus_check_dimm_count); | |
b354aba0 DW |
691 | |
692 | void __exit nvdimm_devs_exit(void) | |
693 | { | |
694 | ida_destroy(&dimm_ida); | |
695 | } |