Commit | Line | Data |
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e6dfb2de DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
4d88a97a | 14 | #include <linux/vmalloc.h> |
e6dfb2de | 15 | #include <linux/device.h> |
62232e45 | 16 | #include <linux/ndctl.h> |
e6dfb2de DW |
17 | #include <linux/slab.h> |
18 | #include <linux/io.h> | |
19 | #include <linux/fs.h> | |
20 | #include <linux/mm.h> | |
21 | #include "nd-core.h" | |
0ba1c634 | 22 | #include "label.h" |
ca6a4657 | 23 | #include "pmem.h" |
4d88a97a | 24 | #include "nd.h" |
e6dfb2de DW |
25 | |
26 | static DEFINE_IDA(dimm_ida); | |
27 | ||
4d88a97a DW |
28 | /* |
29 | * Retrieve bus and dimm handle and return if this bus supports | |
30 | * get_config_data commands | |
31 | */ | |
aee65987 | 32 | int nvdimm_check_config_data(struct device *dev) |
4d88a97a | 33 | { |
aee65987 | 34 | struct nvdimm *nvdimm = to_nvdimm(dev); |
4d88a97a | 35 | |
aee65987 TK |
36 | if (!nvdimm->cmd_mask || |
37 | !test_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm->cmd_mask)) { | |
8f078b38 | 38 | if (test_bit(NDD_ALIASING, &nvdimm->flags)) |
aee65987 TK |
39 | return -ENXIO; |
40 | else | |
41 | return -ENOTTY; | |
42 | } | |
4d88a97a DW |
43 | |
44 | return 0; | |
45 | } | |
46 | ||
47 | static int validate_dimm(struct nvdimm_drvdata *ndd) | |
48 | { | |
aee65987 | 49 | int rc; |
4d88a97a | 50 | |
aee65987 TK |
51 | if (!ndd) |
52 | return -EINVAL; | |
53 | ||
54 | rc = nvdimm_check_config_data(ndd->dev); | |
55 | if (rc) | |
4d88a97a DW |
56 | dev_dbg(ndd->dev, "%pf: %s error: %d\n", |
57 | __builtin_return_address(0), __func__, rc); | |
58 | return rc; | |
59 | } | |
60 | ||
61 | /** | |
62 | * nvdimm_init_nsarea - determine the geometry of a dimm's namespace area | |
63 | * @nvdimm: dimm to initialize | |
64 | */ | |
65 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd) | |
66 | { | |
67 | struct nd_cmd_get_config_size *cmd = &ndd->nsarea; | |
68 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
69 | struct nvdimm_bus_descriptor *nd_desc; | |
70 | int rc = validate_dimm(ndd); | |
9d62ed96 | 71 | int cmd_rc = 0; |
4d88a97a DW |
72 | |
73 | if (rc) | |
74 | return rc; | |
75 | ||
76 | if (cmd->config_size) | |
77 | return 0; /* already valid */ | |
78 | ||
79 | memset(cmd, 0, sizeof(*cmd)); | |
80 | nd_desc = nvdimm_bus->nd_desc; | |
9d62ed96 DW |
81 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
82 | ND_CMD_GET_CONFIG_SIZE, cmd, sizeof(*cmd), &cmd_rc); | |
83 | if (rc < 0) | |
84 | return rc; | |
85 | return cmd_rc; | |
4d88a97a DW |
86 | } |
87 | ||
2d657d17 AD |
88 | int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf, |
89 | size_t offset, size_t len) | |
4d88a97a DW |
90 | { |
91 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
2d657d17 | 92 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
e7c5a571 | 93 | int rc = validate_dimm(ndd), cmd_rc = 0; |
4d88a97a | 94 | struct nd_cmd_get_config_data_hdr *cmd; |
2d657d17 | 95 | size_t max_cmd_size, buf_offset; |
4d88a97a DW |
96 | |
97 | if (rc) | |
98 | return rc; | |
99 | ||
2d657d17 | 100 | if (offset + len > ndd->nsarea.config_size) |
4d88a97a | 101 | return -ENXIO; |
4d88a97a | 102 | |
2d657d17 | 103 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
d11cf4a7 | 104 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd), GFP_KERNEL); |
4d88a97a DW |
105 | if (!cmd) |
106 | return -ENOMEM; | |
107 | ||
2d657d17 AD |
108 | for (buf_offset = 0; len; |
109 | len -= cmd->in_length, buf_offset += cmd->in_length) { | |
110 | size_t cmd_size; | |
111 | ||
112 | cmd->in_offset = offset + buf_offset; | |
113 | cmd->in_length = min(max_cmd_size, len); | |
114 | ||
115 | cmd_size = sizeof(*cmd) + cmd->in_length; | |
116 | ||
4d88a97a | 117 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
2d657d17 | 118 | ND_CMD_GET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
e7c5a571 DW |
119 | if (rc < 0) |
120 | break; | |
121 | if (cmd_rc < 0) { | |
122 | rc = cmd_rc; | |
4d88a97a DW |
123 | break; |
124 | } | |
2d657d17 AD |
125 | |
126 | /* out_buf should be valid, copy it into our output buffer */ | |
127 | memcpy(buf + buf_offset, cmd->out_buf, cmd->in_length); | |
4d88a97a | 128 | } |
d11cf4a7 | 129 | kvfree(cmd); |
4d88a97a DW |
130 | |
131 | return rc; | |
132 | } | |
133 | ||
f524bf27 DW |
134 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
135 | void *buf, size_t len) | |
136 | { | |
f524bf27 DW |
137 | size_t max_cmd_size, buf_offset; |
138 | struct nd_cmd_set_config_hdr *cmd; | |
e7c5a571 | 139 | int rc = validate_dimm(ndd), cmd_rc = 0; |
f524bf27 DW |
140 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
141 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; | |
142 | ||
143 | if (rc) | |
144 | return rc; | |
145 | ||
f524bf27 DW |
146 | if (offset + len > ndd->nsarea.config_size) |
147 | return -ENXIO; | |
148 | ||
d11cf4a7 DW |
149 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
150 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd) + sizeof(u32), GFP_KERNEL); | |
f524bf27 DW |
151 | if (!cmd) |
152 | return -ENOMEM; | |
153 | ||
154 | for (buf_offset = 0; len; len -= cmd->in_length, | |
155 | buf_offset += cmd->in_length) { | |
156 | size_t cmd_size; | |
f524bf27 DW |
157 | |
158 | cmd->in_offset = offset + buf_offset; | |
159 | cmd->in_length = min(max_cmd_size, len); | |
160 | memcpy(cmd->in_buf, buf + buf_offset, cmd->in_length); | |
161 | ||
162 | /* status is output in the last 4-bytes of the command buffer */ | |
163 | cmd_size = sizeof(*cmd) + cmd->in_length + sizeof(u32); | |
f524bf27 DW |
164 | |
165 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), | |
e7c5a571 DW |
166 | ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
167 | if (rc < 0) | |
168 | break; | |
169 | if (cmd_rc < 0) { | |
170 | rc = cmd_rc; | |
f524bf27 DW |
171 | break; |
172 | } | |
173 | } | |
d11cf4a7 | 174 | kvfree(cmd); |
f524bf27 DW |
175 | |
176 | return rc; | |
177 | } | |
178 | ||
42237e39 DW |
179 | void nvdimm_set_aliasing(struct device *dev) |
180 | { | |
181 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
182 | ||
8f078b38 DW |
183 | set_bit(NDD_ALIASING, &nvdimm->flags); |
184 | } | |
185 | ||
186 | void nvdimm_set_locked(struct device *dev) | |
187 | { | |
188 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
189 | ||
190 | set_bit(NDD_LOCKED, &nvdimm->flags); | |
42237e39 DW |
191 | } |
192 | ||
d34cb808 DW |
193 | void nvdimm_clear_locked(struct device *dev) |
194 | { | |
195 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
196 | ||
197 | clear_bit(NDD_LOCKED, &nvdimm->flags); | |
198 | } | |
199 | ||
e6dfb2de DW |
200 | static void nvdimm_release(struct device *dev) |
201 | { | |
202 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
203 | ||
204 | ida_simple_remove(&dimm_ida, nvdimm->id); | |
205 | kfree(nvdimm); | |
206 | } | |
207 | ||
208 | static struct device_type nvdimm_device_type = { | |
209 | .name = "nvdimm", | |
210 | .release = nvdimm_release, | |
211 | }; | |
212 | ||
62232e45 | 213 | bool is_nvdimm(struct device *dev) |
e6dfb2de DW |
214 | { |
215 | return dev->type == &nvdimm_device_type; | |
216 | } | |
217 | ||
218 | struct nvdimm *to_nvdimm(struct device *dev) | |
219 | { | |
220 | struct nvdimm *nvdimm = container_of(dev, struct nvdimm, dev); | |
221 | ||
222 | WARN_ON(!is_nvdimm(dev)); | |
223 | return nvdimm; | |
224 | } | |
225 | EXPORT_SYMBOL_GPL(to_nvdimm); | |
226 | ||
047fc8a1 RZ |
227 | struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr) |
228 | { | |
229 | struct nd_region *nd_region = &ndbr->nd_region; | |
230 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; | |
231 | ||
232 | return nd_mapping->nvdimm; | |
233 | } | |
234 | EXPORT_SYMBOL_GPL(nd_blk_region_to_dimm); | |
235 | ||
ca6a4657 DW |
236 | unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr) |
237 | { | |
238 | /* pmem mapping properties are private to libnvdimm */ | |
239 | return ARCH_MEMREMAP_PMEM; | |
240 | } | |
241 | EXPORT_SYMBOL_GPL(nd_blk_memremap_flags); | |
242 | ||
bf9bccc1 DW |
243 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping) |
244 | { | |
245 | struct nvdimm *nvdimm = nd_mapping->nvdimm; | |
246 | ||
247 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); | |
248 | ||
249 | return dev_get_drvdata(&nvdimm->dev); | |
250 | } | |
251 | EXPORT_SYMBOL(to_ndd); | |
252 | ||
253 | void nvdimm_drvdata_release(struct kref *kref) | |
254 | { | |
255 | struct nvdimm_drvdata *ndd = container_of(kref, typeof(*ndd), kref); | |
256 | struct device *dev = ndd->dev; | |
257 | struct resource *res, *_r; | |
258 | ||
426824d6 | 259 | dev_dbg(dev, "trace\n"); |
bf9bccc1 DW |
260 | nvdimm_bus_lock(dev); |
261 | for_each_dpa_resource_safe(ndd, res, _r) | |
262 | nvdimm_free_dpa(ndd, res); | |
263 | nvdimm_bus_unlock(dev); | |
264 | ||
a06a7576 | 265 | kvfree(ndd->data); |
bf9bccc1 DW |
266 | kfree(ndd); |
267 | put_device(dev); | |
268 | } | |
269 | ||
270 | void get_ndd(struct nvdimm_drvdata *ndd) | |
271 | { | |
272 | kref_get(&ndd->kref); | |
273 | } | |
274 | ||
275 | void put_ndd(struct nvdimm_drvdata *ndd) | |
276 | { | |
277 | if (ndd) | |
278 | kref_put(&ndd->kref, nvdimm_drvdata_release); | |
279 | } | |
280 | ||
e6dfb2de DW |
281 | const char *nvdimm_name(struct nvdimm *nvdimm) |
282 | { | |
283 | return dev_name(&nvdimm->dev); | |
284 | } | |
285 | EXPORT_SYMBOL_GPL(nvdimm_name); | |
286 | ||
ba9c8dd3 DW |
287 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm) |
288 | { | |
289 | return &nvdimm->dev.kobj; | |
290 | } | |
291 | EXPORT_SYMBOL_GPL(nvdimm_kobj); | |
292 | ||
e3654eca DW |
293 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm) |
294 | { | |
295 | return nvdimm->cmd_mask; | |
296 | } | |
297 | EXPORT_SYMBOL_GPL(nvdimm_cmd_mask); | |
298 | ||
e6dfb2de DW |
299 | void *nvdimm_provider_data(struct nvdimm *nvdimm) |
300 | { | |
62232e45 DW |
301 | if (nvdimm) |
302 | return nvdimm->provider_data; | |
303 | return NULL; | |
e6dfb2de DW |
304 | } |
305 | EXPORT_SYMBOL_GPL(nvdimm_provider_data); | |
306 | ||
62232e45 DW |
307 | static ssize_t commands_show(struct device *dev, |
308 | struct device_attribute *attr, char *buf) | |
309 | { | |
310 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
311 | int cmd, len = 0; | |
312 | ||
e3654eca | 313 | if (!nvdimm->cmd_mask) |
62232e45 DW |
314 | return sprintf(buf, "\n"); |
315 | ||
e3654eca | 316 | for_each_set_bit(cmd, &nvdimm->cmd_mask, BITS_PER_LONG) |
62232e45 DW |
317 | len += sprintf(buf + len, "%s ", nvdimm_cmd_name(cmd)); |
318 | len += sprintf(buf + len, "\n"); | |
319 | return len; | |
320 | } | |
321 | static DEVICE_ATTR_RO(commands); | |
322 | ||
efbf6f50 DW |
323 | static ssize_t flags_show(struct device *dev, |
324 | struct device_attribute *attr, char *buf) | |
325 | { | |
326 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
327 | ||
328 | return sprintf(buf, "%s%s\n", | |
329 | test_bit(NDD_ALIASING, &nvdimm->flags) ? "alias " : "", | |
330 | test_bit(NDD_LOCKED, &nvdimm->flags) ? "lock " : ""); | |
331 | } | |
332 | static DEVICE_ATTR_RO(flags); | |
333 | ||
eaf96153 DW |
334 | static ssize_t state_show(struct device *dev, struct device_attribute *attr, |
335 | char *buf) | |
336 | { | |
337 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
338 | ||
339 | /* | |
340 | * The state may be in the process of changing, userspace should | |
341 | * quiesce probing if it wants a static answer | |
342 | */ | |
343 | nvdimm_bus_lock(dev); | |
344 | nvdimm_bus_unlock(dev); | |
345 | return sprintf(buf, "%s\n", atomic_read(&nvdimm->busy) | |
346 | ? "active" : "idle"); | |
347 | } | |
348 | static DEVICE_ATTR_RO(state); | |
349 | ||
0ba1c634 DW |
350 | static ssize_t available_slots_show(struct device *dev, |
351 | struct device_attribute *attr, char *buf) | |
352 | { | |
353 | struct nvdimm_drvdata *ndd = dev_get_drvdata(dev); | |
354 | ssize_t rc; | |
355 | u32 nfree; | |
356 | ||
357 | if (!ndd) | |
358 | return -ENXIO; | |
359 | ||
360 | nvdimm_bus_lock(dev); | |
361 | nfree = nd_label_nfree(ndd); | |
362 | if (nfree - 1 > nfree) { | |
363 | dev_WARN_ONCE(dev, 1, "we ate our last label?\n"); | |
364 | nfree = 0; | |
365 | } else | |
366 | nfree--; | |
367 | rc = sprintf(buf, "%d\n", nfree); | |
368 | nvdimm_bus_unlock(dev); | |
369 | return rc; | |
370 | } | |
371 | static DEVICE_ATTR_RO(available_slots); | |
372 | ||
3c13e2ac | 373 | __weak ssize_t security_show(struct device *dev, |
f2989396 DJ |
374 | struct device_attribute *attr, char *buf) |
375 | { | |
376 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
377 | ||
378 | switch (nvdimm->sec.state) { | |
379 | case NVDIMM_SECURITY_DISABLED: | |
380 | return sprintf(buf, "disabled\n"); | |
381 | case NVDIMM_SECURITY_UNLOCKED: | |
382 | return sprintf(buf, "unlocked\n"); | |
383 | case NVDIMM_SECURITY_LOCKED: | |
384 | return sprintf(buf, "locked\n"); | |
385 | case NVDIMM_SECURITY_FROZEN: | |
386 | return sprintf(buf, "frozen\n"); | |
387 | case NVDIMM_SECURITY_OVERWRITE: | |
388 | return sprintf(buf, "overwrite\n"); | |
89fa9d8e DJ |
389 | default: |
390 | return -ENOTTY; | |
f2989396 DJ |
391 | } |
392 | ||
393 | return -ENOTTY; | |
394 | } | |
37833fb7 | 395 | |
89fa9d8e DJ |
396 | #define OPS \ |
397 | C( OP_FREEZE, "freeze", 1), \ | |
398 | C( OP_DISABLE, "disable", 2), \ | |
399 | C( OP_UPDATE, "update", 3), \ | |
400 | C( OP_ERASE, "erase", 2), \ | |
401 | C( OP_OVERWRITE, "overwrite", 2), \ | |
402 | C( OP_MASTER_UPDATE, "master_update", 3), \ | |
403 | C( OP_MASTER_ERASE, "master_erase", 2) | |
03b65b22 DJ |
404 | #undef C |
405 | #define C(a, b, c) a | |
406 | enum nvdimmsec_op_ids { OPS }; | |
407 | #undef C | |
408 | #define C(a, b, c) { b, c } | |
409 | static struct { | |
410 | const char *name; | |
411 | int args; | |
412 | } ops[] = { OPS }; | |
413 | #undef C | |
414 | ||
415 | #define SEC_CMD_SIZE 32 | |
416 | #define KEY_ID_SIZE 10 | |
417 | ||
37833fb7 DJ |
418 | static ssize_t __security_store(struct device *dev, const char *buf, size_t len) |
419 | { | |
420 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
421 | ssize_t rc; | |
03b65b22 DJ |
422 | char cmd[SEC_CMD_SIZE+1], keystr[KEY_ID_SIZE+1], |
423 | nkeystr[KEY_ID_SIZE+1]; | |
424 | unsigned int key, newkey; | |
425 | int i; | |
37833fb7 DJ |
426 | |
427 | if (atomic_read(&nvdimm->busy)) | |
428 | return -EBUSY; | |
429 | ||
03b65b22 DJ |
430 | rc = sscanf(buf, "%"__stringify(SEC_CMD_SIZE)"s" |
431 | " %"__stringify(KEY_ID_SIZE)"s" | |
432 | " %"__stringify(KEY_ID_SIZE)"s", | |
433 | cmd, keystr, nkeystr); | |
434 | if (rc < 1) | |
435 | return -EINVAL; | |
436 | for (i = 0; i < ARRAY_SIZE(ops); i++) | |
437 | if (sysfs_streq(cmd, ops[i].name)) | |
438 | break; | |
439 | if (i >= ARRAY_SIZE(ops)) | |
440 | return -EINVAL; | |
441 | if (ops[i].args > 1) | |
442 | rc = kstrtouint(keystr, 0, &key); | |
443 | if (rc >= 0 && ops[i].args > 2) | |
444 | rc = kstrtouint(nkeystr, 0, &newkey); | |
445 | if (rc < 0) | |
446 | return rc; | |
447 | ||
448 | if (i == OP_FREEZE) { | |
37833fb7 DJ |
449 | dev_dbg(dev, "freeze\n"); |
450 | rc = nvdimm_security_freeze(nvdimm); | |
03b65b22 DJ |
451 | } else if (i == OP_DISABLE) { |
452 | dev_dbg(dev, "disable %u\n", key); | |
453 | rc = nvdimm_security_disable(nvdimm, key); | |
d2a4ac73 DJ |
454 | } else if (i == OP_UPDATE) { |
455 | dev_dbg(dev, "update %u %u\n", key, newkey); | |
89fa9d8e | 456 | rc = nvdimm_security_update(nvdimm, key, newkey, NVDIMM_USER); |
64e77c8c DJ |
457 | } else if (i == OP_ERASE) { |
458 | dev_dbg(dev, "erase %u\n", key); | |
89fa9d8e | 459 | rc = nvdimm_security_erase(nvdimm, key, NVDIMM_USER); |
7d988097 DJ |
460 | } else if (i == OP_OVERWRITE) { |
461 | dev_dbg(dev, "overwrite %u\n", key); | |
462 | rc = nvdimm_security_overwrite(nvdimm, key); | |
89fa9d8e DJ |
463 | } else if (i == OP_MASTER_UPDATE) { |
464 | dev_dbg(dev, "master_update %u %u\n", key, newkey); | |
465 | rc = nvdimm_security_update(nvdimm, key, newkey, | |
466 | NVDIMM_MASTER); | |
467 | } else if (i == OP_MASTER_ERASE) { | |
468 | dev_dbg(dev, "master_erase %u\n", key); | |
469 | rc = nvdimm_security_erase(nvdimm, key, | |
470 | NVDIMM_MASTER); | |
37833fb7 DJ |
471 | } else |
472 | return -EINVAL; | |
473 | ||
474 | if (rc == 0) | |
475 | rc = len; | |
476 | return rc; | |
37833fb7 DJ |
477 | } |
478 | ||
479 | static ssize_t security_store(struct device *dev, | |
480 | struct device_attribute *attr, const char *buf, size_t len) | |
481 | ||
482 | { | |
483 | ssize_t rc; | |
484 | ||
485 | /* | |
486 | * Require all userspace triggered security management to be | |
487 | * done while probing is idle and the DIMM is not in active use | |
488 | * in any region. | |
489 | */ | |
490 | device_lock(dev); | |
491 | nvdimm_bus_lock(dev); | |
492 | wait_nvdimm_bus_probe_idle(dev); | |
493 | rc = __security_store(dev, buf, len); | |
494 | nvdimm_bus_unlock(dev); | |
495 | device_unlock(dev); | |
496 | ||
497 | return rc; | |
498 | } | |
499 | static DEVICE_ATTR_RW(security); | |
f2989396 | 500 | |
62232e45 | 501 | static struct attribute *nvdimm_attributes[] = { |
eaf96153 | 502 | &dev_attr_state.attr, |
efbf6f50 | 503 | &dev_attr_flags.attr, |
62232e45 | 504 | &dev_attr_commands.attr, |
0ba1c634 | 505 | &dev_attr_available_slots.attr, |
f2989396 | 506 | &dev_attr_security.attr, |
62232e45 DW |
507 | NULL, |
508 | }; | |
509 | ||
f2989396 DJ |
510 | static umode_t nvdimm_visible(struct kobject *kobj, struct attribute *a, int n) |
511 | { | |
512 | struct device *dev = container_of(kobj, typeof(*dev), kobj); | |
513 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
514 | ||
515 | if (a != &dev_attr_security.attr) | |
516 | return a->mode; | |
517 | if (nvdimm->sec.state < 0) | |
518 | return 0; | |
37833fb7 | 519 | /* Are there any state mutation ops? */ |
d2a4ac73 | 520 | if (nvdimm->sec.ops->freeze || nvdimm->sec.ops->disable |
64e77c8c | 521 | || nvdimm->sec.ops->change_key |
7d988097 DJ |
522 | || nvdimm->sec.ops->erase |
523 | || nvdimm->sec.ops->overwrite) | |
37833fb7 DJ |
524 | return a->mode; |
525 | return 0444; | |
f2989396 DJ |
526 | } |
527 | ||
62232e45 DW |
528 | struct attribute_group nvdimm_attribute_group = { |
529 | .attrs = nvdimm_attributes, | |
f2989396 | 530 | .is_visible = nvdimm_visible, |
62232e45 DW |
531 | }; |
532 | EXPORT_SYMBOL_GPL(nvdimm_attribute_group); | |
533 | ||
d6548ae4 DJ |
534 | struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, |
535 | void *provider_data, const struct attribute_group **groups, | |
536 | unsigned long flags, unsigned long cmd_mask, int num_flush, | |
f2989396 DJ |
537 | struct resource *flush_wpq, const char *dimm_id, |
538 | const struct nvdimm_security_ops *sec_ops) | |
e6dfb2de DW |
539 | { |
540 | struct nvdimm *nvdimm = kzalloc(sizeof(*nvdimm), GFP_KERNEL); | |
541 | struct device *dev; | |
542 | ||
543 | if (!nvdimm) | |
544 | return NULL; | |
545 | ||
546 | nvdimm->id = ida_simple_get(&dimm_ida, 0, 0, GFP_KERNEL); | |
547 | if (nvdimm->id < 0) { | |
548 | kfree(nvdimm); | |
549 | return NULL; | |
550 | } | |
d6548ae4 DJ |
551 | |
552 | nvdimm->dimm_id = dimm_id; | |
e6dfb2de DW |
553 | nvdimm->provider_data = provider_data; |
554 | nvdimm->flags = flags; | |
e3654eca | 555 | nvdimm->cmd_mask = cmd_mask; |
e5ae3b25 DW |
556 | nvdimm->num_flush = num_flush; |
557 | nvdimm->flush_wpq = flush_wpq; | |
eaf96153 | 558 | atomic_set(&nvdimm->busy, 0); |
e6dfb2de DW |
559 | dev = &nvdimm->dev; |
560 | dev_set_name(dev, "nmem%d", nvdimm->id); | |
561 | dev->parent = &nvdimm_bus->dev; | |
562 | dev->type = &nvdimm_device_type; | |
62232e45 | 563 | dev->devt = MKDEV(nvdimm_major, nvdimm->id); |
e6dfb2de | 564 | dev->groups = groups; |
f2989396 | 565 | nvdimm->sec.ops = sec_ops; |
7d988097 DJ |
566 | nvdimm->sec.overwrite_tmo = 0; |
567 | INIT_DELAYED_WORK(&nvdimm->dwork, nvdimm_security_overwrite_query); | |
f2989396 DJ |
568 | /* |
569 | * Security state must be initialized before device_add() for | |
570 | * attribute visibility. | |
571 | */ | |
89fa9d8e DJ |
572 | /* get security state and extended (master) state */ |
573 | nvdimm->sec.state = nvdimm_security_state(nvdimm, NVDIMM_USER); | |
574 | nvdimm->sec.ext_state = nvdimm_security_state(nvdimm, NVDIMM_MASTER); | |
4d88a97a | 575 | nd_device_register(dev); |
e6dfb2de DW |
576 | |
577 | return nvdimm; | |
578 | } | |
d6548ae4 | 579 | EXPORT_SYMBOL_GPL(__nvdimm_create); |
4d88a97a | 580 | |
1cd73865 | 581 | static void shutdown_security_notify(void *data) |
7d988097 | 582 | { |
1cd73865 DW |
583 | struct nvdimm *nvdimm = data; |
584 | ||
585 | sysfs_put(nvdimm->sec.overwrite_state); | |
586 | } | |
587 | ||
588 | int nvdimm_security_setup_events(struct device *dev) | |
589 | { | |
590 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
591 | ||
592 | if (nvdimm->sec.state < 0 || !nvdimm->sec.ops | |
593 | || !nvdimm->sec.ops->overwrite) | |
594 | return 0; | |
595 | nvdimm->sec.overwrite_state = sysfs_get_dirent(dev->kobj.sd, "security"); | |
7d988097 | 596 | if (!nvdimm->sec.overwrite_state) |
1cd73865 DW |
597 | return -ENOMEM; |
598 | ||
599 | return devm_add_action_or_reset(dev, shutdown_security_notify, nvdimm); | |
7d988097 DJ |
600 | } |
601 | EXPORT_SYMBOL_GPL(nvdimm_security_setup_events); | |
602 | ||
603 | int nvdimm_in_overwrite(struct nvdimm *nvdimm) | |
604 | { | |
605 | return test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags); | |
606 | } | |
607 | EXPORT_SYMBOL_GPL(nvdimm_in_overwrite); | |
608 | ||
37833fb7 DJ |
609 | int nvdimm_security_freeze(struct nvdimm *nvdimm) |
610 | { | |
611 | int rc; | |
612 | ||
613 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); | |
614 | ||
615 | if (!nvdimm->sec.ops || !nvdimm->sec.ops->freeze) | |
616 | return -EOPNOTSUPP; | |
617 | ||
618 | if (nvdimm->sec.state < 0) | |
619 | return -EIO; | |
620 | ||
7d988097 DJ |
621 | if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) { |
622 | dev_warn(&nvdimm->dev, "Overwrite operation in progress.\n"); | |
623 | return -EBUSY; | |
624 | } | |
625 | ||
37833fb7 | 626 | rc = nvdimm->sec.ops->freeze(nvdimm); |
89fa9d8e | 627 | nvdimm->sec.state = nvdimm_security_state(nvdimm, NVDIMM_USER); |
37833fb7 DJ |
628 | |
629 | return rc; | |
630 | } | |
631 | ||
762d067d | 632 | int alias_dpa_busy(struct device *dev, void *data) |
a1f3e4d6 | 633 | { |
fe514739 | 634 | resource_size_t map_end, blk_start, new; |
a1f3e4d6 DW |
635 | struct blk_alloc_info *info = data; |
636 | struct nd_mapping *nd_mapping; | |
637 | struct nd_region *nd_region; | |
638 | struct nvdimm_drvdata *ndd; | |
639 | struct resource *res; | |
640 | int i; | |
641 | ||
c9e582aa | 642 | if (!is_memory(dev)) |
a1f3e4d6 DW |
643 | return 0; |
644 | ||
645 | nd_region = to_nd_region(dev); | |
646 | for (i = 0; i < nd_region->ndr_mappings; i++) { | |
647 | nd_mapping = &nd_region->mapping[i]; | |
648 | if (nd_mapping->nvdimm == info->nd_mapping->nvdimm) | |
649 | break; | |
650 | } | |
651 | ||
652 | if (i >= nd_region->ndr_mappings) | |
653 | return 0; | |
654 | ||
655 | ndd = to_ndd(nd_mapping); | |
656 | map_end = nd_mapping->start + nd_mapping->size - 1; | |
657 | blk_start = nd_mapping->start; | |
762d067d DW |
658 | |
659 | /* | |
660 | * In the allocation case ->res is set to free space that we are | |
661 | * looking to validate against PMEM aliasing collision rules | |
662 | * (i.e. BLK is allocated after all aliased PMEM). | |
663 | */ | |
664 | if (info->res) { | |
665 | if (info->res->start >= nd_mapping->start | |
666 | && info->res->start < map_end) | |
667 | /* pass */; | |
668 | else | |
669 | return 0; | |
670 | } | |
671 | ||
a1f3e4d6 DW |
672 | retry: |
673 | /* | |
674 | * Find the free dpa from the end of the last pmem allocation to | |
fe514739 | 675 | * the end of the interleave-set mapping. |
a1f3e4d6 | 676 | */ |
a1f3e4d6 | 677 | for_each_dpa_resource(ndd, res) { |
fe514739 DW |
678 | if (strncmp(res->name, "pmem", 4) != 0) |
679 | continue; | |
a1f3e4d6 DW |
680 | if ((res->start >= blk_start && res->start < map_end) |
681 | || (res->end >= blk_start | |
682 | && res->end <= map_end)) { | |
fe514739 DW |
683 | new = max(blk_start, min(map_end + 1, res->end + 1)); |
684 | if (new != blk_start) { | |
685 | blk_start = new; | |
686 | goto retry; | |
687 | } | |
a1f3e4d6 DW |
688 | } |
689 | } | |
690 | ||
762d067d DW |
691 | /* update the free space range with the probed blk_start */ |
692 | if (info->res && blk_start > info->res->start) { | |
693 | info->res->start = max(info->res->start, blk_start); | |
694 | if (info->res->start > info->res->end) | |
695 | info->res->end = info->res->start - 1; | |
696 | return 1; | |
697 | } | |
698 | ||
fe514739 | 699 | info->available -= blk_start - nd_mapping->start; |
762d067d | 700 | |
a1f3e4d6 DW |
701 | return 0; |
702 | } | |
703 | ||
1b40e09a DW |
704 | /** |
705 | * nd_blk_available_dpa - account the unused dpa of BLK region | |
706 | * @nd_mapping: container of dpa-resource-root + labels | |
707 | * | |
a1f3e4d6 DW |
708 | * Unlike PMEM, BLK namespaces can occupy discontiguous DPA ranges, but |
709 | * we arrange for them to never start at an lower dpa than the last | |
710 | * PMEM allocation in an aliased region. | |
1b40e09a | 711 | */ |
a1f3e4d6 | 712 | resource_size_t nd_blk_available_dpa(struct nd_region *nd_region) |
1b40e09a | 713 | { |
a1f3e4d6 DW |
714 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev); |
715 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; | |
1b40e09a | 716 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
a1f3e4d6 DW |
717 | struct blk_alloc_info info = { |
718 | .nd_mapping = nd_mapping, | |
719 | .available = nd_mapping->size, | |
762d067d | 720 | .res = NULL, |
a1f3e4d6 | 721 | }; |
1b40e09a DW |
722 | struct resource *res; |
723 | ||
724 | if (!ndd) | |
725 | return 0; | |
726 | ||
a1f3e4d6 | 727 | device_for_each_child(&nvdimm_bus->dev, &info, alias_dpa_busy); |
1b40e09a | 728 | |
a1f3e4d6 DW |
729 | /* now account for busy blk allocations in unaliased dpa */ |
730 | for_each_dpa_resource(ndd, res) { | |
731 | if (strncmp(res->name, "blk", 3) != 0) | |
732 | continue; | |
fe514739 | 733 | info.available -= resource_size(res); |
a1f3e4d6 DW |
734 | } |
735 | ||
736 | return info.available; | |
1b40e09a DW |
737 | } |
738 | ||
12e3129e KB |
739 | /** |
740 | * nd_pmem_max_contiguous_dpa - For the given dimm+region, return the max | |
741 | * contiguous unallocated dpa range. | |
742 | * @nd_region: constrain available space check to this reference region | |
743 | * @nd_mapping: container of dpa-resource-root + labels | |
744 | */ | |
745 | resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region, | |
746 | struct nd_mapping *nd_mapping) | |
747 | { | |
748 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); | |
749 | struct nvdimm_bus *nvdimm_bus; | |
750 | resource_size_t max = 0; | |
751 | struct resource *res; | |
752 | ||
753 | /* if a dimm is disabled the available capacity is zero */ | |
754 | if (!ndd) | |
755 | return 0; | |
756 | ||
757 | nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
758 | if (__reserve_free_pmem(&nd_region->dev, nd_mapping->nvdimm)) | |
759 | return 0; | |
760 | for_each_dpa_resource(ndd, res) { | |
761 | if (strcmp(res->name, "pmem-reserve") != 0) | |
762 | continue; | |
763 | if (resource_size(res) > max) | |
764 | max = resource_size(res); | |
765 | } | |
766 | release_free_pmem(nvdimm_bus, nd_mapping); | |
767 | return max; | |
768 | } | |
769 | ||
bf9bccc1 DW |
770 | /** |
771 | * nd_pmem_available_dpa - for the given dimm+region account unallocated dpa | |
772 | * @nd_mapping: container of dpa-resource-root + labels | |
773 | * @nd_region: constrain available space check to this reference region | |
774 | * @overlap: calculate available space assuming this level of overlap | |
775 | * | |
776 | * Validate that a PMEM label, if present, aligns with the start of an | |
777 | * interleave set and truncate the available size at the lowest BLK | |
778 | * overlap point. | |
779 | * | |
780 | * The expectation is that this routine is called multiple times as it | |
781 | * probes for the largest BLK encroachment for any single member DIMM of | |
782 | * the interleave set. Once that value is determined the PMEM-limit for | |
783 | * the set can be established. | |
784 | */ | |
785 | resource_size_t nd_pmem_available_dpa(struct nd_region *nd_region, | |
786 | struct nd_mapping *nd_mapping, resource_size_t *overlap) | |
787 | { | |
788 | resource_size_t map_start, map_end, busy = 0, available, blk_start; | |
789 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); | |
790 | struct resource *res; | |
791 | const char *reason; | |
792 | ||
793 | if (!ndd) | |
794 | return 0; | |
795 | ||
796 | map_start = nd_mapping->start; | |
797 | map_end = map_start + nd_mapping->size - 1; | |
798 | blk_start = max(map_start, map_end + 1 - *overlap); | |
a1f3e4d6 | 799 | for_each_dpa_resource(ndd, res) { |
bf9bccc1 DW |
800 | if (res->start >= map_start && res->start < map_end) { |
801 | if (strncmp(res->name, "blk", 3) == 0) | |
a1f3e4d6 DW |
802 | blk_start = min(blk_start, |
803 | max(map_start, res->start)); | |
804 | else if (res->end > map_end) { | |
bf9bccc1 DW |
805 | reason = "misaligned to iset"; |
806 | goto err; | |
a1f3e4d6 | 807 | } else |
bf9bccc1 | 808 | busy += resource_size(res); |
bf9bccc1 DW |
809 | } else if (res->end >= map_start && res->end <= map_end) { |
810 | if (strncmp(res->name, "blk", 3) == 0) { | |
811 | /* | |
812 | * If a BLK allocation overlaps the start of | |
813 | * PMEM the entire interleave set may now only | |
814 | * be used for BLK. | |
815 | */ | |
816 | blk_start = map_start; | |
a1f3e4d6 DW |
817 | } else |
818 | busy += resource_size(res); | |
bf9bccc1 DW |
819 | } else if (map_start > res->start && map_start < res->end) { |
820 | /* total eclipse of the mapping */ | |
821 | busy += nd_mapping->size; | |
822 | blk_start = map_start; | |
823 | } | |
a1f3e4d6 | 824 | } |
bf9bccc1 DW |
825 | |
826 | *overlap = map_end + 1 - blk_start; | |
827 | available = blk_start - map_start; | |
828 | if (busy < available) | |
829 | return available - busy; | |
830 | return 0; | |
831 | ||
832 | err: | |
bf9bccc1 DW |
833 | nd_dbg_dpa(nd_region, ndd, res, "%s\n", reason); |
834 | return 0; | |
835 | } | |
836 | ||
4a826c83 DW |
837 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res) |
838 | { | |
839 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); | |
840 | kfree(res->name); | |
841 | __release_region(&ndd->dpa, res->start, resource_size(res)); | |
842 | } | |
843 | ||
844 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, | |
845 | struct nd_label_id *label_id, resource_size_t start, | |
846 | resource_size_t n) | |
847 | { | |
848 | char *name = kmemdup(label_id, sizeof(*label_id), GFP_KERNEL); | |
849 | struct resource *res; | |
850 | ||
851 | if (!name) | |
852 | return NULL; | |
853 | ||
854 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); | |
855 | res = __request_region(&ndd->dpa, start, n, name, 0); | |
856 | if (!res) | |
857 | kfree(name); | |
858 | return res; | |
859 | } | |
860 | ||
bf9bccc1 DW |
861 | /** |
862 | * nvdimm_allocated_dpa - sum up the dpa currently allocated to this label_id | |
863 | * @nvdimm: container of dpa-resource-root + labels | |
864 | * @label_id: dpa resource name of the form {pmem|blk}-<human readable uuid> | |
865 | */ | |
866 | resource_size_t nvdimm_allocated_dpa(struct nvdimm_drvdata *ndd, | |
867 | struct nd_label_id *label_id) | |
868 | { | |
869 | resource_size_t allocated = 0; | |
870 | struct resource *res; | |
871 | ||
872 | for_each_dpa_resource(ndd, res) | |
873 | if (strcmp(res->name, label_id->id) == 0) | |
874 | allocated += resource_size(res); | |
875 | ||
876 | return allocated; | |
877 | } | |
878 | ||
4d88a97a DW |
879 | static int count_dimms(struct device *dev, void *c) |
880 | { | |
881 | int *count = c; | |
882 | ||
883 | if (is_nvdimm(dev)) | |
884 | (*count)++; | |
885 | return 0; | |
886 | } | |
887 | ||
888 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count) | |
889 | { | |
890 | int count = 0; | |
891 | /* Flush any possible dimm registration failures */ | |
892 | nd_synchronize(); | |
893 | ||
894 | device_for_each_child(&nvdimm_bus->dev, &count, count_dimms); | |
426824d6 | 895 | dev_dbg(&nvdimm_bus->dev, "count: %d\n", count); |
4d88a97a DW |
896 | if (count != dimm_count) |
897 | return -ENXIO; | |
898 | return 0; | |
899 | } | |
900 | EXPORT_SYMBOL_GPL(nvdimm_bus_check_dimm_count); | |
b354aba0 DW |
901 | |
902 | void __exit nvdimm_devs_exit(void) | |
903 | { | |
904 | ida_destroy(&dimm_ida); | |
905 | } |