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5b497af4 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
e6dfb2de DW |
2 | /* |
3 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
e6dfb2de DW |
4 | */ |
5 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
d5d30d5a | 6 | #include <linux/moduleparam.h> |
4d88a97a | 7 | #include <linux/vmalloc.h> |
e6dfb2de | 8 | #include <linux/device.h> |
62232e45 | 9 | #include <linux/ndctl.h> |
e6dfb2de DW |
10 | #include <linux/slab.h> |
11 | #include <linux/io.h> | |
12 | #include <linux/fs.h> | |
13 | #include <linux/mm.h> | |
14 | #include "nd-core.h" | |
0ba1c634 | 15 | #include "label.h" |
ca6a4657 | 16 | #include "pmem.h" |
4d88a97a | 17 | #include "nd.h" |
e6dfb2de DW |
18 | |
19 | static DEFINE_IDA(dimm_ida); | |
20 | ||
4d88a97a DW |
21 | /* |
22 | * Retrieve bus and dimm handle and return if this bus supports | |
23 | * get_config_data commands | |
24 | */ | |
aee65987 | 25 | int nvdimm_check_config_data(struct device *dev) |
4d88a97a | 26 | { |
aee65987 | 27 | struct nvdimm *nvdimm = to_nvdimm(dev); |
4d88a97a | 28 | |
aee65987 TK |
29 | if (!nvdimm->cmd_mask || |
30 | !test_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm->cmd_mask)) { | |
a0e37452 | 31 | if (test_bit(NDD_LABELING, &nvdimm->flags)) |
aee65987 TK |
32 | return -ENXIO; |
33 | else | |
34 | return -ENOTTY; | |
35 | } | |
4d88a97a DW |
36 | |
37 | return 0; | |
38 | } | |
39 | ||
40 | static int validate_dimm(struct nvdimm_drvdata *ndd) | |
41 | { | |
aee65987 | 42 | int rc; |
4d88a97a | 43 | |
aee65987 TK |
44 | if (!ndd) |
45 | return -EINVAL; | |
46 | ||
47 | rc = nvdimm_check_config_data(ndd->dev); | |
48 | if (rc) | |
d75f773c | 49 | dev_dbg(ndd->dev, "%ps: %s error: %d\n", |
4d88a97a DW |
50 | __builtin_return_address(0), __func__, rc); |
51 | return rc; | |
52 | } | |
53 | ||
54 | /** | |
55 | * nvdimm_init_nsarea - determine the geometry of a dimm's namespace area | |
56 | * @nvdimm: dimm to initialize | |
57 | */ | |
58 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd) | |
59 | { | |
60 | struct nd_cmd_get_config_size *cmd = &ndd->nsarea; | |
61 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
62 | struct nvdimm_bus_descriptor *nd_desc; | |
63 | int rc = validate_dimm(ndd); | |
9d62ed96 | 64 | int cmd_rc = 0; |
4d88a97a DW |
65 | |
66 | if (rc) | |
67 | return rc; | |
68 | ||
69 | if (cmd->config_size) | |
70 | return 0; /* already valid */ | |
71 | ||
72 | memset(cmd, 0, sizeof(*cmd)); | |
73 | nd_desc = nvdimm_bus->nd_desc; | |
9d62ed96 DW |
74 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
75 | ND_CMD_GET_CONFIG_SIZE, cmd, sizeof(*cmd), &cmd_rc); | |
76 | if (rc < 0) | |
77 | return rc; | |
78 | return cmd_rc; | |
4d88a97a DW |
79 | } |
80 | ||
2d657d17 AD |
81 | int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf, |
82 | size_t offset, size_t len) | |
4d88a97a DW |
83 | { |
84 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
2d657d17 | 85 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
e7c5a571 | 86 | int rc = validate_dimm(ndd), cmd_rc = 0; |
4d88a97a | 87 | struct nd_cmd_get_config_data_hdr *cmd; |
2d657d17 | 88 | size_t max_cmd_size, buf_offset; |
4d88a97a DW |
89 | |
90 | if (rc) | |
91 | return rc; | |
92 | ||
2d657d17 | 93 | if (offset + len > ndd->nsarea.config_size) |
4d88a97a | 94 | return -ENXIO; |
4d88a97a | 95 | |
2d657d17 | 96 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
d11cf4a7 | 97 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd), GFP_KERNEL); |
4d88a97a DW |
98 | if (!cmd) |
99 | return -ENOMEM; | |
100 | ||
2d657d17 AD |
101 | for (buf_offset = 0; len; |
102 | len -= cmd->in_length, buf_offset += cmd->in_length) { | |
103 | size_t cmd_size; | |
104 | ||
105 | cmd->in_offset = offset + buf_offset; | |
106 | cmd->in_length = min(max_cmd_size, len); | |
107 | ||
108 | cmd_size = sizeof(*cmd) + cmd->in_length; | |
109 | ||
4d88a97a | 110 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
2d657d17 | 111 | ND_CMD_GET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
e7c5a571 DW |
112 | if (rc < 0) |
113 | break; | |
114 | if (cmd_rc < 0) { | |
115 | rc = cmd_rc; | |
4d88a97a DW |
116 | break; |
117 | } | |
2d657d17 AD |
118 | |
119 | /* out_buf should be valid, copy it into our output buffer */ | |
120 | memcpy(buf + buf_offset, cmd->out_buf, cmd->in_length); | |
4d88a97a | 121 | } |
d11cf4a7 | 122 | kvfree(cmd); |
4d88a97a DW |
123 | |
124 | return rc; | |
125 | } | |
126 | ||
f524bf27 DW |
127 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
128 | void *buf, size_t len) | |
129 | { | |
f524bf27 DW |
130 | size_t max_cmd_size, buf_offset; |
131 | struct nd_cmd_set_config_hdr *cmd; | |
e7c5a571 | 132 | int rc = validate_dimm(ndd), cmd_rc = 0; |
f524bf27 DW |
133 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
134 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; | |
135 | ||
136 | if (rc) | |
137 | return rc; | |
138 | ||
f524bf27 DW |
139 | if (offset + len > ndd->nsarea.config_size) |
140 | return -ENXIO; | |
141 | ||
d11cf4a7 DW |
142 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
143 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd) + sizeof(u32), GFP_KERNEL); | |
f524bf27 DW |
144 | if (!cmd) |
145 | return -ENOMEM; | |
146 | ||
147 | for (buf_offset = 0; len; len -= cmd->in_length, | |
148 | buf_offset += cmd->in_length) { | |
149 | size_t cmd_size; | |
f524bf27 DW |
150 | |
151 | cmd->in_offset = offset + buf_offset; | |
152 | cmd->in_length = min(max_cmd_size, len); | |
153 | memcpy(cmd->in_buf, buf + buf_offset, cmd->in_length); | |
154 | ||
155 | /* status is output in the last 4-bytes of the command buffer */ | |
156 | cmd_size = sizeof(*cmd) + cmd->in_length + sizeof(u32); | |
f524bf27 DW |
157 | |
158 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), | |
e7c5a571 DW |
159 | ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
160 | if (rc < 0) | |
161 | break; | |
162 | if (cmd_rc < 0) { | |
163 | rc = cmd_rc; | |
f524bf27 DW |
164 | break; |
165 | } | |
166 | } | |
d11cf4a7 | 167 | kvfree(cmd); |
f524bf27 DW |
168 | |
169 | return rc; | |
170 | } | |
171 | ||
a0e37452 | 172 | void nvdimm_set_labeling(struct device *dev) |
42237e39 DW |
173 | { |
174 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
175 | ||
a0e37452 | 176 | set_bit(NDD_LABELING, &nvdimm->flags); |
8f078b38 DW |
177 | } |
178 | ||
179 | void nvdimm_set_locked(struct device *dev) | |
180 | { | |
181 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
182 | ||
183 | set_bit(NDD_LOCKED, &nvdimm->flags); | |
42237e39 DW |
184 | } |
185 | ||
d34cb808 DW |
186 | void nvdimm_clear_locked(struct device *dev) |
187 | { | |
188 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
189 | ||
190 | clear_bit(NDD_LOCKED, &nvdimm->flags); | |
191 | } | |
192 | ||
e6dfb2de DW |
193 | static void nvdimm_release(struct device *dev) |
194 | { | |
195 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
196 | ||
197 | ida_simple_remove(&dimm_ida, nvdimm->id); | |
198 | kfree(nvdimm); | |
199 | } | |
200 | ||
e6dfb2de DW |
201 | struct nvdimm *to_nvdimm(struct device *dev) |
202 | { | |
203 | struct nvdimm *nvdimm = container_of(dev, struct nvdimm, dev); | |
204 | ||
205 | WARN_ON(!is_nvdimm(dev)); | |
206 | return nvdimm; | |
207 | } | |
208 | EXPORT_SYMBOL_GPL(to_nvdimm); | |
209 | ||
bf9bccc1 DW |
210 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping) |
211 | { | |
212 | struct nvdimm *nvdimm = nd_mapping->nvdimm; | |
213 | ||
214 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); | |
215 | ||
216 | return dev_get_drvdata(&nvdimm->dev); | |
217 | } | |
218 | EXPORT_SYMBOL(to_ndd); | |
219 | ||
220 | void nvdimm_drvdata_release(struct kref *kref) | |
221 | { | |
222 | struct nvdimm_drvdata *ndd = container_of(kref, typeof(*ndd), kref); | |
223 | struct device *dev = ndd->dev; | |
224 | struct resource *res, *_r; | |
225 | ||
426824d6 | 226 | dev_dbg(dev, "trace\n"); |
bf9bccc1 DW |
227 | nvdimm_bus_lock(dev); |
228 | for_each_dpa_resource_safe(ndd, res, _r) | |
229 | nvdimm_free_dpa(ndd, res); | |
230 | nvdimm_bus_unlock(dev); | |
231 | ||
a06a7576 | 232 | kvfree(ndd->data); |
bf9bccc1 DW |
233 | kfree(ndd); |
234 | put_device(dev); | |
235 | } | |
236 | ||
237 | void get_ndd(struct nvdimm_drvdata *ndd) | |
238 | { | |
239 | kref_get(&ndd->kref); | |
240 | } | |
241 | ||
242 | void put_ndd(struct nvdimm_drvdata *ndd) | |
243 | { | |
244 | if (ndd) | |
245 | kref_put(&ndd->kref, nvdimm_drvdata_release); | |
246 | } | |
247 | ||
e6dfb2de DW |
248 | const char *nvdimm_name(struct nvdimm *nvdimm) |
249 | { | |
250 | return dev_name(&nvdimm->dev); | |
251 | } | |
252 | EXPORT_SYMBOL_GPL(nvdimm_name); | |
253 | ||
ba9c8dd3 DW |
254 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm) |
255 | { | |
256 | return &nvdimm->dev.kobj; | |
257 | } | |
258 | EXPORT_SYMBOL_GPL(nvdimm_kobj); | |
259 | ||
e3654eca DW |
260 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm) |
261 | { | |
262 | return nvdimm->cmd_mask; | |
263 | } | |
264 | EXPORT_SYMBOL_GPL(nvdimm_cmd_mask); | |
265 | ||
e6dfb2de DW |
266 | void *nvdimm_provider_data(struct nvdimm *nvdimm) |
267 | { | |
62232e45 DW |
268 | if (nvdimm) |
269 | return nvdimm->provider_data; | |
270 | return NULL; | |
e6dfb2de DW |
271 | } |
272 | EXPORT_SYMBOL_GPL(nvdimm_provider_data); | |
273 | ||
62232e45 DW |
274 | static ssize_t commands_show(struct device *dev, |
275 | struct device_attribute *attr, char *buf) | |
276 | { | |
277 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
278 | int cmd, len = 0; | |
279 | ||
e3654eca | 280 | if (!nvdimm->cmd_mask) |
62232e45 DW |
281 | return sprintf(buf, "\n"); |
282 | ||
e3654eca | 283 | for_each_set_bit(cmd, &nvdimm->cmd_mask, BITS_PER_LONG) |
62232e45 DW |
284 | len += sprintf(buf + len, "%s ", nvdimm_cmd_name(cmd)); |
285 | len += sprintf(buf + len, "\n"); | |
286 | return len; | |
287 | } | |
288 | static DEVICE_ATTR_RO(commands); | |
289 | ||
efbf6f50 DW |
290 | static ssize_t flags_show(struct device *dev, |
291 | struct device_attribute *attr, char *buf) | |
292 | { | |
293 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
294 | ||
3b6c6c03 | 295 | return sprintf(buf, "%s%s\n", |
a0e37452 | 296 | test_bit(NDD_LABELING, &nvdimm->flags) ? "label " : "", |
efbf6f50 DW |
297 | test_bit(NDD_LOCKED, &nvdimm->flags) ? "lock " : ""); |
298 | } | |
299 | static DEVICE_ATTR_RO(flags); | |
300 | ||
eaf96153 DW |
301 | static ssize_t state_show(struct device *dev, struct device_attribute *attr, |
302 | char *buf) | |
303 | { | |
304 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
305 | ||
306 | /* | |
307 | * The state may be in the process of changing, userspace should | |
308 | * quiesce probing if it wants a static answer | |
309 | */ | |
310 | nvdimm_bus_lock(dev); | |
311 | nvdimm_bus_unlock(dev); | |
312 | return sprintf(buf, "%s\n", atomic_read(&nvdimm->busy) | |
313 | ? "active" : "idle"); | |
314 | } | |
315 | static DEVICE_ATTR_RO(state); | |
316 | ||
7018c897 | 317 | static ssize_t __available_slots_show(struct nvdimm_drvdata *ndd, char *buf) |
0ba1c634 | 318 | { |
7018c897 | 319 | struct device *dev; |
0ba1c634 DW |
320 | ssize_t rc; |
321 | u32 nfree; | |
322 | ||
323 | if (!ndd) | |
324 | return -ENXIO; | |
325 | ||
7018c897 | 326 | dev = ndd->dev; |
0ba1c634 DW |
327 | nvdimm_bus_lock(dev); |
328 | nfree = nd_label_nfree(ndd); | |
329 | if (nfree - 1 > nfree) { | |
330 | dev_WARN_ONCE(dev, 1, "we ate our last label?\n"); | |
331 | nfree = 0; | |
332 | } else | |
333 | nfree--; | |
334 | rc = sprintf(buf, "%d\n", nfree); | |
335 | nvdimm_bus_unlock(dev); | |
336 | return rc; | |
337 | } | |
7018c897 DW |
338 | |
339 | static ssize_t available_slots_show(struct device *dev, | |
340 | struct device_attribute *attr, char *buf) | |
341 | { | |
342 | ssize_t rc; | |
343 | ||
344 | nd_device_lock(dev); | |
345 | rc = __available_slots_show(dev_get_drvdata(dev), buf); | |
346 | nd_device_unlock(dev); | |
347 | ||
348 | return rc; | |
349 | } | |
0ba1c634 DW |
350 | static DEVICE_ATTR_RO(available_slots); |
351 | ||
3c13e2ac | 352 | __weak ssize_t security_show(struct device *dev, |
f2989396 DJ |
353 | struct device_attribute *attr, char *buf) |
354 | { | |
355 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
356 | ||
7c02d53d JC |
357 | if (test_bit(NVDIMM_SECURITY_OVERWRITE, &nvdimm->sec.flags)) |
358 | return sprintf(buf, "overwrite\n"); | |
d78c620a | 359 | if (test_bit(NVDIMM_SECURITY_DISABLED, &nvdimm->sec.flags)) |
f2989396 | 360 | return sprintf(buf, "disabled\n"); |
d78c620a | 361 | if (test_bit(NVDIMM_SECURITY_UNLOCKED, &nvdimm->sec.flags)) |
f2989396 | 362 | return sprintf(buf, "unlocked\n"); |
d78c620a | 363 | if (test_bit(NVDIMM_SECURITY_LOCKED, &nvdimm->sec.flags)) |
f2989396 | 364 | return sprintf(buf, "locked\n"); |
f2989396 DJ |
365 | return -ENOTTY; |
366 | } | |
37833fb7 | 367 | |
d78c620a DW |
368 | static ssize_t frozen_show(struct device *dev, |
369 | struct device_attribute *attr, char *buf) | |
370 | { | |
371 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
372 | ||
373 | return sprintf(buf, "%d\n", test_bit(NVDIMM_SECURITY_FROZEN, | |
374 | &nvdimm->sec.flags)); | |
375 | } | |
376 | static DEVICE_ATTR_RO(frozen); | |
377 | ||
37833fb7 DJ |
378 | static ssize_t security_store(struct device *dev, |
379 | struct device_attribute *attr, const char *buf, size_t len) | |
380 | ||
381 | { | |
382 | ssize_t rc; | |
383 | ||
384 | /* | |
385 | * Require all userspace triggered security management to be | |
386 | * done while probing is idle and the DIMM is not in active use | |
387 | * in any region. | |
388 | */ | |
87a30e1f | 389 | nd_device_lock(dev); |
37833fb7 DJ |
390 | nvdimm_bus_lock(dev); |
391 | wait_nvdimm_bus_probe_idle(dev); | |
7b60422c | 392 | rc = nvdimm_security_store(dev, buf, len); |
37833fb7 | 393 | nvdimm_bus_unlock(dev); |
87a30e1f | 394 | nd_device_unlock(dev); |
37833fb7 DJ |
395 | |
396 | return rc; | |
397 | } | |
398 | static DEVICE_ATTR_RW(security); | |
f2989396 | 399 | |
62232e45 | 400 | static struct attribute *nvdimm_attributes[] = { |
eaf96153 | 401 | &dev_attr_state.attr, |
efbf6f50 | 402 | &dev_attr_flags.attr, |
62232e45 | 403 | &dev_attr_commands.attr, |
0ba1c634 | 404 | &dev_attr_available_slots.attr, |
f2989396 | 405 | &dev_attr_security.attr, |
d78c620a | 406 | &dev_attr_frozen.attr, |
62232e45 DW |
407 | NULL, |
408 | }; | |
409 | ||
f2989396 DJ |
410 | static umode_t nvdimm_visible(struct kobject *kobj, struct attribute *a, int n) |
411 | { | |
412 | struct device *dev = container_of(kobj, typeof(*dev), kobj); | |
413 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
414 | ||
d78c620a | 415 | if (a != &dev_attr_security.attr && a != &dev_attr_frozen.attr) |
f2989396 | 416 | return a->mode; |
d78c620a | 417 | if (!nvdimm->sec.flags) |
f2989396 | 418 | return 0; |
d78c620a DW |
419 | |
420 | if (a == &dev_attr_security.attr) { | |
421 | /* Are there any state mutation ops (make writable)? */ | |
422 | if (nvdimm->sec.ops->freeze || nvdimm->sec.ops->disable | |
423 | || nvdimm->sec.ops->change_key | |
424 | || nvdimm->sec.ops->erase | |
425 | || nvdimm->sec.ops->overwrite) | |
426 | return a->mode; | |
427 | return 0444; | |
428 | } | |
429 | ||
430 | if (nvdimm->sec.ops->freeze) | |
37833fb7 | 431 | return a->mode; |
d78c620a | 432 | return 0; |
f2989396 DJ |
433 | } |
434 | ||
360eba7e | 435 | static const struct attribute_group nvdimm_attribute_group = { |
62232e45 | 436 | .attrs = nvdimm_attributes, |
f2989396 | 437 | .is_visible = nvdimm_visible, |
62232e45 | 438 | }; |
360eba7e | 439 | |
48001ea5 DW |
440 | static ssize_t result_show(struct device *dev, struct device_attribute *attr, char *buf) |
441 | { | |
442 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
443 | enum nvdimm_fwa_result result; | |
444 | ||
445 | if (!nvdimm->fw_ops) | |
446 | return -EOPNOTSUPP; | |
447 | ||
448 | nvdimm_bus_lock(dev); | |
449 | result = nvdimm->fw_ops->activate_result(nvdimm); | |
450 | nvdimm_bus_unlock(dev); | |
451 | ||
452 | switch (result) { | |
453 | case NVDIMM_FWA_RESULT_NONE: | |
454 | return sprintf(buf, "none\n"); | |
455 | case NVDIMM_FWA_RESULT_SUCCESS: | |
456 | return sprintf(buf, "success\n"); | |
457 | case NVDIMM_FWA_RESULT_FAIL: | |
458 | return sprintf(buf, "fail\n"); | |
459 | case NVDIMM_FWA_RESULT_NOTSTAGED: | |
460 | return sprintf(buf, "not_staged\n"); | |
461 | case NVDIMM_FWA_RESULT_NEEDRESET: | |
462 | return sprintf(buf, "need_reset\n"); | |
463 | default: | |
464 | return -ENXIO; | |
465 | } | |
466 | } | |
467 | static DEVICE_ATTR_ADMIN_RO(result); | |
468 | ||
469 | static ssize_t activate_show(struct device *dev, struct device_attribute *attr, char *buf) | |
470 | { | |
471 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
472 | enum nvdimm_fwa_state state; | |
473 | ||
474 | if (!nvdimm->fw_ops) | |
475 | return -EOPNOTSUPP; | |
476 | ||
477 | nvdimm_bus_lock(dev); | |
478 | state = nvdimm->fw_ops->activate_state(nvdimm); | |
479 | nvdimm_bus_unlock(dev); | |
480 | ||
481 | switch (state) { | |
482 | case NVDIMM_FWA_IDLE: | |
483 | return sprintf(buf, "idle\n"); | |
484 | case NVDIMM_FWA_BUSY: | |
485 | return sprintf(buf, "busy\n"); | |
486 | case NVDIMM_FWA_ARMED: | |
487 | return sprintf(buf, "armed\n"); | |
488 | default: | |
489 | return -ENXIO; | |
490 | } | |
491 | } | |
492 | ||
493 | static ssize_t activate_store(struct device *dev, struct device_attribute *attr, | |
494 | const char *buf, size_t len) | |
495 | { | |
496 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
497 | enum nvdimm_fwa_trigger arg; | |
498 | int rc; | |
499 | ||
500 | if (!nvdimm->fw_ops) | |
501 | return -EOPNOTSUPP; | |
502 | ||
503 | if (sysfs_streq(buf, "arm")) | |
504 | arg = NVDIMM_FWA_ARM; | |
505 | else if (sysfs_streq(buf, "disarm")) | |
506 | arg = NVDIMM_FWA_DISARM; | |
507 | else | |
508 | return -EINVAL; | |
509 | ||
510 | nvdimm_bus_lock(dev); | |
511 | rc = nvdimm->fw_ops->arm(nvdimm, arg); | |
512 | nvdimm_bus_unlock(dev); | |
513 | ||
514 | if (rc < 0) | |
515 | return rc; | |
516 | return len; | |
517 | } | |
518 | static DEVICE_ATTR_ADMIN_RW(activate); | |
519 | ||
520 | static struct attribute *nvdimm_firmware_attributes[] = { | |
521 | &dev_attr_activate.attr, | |
522 | &dev_attr_result.attr, | |
62c78927 | 523 | NULL, |
48001ea5 DW |
524 | }; |
525 | ||
526 | static umode_t nvdimm_firmware_visible(struct kobject *kobj, struct attribute *a, int n) | |
527 | { | |
528 | struct device *dev = container_of(kobj, typeof(*dev), kobj); | |
529 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev); | |
530 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; | |
531 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
532 | enum nvdimm_fwa_capability cap; | |
533 | ||
534 | if (!nd_desc->fw_ops) | |
535 | return 0; | |
536 | if (!nvdimm->fw_ops) | |
537 | return 0; | |
538 | ||
539 | nvdimm_bus_lock(dev); | |
540 | cap = nd_desc->fw_ops->capability(nd_desc); | |
541 | nvdimm_bus_unlock(dev); | |
542 | ||
543 | if (cap < NVDIMM_FWA_CAP_QUIESCE) | |
544 | return 0; | |
545 | ||
546 | return a->mode; | |
547 | } | |
548 | ||
549 | static const struct attribute_group nvdimm_firmware_attribute_group = { | |
550 | .name = "firmware", | |
551 | .attrs = nvdimm_firmware_attributes, | |
552 | .is_visible = nvdimm_firmware_visible, | |
553 | }; | |
554 | ||
360eba7e DW |
555 | static const struct attribute_group *nvdimm_attribute_groups[] = { |
556 | &nd_device_attribute_group, | |
557 | &nvdimm_attribute_group, | |
48001ea5 | 558 | &nvdimm_firmware_attribute_group, |
360eba7e DW |
559 | NULL, |
560 | }; | |
561 | ||
562 | static const struct device_type nvdimm_device_type = { | |
563 | .name = "nvdimm", | |
564 | .release = nvdimm_release, | |
565 | .groups = nvdimm_attribute_groups, | |
566 | }; | |
567 | ||
568 | bool is_nvdimm(struct device *dev) | |
569 | { | |
570 | return dev->type == &nvdimm_device_type; | |
571 | } | |
62232e45 | 572 | |
d6548ae4 DJ |
573 | struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, |
574 | void *provider_data, const struct attribute_group **groups, | |
575 | unsigned long flags, unsigned long cmd_mask, int num_flush, | |
f2989396 | 576 | struct resource *flush_wpq, const char *dimm_id, |
a1facc1f DW |
577 | const struct nvdimm_security_ops *sec_ops, |
578 | const struct nvdimm_fw_ops *fw_ops) | |
e6dfb2de DW |
579 | { |
580 | struct nvdimm *nvdimm = kzalloc(sizeof(*nvdimm), GFP_KERNEL); | |
581 | struct device *dev; | |
582 | ||
583 | if (!nvdimm) | |
584 | return NULL; | |
585 | ||
586 | nvdimm->id = ida_simple_get(&dimm_ida, 0, 0, GFP_KERNEL); | |
587 | if (nvdimm->id < 0) { | |
588 | kfree(nvdimm); | |
589 | return NULL; | |
590 | } | |
d6548ae4 DJ |
591 | |
592 | nvdimm->dimm_id = dimm_id; | |
e6dfb2de DW |
593 | nvdimm->provider_data = provider_data; |
594 | nvdimm->flags = flags; | |
e3654eca | 595 | nvdimm->cmd_mask = cmd_mask; |
e5ae3b25 DW |
596 | nvdimm->num_flush = num_flush; |
597 | nvdimm->flush_wpq = flush_wpq; | |
eaf96153 | 598 | atomic_set(&nvdimm->busy, 0); |
e6dfb2de DW |
599 | dev = &nvdimm->dev; |
600 | dev_set_name(dev, "nmem%d", nvdimm->id); | |
601 | dev->parent = &nvdimm_bus->dev; | |
602 | dev->type = &nvdimm_device_type; | |
62232e45 | 603 | dev->devt = MKDEV(nvdimm_major, nvdimm->id); |
e6dfb2de | 604 | dev->groups = groups; |
f2989396 | 605 | nvdimm->sec.ops = sec_ops; |
a1facc1f | 606 | nvdimm->fw_ops = fw_ops; |
7d988097 DJ |
607 | nvdimm->sec.overwrite_tmo = 0; |
608 | INIT_DELAYED_WORK(&nvdimm->dwork, nvdimm_security_overwrite_query); | |
f2989396 DJ |
609 | /* |
610 | * Security state must be initialized before device_add() for | |
611 | * attribute visibility. | |
612 | */ | |
89fa9d8e | 613 | /* get security state and extended (master) state */ |
d78c620a DW |
614 | nvdimm->sec.flags = nvdimm_security_flags(nvdimm, NVDIMM_USER); |
615 | nvdimm->sec.ext_flags = nvdimm_security_flags(nvdimm, NVDIMM_MASTER); | |
4d88a97a | 616 | nd_device_register(dev); |
e6dfb2de DW |
617 | |
618 | return nvdimm; | |
619 | } | |
d6548ae4 | 620 | EXPORT_SYMBOL_GPL(__nvdimm_create); |
4d88a97a | 621 | |
fd14602d DW |
622 | void nvdimm_delete(struct nvdimm *nvdimm) |
623 | { | |
624 | struct device *dev = &nvdimm->dev; | |
625 | bool dev_put = false; | |
626 | ||
627 | /* We are shutting down. Make state frozen artificially. */ | |
628 | nvdimm_bus_lock(dev); | |
629 | set_bit(NVDIMM_SECURITY_FROZEN, &nvdimm->sec.flags); | |
630 | if (test_and_clear_bit(NDD_WORK_PENDING, &nvdimm->flags)) | |
631 | dev_put = true; | |
632 | nvdimm_bus_unlock(dev); | |
633 | cancel_delayed_work_sync(&nvdimm->dwork); | |
634 | if (dev_put) | |
635 | put_device(dev); | |
636 | nd_device_unregister(dev, ND_SYNC); | |
637 | } | |
638 | EXPORT_SYMBOL_GPL(nvdimm_delete); | |
639 | ||
1cd73865 | 640 | static void shutdown_security_notify(void *data) |
7d988097 | 641 | { |
1cd73865 DW |
642 | struct nvdimm *nvdimm = data; |
643 | ||
644 | sysfs_put(nvdimm->sec.overwrite_state); | |
645 | } | |
646 | ||
647 | int nvdimm_security_setup_events(struct device *dev) | |
648 | { | |
649 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
650 | ||
d78c620a | 651 | if (!nvdimm->sec.flags || !nvdimm->sec.ops |
1cd73865 DW |
652 | || !nvdimm->sec.ops->overwrite) |
653 | return 0; | |
654 | nvdimm->sec.overwrite_state = sysfs_get_dirent(dev->kobj.sd, "security"); | |
7d988097 | 655 | if (!nvdimm->sec.overwrite_state) |
1cd73865 DW |
656 | return -ENOMEM; |
657 | ||
658 | return devm_add_action_or_reset(dev, shutdown_security_notify, nvdimm); | |
7d988097 DJ |
659 | } |
660 | EXPORT_SYMBOL_GPL(nvdimm_security_setup_events); | |
661 | ||
662 | int nvdimm_in_overwrite(struct nvdimm *nvdimm) | |
663 | { | |
664 | return test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags); | |
665 | } | |
666 | EXPORT_SYMBOL_GPL(nvdimm_in_overwrite); | |
667 | ||
37833fb7 DJ |
668 | int nvdimm_security_freeze(struct nvdimm *nvdimm) |
669 | { | |
670 | int rc; | |
671 | ||
672 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); | |
673 | ||
674 | if (!nvdimm->sec.ops || !nvdimm->sec.ops->freeze) | |
675 | return -EOPNOTSUPP; | |
676 | ||
d78c620a | 677 | if (!nvdimm->sec.flags) |
37833fb7 DJ |
678 | return -EIO; |
679 | ||
7d988097 DJ |
680 | if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) { |
681 | dev_warn(&nvdimm->dev, "Overwrite operation in progress.\n"); | |
682 | return -EBUSY; | |
683 | } | |
684 | ||
37833fb7 | 685 | rc = nvdimm->sec.ops->freeze(nvdimm); |
d78c620a | 686 | nvdimm->sec.flags = nvdimm_security_flags(nvdimm, NVDIMM_USER); |
37833fb7 DJ |
687 | |
688 | return rc; | |
689 | } | |
690 | ||
2522afb8 DW |
691 | static unsigned long dpa_align(struct nd_region *nd_region) |
692 | { | |
693 | struct device *dev = &nd_region->dev; | |
694 | ||
695 | if (dev_WARN_ONCE(dev, !is_nvdimm_bus_locked(dev), | |
696 | "bus lock required for capacity provision\n")) | |
697 | return 0; | |
698 | if (dev_WARN_ONCE(dev, !nd_region->ndr_mappings || nd_region->align | |
699 | % nd_region->ndr_mappings, | |
700 | "invalid region align %#lx mappings: %d\n", | |
701 | nd_region->align, nd_region->ndr_mappings)) | |
702 | return 0; | |
703 | return nd_region->align / nd_region->ndr_mappings; | |
704 | } | |
705 | ||
12e3129e KB |
706 | /** |
707 | * nd_pmem_max_contiguous_dpa - For the given dimm+region, return the max | |
708 | * contiguous unallocated dpa range. | |
709 | * @nd_region: constrain available space check to this reference region | |
710 | * @nd_mapping: container of dpa-resource-root + labels | |
711 | */ | |
712 | resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region, | |
713 | struct nd_mapping *nd_mapping) | |
714 | { | |
715 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); | |
716 | struct nvdimm_bus *nvdimm_bus; | |
717 | resource_size_t max = 0; | |
718 | struct resource *res; | |
2522afb8 | 719 | unsigned long align; |
12e3129e KB |
720 | |
721 | /* if a dimm is disabled the available capacity is zero */ | |
722 | if (!ndd) | |
723 | return 0; | |
724 | ||
2522afb8 DW |
725 | align = dpa_align(nd_region); |
726 | if (!align) | |
727 | return 0; | |
728 | ||
12e3129e KB |
729 | nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
730 | if (__reserve_free_pmem(&nd_region->dev, nd_mapping->nvdimm)) | |
731 | return 0; | |
732 | for_each_dpa_resource(ndd, res) { | |
2522afb8 DW |
733 | resource_size_t start, end; |
734 | ||
12e3129e KB |
735 | if (strcmp(res->name, "pmem-reserve") != 0) |
736 | continue; | |
2522afb8 DW |
737 | /* trim free space relative to current alignment setting */ |
738 | start = ALIGN(res->start, align); | |
739 | end = ALIGN_DOWN(res->end + 1, align) - 1; | |
740 | if (end < start) | |
741 | continue; | |
742 | if (end - start + 1 > max) | |
743 | max = end - start + 1; | |
12e3129e KB |
744 | } |
745 | release_free_pmem(nvdimm_bus, nd_mapping); | |
746 | return max; | |
747 | } | |
748 | ||
bf9bccc1 DW |
749 | /** |
750 | * nd_pmem_available_dpa - for the given dimm+region account unallocated dpa | |
751 | * @nd_mapping: container of dpa-resource-root + labels | |
752 | * @nd_region: constrain available space check to this reference region | |
bf9bccc1 DW |
753 | * |
754 | * Validate that a PMEM label, if present, aligns with the start of an | |
3b6c6c03 | 755 | * interleave set. |
bf9bccc1 DW |
756 | */ |
757 | resource_size_t nd_pmem_available_dpa(struct nd_region *nd_region, | |
3b6c6c03 | 758 | struct nd_mapping *nd_mapping) |
bf9bccc1 | 759 | { |
bf9bccc1 | 760 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
3b6c6c03 | 761 | resource_size_t map_start, map_end, busy = 0; |
bf9bccc1 | 762 | struct resource *res; |
2522afb8 | 763 | unsigned long align; |
bf9bccc1 DW |
764 | |
765 | if (!ndd) | |
766 | return 0; | |
767 | ||
2522afb8 DW |
768 | align = dpa_align(nd_region); |
769 | if (!align) | |
770 | return 0; | |
771 | ||
bf9bccc1 DW |
772 | map_start = nd_mapping->start; |
773 | map_end = map_start + nd_mapping->size - 1; | |
a1f3e4d6 | 774 | for_each_dpa_resource(ndd, res) { |
2522afb8 DW |
775 | resource_size_t start, end; |
776 | ||
777 | start = ALIGN_DOWN(res->start, align); | |
778 | end = ALIGN(res->end + 1, align) - 1; | |
779 | if (start >= map_start && start < map_end) { | |
3b6c6c03 DW |
780 | if (end > map_end) { |
781 | nd_dbg_dpa(nd_region, ndd, res, | |
782 | "misaligned to iset\n"); | |
783 | return 0; | |
784 | } | |
785 | busy += end - start + 1; | |
2522afb8 | 786 | } else if (end >= map_start && end <= map_end) { |
3b6c6c03 | 787 | busy += end - start + 1; |
2522afb8 | 788 | } else if (map_start > start && map_start < end) { |
bf9bccc1 DW |
789 | /* total eclipse of the mapping */ |
790 | busy += nd_mapping->size; | |
bf9bccc1 | 791 | } |
a1f3e4d6 | 792 | } |
bf9bccc1 | 793 | |
3b6c6c03 DW |
794 | if (busy < nd_mapping->size) |
795 | return ALIGN_DOWN(nd_mapping->size - busy, align); | |
bf9bccc1 DW |
796 | return 0; |
797 | } | |
798 | ||
4a826c83 DW |
799 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res) |
800 | { | |
801 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); | |
802 | kfree(res->name); | |
803 | __release_region(&ndd->dpa, res->start, resource_size(res)); | |
804 | } | |
805 | ||
806 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, | |
807 | struct nd_label_id *label_id, resource_size_t start, | |
808 | resource_size_t n) | |
809 | { | |
810 | char *name = kmemdup(label_id, sizeof(*label_id), GFP_KERNEL); | |
811 | struct resource *res; | |
812 | ||
813 | if (!name) | |
814 | return NULL; | |
815 | ||
816 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); | |
817 | res = __request_region(&ndd->dpa, start, n, name, 0); | |
818 | if (!res) | |
819 | kfree(name); | |
820 | return res; | |
821 | } | |
822 | ||
bf9bccc1 DW |
823 | /** |
824 | * nvdimm_allocated_dpa - sum up the dpa currently allocated to this label_id | |
825 | * @nvdimm: container of dpa-resource-root + labels | |
3b6c6c03 | 826 | * @label_id: dpa resource name of the form pmem-<human readable uuid> |
bf9bccc1 DW |
827 | */ |
828 | resource_size_t nvdimm_allocated_dpa(struct nvdimm_drvdata *ndd, | |
829 | struct nd_label_id *label_id) | |
830 | { | |
831 | resource_size_t allocated = 0; | |
832 | struct resource *res; | |
833 | ||
834 | for_each_dpa_resource(ndd, res) | |
835 | if (strcmp(res->name, label_id->id) == 0) | |
836 | allocated += resource_size(res); | |
837 | ||
838 | return allocated; | |
839 | } | |
840 | ||
4d88a97a DW |
841 | static int count_dimms(struct device *dev, void *c) |
842 | { | |
843 | int *count = c; | |
844 | ||
845 | if (is_nvdimm(dev)) | |
846 | (*count)++; | |
847 | return 0; | |
848 | } | |
849 | ||
850 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count) | |
851 | { | |
852 | int count = 0; | |
853 | /* Flush any possible dimm registration failures */ | |
854 | nd_synchronize(); | |
855 | ||
856 | device_for_each_child(&nvdimm_bus->dev, &count, count_dimms); | |
426824d6 | 857 | dev_dbg(&nvdimm_bus->dev, "count: %d\n", count); |
4d88a97a DW |
858 | if (count != dimm_count) |
859 | return -ENXIO; | |
860 | return 0; | |
861 | } | |
862 | EXPORT_SYMBOL_GPL(nvdimm_bus_check_dimm_count); | |
b354aba0 DW |
863 | |
864 | void __exit nvdimm_devs_exit(void) | |
865 | { | |
866 | ida_destroy(&dimm_ida); | |
867 | } |