Commit | Line | Data |
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e6dfb2de DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
d5d30d5a | 14 | #include <linux/moduleparam.h> |
4d88a97a | 15 | #include <linux/vmalloc.h> |
e6dfb2de | 16 | #include <linux/device.h> |
62232e45 | 17 | #include <linux/ndctl.h> |
e6dfb2de DW |
18 | #include <linux/slab.h> |
19 | #include <linux/io.h> | |
20 | #include <linux/fs.h> | |
21 | #include <linux/mm.h> | |
22 | #include "nd-core.h" | |
0ba1c634 | 23 | #include "label.h" |
ca6a4657 | 24 | #include "pmem.h" |
4d88a97a | 25 | #include "nd.h" |
e6dfb2de DW |
26 | |
27 | static DEFINE_IDA(dimm_ida); | |
28 | ||
d5d30d5a DW |
29 | static bool noblk; |
30 | module_param(noblk, bool, 0444); | |
31 | MODULE_PARM_DESC(noblk, "force disable BLK / local alias support"); | |
32 | ||
4d88a97a DW |
33 | /* |
34 | * Retrieve bus and dimm handle and return if this bus supports | |
35 | * get_config_data commands | |
36 | */ | |
aee65987 | 37 | int nvdimm_check_config_data(struct device *dev) |
4d88a97a | 38 | { |
aee65987 | 39 | struct nvdimm *nvdimm = to_nvdimm(dev); |
4d88a97a | 40 | |
aee65987 TK |
41 | if (!nvdimm->cmd_mask || |
42 | !test_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm->cmd_mask)) { | |
8f078b38 | 43 | if (test_bit(NDD_ALIASING, &nvdimm->flags)) |
aee65987 TK |
44 | return -ENXIO; |
45 | else | |
46 | return -ENOTTY; | |
47 | } | |
4d88a97a DW |
48 | |
49 | return 0; | |
50 | } | |
51 | ||
52 | static int validate_dimm(struct nvdimm_drvdata *ndd) | |
53 | { | |
aee65987 | 54 | int rc; |
4d88a97a | 55 | |
aee65987 TK |
56 | if (!ndd) |
57 | return -EINVAL; | |
58 | ||
59 | rc = nvdimm_check_config_data(ndd->dev); | |
60 | if (rc) | |
d75f773c | 61 | dev_dbg(ndd->dev, "%ps: %s error: %d\n", |
4d88a97a DW |
62 | __builtin_return_address(0), __func__, rc); |
63 | return rc; | |
64 | } | |
65 | ||
66 | /** | |
67 | * nvdimm_init_nsarea - determine the geometry of a dimm's namespace area | |
68 | * @nvdimm: dimm to initialize | |
69 | */ | |
70 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd) | |
71 | { | |
72 | struct nd_cmd_get_config_size *cmd = &ndd->nsarea; | |
73 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
74 | struct nvdimm_bus_descriptor *nd_desc; | |
75 | int rc = validate_dimm(ndd); | |
9d62ed96 | 76 | int cmd_rc = 0; |
4d88a97a DW |
77 | |
78 | if (rc) | |
79 | return rc; | |
80 | ||
81 | if (cmd->config_size) | |
82 | return 0; /* already valid */ | |
83 | ||
84 | memset(cmd, 0, sizeof(*cmd)); | |
85 | nd_desc = nvdimm_bus->nd_desc; | |
9d62ed96 DW |
86 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
87 | ND_CMD_GET_CONFIG_SIZE, cmd, sizeof(*cmd), &cmd_rc); | |
88 | if (rc < 0) | |
89 | return rc; | |
90 | return cmd_rc; | |
4d88a97a DW |
91 | } |
92 | ||
2d657d17 AD |
93 | int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf, |
94 | size_t offset, size_t len) | |
4d88a97a DW |
95 | { |
96 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
2d657d17 | 97 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
e7c5a571 | 98 | int rc = validate_dimm(ndd), cmd_rc = 0; |
4d88a97a | 99 | struct nd_cmd_get_config_data_hdr *cmd; |
2d657d17 | 100 | size_t max_cmd_size, buf_offset; |
4d88a97a DW |
101 | |
102 | if (rc) | |
103 | return rc; | |
104 | ||
2d657d17 | 105 | if (offset + len > ndd->nsarea.config_size) |
4d88a97a | 106 | return -ENXIO; |
4d88a97a | 107 | |
2d657d17 | 108 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
d11cf4a7 | 109 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd), GFP_KERNEL); |
4d88a97a DW |
110 | if (!cmd) |
111 | return -ENOMEM; | |
112 | ||
2d657d17 AD |
113 | for (buf_offset = 0; len; |
114 | len -= cmd->in_length, buf_offset += cmd->in_length) { | |
115 | size_t cmd_size; | |
116 | ||
117 | cmd->in_offset = offset + buf_offset; | |
118 | cmd->in_length = min(max_cmd_size, len); | |
119 | ||
120 | cmd_size = sizeof(*cmd) + cmd->in_length; | |
121 | ||
4d88a97a | 122 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
2d657d17 | 123 | ND_CMD_GET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
e7c5a571 DW |
124 | if (rc < 0) |
125 | break; | |
126 | if (cmd_rc < 0) { | |
127 | rc = cmd_rc; | |
4d88a97a DW |
128 | break; |
129 | } | |
2d657d17 AD |
130 | |
131 | /* out_buf should be valid, copy it into our output buffer */ | |
132 | memcpy(buf + buf_offset, cmd->out_buf, cmd->in_length); | |
4d88a97a | 133 | } |
d11cf4a7 | 134 | kvfree(cmd); |
4d88a97a DW |
135 | |
136 | return rc; | |
137 | } | |
138 | ||
f524bf27 DW |
139 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
140 | void *buf, size_t len) | |
141 | { | |
f524bf27 DW |
142 | size_t max_cmd_size, buf_offset; |
143 | struct nd_cmd_set_config_hdr *cmd; | |
e7c5a571 | 144 | int rc = validate_dimm(ndd), cmd_rc = 0; |
f524bf27 DW |
145 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
146 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; | |
147 | ||
148 | if (rc) | |
149 | return rc; | |
150 | ||
f524bf27 DW |
151 | if (offset + len > ndd->nsarea.config_size) |
152 | return -ENXIO; | |
153 | ||
d11cf4a7 DW |
154 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
155 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd) + sizeof(u32), GFP_KERNEL); | |
f524bf27 DW |
156 | if (!cmd) |
157 | return -ENOMEM; | |
158 | ||
159 | for (buf_offset = 0; len; len -= cmd->in_length, | |
160 | buf_offset += cmd->in_length) { | |
161 | size_t cmd_size; | |
f524bf27 DW |
162 | |
163 | cmd->in_offset = offset + buf_offset; | |
164 | cmd->in_length = min(max_cmd_size, len); | |
165 | memcpy(cmd->in_buf, buf + buf_offset, cmd->in_length); | |
166 | ||
167 | /* status is output in the last 4-bytes of the command buffer */ | |
168 | cmd_size = sizeof(*cmd) + cmd->in_length + sizeof(u32); | |
f524bf27 DW |
169 | |
170 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), | |
e7c5a571 DW |
171 | ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
172 | if (rc < 0) | |
173 | break; | |
174 | if (cmd_rc < 0) { | |
175 | rc = cmd_rc; | |
f524bf27 DW |
176 | break; |
177 | } | |
178 | } | |
d11cf4a7 | 179 | kvfree(cmd); |
f524bf27 DW |
180 | |
181 | return rc; | |
182 | } | |
183 | ||
42237e39 DW |
184 | void nvdimm_set_aliasing(struct device *dev) |
185 | { | |
186 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
187 | ||
8f078b38 DW |
188 | set_bit(NDD_ALIASING, &nvdimm->flags); |
189 | } | |
190 | ||
191 | void nvdimm_set_locked(struct device *dev) | |
192 | { | |
193 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
194 | ||
195 | set_bit(NDD_LOCKED, &nvdimm->flags); | |
42237e39 DW |
196 | } |
197 | ||
d34cb808 DW |
198 | void nvdimm_clear_locked(struct device *dev) |
199 | { | |
200 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
201 | ||
202 | clear_bit(NDD_LOCKED, &nvdimm->flags); | |
203 | } | |
204 | ||
e6dfb2de DW |
205 | static void nvdimm_release(struct device *dev) |
206 | { | |
207 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
208 | ||
209 | ida_simple_remove(&dimm_ida, nvdimm->id); | |
210 | kfree(nvdimm); | |
211 | } | |
212 | ||
213 | static struct device_type nvdimm_device_type = { | |
214 | .name = "nvdimm", | |
215 | .release = nvdimm_release, | |
216 | }; | |
217 | ||
62232e45 | 218 | bool is_nvdimm(struct device *dev) |
e6dfb2de DW |
219 | { |
220 | return dev->type == &nvdimm_device_type; | |
221 | } | |
222 | ||
223 | struct nvdimm *to_nvdimm(struct device *dev) | |
224 | { | |
225 | struct nvdimm *nvdimm = container_of(dev, struct nvdimm, dev); | |
226 | ||
227 | WARN_ON(!is_nvdimm(dev)); | |
228 | return nvdimm; | |
229 | } | |
230 | EXPORT_SYMBOL_GPL(to_nvdimm); | |
231 | ||
047fc8a1 RZ |
232 | struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr) |
233 | { | |
234 | struct nd_region *nd_region = &ndbr->nd_region; | |
235 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; | |
236 | ||
237 | return nd_mapping->nvdimm; | |
238 | } | |
239 | EXPORT_SYMBOL_GPL(nd_blk_region_to_dimm); | |
240 | ||
ca6a4657 DW |
241 | unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr) |
242 | { | |
243 | /* pmem mapping properties are private to libnvdimm */ | |
244 | return ARCH_MEMREMAP_PMEM; | |
245 | } | |
246 | EXPORT_SYMBOL_GPL(nd_blk_memremap_flags); | |
247 | ||
bf9bccc1 DW |
248 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping) |
249 | { | |
250 | struct nvdimm *nvdimm = nd_mapping->nvdimm; | |
251 | ||
252 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); | |
253 | ||
254 | return dev_get_drvdata(&nvdimm->dev); | |
255 | } | |
256 | EXPORT_SYMBOL(to_ndd); | |
257 | ||
258 | void nvdimm_drvdata_release(struct kref *kref) | |
259 | { | |
260 | struct nvdimm_drvdata *ndd = container_of(kref, typeof(*ndd), kref); | |
261 | struct device *dev = ndd->dev; | |
262 | struct resource *res, *_r; | |
263 | ||
426824d6 | 264 | dev_dbg(dev, "trace\n"); |
bf9bccc1 DW |
265 | nvdimm_bus_lock(dev); |
266 | for_each_dpa_resource_safe(ndd, res, _r) | |
267 | nvdimm_free_dpa(ndd, res); | |
268 | nvdimm_bus_unlock(dev); | |
269 | ||
a06a7576 | 270 | kvfree(ndd->data); |
bf9bccc1 DW |
271 | kfree(ndd); |
272 | put_device(dev); | |
273 | } | |
274 | ||
275 | void get_ndd(struct nvdimm_drvdata *ndd) | |
276 | { | |
277 | kref_get(&ndd->kref); | |
278 | } | |
279 | ||
280 | void put_ndd(struct nvdimm_drvdata *ndd) | |
281 | { | |
282 | if (ndd) | |
283 | kref_put(&ndd->kref, nvdimm_drvdata_release); | |
284 | } | |
285 | ||
e6dfb2de DW |
286 | const char *nvdimm_name(struct nvdimm *nvdimm) |
287 | { | |
288 | return dev_name(&nvdimm->dev); | |
289 | } | |
290 | EXPORT_SYMBOL_GPL(nvdimm_name); | |
291 | ||
ba9c8dd3 DW |
292 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm) |
293 | { | |
294 | return &nvdimm->dev.kobj; | |
295 | } | |
296 | EXPORT_SYMBOL_GPL(nvdimm_kobj); | |
297 | ||
e3654eca DW |
298 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm) |
299 | { | |
300 | return nvdimm->cmd_mask; | |
301 | } | |
302 | EXPORT_SYMBOL_GPL(nvdimm_cmd_mask); | |
303 | ||
e6dfb2de DW |
304 | void *nvdimm_provider_data(struct nvdimm *nvdimm) |
305 | { | |
62232e45 DW |
306 | if (nvdimm) |
307 | return nvdimm->provider_data; | |
308 | return NULL; | |
e6dfb2de DW |
309 | } |
310 | EXPORT_SYMBOL_GPL(nvdimm_provider_data); | |
311 | ||
62232e45 DW |
312 | static ssize_t commands_show(struct device *dev, |
313 | struct device_attribute *attr, char *buf) | |
314 | { | |
315 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
316 | int cmd, len = 0; | |
317 | ||
e3654eca | 318 | if (!nvdimm->cmd_mask) |
62232e45 DW |
319 | return sprintf(buf, "\n"); |
320 | ||
e3654eca | 321 | for_each_set_bit(cmd, &nvdimm->cmd_mask, BITS_PER_LONG) |
62232e45 DW |
322 | len += sprintf(buf + len, "%s ", nvdimm_cmd_name(cmd)); |
323 | len += sprintf(buf + len, "\n"); | |
324 | return len; | |
325 | } | |
326 | static DEVICE_ATTR_RO(commands); | |
327 | ||
efbf6f50 DW |
328 | static ssize_t flags_show(struct device *dev, |
329 | struct device_attribute *attr, char *buf) | |
330 | { | |
331 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
332 | ||
333 | return sprintf(buf, "%s%s\n", | |
334 | test_bit(NDD_ALIASING, &nvdimm->flags) ? "alias " : "", | |
335 | test_bit(NDD_LOCKED, &nvdimm->flags) ? "lock " : ""); | |
336 | } | |
337 | static DEVICE_ATTR_RO(flags); | |
338 | ||
eaf96153 DW |
339 | static ssize_t state_show(struct device *dev, struct device_attribute *attr, |
340 | char *buf) | |
341 | { | |
342 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
343 | ||
344 | /* | |
345 | * The state may be in the process of changing, userspace should | |
346 | * quiesce probing if it wants a static answer | |
347 | */ | |
348 | nvdimm_bus_lock(dev); | |
349 | nvdimm_bus_unlock(dev); | |
350 | return sprintf(buf, "%s\n", atomic_read(&nvdimm->busy) | |
351 | ? "active" : "idle"); | |
352 | } | |
353 | static DEVICE_ATTR_RO(state); | |
354 | ||
0ba1c634 DW |
355 | static ssize_t available_slots_show(struct device *dev, |
356 | struct device_attribute *attr, char *buf) | |
357 | { | |
358 | struct nvdimm_drvdata *ndd = dev_get_drvdata(dev); | |
359 | ssize_t rc; | |
360 | u32 nfree; | |
361 | ||
362 | if (!ndd) | |
363 | return -ENXIO; | |
364 | ||
365 | nvdimm_bus_lock(dev); | |
366 | nfree = nd_label_nfree(ndd); | |
367 | if (nfree - 1 > nfree) { | |
368 | dev_WARN_ONCE(dev, 1, "we ate our last label?\n"); | |
369 | nfree = 0; | |
370 | } else | |
371 | nfree--; | |
372 | rc = sprintf(buf, "%d\n", nfree); | |
373 | nvdimm_bus_unlock(dev); | |
374 | return rc; | |
375 | } | |
376 | static DEVICE_ATTR_RO(available_slots); | |
377 | ||
3c13e2ac | 378 | __weak ssize_t security_show(struct device *dev, |
f2989396 DJ |
379 | struct device_attribute *attr, char *buf) |
380 | { | |
381 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
382 | ||
383 | switch (nvdimm->sec.state) { | |
384 | case NVDIMM_SECURITY_DISABLED: | |
385 | return sprintf(buf, "disabled\n"); | |
386 | case NVDIMM_SECURITY_UNLOCKED: | |
387 | return sprintf(buf, "unlocked\n"); | |
388 | case NVDIMM_SECURITY_LOCKED: | |
389 | return sprintf(buf, "locked\n"); | |
390 | case NVDIMM_SECURITY_FROZEN: | |
391 | return sprintf(buf, "frozen\n"); | |
392 | case NVDIMM_SECURITY_OVERWRITE: | |
393 | return sprintf(buf, "overwrite\n"); | |
89fa9d8e DJ |
394 | default: |
395 | return -ENOTTY; | |
f2989396 DJ |
396 | } |
397 | ||
398 | return -ENOTTY; | |
399 | } | |
37833fb7 | 400 | |
89fa9d8e DJ |
401 | #define OPS \ |
402 | C( OP_FREEZE, "freeze", 1), \ | |
403 | C( OP_DISABLE, "disable", 2), \ | |
404 | C( OP_UPDATE, "update", 3), \ | |
405 | C( OP_ERASE, "erase", 2), \ | |
406 | C( OP_OVERWRITE, "overwrite", 2), \ | |
407 | C( OP_MASTER_UPDATE, "master_update", 3), \ | |
408 | C( OP_MASTER_ERASE, "master_erase", 2) | |
03b65b22 DJ |
409 | #undef C |
410 | #define C(a, b, c) a | |
411 | enum nvdimmsec_op_ids { OPS }; | |
412 | #undef C | |
413 | #define C(a, b, c) { b, c } | |
414 | static struct { | |
415 | const char *name; | |
416 | int args; | |
417 | } ops[] = { OPS }; | |
418 | #undef C | |
419 | ||
420 | #define SEC_CMD_SIZE 32 | |
421 | #define KEY_ID_SIZE 10 | |
422 | ||
37833fb7 DJ |
423 | static ssize_t __security_store(struct device *dev, const char *buf, size_t len) |
424 | { | |
425 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
426 | ssize_t rc; | |
03b65b22 DJ |
427 | char cmd[SEC_CMD_SIZE+1], keystr[KEY_ID_SIZE+1], |
428 | nkeystr[KEY_ID_SIZE+1]; | |
429 | unsigned int key, newkey; | |
430 | int i; | |
37833fb7 DJ |
431 | |
432 | if (atomic_read(&nvdimm->busy)) | |
433 | return -EBUSY; | |
434 | ||
03b65b22 DJ |
435 | rc = sscanf(buf, "%"__stringify(SEC_CMD_SIZE)"s" |
436 | " %"__stringify(KEY_ID_SIZE)"s" | |
437 | " %"__stringify(KEY_ID_SIZE)"s", | |
438 | cmd, keystr, nkeystr); | |
439 | if (rc < 1) | |
440 | return -EINVAL; | |
441 | for (i = 0; i < ARRAY_SIZE(ops); i++) | |
442 | if (sysfs_streq(cmd, ops[i].name)) | |
443 | break; | |
444 | if (i >= ARRAY_SIZE(ops)) | |
445 | return -EINVAL; | |
446 | if (ops[i].args > 1) | |
447 | rc = kstrtouint(keystr, 0, &key); | |
448 | if (rc >= 0 && ops[i].args > 2) | |
449 | rc = kstrtouint(nkeystr, 0, &newkey); | |
450 | if (rc < 0) | |
451 | return rc; | |
452 | ||
453 | if (i == OP_FREEZE) { | |
37833fb7 DJ |
454 | dev_dbg(dev, "freeze\n"); |
455 | rc = nvdimm_security_freeze(nvdimm); | |
03b65b22 DJ |
456 | } else if (i == OP_DISABLE) { |
457 | dev_dbg(dev, "disable %u\n", key); | |
458 | rc = nvdimm_security_disable(nvdimm, key); | |
d2a4ac73 DJ |
459 | } else if (i == OP_UPDATE) { |
460 | dev_dbg(dev, "update %u %u\n", key, newkey); | |
89fa9d8e | 461 | rc = nvdimm_security_update(nvdimm, key, newkey, NVDIMM_USER); |
64e77c8c DJ |
462 | } else if (i == OP_ERASE) { |
463 | dev_dbg(dev, "erase %u\n", key); | |
89fa9d8e | 464 | rc = nvdimm_security_erase(nvdimm, key, NVDIMM_USER); |
7d988097 DJ |
465 | } else if (i == OP_OVERWRITE) { |
466 | dev_dbg(dev, "overwrite %u\n", key); | |
467 | rc = nvdimm_security_overwrite(nvdimm, key); | |
89fa9d8e DJ |
468 | } else if (i == OP_MASTER_UPDATE) { |
469 | dev_dbg(dev, "master_update %u %u\n", key, newkey); | |
470 | rc = nvdimm_security_update(nvdimm, key, newkey, | |
471 | NVDIMM_MASTER); | |
472 | } else if (i == OP_MASTER_ERASE) { | |
473 | dev_dbg(dev, "master_erase %u\n", key); | |
474 | rc = nvdimm_security_erase(nvdimm, key, | |
475 | NVDIMM_MASTER); | |
37833fb7 DJ |
476 | } else |
477 | return -EINVAL; | |
478 | ||
479 | if (rc == 0) | |
480 | rc = len; | |
481 | return rc; | |
37833fb7 DJ |
482 | } |
483 | ||
484 | static ssize_t security_store(struct device *dev, | |
485 | struct device_attribute *attr, const char *buf, size_t len) | |
486 | ||
487 | { | |
488 | ssize_t rc; | |
489 | ||
490 | /* | |
491 | * Require all userspace triggered security management to be | |
492 | * done while probing is idle and the DIMM is not in active use | |
493 | * in any region. | |
494 | */ | |
495 | device_lock(dev); | |
496 | nvdimm_bus_lock(dev); | |
497 | wait_nvdimm_bus_probe_idle(dev); | |
498 | rc = __security_store(dev, buf, len); | |
499 | nvdimm_bus_unlock(dev); | |
500 | device_unlock(dev); | |
501 | ||
502 | return rc; | |
503 | } | |
504 | static DEVICE_ATTR_RW(security); | |
f2989396 | 505 | |
62232e45 | 506 | static struct attribute *nvdimm_attributes[] = { |
eaf96153 | 507 | &dev_attr_state.attr, |
efbf6f50 | 508 | &dev_attr_flags.attr, |
62232e45 | 509 | &dev_attr_commands.attr, |
0ba1c634 | 510 | &dev_attr_available_slots.attr, |
f2989396 | 511 | &dev_attr_security.attr, |
62232e45 DW |
512 | NULL, |
513 | }; | |
514 | ||
f2989396 DJ |
515 | static umode_t nvdimm_visible(struct kobject *kobj, struct attribute *a, int n) |
516 | { | |
517 | struct device *dev = container_of(kobj, typeof(*dev), kobj); | |
518 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
519 | ||
520 | if (a != &dev_attr_security.attr) | |
521 | return a->mode; | |
522 | if (nvdimm->sec.state < 0) | |
523 | return 0; | |
37833fb7 | 524 | /* Are there any state mutation ops? */ |
d2a4ac73 | 525 | if (nvdimm->sec.ops->freeze || nvdimm->sec.ops->disable |
64e77c8c | 526 | || nvdimm->sec.ops->change_key |
7d988097 DJ |
527 | || nvdimm->sec.ops->erase |
528 | || nvdimm->sec.ops->overwrite) | |
37833fb7 DJ |
529 | return a->mode; |
530 | return 0444; | |
f2989396 DJ |
531 | } |
532 | ||
62232e45 DW |
533 | struct attribute_group nvdimm_attribute_group = { |
534 | .attrs = nvdimm_attributes, | |
f2989396 | 535 | .is_visible = nvdimm_visible, |
62232e45 DW |
536 | }; |
537 | EXPORT_SYMBOL_GPL(nvdimm_attribute_group); | |
538 | ||
d6548ae4 DJ |
539 | struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, |
540 | void *provider_data, const struct attribute_group **groups, | |
541 | unsigned long flags, unsigned long cmd_mask, int num_flush, | |
f2989396 DJ |
542 | struct resource *flush_wpq, const char *dimm_id, |
543 | const struct nvdimm_security_ops *sec_ops) | |
e6dfb2de DW |
544 | { |
545 | struct nvdimm *nvdimm = kzalloc(sizeof(*nvdimm), GFP_KERNEL); | |
546 | struct device *dev; | |
547 | ||
548 | if (!nvdimm) | |
549 | return NULL; | |
550 | ||
551 | nvdimm->id = ida_simple_get(&dimm_ida, 0, 0, GFP_KERNEL); | |
552 | if (nvdimm->id < 0) { | |
553 | kfree(nvdimm); | |
554 | return NULL; | |
555 | } | |
d6548ae4 DJ |
556 | |
557 | nvdimm->dimm_id = dimm_id; | |
e6dfb2de | 558 | nvdimm->provider_data = provider_data; |
d5d30d5a DW |
559 | if (noblk) |
560 | flags |= 1 << NDD_NOBLK; | |
e6dfb2de | 561 | nvdimm->flags = flags; |
e3654eca | 562 | nvdimm->cmd_mask = cmd_mask; |
e5ae3b25 DW |
563 | nvdimm->num_flush = num_flush; |
564 | nvdimm->flush_wpq = flush_wpq; | |
eaf96153 | 565 | atomic_set(&nvdimm->busy, 0); |
e6dfb2de DW |
566 | dev = &nvdimm->dev; |
567 | dev_set_name(dev, "nmem%d", nvdimm->id); | |
568 | dev->parent = &nvdimm_bus->dev; | |
569 | dev->type = &nvdimm_device_type; | |
62232e45 | 570 | dev->devt = MKDEV(nvdimm_major, nvdimm->id); |
e6dfb2de | 571 | dev->groups = groups; |
f2989396 | 572 | nvdimm->sec.ops = sec_ops; |
7d988097 DJ |
573 | nvdimm->sec.overwrite_tmo = 0; |
574 | INIT_DELAYED_WORK(&nvdimm->dwork, nvdimm_security_overwrite_query); | |
f2989396 DJ |
575 | /* |
576 | * Security state must be initialized before device_add() for | |
577 | * attribute visibility. | |
578 | */ | |
89fa9d8e DJ |
579 | /* get security state and extended (master) state */ |
580 | nvdimm->sec.state = nvdimm_security_state(nvdimm, NVDIMM_USER); | |
581 | nvdimm->sec.ext_state = nvdimm_security_state(nvdimm, NVDIMM_MASTER); | |
4d88a97a | 582 | nd_device_register(dev); |
e6dfb2de DW |
583 | |
584 | return nvdimm; | |
585 | } | |
d6548ae4 | 586 | EXPORT_SYMBOL_GPL(__nvdimm_create); |
4d88a97a | 587 | |
1cd73865 | 588 | static void shutdown_security_notify(void *data) |
7d988097 | 589 | { |
1cd73865 DW |
590 | struct nvdimm *nvdimm = data; |
591 | ||
592 | sysfs_put(nvdimm->sec.overwrite_state); | |
593 | } | |
594 | ||
595 | int nvdimm_security_setup_events(struct device *dev) | |
596 | { | |
597 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
598 | ||
599 | if (nvdimm->sec.state < 0 || !nvdimm->sec.ops | |
600 | || !nvdimm->sec.ops->overwrite) | |
601 | return 0; | |
602 | nvdimm->sec.overwrite_state = sysfs_get_dirent(dev->kobj.sd, "security"); | |
7d988097 | 603 | if (!nvdimm->sec.overwrite_state) |
1cd73865 DW |
604 | return -ENOMEM; |
605 | ||
606 | return devm_add_action_or_reset(dev, shutdown_security_notify, nvdimm); | |
7d988097 DJ |
607 | } |
608 | EXPORT_SYMBOL_GPL(nvdimm_security_setup_events); | |
609 | ||
610 | int nvdimm_in_overwrite(struct nvdimm *nvdimm) | |
611 | { | |
612 | return test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags); | |
613 | } | |
614 | EXPORT_SYMBOL_GPL(nvdimm_in_overwrite); | |
615 | ||
37833fb7 DJ |
616 | int nvdimm_security_freeze(struct nvdimm *nvdimm) |
617 | { | |
618 | int rc; | |
619 | ||
620 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); | |
621 | ||
622 | if (!nvdimm->sec.ops || !nvdimm->sec.ops->freeze) | |
623 | return -EOPNOTSUPP; | |
624 | ||
625 | if (nvdimm->sec.state < 0) | |
626 | return -EIO; | |
627 | ||
7d988097 DJ |
628 | if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) { |
629 | dev_warn(&nvdimm->dev, "Overwrite operation in progress.\n"); | |
630 | return -EBUSY; | |
631 | } | |
632 | ||
37833fb7 | 633 | rc = nvdimm->sec.ops->freeze(nvdimm); |
89fa9d8e | 634 | nvdimm->sec.state = nvdimm_security_state(nvdimm, NVDIMM_USER); |
37833fb7 DJ |
635 | |
636 | return rc; | |
637 | } | |
638 | ||
762d067d | 639 | int alias_dpa_busy(struct device *dev, void *data) |
a1f3e4d6 | 640 | { |
fe514739 | 641 | resource_size_t map_end, blk_start, new; |
a1f3e4d6 DW |
642 | struct blk_alloc_info *info = data; |
643 | struct nd_mapping *nd_mapping; | |
644 | struct nd_region *nd_region; | |
645 | struct nvdimm_drvdata *ndd; | |
646 | struct resource *res; | |
647 | int i; | |
648 | ||
c9e582aa | 649 | if (!is_memory(dev)) |
a1f3e4d6 DW |
650 | return 0; |
651 | ||
652 | nd_region = to_nd_region(dev); | |
653 | for (i = 0; i < nd_region->ndr_mappings; i++) { | |
654 | nd_mapping = &nd_region->mapping[i]; | |
655 | if (nd_mapping->nvdimm == info->nd_mapping->nvdimm) | |
656 | break; | |
657 | } | |
658 | ||
659 | if (i >= nd_region->ndr_mappings) | |
660 | return 0; | |
661 | ||
662 | ndd = to_ndd(nd_mapping); | |
663 | map_end = nd_mapping->start + nd_mapping->size - 1; | |
664 | blk_start = nd_mapping->start; | |
762d067d DW |
665 | |
666 | /* | |
667 | * In the allocation case ->res is set to free space that we are | |
668 | * looking to validate against PMEM aliasing collision rules | |
669 | * (i.e. BLK is allocated after all aliased PMEM). | |
670 | */ | |
671 | if (info->res) { | |
672 | if (info->res->start >= nd_mapping->start | |
673 | && info->res->start < map_end) | |
674 | /* pass */; | |
675 | else | |
676 | return 0; | |
677 | } | |
678 | ||
a1f3e4d6 DW |
679 | retry: |
680 | /* | |
681 | * Find the free dpa from the end of the last pmem allocation to | |
fe514739 | 682 | * the end of the interleave-set mapping. |
a1f3e4d6 | 683 | */ |
a1f3e4d6 | 684 | for_each_dpa_resource(ndd, res) { |
fe514739 DW |
685 | if (strncmp(res->name, "pmem", 4) != 0) |
686 | continue; | |
a1f3e4d6 DW |
687 | if ((res->start >= blk_start && res->start < map_end) |
688 | || (res->end >= blk_start | |
689 | && res->end <= map_end)) { | |
fe514739 DW |
690 | new = max(blk_start, min(map_end + 1, res->end + 1)); |
691 | if (new != blk_start) { | |
692 | blk_start = new; | |
693 | goto retry; | |
694 | } | |
a1f3e4d6 DW |
695 | } |
696 | } | |
697 | ||
762d067d DW |
698 | /* update the free space range with the probed blk_start */ |
699 | if (info->res && blk_start > info->res->start) { | |
700 | info->res->start = max(info->res->start, blk_start); | |
701 | if (info->res->start > info->res->end) | |
702 | info->res->end = info->res->start - 1; | |
703 | return 1; | |
704 | } | |
705 | ||
fe514739 | 706 | info->available -= blk_start - nd_mapping->start; |
762d067d | 707 | |
a1f3e4d6 DW |
708 | return 0; |
709 | } | |
710 | ||
1b40e09a DW |
711 | /** |
712 | * nd_blk_available_dpa - account the unused dpa of BLK region | |
713 | * @nd_mapping: container of dpa-resource-root + labels | |
714 | * | |
a1f3e4d6 DW |
715 | * Unlike PMEM, BLK namespaces can occupy discontiguous DPA ranges, but |
716 | * we arrange for them to never start at an lower dpa than the last | |
717 | * PMEM allocation in an aliased region. | |
1b40e09a | 718 | */ |
a1f3e4d6 | 719 | resource_size_t nd_blk_available_dpa(struct nd_region *nd_region) |
1b40e09a | 720 | { |
a1f3e4d6 DW |
721 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev); |
722 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; | |
1b40e09a | 723 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
a1f3e4d6 DW |
724 | struct blk_alloc_info info = { |
725 | .nd_mapping = nd_mapping, | |
726 | .available = nd_mapping->size, | |
762d067d | 727 | .res = NULL, |
a1f3e4d6 | 728 | }; |
1b40e09a DW |
729 | struct resource *res; |
730 | ||
731 | if (!ndd) | |
732 | return 0; | |
733 | ||
a1f3e4d6 | 734 | device_for_each_child(&nvdimm_bus->dev, &info, alias_dpa_busy); |
1b40e09a | 735 | |
a1f3e4d6 DW |
736 | /* now account for busy blk allocations in unaliased dpa */ |
737 | for_each_dpa_resource(ndd, res) { | |
738 | if (strncmp(res->name, "blk", 3) != 0) | |
739 | continue; | |
fe514739 | 740 | info.available -= resource_size(res); |
a1f3e4d6 DW |
741 | } |
742 | ||
743 | return info.available; | |
1b40e09a DW |
744 | } |
745 | ||
12e3129e KB |
746 | /** |
747 | * nd_pmem_max_contiguous_dpa - For the given dimm+region, return the max | |
748 | * contiguous unallocated dpa range. | |
749 | * @nd_region: constrain available space check to this reference region | |
750 | * @nd_mapping: container of dpa-resource-root + labels | |
751 | */ | |
752 | resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region, | |
753 | struct nd_mapping *nd_mapping) | |
754 | { | |
755 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); | |
756 | struct nvdimm_bus *nvdimm_bus; | |
757 | resource_size_t max = 0; | |
758 | struct resource *res; | |
759 | ||
760 | /* if a dimm is disabled the available capacity is zero */ | |
761 | if (!ndd) | |
762 | return 0; | |
763 | ||
764 | nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); | |
765 | if (__reserve_free_pmem(&nd_region->dev, nd_mapping->nvdimm)) | |
766 | return 0; | |
767 | for_each_dpa_resource(ndd, res) { | |
768 | if (strcmp(res->name, "pmem-reserve") != 0) | |
769 | continue; | |
770 | if (resource_size(res) > max) | |
771 | max = resource_size(res); | |
772 | } | |
773 | release_free_pmem(nvdimm_bus, nd_mapping); | |
774 | return max; | |
775 | } | |
776 | ||
bf9bccc1 DW |
777 | /** |
778 | * nd_pmem_available_dpa - for the given dimm+region account unallocated dpa | |
779 | * @nd_mapping: container of dpa-resource-root + labels | |
780 | * @nd_region: constrain available space check to this reference region | |
781 | * @overlap: calculate available space assuming this level of overlap | |
782 | * | |
783 | * Validate that a PMEM label, if present, aligns with the start of an | |
784 | * interleave set and truncate the available size at the lowest BLK | |
785 | * overlap point. | |
786 | * | |
787 | * The expectation is that this routine is called multiple times as it | |
788 | * probes for the largest BLK encroachment for any single member DIMM of | |
789 | * the interleave set. Once that value is determined the PMEM-limit for | |
790 | * the set can be established. | |
791 | */ | |
792 | resource_size_t nd_pmem_available_dpa(struct nd_region *nd_region, | |
793 | struct nd_mapping *nd_mapping, resource_size_t *overlap) | |
794 | { | |
795 | resource_size_t map_start, map_end, busy = 0, available, blk_start; | |
796 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); | |
797 | struct resource *res; | |
798 | const char *reason; | |
799 | ||
800 | if (!ndd) | |
801 | return 0; | |
802 | ||
803 | map_start = nd_mapping->start; | |
804 | map_end = map_start + nd_mapping->size - 1; | |
805 | blk_start = max(map_start, map_end + 1 - *overlap); | |
a1f3e4d6 | 806 | for_each_dpa_resource(ndd, res) { |
bf9bccc1 DW |
807 | if (res->start >= map_start && res->start < map_end) { |
808 | if (strncmp(res->name, "blk", 3) == 0) | |
a1f3e4d6 DW |
809 | blk_start = min(blk_start, |
810 | max(map_start, res->start)); | |
811 | else if (res->end > map_end) { | |
bf9bccc1 DW |
812 | reason = "misaligned to iset"; |
813 | goto err; | |
a1f3e4d6 | 814 | } else |
bf9bccc1 | 815 | busy += resource_size(res); |
bf9bccc1 DW |
816 | } else if (res->end >= map_start && res->end <= map_end) { |
817 | if (strncmp(res->name, "blk", 3) == 0) { | |
818 | /* | |
819 | * If a BLK allocation overlaps the start of | |
820 | * PMEM the entire interleave set may now only | |
821 | * be used for BLK. | |
822 | */ | |
823 | blk_start = map_start; | |
a1f3e4d6 DW |
824 | } else |
825 | busy += resource_size(res); | |
bf9bccc1 DW |
826 | } else if (map_start > res->start && map_start < res->end) { |
827 | /* total eclipse of the mapping */ | |
828 | busy += nd_mapping->size; | |
829 | blk_start = map_start; | |
830 | } | |
a1f3e4d6 | 831 | } |
bf9bccc1 DW |
832 | |
833 | *overlap = map_end + 1 - blk_start; | |
834 | available = blk_start - map_start; | |
835 | if (busy < available) | |
836 | return available - busy; | |
837 | return 0; | |
838 | ||
839 | err: | |
bf9bccc1 DW |
840 | nd_dbg_dpa(nd_region, ndd, res, "%s\n", reason); |
841 | return 0; | |
842 | } | |
843 | ||
4a826c83 DW |
844 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res) |
845 | { | |
846 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); | |
847 | kfree(res->name); | |
848 | __release_region(&ndd->dpa, res->start, resource_size(res)); | |
849 | } | |
850 | ||
851 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, | |
852 | struct nd_label_id *label_id, resource_size_t start, | |
853 | resource_size_t n) | |
854 | { | |
855 | char *name = kmemdup(label_id, sizeof(*label_id), GFP_KERNEL); | |
856 | struct resource *res; | |
857 | ||
858 | if (!name) | |
859 | return NULL; | |
860 | ||
861 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); | |
862 | res = __request_region(&ndd->dpa, start, n, name, 0); | |
863 | if (!res) | |
864 | kfree(name); | |
865 | return res; | |
866 | } | |
867 | ||
bf9bccc1 DW |
868 | /** |
869 | * nvdimm_allocated_dpa - sum up the dpa currently allocated to this label_id | |
870 | * @nvdimm: container of dpa-resource-root + labels | |
871 | * @label_id: dpa resource name of the form {pmem|blk}-<human readable uuid> | |
872 | */ | |
873 | resource_size_t nvdimm_allocated_dpa(struct nvdimm_drvdata *ndd, | |
874 | struct nd_label_id *label_id) | |
875 | { | |
876 | resource_size_t allocated = 0; | |
877 | struct resource *res; | |
878 | ||
879 | for_each_dpa_resource(ndd, res) | |
880 | if (strcmp(res->name, label_id->id) == 0) | |
881 | allocated += resource_size(res); | |
882 | ||
883 | return allocated; | |
884 | } | |
885 | ||
4d88a97a DW |
886 | static int count_dimms(struct device *dev, void *c) |
887 | { | |
888 | int *count = c; | |
889 | ||
890 | if (is_nvdimm(dev)) | |
891 | (*count)++; | |
892 | return 0; | |
893 | } | |
894 | ||
895 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count) | |
896 | { | |
897 | int count = 0; | |
898 | /* Flush any possible dimm registration failures */ | |
899 | nd_synchronize(); | |
900 | ||
901 | device_for_each_child(&nvdimm_bus->dev, &count, count_dimms); | |
426824d6 | 902 | dev_dbg(&nvdimm_bus->dev, "count: %d\n", count); |
4d88a97a DW |
903 | if (count != dimm_count) |
904 | return -ENXIO; | |
905 | return 0; | |
906 | } | |
907 | EXPORT_SYMBOL_GPL(nvdimm_bus_check_dimm_count); | |
b354aba0 DW |
908 | |
909 | void __exit nvdimm_devs_exit(void) | |
910 | { | |
911 | ida_destroy(&dimm_ida); | |
912 | } |