Merge tag 'cxl-for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl
[linux-block.git] / drivers / ntb / ntb_transport.c
CommitLineData
fce8a7bb
JM
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2012 Intel Corporation. All rights reserved.
e26a5843 8 * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
fce8a7bb
JM
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * BSD LICENSE
15 *
16 * Copyright(c) 2012 Intel Corporation. All rights reserved.
e26a5843 17 * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
fce8a7bb
JM
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions
21 * are met:
22 *
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copy
26 * notice, this list of conditions and the following disclaimer in
27 * the documentation and/or other materials provided with the
28 * distribution.
29 * * Neither the name of Intel Corporation nor the names of its
30 * contributors may be used to endorse or promote products derived
31 * from this software without specific prior written permission.
32 *
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
34 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
35 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
36 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
37 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
38 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
39 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
40 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
41 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
42 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
43 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 *
e26a5843 45 * PCIe NTB Transport Linux driver
fce8a7bb
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46 *
47 * Contact Information:
48 * Jon Mason <jon.mason@intel.com>
49 */
50#include <linux/debugfs.h>
51#include <linux/delay.h>
282a2fee 52#include <linux/dmaengine.h>
fce8a7bb
JM
53#include <linux/dma-mapping.h>
54#include <linux/errno.h>
55#include <linux/export.h>
56#include <linux/interrupt.h>
57#include <linux/module.h>
58#include <linux/pci.h>
59#include <linux/slab.h>
60#include <linux/types.h>
06917f75 61#include <linux/uaccess.h>
e26a5843
AH
62#include "linux/ntb.h"
63#include "linux/ntb_transport.h"
fce8a7bb 64
e26a5843
AH
65#define NTB_TRANSPORT_VERSION 4
66#define NTB_TRANSPORT_VER "4"
67#define NTB_TRANSPORT_NAME "ntb_transport"
68#define NTB_TRANSPORT_DESC "Software Queue-Pair Transport over NTB"
b17faba0 69#define NTB_TRANSPORT_MIN_SPADS (MW0_SZ_HIGH + 2)
e26a5843
AH
70
71MODULE_DESCRIPTION(NTB_TRANSPORT_DESC);
72MODULE_VERSION(NTB_TRANSPORT_VER);
73MODULE_LICENSE("Dual BSD/GPL");
74MODULE_AUTHOR("Intel Corporation");
75
76static unsigned long max_mw_size;
77module_param(max_mw_size, ulong, 0644);
78MODULE_PARM_DESC(max_mw_size, "Limit size of large memory windows");
fce8a7bb 79
9891417d 80static unsigned int transport_mtu = 0x10000;
fce8a7bb
JM
81module_param(transport_mtu, uint, 0644);
82MODULE_PARM_DESC(transport_mtu, "Maximum size of NTB transport packets");
83
948d3a65 84static unsigned char max_num_clients;
fce8a7bb
JM
85module_param(max_num_clients, byte, 0644);
86MODULE_PARM_DESC(max_num_clients, "Maximum number of NTB transport clients");
87
282a2fee
JM
88static unsigned int copy_bytes = 1024;
89module_param(copy_bytes, uint, 0644);
90MODULE_PARM_DESC(copy_bytes, "Threshold under which NTB will use the CPU to copy instead of DMA");
91
a41ef053
DJ
92static bool use_dma;
93module_param(use_dma, bool, 0644);
94MODULE_PARM_DESC(use_dma, "Use DMA engine to perform large data copy");
95
2b0569b3
LG
96static bool use_msi;
97#ifdef CONFIG_NTB_MSI
98module_param(use_msi, bool, 0644);
99MODULE_PARM_DESC(use_msi, "Use MSI interrupts instead of doorbells");
100#endif
101
e26a5843
AH
102static struct dentry *nt_debugfs_dir;
103
1e530119
SS
104/* Only two-ports NTB devices are supported */
105#define PIDX NTB_DEF_PEER_IDX
106
fce8a7bb
JM
107struct ntb_queue_entry {
108 /* ntb_queue list reference */
109 struct list_head entry;
e26a5843 110 /* pointers to data to be transferred */
fce8a7bb
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111 void *cb_data;
112 void *buf;
113 unsigned int len;
114 unsigned int flags;
9cabc269
DJ
115 int retries;
116 int errors;
117 unsigned int tx_index;
72203572 118 unsigned int rx_index;
282a2fee
JM
119
120 struct ntb_transport_qp *qp;
121 union {
122 struct ntb_payload_header __iomem *tx_hdr;
123 struct ntb_payload_header *rx_hdr;
124 };
fce8a7bb
JM
125};
126
793c20e9
JM
127struct ntb_rx_info {
128 unsigned int entry;
129};
130
fce8a7bb 131struct ntb_transport_qp {
e26a5843
AH
132 struct ntb_transport_ctx *transport;
133 struct ntb_dev *ndev;
fce8a7bb 134 void *cb_data;
569410ca
DJ
135 struct dma_chan *tx_dma_chan;
136 struct dma_chan *rx_dma_chan;
fce8a7bb
JM
137
138 bool client_ready;
e26a5843 139 bool link_is_up;
e9021331 140 bool active;
e26a5843 141
fce8a7bb 142 u8 qp_num; /* Only 64 QP's are allowed. 0-63 */
e26a5843 143 u64 qp_bit;
fce8a7bb 144
74465645 145 struct ntb_rx_info __iomem *rx_info;
793c20e9
JM
146 struct ntb_rx_info *remote_rx_info;
147
53ca4fea
JM
148 void (*tx_handler)(struct ntb_transport_qp *qp, void *qp_data,
149 void *data, int len);
fce8a7bb
JM
150 struct list_head tx_free_q;
151 spinlock_t ntb_tx_free_q_lock;
74465645 152 void __iomem *tx_mw;
c59666bb
LG
153 phys_addr_t tx_mw_phys;
154 size_t tx_mw_size;
155 dma_addr_t tx_mw_dma_addr;
793c20e9
JM
156 unsigned int tx_index;
157 unsigned int tx_max_entry;
ef114ed5 158 unsigned int tx_max_frame;
fce8a7bb 159
53ca4fea
JM
160 void (*rx_handler)(struct ntb_transport_qp *qp, void *qp_data,
161 void *data, int len);
da2e5ae5 162 struct list_head rx_post_q;
fce8a7bb
JM
163 struct list_head rx_pend_q;
164 struct list_head rx_free_q;
da2e5ae5
AH
165 /* ntb_rx_q_lock: synchronize access to rx_XXXX_q */
166 spinlock_t ntb_rx_q_lock;
793c20e9
JM
167 void *rx_buff;
168 unsigned int rx_index;
169 unsigned int rx_max_entry;
ef114ed5 170 unsigned int rx_max_frame;
a754a8fc 171 unsigned int rx_alloc_entry;
282a2fee 172 dma_cookie_t last_cookie;
e26a5843 173 struct tasklet_struct rxc_db_work;
fce8a7bb 174
53ca4fea 175 void (*event_handler)(void *data, int status);
fce8a7bb 176 struct delayed_work link_work;
7b4f2d3c 177 struct work_struct link_cleanup;
fce8a7bb
JM
178
179 struct dentry *debugfs_dir;
180 struct dentry *debugfs_stats;
181
182 /* Stats */
183 u64 rx_bytes;
184 u64 rx_pkts;
185 u64 rx_ring_empty;
186 u64 rx_err_no_buf;
187 u64 rx_err_oflow;
188 u64 rx_err_ver;
282a2fee
JM
189 u64 rx_memcpy;
190 u64 rx_async;
fce8a7bb
JM
191 u64 tx_bytes;
192 u64 tx_pkts;
193 u64 tx_ring_full;
282a2fee
JM
194 u64 tx_err_no_buf;
195 u64 tx_memcpy;
196 u64 tx_async;
2b0569b3
LG
197
198 bool use_msi;
199 int msi_irq;
200 struct ntb_msi_desc msi_desc;
201 struct ntb_msi_desc peer_msi_desc;
fce8a7bb
JM
202};
203
204struct ntb_transport_mw {
e26a5843
AH
205 phys_addr_t phys_addr;
206 resource_size_t phys_size;
e26a5843
AH
207 void __iomem *vbase;
208 size_t xlat_size;
209 size_t buff_size;
fc5d1829
AS
210 size_t alloc_size;
211 void *alloc_addr;
fce8a7bb
JM
212 void *virt_addr;
213 dma_addr_t dma_addr;
214};
215
216struct ntb_transport_client_dev {
217 struct list_head entry;
e26a5843 218 struct ntb_transport_ctx *nt;
fce8a7bb
JM
219 struct device dev;
220};
221
e26a5843 222struct ntb_transport_ctx {
fce8a7bb
JM
223 struct list_head entry;
224 struct list_head client_devs;
225
e26a5843
AH
226 struct ntb_dev *ndev;
227
228 struct ntb_transport_mw *mw_vec;
229 struct ntb_transport_qp *qp_vec;
230 unsigned int mw_count;
231 unsigned int qp_count;
232 u64 qp_bitmap;
233 u64 qp_bitmap_free;
234
2b0569b3
LG
235 bool use_msi;
236 unsigned int msi_spad_offset;
237 u64 msi_db_mask;
238
e26a5843 239 bool link_is_up;
fce8a7bb 240 struct delayed_work link_work;
7b4f2d3c 241 struct work_struct link_cleanup;
c8650fd0
DJ
242
243 struct dentry *debugfs_node_dir;
fce8a7bb
JM
244};
245
246enum {
e26a5843
AH
247 DESC_DONE_FLAG = BIT(0),
248 LINK_DOWN_FLAG = BIT(1),
fce8a7bb
JM
249};
250
251struct ntb_payload_header {
74465645 252 unsigned int ver;
fce8a7bb
JM
253 unsigned int len;
254 unsigned int flags;
255};
256
257enum {
258 VERSION = 0,
fce8a7bb 259 QP_LINKS,
113fc505
JM
260 NUM_QPS,
261 NUM_MWS,
262 MW0_SZ_HIGH,
263 MW0_SZ_LOW,
fce8a7bb
JM
264};
265
e26a5843
AH
266#define dev_client_dev(__dev) \
267 container_of((__dev), struct ntb_transport_client_dev, dev)
268
269#define drv_client(__drv) \
270 container_of((__drv), struct ntb_transport_client, driver)
271
272#define QP_TO_MW(nt, qp) ((qp) % nt->mw_count)
fce8a7bb
JM
273#define NTB_QP_DEF_NUM_ENTRIES 100
274#define NTB_LINK_DOWN_TIMEOUT 10
275
e26a5843
AH
276static void ntb_transport_rxc_db(unsigned long data);
277static const struct ntb_ctx_ops ntb_transport_ops;
278static struct ntb_client ntb_transport_client;
9cabc269
DJ
279static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
280 struct ntb_queue_entry *entry);
281static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset);
72203572
DJ
282static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset);
283static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset);
284
e26a5843
AH
285
286static int ntb_transport_bus_match(struct device *dev,
287 struct device_driver *drv)
fce8a7bb
JM
288{
289 return !strncmp(dev_name(dev), drv->name, strlen(drv->name));
290}
291
e26a5843 292static int ntb_transport_bus_probe(struct device *dev)
fce8a7bb 293{
e26a5843 294 const struct ntb_transport_client *client;
5e2cbf13 295 int rc;
fce8a7bb
JM
296
297 get_device(dev);
e26a5843
AH
298
299 client = drv_client(dev->driver);
300 rc = client->probe(dev);
fce8a7bb
JM
301 if (rc)
302 put_device(dev);
303
304 return rc;
305}
306
fc7a6209 307static void ntb_transport_bus_remove(struct device *dev)
fce8a7bb 308{
e26a5843 309 const struct ntb_transport_client *client;
fce8a7bb 310
e26a5843
AH
311 client = drv_client(dev->driver);
312 client->remove(dev);
fce8a7bb
JM
313
314 put_device(dev);
fce8a7bb
JM
315}
316
e26a5843
AH
317static struct bus_type ntb_transport_bus = {
318 .name = "ntb_transport",
319 .match = ntb_transport_bus_match,
320 .probe = ntb_transport_bus_probe,
321 .remove = ntb_transport_bus_remove,
fce8a7bb
JM
322};
323
324static LIST_HEAD(ntb_transport_list);
325
e26a5843 326static int ntb_bus_init(struct ntb_transport_ctx *nt)
fce8a7bb 327{
31510000 328 list_add_tail(&nt->entry, &ntb_transport_list);
fce8a7bb
JM
329 return 0;
330}
331
e26a5843 332static void ntb_bus_remove(struct ntb_transport_ctx *nt)
fce8a7bb
JM
333{
334 struct ntb_transport_client_dev *client_dev, *cd;
335
336 list_for_each_entry_safe(client_dev, cd, &nt->client_devs, entry) {
337 dev_err(client_dev->dev.parent, "%s still attached to bus, removing\n",
338 dev_name(&client_dev->dev));
339 list_del(&client_dev->entry);
340 device_unregister(&client_dev->dev);
341 }
342
343 list_del(&nt->entry);
fce8a7bb
JM
344}
345
e26a5843 346static void ntb_transport_client_release(struct device *dev)
fce8a7bb
JM
347{
348 struct ntb_transport_client_dev *client_dev;
fce8a7bb 349
e26a5843 350 client_dev = dev_client_dev(dev);
fce8a7bb
JM
351 kfree(client_dev);
352}
353
354/**
e26a5843 355 * ntb_transport_unregister_client_dev - Unregister NTB client device
fce8a7bb
JM
356 * @device_name: Name of NTB client device
357 *
358 * Unregister an NTB client device with the NTB transport layer
359 */
e26a5843 360void ntb_transport_unregister_client_dev(char *device_name)
fce8a7bb
JM
361{
362 struct ntb_transport_client_dev *client, *cd;
e26a5843 363 struct ntb_transport_ctx *nt;
fce8a7bb
JM
364
365 list_for_each_entry(nt, &ntb_transport_list, entry)
366 list_for_each_entry_safe(client, cd, &nt->client_devs, entry)
367 if (!strncmp(dev_name(&client->dev), device_name,
368 strlen(device_name))) {
369 list_del(&client->entry);
370 device_unregister(&client->dev);
371 }
372}
e26a5843 373EXPORT_SYMBOL_GPL(ntb_transport_unregister_client_dev);
fce8a7bb
JM
374
375/**
e26a5843 376 * ntb_transport_register_client_dev - Register NTB client device
fce8a7bb
JM
377 * @device_name: Name of NTB client device
378 *
379 * Register an NTB client device with the NTB transport layer
380 */
e26a5843 381int ntb_transport_register_client_dev(char *device_name)
fce8a7bb
JM
382{
383 struct ntb_transport_client_dev *client_dev;
e26a5843 384 struct ntb_transport_ctx *nt;
1199aa61 385 int node;
8b19d450 386 int rc, i = 0;
fce8a7bb 387
8222b402
JM
388 if (list_empty(&ntb_transport_list))
389 return -ENODEV;
390
fce8a7bb
JM
391 list_for_each_entry(nt, &ntb_transport_list, entry) {
392 struct device *dev;
393
1199aa61
AH
394 node = dev_to_node(&nt->ndev->dev);
395
396 client_dev = kzalloc_node(sizeof(*client_dev),
397 GFP_KERNEL, node);
fce8a7bb
JM
398 if (!client_dev) {
399 rc = -ENOMEM;
400 goto err;
401 }
402
403 dev = &client_dev->dev;
404
405 /* setup and register client devices */
8b19d450 406 dev_set_name(dev, "%s%d", device_name, i);
e26a5843
AH
407 dev->bus = &ntb_transport_bus;
408 dev->release = ntb_transport_client_release;
409 dev->parent = &nt->ndev->dev;
fce8a7bb
JM
410
411 rc = device_register(dev);
412 if (rc) {
413 kfree(client_dev);
414 goto err;
415 }
416
417 list_add_tail(&client_dev->entry, &nt->client_devs);
8b19d450 418 i++;
fce8a7bb
JM
419 }
420
421 return 0;
422
423err:
e26a5843 424 ntb_transport_unregister_client_dev(device_name);
fce8a7bb
JM
425
426 return rc;
427}
e26a5843 428EXPORT_SYMBOL_GPL(ntb_transport_register_client_dev);
fce8a7bb
JM
429
430/**
ec110bc7 431 * ntb_transport_register_client - Register NTB client driver
fce8a7bb
JM
432 * @drv: NTB client driver to be registered
433 *
434 * Register an NTB client driver with the NTB transport layer
435 *
436 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
437 */
e26a5843 438int ntb_transport_register_client(struct ntb_transport_client *drv)
fce8a7bb 439{
e26a5843 440 drv->driver.bus = &ntb_transport_bus;
fce8a7bb 441
8222b402
JM
442 if (list_empty(&ntb_transport_list))
443 return -ENODEV;
444
fce8a7bb
JM
445 return driver_register(&drv->driver);
446}
ec110bc7 447EXPORT_SYMBOL_GPL(ntb_transport_register_client);
fce8a7bb
JM
448
449/**
ec110bc7 450 * ntb_transport_unregister_client - Unregister NTB client driver
fce8a7bb
JM
451 * @drv: NTB client driver to be unregistered
452 *
453 * Unregister an NTB client driver with the NTB transport layer
454 *
455 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
456 */
e26a5843 457void ntb_transport_unregister_client(struct ntb_transport_client *drv)
fce8a7bb
JM
458{
459 driver_unregister(&drv->driver);
460}
ec110bc7 461EXPORT_SYMBOL_GPL(ntb_transport_unregister_client);
fce8a7bb 462
fce8a7bb
JM
463static ssize_t debugfs_read(struct file *filp, char __user *ubuf, size_t count,
464 loff_t *offp)
465{
466 struct ntb_transport_qp *qp;
d7237e22 467 char *buf;
fce8a7bb
JM
468 ssize_t ret, out_offset, out_count;
469
260bee94
DJ
470 qp = filp->private_data;
471
472 if (!qp || !qp->link_is_up)
473 return 0;
474
282a2fee 475 out_count = 1000;
d7237e22
JM
476
477 buf = kmalloc(out_count, GFP_KERNEL);
478 if (!buf)
479 return -ENOMEM;
fce8a7bb 480
fce8a7bb 481 out_offset = 0;
7f78c68a 482 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
d98ef99e 483 "\nNTB QP stats:\n\n");
7f78c68a 484 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
fce8a7bb 485 "rx_bytes - \t%llu\n", qp->rx_bytes);
7f78c68a 486 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
fce8a7bb 487 "rx_pkts - \t%llu\n", qp->rx_pkts);
7f78c68a 488 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
282a2fee 489 "rx_memcpy - \t%llu\n", qp->rx_memcpy);
7f78c68a 490 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
282a2fee 491 "rx_async - \t%llu\n", qp->rx_async);
7f78c68a 492 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
fce8a7bb 493 "rx_ring_empty - %llu\n", qp->rx_ring_empty);
7f78c68a 494 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
fce8a7bb 495 "rx_err_no_buf - %llu\n", qp->rx_err_no_buf);
7f78c68a 496 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
fce8a7bb 497 "rx_err_oflow - \t%llu\n", qp->rx_err_oflow);
7f78c68a 498 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
fce8a7bb 499 "rx_err_ver - \t%llu\n", qp->rx_err_ver);
7f78c68a 500 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
d98ef99e 501 "rx_buff - \t0x%p\n", qp->rx_buff);
7f78c68a 502 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
793c20e9 503 "rx_index - \t%u\n", qp->rx_index);
7f78c68a 504 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
a754a8fc 505 "rx_max_entry - \t%u\n", qp->rx_max_entry);
7f78c68a 506 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
a754a8fc 507 "rx_alloc_entry - \t%u\n\n", qp->rx_alloc_entry);
fce8a7bb 508
7f78c68a 509 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
fce8a7bb 510 "tx_bytes - \t%llu\n", qp->tx_bytes);
7f78c68a 511 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
fce8a7bb 512 "tx_pkts - \t%llu\n", qp->tx_pkts);
7f78c68a 513 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
282a2fee 514 "tx_memcpy - \t%llu\n", qp->tx_memcpy);
7f78c68a 515 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
282a2fee 516 "tx_async - \t%llu\n", qp->tx_async);
7f78c68a 517 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
fce8a7bb 518 "tx_ring_full - \t%llu\n", qp->tx_ring_full);
7f78c68a 519 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
282a2fee 520 "tx_err_no_buf - %llu\n", qp->tx_err_no_buf);
7f78c68a 521 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
d98ef99e 522 "tx_mw - \t0x%p\n", qp->tx_mw);
7f78c68a 523 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
d98ef99e 524 "tx_index (H) - \t%u\n", qp->tx_index);
7f78c68a 525 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
d98ef99e 526 "RRI (T) - \t%u\n",
e74bfeed 527 qp->remote_rx_info->entry);
7f78c68a 528 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
d98ef99e 529 "tx_max_entry - \t%u\n", qp->tx_max_entry);
7f78c68a 530 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
e74bfeed
DJ
531 "free tx - \t%u\n",
532 ntb_transport_tx_free_entry(qp));
fce8a7bb 533
7f78c68a 534 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
d98ef99e 535 "\n");
7f78c68a 536 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
569410ca
DJ
537 "Using TX DMA - \t%s\n",
538 qp->tx_dma_chan ? "Yes" : "No");
7f78c68a 539 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
569410ca
DJ
540 "Using RX DMA - \t%s\n",
541 qp->rx_dma_chan ? "Yes" : "No");
7f78c68a 542 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
d98ef99e 543 "QP Link - \t%s\n",
e26a5843 544 qp->link_is_up ? "Up" : "Down");
7f78c68a 545 out_offset += scnprintf(buf + out_offset, out_count - out_offset,
d98ef99e
DJ
546 "\n");
547
d7237e22
JM
548 if (out_offset > out_count)
549 out_offset = out_count;
fce8a7bb
JM
550
551 ret = simple_read_from_buffer(ubuf, count, offp, buf, out_offset);
d7237e22 552 kfree(buf);
fce8a7bb
JM
553 return ret;
554}
555
556static const struct file_operations ntb_qp_debugfs_stats = {
557 .owner = THIS_MODULE,
d66d7ac2 558 .open = simple_open,
fce8a7bb
JM
559 .read = debugfs_read,
560};
561
562static void ntb_list_add(spinlock_t *lock, struct list_head *entry,
563 struct list_head *list)
564{
565 unsigned long flags;
566
567 spin_lock_irqsave(lock, flags);
568 list_add_tail(entry, list);
569 spin_unlock_irqrestore(lock, flags);
570}
571
572static struct ntb_queue_entry *ntb_list_rm(spinlock_t *lock,
53ca4fea 573 struct list_head *list)
fce8a7bb
JM
574{
575 struct ntb_queue_entry *entry;
576 unsigned long flags;
577
578 spin_lock_irqsave(lock, flags);
579 if (list_empty(list)) {
580 entry = NULL;
581 goto out;
582 }
583 entry = list_first_entry(list, struct ntb_queue_entry, entry);
584 list_del(&entry->entry);
e74bfeed 585
fce8a7bb
JM
586out:
587 spin_unlock_irqrestore(lock, flags);
588
589 return entry;
590}
591
da2e5ae5
AH
592static struct ntb_queue_entry *ntb_list_mv(spinlock_t *lock,
593 struct list_head *list,
594 struct list_head *to_list)
595{
596 struct ntb_queue_entry *entry;
597 unsigned long flags;
598
599 spin_lock_irqsave(lock, flags);
600
601 if (list_empty(list)) {
602 entry = NULL;
603 } else {
604 entry = list_first_entry(list, struct ntb_queue_entry, entry);
605 list_move_tail(&entry->entry, to_list);
606 }
607
608 spin_unlock_irqrestore(lock, flags);
609
610 return entry;
611}
612
e26a5843
AH
613static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,
614 unsigned int qp_num)
fce8a7bb 615{
e26a5843
AH
616 struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
617 struct ntb_transport_mw *mw;
a754a8fc
DJ
618 struct ntb_dev *ndev = nt->ndev;
619 struct ntb_queue_entry *entry;
ef114ed5 620 unsigned int rx_size, num_qps_mw;
e26a5843 621 unsigned int mw_num, mw_count, qp_count;
793c20e9 622 unsigned int i;
a754a8fc 623 int node;
fce8a7bb 624
e26a5843
AH
625 mw_count = nt->mw_count;
626 qp_count = nt->qp_count;
948d3a65 627
e26a5843
AH
628 mw_num = QP_TO_MW(nt, qp_num);
629 mw = &nt->mw_vec[mw_num];
630
631 if (!mw->virt_addr)
632 return -ENOMEM;
fce8a7bb 633
8e8496e0 634 if (mw_num < qp_count % mw_count)
e26a5843 635 num_qps_mw = qp_count / mw_count + 1;
fce8a7bb 636 else
e26a5843 637 num_qps_mw = qp_count / mw_count;
fce8a7bb 638
e26a5843 639 rx_size = (unsigned int)mw->xlat_size / num_qps_mw;
c92ba3c5 640 qp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);
793c20e9
JM
641 rx_size -= sizeof(struct ntb_rx_info);
642
282a2fee
JM
643 qp->remote_rx_info = qp->rx_buff + rx_size;
644
c9d534c8
JM
645 /* Due to housekeeping, there must be atleast 2 buffs */
646 qp->rx_max_frame = min(transport_mtu, rx_size / 2);
793c20e9
JM
647 qp->rx_max_entry = rx_size / qp->rx_max_frame;
648 qp->rx_index = 0;
649
a754a8fc
DJ
650 /*
651 * Checking to see if we have more entries than the default.
652 * We should add additional entries if that is the case so we
653 * can be in sync with the transport frames.
654 */
655 node = dev_to_node(&ndev->dev);
656 for (i = qp->rx_alloc_entry; i < qp->rx_max_entry; i++) {
82edcc75 657 entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
a754a8fc
DJ
658 if (!entry)
659 return -ENOMEM;
660
661 entry->qp = qp;
662 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
663 &qp->rx_free_q);
664 qp->rx_alloc_entry++;
665 }
666
c9d534c8 667 qp->remote_rx_info->entry = qp->rx_max_entry - 1;
fce8a7bb 668
ef114ed5 669 /* setup the hdr offsets with 0's */
793c20e9 670 for (i = 0; i < qp->rx_max_entry; i++) {
e26a5843
AH
671 void *offset = (qp->rx_buff + qp->rx_max_frame * (i + 1) -
672 sizeof(struct ntb_payload_header));
ef114ed5 673 memset(offset, 0, sizeof(struct ntb_payload_header));
793c20e9 674 }
fce8a7bb
JM
675
676 qp->rx_pkts = 0;
677 qp->tx_pkts = 0;
90f9e934 678 qp->tx_index = 0;
e26a5843
AH
679
680 return 0;
fce8a7bb
JM
681}
682
2b0569b3
LG
683static irqreturn_t ntb_transport_isr(int irq, void *dev)
684{
685 struct ntb_transport_qp *qp = dev;
686
687 tasklet_schedule(&qp->rxc_db_work);
688
689 return IRQ_HANDLED;
690}
691
692static void ntb_transport_setup_qp_peer_msi(struct ntb_transport_ctx *nt,
693 unsigned int qp_num)
694{
695 struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
696 int spad = qp_num * 2 + nt->msi_spad_offset;
697
698 if (!nt->use_msi)
699 return;
700
701 if (spad >= ntb_spad_count(nt->ndev))
702 return;
703
704 qp->peer_msi_desc.addr_offset =
705 ntb_peer_spad_read(qp->ndev, PIDX, spad);
706 qp->peer_msi_desc.data =
707 ntb_peer_spad_read(qp->ndev, PIDX, spad + 1);
708
709 dev_dbg(&qp->ndev->pdev->dev, "QP%d Peer MSI addr=%x data=%x\n",
710 qp_num, qp->peer_msi_desc.addr_offset, qp->peer_msi_desc.data);
711
712 if (qp->peer_msi_desc.addr_offset) {
713 qp->use_msi = true;
714 dev_info(&qp->ndev->pdev->dev,
715 "Using MSI interrupts for QP%d\n", qp_num);
716 }
717}
718
719static void ntb_transport_setup_qp_msi(struct ntb_transport_ctx *nt,
720 unsigned int qp_num)
721{
722 struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
723 int spad = qp_num * 2 + nt->msi_spad_offset;
724 int rc;
725
726 if (!nt->use_msi)
727 return;
728
729 if (spad >= ntb_spad_count(nt->ndev)) {
730 dev_warn_once(&qp->ndev->pdev->dev,
731 "Not enough SPADS to use MSI interrupts\n");
732 return;
733 }
734
735 ntb_spad_write(qp->ndev, spad, 0);
736 ntb_spad_write(qp->ndev, spad + 1, 0);
737
738 if (!qp->msi_irq) {
739 qp->msi_irq = ntbm_msi_request_irq(qp->ndev, ntb_transport_isr,
740 KBUILD_MODNAME, qp,
741 &qp->msi_desc);
742 if (qp->msi_irq < 0) {
743 dev_warn(&qp->ndev->pdev->dev,
744 "Unable to allocate MSI interrupt for qp%d\n",
745 qp_num);
746 return;
747 }
748 }
749
750 rc = ntb_spad_write(qp->ndev, spad, qp->msi_desc.addr_offset);
751 if (rc)
752 goto err_free_interrupt;
753
754 rc = ntb_spad_write(qp->ndev, spad + 1, qp->msi_desc.data);
755 if (rc)
756 goto err_free_interrupt;
757
758 dev_dbg(&qp->ndev->pdev->dev, "QP%d MSI %d addr=%x data=%x\n",
759 qp_num, qp->msi_irq, qp->msi_desc.addr_offset,
760 qp->msi_desc.data);
761
762 return;
763
764err_free_interrupt:
765 devm_free_irq(&nt->ndev->dev, qp->msi_irq, qp);
766}
767
768static void ntb_transport_msi_peer_desc_changed(struct ntb_transport_ctx *nt)
769{
770 int i;
771
772 dev_dbg(&nt->ndev->pdev->dev, "Peer MSI descriptors changed");
773
774 for (i = 0; i < nt->qp_count; i++)
775 ntb_transport_setup_qp_peer_msi(nt, i);
776}
777
778static void ntb_transport_msi_desc_changed(void *data)
779{
780 struct ntb_transport_ctx *nt = data;
781 int i;
782
783 dev_dbg(&nt->ndev->pdev->dev, "MSI descriptors changed");
784
785 for (i = 0; i < nt->qp_count; i++)
786 ntb_transport_setup_qp_msi(nt, i);
787
788 ntb_peer_db_set(nt->ndev, nt->msi_db_mask);
789}
790
e26a5843 791static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw)
b77b2637 792{
e26a5843
AH
793 struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
794 struct pci_dev *pdev = nt->ndev->pdev;
b77b2637
JM
795
796 if (!mw->virt_addr)
797 return;
798
443b9a14 799 ntb_mw_clear_trans(nt->ndev, PIDX, num_mw);
fc5d1829
AS
800 dma_free_coherent(&pdev->dev, mw->alloc_size,
801 mw->alloc_addr, mw->dma_addr);
e26a5843
AH
802 mw->xlat_size = 0;
803 mw->buff_size = 0;
fc5d1829
AS
804 mw->alloc_size = 0;
805 mw->alloc_addr = NULL;
b77b2637
JM
806 mw->virt_addr = NULL;
807}
808
fc5d1829
AS
809static int ntb_alloc_mw_buffer(struct ntb_transport_mw *mw,
810 struct device *dma_dev, size_t align)
811{
812 dma_addr_t dma_addr;
813 void *alloc_addr, *virt_addr;
814 int rc;
815
816 alloc_addr = dma_alloc_coherent(dma_dev, mw->alloc_size,
817 &dma_addr, GFP_KERNEL);
818 if (!alloc_addr) {
819 dev_err(dma_dev, "Unable to alloc MW buff of size %zu\n",
820 mw->alloc_size);
821 return -ENOMEM;
822 }
823 virt_addr = alloc_addr;
824
825 /*
826 * we must ensure that the memory address allocated is BAR size
827 * aligned in order for the XLAT register to take the value. This
828 * is a requirement of the hardware. It is recommended to setup CMA
829 * for BAR sizes equal or greater than 4MB.
830 */
831 if (!IS_ALIGNED(dma_addr, align)) {
832 if (mw->alloc_size > mw->buff_size) {
833 virt_addr = PTR_ALIGN(alloc_addr, align);
834 dma_addr = ALIGN(dma_addr, align);
835 } else {
836 rc = -ENOMEM;
837 goto err;
838 }
839 }
840
841 mw->alloc_addr = alloc_addr;
842 mw->virt_addr = virt_addr;
843 mw->dma_addr = dma_addr;
844
845 return 0;
846
847err:
848 dma_free_coherent(dma_dev, mw->alloc_size, alloc_addr, dma_addr);
849
850 return rc;
851}
852
e26a5843 853static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,
8c9edf63 854 resource_size_t size)
fce8a7bb 855{
e26a5843
AH
856 struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
857 struct pci_dev *pdev = nt->ndev->pdev;
8c9edf63 858 size_t xlat_size, buff_size;
980c41c8
LG
859 resource_size_t xlat_align;
860 resource_size_t xlat_align_size;
e26a5843
AH
861 int rc;
862
8c9edf63
AH
863 if (!size)
864 return -EINVAL;
865
980c41c8
LG
866 rc = ntb_mw_get_align(nt->ndev, PIDX, num_mw, &xlat_align,
867 &xlat_align_size, NULL);
868 if (rc)
869 return rc;
870
871 xlat_size = round_up(size, xlat_align_size);
872 buff_size = round_up(size, xlat_align);
fce8a7bb 873
b77b2637 874 /* No need to re-setup */
e26a5843 875 if (mw->xlat_size == xlat_size)
b77b2637
JM
876 return 0;
877
e26a5843 878 if (mw->buff_size)
b77b2637
JM
879 ntb_free_mw(nt, num_mw);
880
e26a5843
AH
881 /* Alloc memory for receiving data. Must be aligned */
882 mw->xlat_size = xlat_size;
883 mw->buff_size = buff_size;
fc5d1829 884 mw->alloc_size = buff_size;
fce8a7bb 885
fc5d1829
AS
886 rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);
887 if (rc) {
888 mw->alloc_size *= 2;
889 rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);
890 if (rc) {
891 dev_err(&pdev->dev,
892 "Unable to alloc aligned MW buff\n");
893 mw->xlat_size = 0;
894 mw->buff_size = 0;
895 mw->alloc_size = 0;
896 return rc;
897 }
3cc5ba19
DJ
898 }
899
fce8a7bb 900 /* Notify HW the memory location of the receive buffer */
443b9a14
SS
901 rc = ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr,
902 mw->xlat_size);
e26a5843
AH
903 if (rc) {
904 dev_err(&pdev->dev, "Unable to set mw%d translation", num_mw);
905 ntb_free_mw(nt, num_mw);
906 return -EIO;
907 }
fce8a7bb
JM
908
909 return 0;
910}
911
2849b5d7
AH
912static void ntb_qp_link_down_reset(struct ntb_transport_qp *qp)
913{
914 qp->link_is_up = false;
e9021331 915 qp->active = false;
2849b5d7
AH
916
917 qp->tx_index = 0;
918 qp->rx_index = 0;
919 qp->rx_bytes = 0;
920 qp->rx_pkts = 0;
921 qp->rx_ring_empty = 0;
922 qp->rx_err_no_buf = 0;
923 qp->rx_err_oflow = 0;
924 qp->rx_err_ver = 0;
925 qp->rx_memcpy = 0;
926 qp->rx_async = 0;
927 qp->tx_bytes = 0;
928 qp->tx_pkts = 0;
929 qp->tx_ring_full = 0;
930 qp->tx_err_no_buf = 0;
931 qp->tx_memcpy = 0;
932 qp->tx_async = 0;
933}
934
fca4d518 935static void ntb_qp_link_cleanup(struct ntb_transport_qp *qp)
fce8a7bb 936{
e26a5843
AH
937 struct ntb_transport_ctx *nt = qp->transport;
938 struct pci_dev *pdev = nt->ndev->pdev;
fce8a7bb 939
e22e0b9d 940 dev_info(&pdev->dev, "qp %d: Link Cleanup\n", qp->qp_num);
2849b5d7
AH
941
942 cancel_delayed_work_sync(&qp->link_work);
943 ntb_qp_link_down_reset(qp);
e26a5843
AH
944
945 if (qp->event_handler)
946 qp->event_handler(qp->cb_data, qp->link_is_up);
fca4d518
JM
947}
948
949static void ntb_qp_link_cleanup_work(struct work_struct *work)
950{
951 struct ntb_transport_qp *qp = container_of(work,
952 struct ntb_transport_qp,
953 link_cleanup);
e26a5843 954 struct ntb_transport_ctx *nt = qp->transport;
fca4d518
JM
955
956 ntb_qp_link_cleanup(qp);
fce8a7bb 957
e26a5843 958 if (nt->link_is_up)
fce8a7bb
JM
959 schedule_delayed_work(&qp->link_work,
960 msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
961}
962
7b4f2d3c
JM
963static void ntb_qp_link_down(struct ntb_transport_qp *qp)
964{
965 schedule_work(&qp->link_cleanup);
966}
967
e26a5843 968static void ntb_transport_link_cleanup(struct ntb_transport_ctx *nt)
fce8a7bb 969{
e26a5843
AH
970 struct ntb_transport_qp *qp;
971 u64 qp_bitmap_alloc;
b17faba0 972 unsigned int i, count;
fce8a7bb 973
e26a5843
AH
974 qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
975
fca4d518 976 /* Pass along the info to any clients */
e26a5843
AH
977 for (i = 0; i < nt->qp_count; i++)
978 if (qp_bitmap_alloc & BIT_ULL(i)) {
979 qp = &nt->qp_vec[i];
980 ntb_qp_link_cleanup(qp);
981 cancel_work_sync(&qp->link_cleanup);
982 cancel_delayed_work_sync(&qp->link_work);
983 }
fca4d518 984
e26a5843 985 if (!nt->link_is_up)
fce8a7bb 986 cancel_delayed_work_sync(&nt->link_work);
fce8a7bb 987
9143595a
JZ
988 for (i = 0; i < nt->mw_count; i++)
989 ntb_free_mw(nt, i);
990
fce8a7bb
JM
991 /* The scratchpad registers keep the values if the remote side
992 * goes down, blast them now to give them a sane value the next
993 * time they are accessed
994 */
b17faba0
SS
995 count = ntb_spad_count(nt->ndev);
996 for (i = 0; i < count; i++)
e26a5843 997 ntb_spad_write(nt->ndev, i, 0);
fce8a7bb
JM
998}
999
fca4d518
JM
1000static void ntb_transport_link_cleanup_work(struct work_struct *work)
1001{
e26a5843
AH
1002 struct ntb_transport_ctx *nt =
1003 container_of(work, struct ntb_transport_ctx, link_cleanup);
fca4d518
JM
1004
1005 ntb_transport_link_cleanup(nt);
1006}
1007
e26a5843 1008static void ntb_transport_event_callback(void *data)
fce8a7bb 1009{
e26a5843 1010 struct ntb_transport_ctx *nt = data;
fce8a7bb 1011
e26a5843 1012 if (ntb_link_is_up(nt->ndev, NULL, NULL) == 1)
fce8a7bb 1013 schedule_delayed_work(&nt->link_work, 0);
e26a5843 1014 else
7b4f2d3c 1015 schedule_work(&nt->link_cleanup);
fce8a7bb
JM
1016}
1017
1018static void ntb_transport_link_work(struct work_struct *work)
1019{
e26a5843
AH
1020 struct ntb_transport_ctx *nt =
1021 container_of(work, struct ntb_transport_ctx, link_work.work);
1022 struct ntb_dev *ndev = nt->ndev;
1023 struct pci_dev *pdev = ndev->pdev;
1024 resource_size_t size;
fce8a7bb 1025 u32 val;
84f76685 1026 int rc = 0, i, spad;
fce8a7bb 1027
113fc505 1028 /* send the local info, in the opposite order of the way we read it */
2b0569b3
LG
1029
1030 if (nt->use_msi) {
1031 rc = ntb_msi_setup_mws(ndev);
1032 if (rc) {
1033 dev_warn(&pdev->dev,
1034 "Failed to register MSI memory window: %d\n",
1035 rc);
1036 nt->use_msi = false;
1037 }
1038 }
1039
1040 for (i = 0; i < nt->qp_count; i++)
1041 ntb_transport_setup_qp_msi(nt, i);
1042
e26a5843
AH
1043 for (i = 0; i < nt->mw_count; i++) {
1044 size = nt->mw_vec[i].phys_size;
fce8a7bb 1045
e26a5843
AH
1046 if (max_mw_size && size > max_mw_size)
1047 size = max_mw_size;
fce8a7bb 1048
e26a5843 1049 spad = MW0_SZ_HIGH + (i * 2);
d67288a3 1050 ntb_peer_spad_write(ndev, PIDX, spad, upper_32_bits(size));
fce8a7bb 1051
e26a5843 1052 spad = MW0_SZ_LOW + (i * 2);
d67288a3 1053 ntb_peer_spad_write(ndev, PIDX, spad, lower_32_bits(size));
fce8a7bb
JM
1054 }
1055
d67288a3 1056 ntb_peer_spad_write(ndev, PIDX, NUM_MWS, nt->mw_count);
fce8a7bb 1057
d67288a3 1058 ntb_peer_spad_write(ndev, PIDX, NUM_QPS, nt->qp_count);
fce8a7bb 1059
d67288a3 1060 ntb_peer_spad_write(ndev, PIDX, VERSION, NTB_TRANSPORT_VERSION);
fce8a7bb 1061
e26a5843 1062 /* Query the remote side for its info */
0f69a7df 1063 val = ntb_spad_read(ndev, VERSION);
e26a5843
AH
1064 dev_dbg(&pdev->dev, "Remote version = %d\n", val);
1065 if (val != NTB_TRANSPORT_VERSION)
fce8a7bb 1066 goto out;
fce8a7bb 1067
0f69a7df 1068 val = ntb_spad_read(ndev, NUM_QPS);
fce8a7bb 1069 dev_dbg(&pdev->dev, "Remote max number of qps = %d\n", val);
e26a5843 1070 if (val != nt->qp_count)
fce8a7bb 1071 goto out;
fce8a7bb 1072
0f69a7df 1073 val = ntb_spad_read(ndev, NUM_MWS);
113fc505 1074 dev_dbg(&pdev->dev, "Remote number of mws = %d\n", val);
e26a5843
AH
1075 if (val != nt->mw_count)
1076 goto out;
fce8a7bb 1077
e26a5843 1078 for (i = 0; i < nt->mw_count; i++) {
113fc505 1079 u64 val64;
fce8a7bb 1080
0f69a7df 1081 val = ntb_spad_read(ndev, MW0_SZ_HIGH + (i * 2));
e26a5843 1082 val64 = (u64)val << 32;
113fc505 1083
0f69a7df 1084 val = ntb_spad_read(ndev, MW0_SZ_LOW + (i * 2));
113fc505
JM
1085 val64 |= val;
1086
e26a5843 1087 dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64);
113fc505
JM
1088
1089 rc = ntb_set_mw(nt, i, val64);
1090 if (rc)
1091 goto out1;
1092 }
fce8a7bb 1093
e26a5843 1094 nt->link_is_up = true;
fce8a7bb 1095
e26a5843
AH
1096 for (i = 0; i < nt->qp_count; i++) {
1097 struct ntb_transport_qp *qp = &nt->qp_vec[i];
fce8a7bb
JM
1098
1099 ntb_transport_setup_qp_mw(nt, i);
2b0569b3 1100 ntb_transport_setup_qp_peer_msi(nt, i);
fce8a7bb 1101
e26a5843 1102 if (qp->client_ready)
fce8a7bb
JM
1103 schedule_delayed_work(&qp->link_work, 0);
1104 }
1105
1106 return;
1107
113fc505 1108out1:
e26a5843 1109 for (i = 0; i < nt->mw_count; i++)
113fc505 1110 ntb_free_mw(nt, i);
84f76685
DJ
1111
1112 /* if there's an actual failure, we should just bail */
f3fd2afe 1113 if (rc < 0)
84f76685 1114 return;
84f76685 1115
fce8a7bb 1116out:
e26a5843 1117 if (ntb_link_is_up(ndev, NULL, NULL) == 1)
fce8a7bb
JM
1118 schedule_delayed_work(&nt->link_work,
1119 msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
1120}
1121
1122static void ntb_qp_link_work(struct work_struct *work)
1123{
1124 struct ntb_transport_qp *qp = container_of(work,
1125 struct ntb_transport_qp,
1126 link_work.work);
e26a5843
AH
1127 struct pci_dev *pdev = qp->ndev->pdev;
1128 struct ntb_transport_ctx *nt = qp->transport;
1129 int val;
fce8a7bb 1130
e26a5843 1131 WARN_ON(!nt->link_is_up);
fce8a7bb 1132
e26a5843 1133 val = ntb_spad_read(nt->ndev, QP_LINKS);
fce8a7bb 1134
d67288a3 1135 ntb_peer_spad_write(nt->ndev, PIDX, QP_LINKS, val | BIT(qp->qp_num));
fce8a7bb
JM
1136
1137 /* query remote spad for qp ready bits */
28762289 1138 dev_dbg_ratelimited(&pdev->dev, "Remote QP link status = %x\n", val);
fce8a7bb
JM
1139
1140 /* See if the remote side is up */
e26a5843 1141 if (val & BIT(qp->qp_num)) {
fce8a7bb 1142 dev_info(&pdev->dev, "qp %d: Link Up\n", qp->qp_num);
e26a5843 1143 qp->link_is_up = true;
e9021331 1144 qp->active = true;
e26a5843 1145
fce8a7bb 1146 if (qp->event_handler)
e26a5843 1147 qp->event_handler(qp->cb_data, qp->link_is_up);
8b5a22d8 1148
e9021331
DJ
1149 if (qp->active)
1150 tasklet_schedule(&qp->rxc_db_work);
e26a5843 1151 } else if (nt->link_is_up)
fce8a7bb
JM
1152 schedule_delayed_work(&qp->link_work,
1153 msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
1154}
1155
e26a5843 1156static int ntb_transport_init_queue(struct ntb_transport_ctx *nt,
53ca4fea 1157 unsigned int qp_num)
fce8a7bb
JM
1158{
1159 struct ntb_transport_qp *qp;
e26a5843
AH
1160 phys_addr_t mw_base;
1161 resource_size_t mw_size;
ef114ed5 1162 unsigned int num_qps_mw, tx_size;
e26a5843 1163 unsigned int mw_num, mw_count, qp_count;
282a2fee 1164 u64 qp_offset;
948d3a65 1165
e26a5843
AH
1166 mw_count = nt->mw_count;
1167 qp_count = nt->qp_count;
fce8a7bb 1168
e26a5843 1169 mw_num = QP_TO_MW(nt, qp_num);
e26a5843
AH
1170
1171 qp = &nt->qp_vec[qp_num];
fce8a7bb
JM
1172 qp->qp_num = qp_num;
1173 qp->transport = nt;
1174 qp->ndev = nt->ndev;
e26a5843 1175 qp->client_ready = false;
fce8a7bb 1176 qp->event_handler = NULL;
2849b5d7 1177 ntb_qp_link_down_reset(qp);
fce8a7bb 1178
8e8496e0 1179 if (mw_num < qp_count % mw_count)
e26a5843 1180 num_qps_mw = qp_count / mw_count + 1;
ef114ed5 1181 else
e26a5843
AH
1182 num_qps_mw = qp_count / mw_count;
1183
1184 mw_base = nt->mw_vec[mw_num].phys_addr;
1185 mw_size = nt->mw_vec[mw_num].phys_size;
ef114ed5 1186
cbd27448
LG
1187 if (max_mw_size && mw_size > max_mw_size)
1188 mw_size = max_mw_size;
1189
e26a5843 1190 tx_size = (unsigned int)mw_size / num_qps_mw;
c92ba3c5 1191 qp_offset = tx_size * (qp_num / mw_count);
e26a5843 1192
c59666bb 1193 qp->tx_mw_size = tx_size;
e26a5843 1194 qp->tx_mw = nt->mw_vec[mw_num].vbase + qp_offset;
282a2fee
JM
1195 if (!qp->tx_mw)
1196 return -EINVAL;
1197
e26a5843 1198 qp->tx_mw_phys = mw_base + qp_offset;
282a2fee
JM
1199 if (!qp->tx_mw_phys)
1200 return -EINVAL;
1201
793c20e9 1202 tx_size -= sizeof(struct ntb_rx_info);
282a2fee 1203 qp->rx_info = qp->tx_mw + tx_size;
793c20e9 1204
c9d534c8
JM
1205 /* Due to housekeeping, there must be atleast 2 buffs */
1206 qp->tx_max_frame = min(transport_mtu, tx_size / 2);
793c20e9 1207 qp->tx_max_entry = tx_size / qp->tx_max_frame;
ef114ed5 1208
c8650fd0 1209 if (nt->debugfs_node_dir) {
fce8a7bb
JM
1210 char debugfs_name[4];
1211
1212 snprintf(debugfs_name, 4, "qp%d", qp_num);
1213 qp->debugfs_dir = debugfs_create_dir(debugfs_name,
c8650fd0 1214 nt->debugfs_node_dir);
fce8a7bb
JM
1215
1216 qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,
1217 qp->debugfs_dir, qp,
1218 &ntb_qp_debugfs_stats);
e26a5843
AH
1219 } else {
1220 qp->debugfs_dir = NULL;
1221 qp->debugfs_stats = NULL;
fce8a7bb
JM
1222 }
1223
1224 INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);
fca4d518 1225 INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);
fce8a7bb 1226
da2e5ae5 1227 spin_lock_init(&qp->ntb_rx_q_lock);
fce8a7bb
JM
1228 spin_lock_init(&qp->ntb_tx_free_q_lock);
1229
da2e5ae5 1230 INIT_LIST_HEAD(&qp->rx_post_q);
fce8a7bb
JM
1231 INIT_LIST_HEAD(&qp->rx_pend_q);
1232 INIT_LIST_HEAD(&qp->rx_free_q);
1233 INIT_LIST_HEAD(&qp->tx_free_q);
282a2fee 1234
e26a5843
AH
1235 tasklet_init(&qp->rxc_db_work, ntb_transport_rxc_db,
1236 (unsigned long)qp);
1237
282a2fee 1238 return 0;
fce8a7bb
JM
1239}
1240
e26a5843 1241static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev)
fce8a7bb 1242{
e26a5843
AH
1243 struct ntb_transport_ctx *nt;
1244 struct ntb_transport_mw *mw;
b17faba0 1245 unsigned int mw_count, qp_count, spad_count, max_mw_count_for_spads;
e26a5843 1246 u64 qp_bitmap;
1199aa61 1247 int node;
fce8a7bb
JM
1248 int rc, i;
1249
bc240eec 1250 mw_count = ntb_peer_mw_count(ndev);
443b9a14
SS
1251
1252 if (!ndev->ops->mw_set_trans) {
1253 dev_err(&ndev->dev, "Inbound MW based NTB API is required\n");
1254 return -EINVAL;
1255 }
19645a07 1256
e26a5843
AH
1257 if (ntb_db_is_unsafe(ndev))
1258 dev_dbg(&ndev->dev,
1259 "doorbell is unsafe, proceed anyway...\n");
1260 if (ntb_spad_is_unsafe(ndev))
1261 dev_dbg(&ndev->dev,
1262 "scratchpad is unsafe, proceed anyway...\n");
1263
1e530119
SS
1264 if (ntb_peer_port_count(ndev) != NTB_DEF_PEER_CNT)
1265 dev_warn(&ndev->dev, "Multi-port NTB devices unsupported\n");
1266
1199aa61
AH
1267 node = dev_to_node(&ndev->dev);
1268
1269 nt = kzalloc_node(sizeof(*nt), GFP_KERNEL, node);
fce8a7bb
JM
1270 if (!nt)
1271 return -ENOMEM;
1272
e26a5843 1273 nt->ndev = ndev;
2b0569b3
LG
1274
1275 /*
1276 * If we are using MSI, and have at least one extra memory window,
1277 * we will reserve the last MW for the MSI window.
1278 */
1279 if (use_msi && mw_count > 1) {
1280 rc = ntb_msi_init(ndev, ntb_transport_msi_desc_changed);
1281 if (!rc) {
1282 mw_count -= 1;
1283 nt->use_msi = true;
1284 }
1285 }
1286
b17faba0
SS
1287 spad_count = ntb_spad_count(ndev);
1288
1289 /* Limit the MW's based on the availability of scratchpads */
1290
1291 if (spad_count < NTB_TRANSPORT_MIN_SPADS) {
1292 nt->mw_count = 0;
1293 rc = -EINVAL;
1294 goto err;
1295 }
e26a5843 1296
b17faba0
SS
1297 max_mw_count_for_spads = (spad_count - MW0_SZ_HIGH) / 2;
1298 nt->mw_count = min(mw_count, max_mw_count_for_spads);
e26a5843 1299
2b0569b3
LG
1300 nt->msi_spad_offset = nt->mw_count * 2 + MW0_SZ_HIGH;
1301
590b5b7d 1302 nt->mw_vec = kcalloc_node(mw_count, sizeof(*nt->mw_vec),
1199aa61 1303 GFP_KERNEL, node);
e26a5843
AH
1304 if (!nt->mw_vec) {
1305 rc = -ENOMEM;
fce8a7bb
JM
1306 goto err;
1307 }
1308
e26a5843
AH
1309 for (i = 0; i < mw_count; i++) {
1310 mw = &nt->mw_vec[i];
1311
443b9a14
SS
1312 rc = ntb_peer_mw_get_addr(ndev, i, &mw->phys_addr,
1313 &mw->phys_size);
e26a5843
AH
1314 if (rc)
1315 goto err1;
1316
06917f75 1317 mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);
e26a5843
AH
1318 if (!mw->vbase) {
1319 rc = -ENOMEM;
1320 goto err1;
1321 }
1322
1323 mw->buff_size = 0;
1324 mw->xlat_size = 0;
1325 mw->virt_addr = NULL;
1326 mw->dma_addr = 0;
948d3a65
JM
1327 }
1328
e26a5843
AH
1329 qp_bitmap = ntb_db_valid_mask(ndev);
1330
1331 qp_count = ilog2(qp_bitmap);
2b0569b3
LG
1332 if (nt->use_msi) {
1333 qp_count -= 1;
1334 nt->msi_db_mask = 1 << qp_count;
1335 ntb_db_clear_mask(ndev, nt->msi_db_mask);
1336 }
1337
e26a5843
AH
1338 if (max_num_clients && max_num_clients < qp_count)
1339 qp_count = max_num_clients;
cb827ee6
LG
1340 else if (nt->mw_count < qp_count)
1341 qp_count = nt->mw_count;
e26a5843
AH
1342
1343 qp_bitmap &= BIT_ULL(qp_count) - 1;
1344
1345 nt->qp_count = qp_count;
1346 nt->qp_bitmap = qp_bitmap;
1347 nt->qp_bitmap_free = qp_bitmap;
fce8a7bb 1348
590b5b7d 1349 nt->qp_vec = kcalloc_node(qp_count, sizeof(*nt->qp_vec),
1199aa61 1350 GFP_KERNEL, node);
e26a5843 1351 if (!nt->qp_vec) {
fce8a7bb 1352 rc = -ENOMEM;
d4adee09 1353 goto err1;
fce8a7bb
JM
1354 }
1355
c8650fd0
DJ
1356 if (nt_debugfs_dir) {
1357 nt->debugfs_node_dir =
1358 debugfs_create_dir(pci_name(ndev->pdev),
1359 nt_debugfs_dir);
1360 }
1361
e26a5843 1362 for (i = 0; i < qp_count; i++) {
282a2fee
JM
1363 rc = ntb_transport_init_queue(nt, i);
1364 if (rc)
d4adee09 1365 goto err2;
282a2fee 1366 }
fce8a7bb
JM
1367
1368 INIT_DELAYED_WORK(&nt->link_work, ntb_transport_link_work);
fca4d518 1369 INIT_WORK(&nt->link_cleanup, ntb_transport_link_cleanup_work);
fce8a7bb 1370
e26a5843 1371 rc = ntb_set_ctx(ndev, nt, &ntb_transport_ops);
fce8a7bb 1372 if (rc)
d4adee09 1373 goto err2;
fce8a7bb
JM
1374
1375 INIT_LIST_HEAD(&nt->client_devs);
1376 rc = ntb_bus_init(nt);
1377 if (rc)
d4adee09 1378 goto err3;
fce8a7bb 1379
e26a5843
AH
1380 nt->link_is_up = false;
1381 ntb_link_enable(ndev, NTB_SPEED_AUTO, NTB_WIDTH_AUTO);
1382 ntb_link_event(ndev);
fce8a7bb
JM
1383
1384 return 0;
1385
948d3a65 1386err3:
d4adee09 1387 ntb_clear_ctx(ndev);
948d3a65 1388err2:
d4adee09 1389 kfree(nt->qp_vec);
fce8a7bb 1390err1:
e26a5843
AH
1391 while (i--) {
1392 mw = &nt->mw_vec[i];
1393 iounmap(mw->vbase);
1394 }
d4adee09 1395 kfree(nt->mw_vec);
fce8a7bb 1396err:
fce8a7bb
JM
1397 kfree(nt);
1398 return rc;
1399}
1400
e26a5843 1401static void ntb_transport_free(struct ntb_client *self, struct ntb_dev *ndev)
fce8a7bb 1402{
e26a5843
AH
1403 struct ntb_transport_ctx *nt = ndev->ctx;
1404 struct ntb_transport_qp *qp;
1405 u64 qp_bitmap_alloc;
fce8a7bb
JM
1406 int i;
1407
fca4d518 1408 ntb_transport_link_cleanup(nt);
e26a5843
AH
1409 cancel_work_sync(&nt->link_cleanup);
1410 cancel_delayed_work_sync(&nt->link_work);
1411
1412 qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
fce8a7bb
JM
1413
1414 /* verify that all the qp's are freed */
e26a5843
AH
1415 for (i = 0; i < nt->qp_count; i++) {
1416 qp = &nt->qp_vec[i];
1417 if (qp_bitmap_alloc & BIT_ULL(i))
1418 ntb_transport_free_queue(qp);
1419 debugfs_remove_recursive(qp->debugfs_dir);
1517a3f2 1420 }
fce8a7bb 1421
e26a5843
AH
1422 ntb_link_disable(ndev);
1423 ntb_clear_ctx(ndev);
fce8a7bb 1424
e26a5843 1425 ntb_bus_remove(nt);
fce8a7bb 1426
e26a5843 1427 for (i = nt->mw_count; i--; ) {
113fc505 1428 ntb_free_mw(nt, i);
e26a5843
AH
1429 iounmap(nt->mw_vec[i].vbase);
1430 }
fce8a7bb 1431
e26a5843
AH
1432 kfree(nt->qp_vec);
1433 kfree(nt->mw_vec);
fce8a7bb
JM
1434 kfree(nt);
1435}
1436
da2e5ae5 1437static void ntb_complete_rxc(struct ntb_transport_qp *qp)
fce8a7bb 1438{
da2e5ae5
AH
1439 struct ntb_queue_entry *entry;
1440 void *cb_data;
1441 unsigned int len;
1442 unsigned long irqflags;
1443
1444 spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
1445
1446 while (!list_empty(&qp->rx_post_q)) {
1447 entry = list_first_entry(&qp->rx_post_q,
1448 struct ntb_queue_entry, entry);
1449 if (!(entry->flags & DESC_DONE_FLAG))
1450 break;
1451
1452 entry->rx_hdr->flags = 0;
72203572 1453 iowrite32(entry->rx_index, &qp->rx_info->entry);
da2e5ae5
AH
1454
1455 cb_data = entry->cb_data;
1456 len = entry->len;
1457
1458 list_move_tail(&entry->entry, &qp->rx_free_q);
1459
1460 spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
1461
1462 if (qp->rx_handler && qp->client_ready)
1463 qp->rx_handler(qp, qp->cb_data, cb_data, len);
1464
1465 spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
1466 }
282a2fee 1467
da2e5ae5
AH
1468 spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
1469}
fce8a7bb 1470
72203572
DJ
1471static void ntb_rx_copy_callback(void *data,
1472 const struct dmaengine_result *res)
da2e5ae5
AH
1473{
1474 struct ntb_queue_entry *entry = data;
fce8a7bb 1475
72203572
DJ
1476 /* we need to check DMA results if we are using DMA */
1477 if (res) {
1478 enum dmaengine_tx_result dma_err = res->result;
1479
1480 switch (dma_err) {
1481 case DMA_TRANS_READ_FAILED:
1482 case DMA_TRANS_WRITE_FAILED:
1483 entry->errors++;
df561f66 1484 fallthrough;
72203572
DJ
1485 case DMA_TRANS_ABORTED:
1486 {
1487 struct ntb_transport_qp *qp = entry->qp;
1488 void *offset = qp->rx_buff + qp->rx_max_frame *
1489 qp->rx_index;
1490
1491 ntb_memcpy_rx(entry, offset);
1492 qp->rx_memcpy++;
1493 return;
1494 }
1495
1496 case DMA_TRANS_NOERROR:
1497 default:
1498 break;
1499 }
1500 }
1501
da2e5ae5 1502 entry->flags |= DESC_DONE_FLAG;
448c6fb3 1503
da2e5ae5 1504 ntb_complete_rxc(entry->qp);
fce8a7bb
JM
1505}
1506
282a2fee
JM
1507static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset)
1508{
1509 void *buf = entry->buf;
1510 size_t len = entry->len;
1511
1512 memcpy(buf, offset, len);
1513
e26a5843
AH
1514 /* Ensure that the data is fully copied out before clearing the flag */
1515 wmb();
1516
72203572 1517 ntb_rx_copy_callback(entry, NULL);
282a2fee
JM
1518}
1519
72203572 1520static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset)
282a2fee
JM
1521{
1522 struct dma_async_tx_descriptor *txd;
1523 struct ntb_transport_qp *qp = entry->qp;
569410ca 1524 struct dma_chan *chan = qp->rx_dma_chan;
282a2fee 1525 struct dma_device *device;
da2e5ae5 1526 size_t pay_off, buff_off, len;
6f57fd05 1527 struct dmaengine_unmap_data *unmap;
282a2fee
JM
1528 dma_cookie_t cookie;
1529 void *buf = entry->buf;
282a2fee 1530
da2e5ae5 1531 len = entry->len;
282a2fee 1532 device = chan->device;
e26a5843
AH
1533 pay_off = (size_t)offset & ~PAGE_MASK;
1534 buff_off = (size_t)buf & ~PAGE_MASK;
282a2fee
JM
1535
1536 if (!is_dma_copy_aligned(device, pay_off, buff_off, len))
905921e7 1537 goto err;
282a2fee 1538
6f57fd05
BZ
1539 unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOWAIT);
1540 if (!unmap)
905921e7 1541 goto err;
282a2fee 1542
6f57fd05
BZ
1543 unmap->len = len;
1544 unmap->addr[0] = dma_map_page(device->dev, virt_to_page(offset),
1545 pay_off, len, DMA_TO_DEVICE);
1546 if (dma_mapping_error(device->dev, unmap->addr[0]))
1547 goto err_get_unmap;
1548
1549 unmap->to_cnt = 1;
282a2fee 1550
6f57fd05
BZ
1551 unmap->addr[1] = dma_map_page(device->dev, virt_to_page(buf),
1552 buff_off, len, DMA_FROM_DEVICE);
1553 if (dma_mapping_error(device->dev, unmap->addr[1]))
1554 goto err_get_unmap;
1555
1556 unmap->from_cnt = 1;
1557
88931ec3
AH
1558 txd = device->device_prep_dma_memcpy(chan, unmap->addr[1],
1559 unmap->addr[0], len,
1560 DMA_PREP_INTERRUPT);
1561 if (!txd)
6f57fd05 1562 goto err_get_unmap;
282a2fee 1563
72203572 1564 txd->callback_result = ntb_rx_copy_callback;
282a2fee 1565 txd->callback_param = entry;
6f57fd05 1566 dma_set_unmap(txd, unmap);
282a2fee
JM
1567
1568 cookie = dmaengine_submit(txd);
1569 if (dma_submit_error(cookie))
6f57fd05
BZ
1570 goto err_set_unmap;
1571
1572 dmaengine_unmap_put(unmap);
282a2fee
JM
1573
1574 qp->last_cookie = cookie;
1575
1576 qp->rx_async++;
1577
72203572 1578 return 0;
282a2fee 1579
6f57fd05
BZ
1580err_set_unmap:
1581 dmaengine_unmap_put(unmap);
1582err_get_unmap:
1583 dmaengine_unmap_put(unmap);
72203572
DJ
1584err:
1585 return -ENXIO;
1586}
1587
1588static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset)
1589{
1590 struct ntb_transport_qp *qp = entry->qp;
1591 struct dma_chan *chan = qp->rx_dma_chan;
1592 int res;
1593
1594 if (!chan)
1595 goto err;
1596
1597 if (entry->len < copy_bytes)
1598 goto err;
1599
1600 res = ntb_async_rx_submit(entry, offset);
1601 if (res < 0)
1602 goto err;
1603
1604 if (!entry->retries)
1605 qp->rx_async++;
1606
1607 return;
1608
282a2fee
JM
1609err:
1610 ntb_memcpy_rx(entry, offset);
1611 qp->rx_memcpy++;
1612}
1613
fce8a7bb
JM
1614static int ntb_process_rxc(struct ntb_transport_qp *qp)
1615{
1616 struct ntb_payload_header *hdr;
1617 struct ntb_queue_entry *entry;
1618 void *offset;
1619
793c20e9
JM
1620 offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;
1621 hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);
1622
e26a5843
AH
1623 dev_dbg(&qp->ndev->pdev->dev, "qp %d: RX ver %u len %d flags %x\n",
1624 qp->qp_num, hdr->ver, hdr->len, hdr->flags);
fce8a7bb 1625
fce8a7bb 1626 if (!(hdr->flags & DESC_DONE_FLAG)) {
e26a5843 1627 dev_dbg(&qp->ndev->pdev->dev, "done flag not set\n");
fce8a7bb
JM
1628 qp->rx_ring_empty++;
1629 return -EAGAIN;
1630 }
1631
e26a5843
AH
1632 if (hdr->flags & LINK_DOWN_FLAG) {
1633 dev_dbg(&qp->ndev->pdev->dev, "link down flag set\n");
1634 ntb_qp_link_down(qp);
1635 hdr->flags = 0;
c0900b33 1636 return -EAGAIN;
e26a5843
AH
1637 }
1638
1639 if (hdr->ver != (u32)qp->rx_pkts) {
1640 dev_dbg(&qp->ndev->pdev->dev,
1641 "version mismatch, expected %llu - got %u\n",
1642 qp->rx_pkts, hdr->ver);
fce8a7bb
JM
1643 qp->rx_err_ver++;
1644 return -EIO;
1645 }
1646
da2e5ae5 1647 entry = ntb_list_mv(&qp->ntb_rx_q_lock, &qp->rx_pend_q, &qp->rx_post_q);
e26a5843
AH
1648 if (!entry) {
1649 dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");
1650 qp->rx_err_no_buf++;
da2e5ae5 1651 return -EAGAIN;
fce8a7bb
JM
1652 }
1653
da2e5ae5 1654 entry->rx_hdr = hdr;
72203572 1655 entry->rx_index = qp->rx_index;
da2e5ae5 1656
282a2fee 1657 if (hdr->len > entry->len) {
e26a5843
AH
1658 dev_dbg(&qp->ndev->pdev->dev,
1659 "receive buffer overflow! Wanted %d got %d\n",
fce8a7bb 1660 hdr->len, entry->len);
e26a5843 1661 qp->rx_err_oflow++;
282a2fee 1662
da2e5ae5
AH
1663 entry->len = -EIO;
1664 entry->flags |= DESC_DONE_FLAG;
fce8a7bb 1665
da2e5ae5
AH
1666 ntb_complete_rxc(qp);
1667 } else {
1668 dev_dbg(&qp->ndev->pdev->dev,
1669 "RX OK index %u ver %u size %d into buf size %d\n",
1670 qp->rx_index, hdr->ver, hdr->len, entry->len);
e26a5843 1671
da2e5ae5
AH
1672 qp->rx_bytes += hdr->len;
1673 qp->rx_pkts++;
e26a5843 1674
da2e5ae5 1675 entry->len = hdr->len;
282a2fee 1676
da2e5ae5
AH
1677 ntb_async_rx(entry, offset);
1678 }
fce8a7bb 1679
282a2fee
JM
1680 qp->rx_index++;
1681 qp->rx_index %= qp->rx_max_entry;
1682
1683 return 0;
fce8a7bb
JM
1684}
1685
e26a5843 1686static void ntb_transport_rxc_db(unsigned long data)
fce8a7bb 1687{
e26a5843 1688 struct ntb_transport_qp *qp = (void *)data;
c336acd3 1689 int rc, i;
fce8a7bb 1690
e26a5843
AH
1691 dev_dbg(&qp->ndev->pdev->dev, "%s: doorbell %d received\n",
1692 __func__, qp->qp_num);
e8aeb60c 1693
c336acd3
JM
1694 /* Limit the number of packets processed in a single interrupt to
1695 * provide fairness to others
1696 */
1697 for (i = 0; i < qp->rx_max_entry; i++) {
fce8a7bb 1698 rc = ntb_process_rxc(qp);
c336acd3
JM
1699 if (rc)
1700 break;
1701 }
282a2fee 1702
569410ca
DJ
1703 if (i && qp->rx_dma_chan)
1704 dma_async_issue_pending(qp->rx_dma_chan);
fce8a7bb 1705
e26a5843
AH
1706 if (i == qp->rx_max_entry) {
1707 /* there is more work to do */
e9021331
DJ
1708 if (qp->active)
1709 tasklet_schedule(&qp->rxc_db_work);
e26a5843
AH
1710 } else if (ntb_db_read(qp->ndev) & BIT_ULL(qp->qp_num)) {
1711 /* the doorbell bit is set: clear it */
1712 ntb_db_clear(qp->ndev, BIT_ULL(qp->qp_num));
1713 /* ntb_db_read ensures ntb_db_clear write is committed */
1714 ntb_db_read(qp->ndev);
1715
1716 /* an interrupt may have arrived between finishing
1717 * ntb_process_rxc and clearing the doorbell bit:
1718 * there might be some more work to do.
1719 */
e9021331
DJ
1720 if (qp->active)
1721 tasklet_schedule(&qp->rxc_db_work);
e26a5843 1722 }
fce8a7bb
JM
1723}
1724
9cabc269
DJ
1725static void ntb_tx_copy_callback(void *data,
1726 const struct dmaengine_result *res)
fce8a7bb 1727{
282a2fee
JM
1728 struct ntb_queue_entry *entry = data;
1729 struct ntb_transport_qp *qp = entry->qp;
1730 struct ntb_payload_header __iomem *hdr = entry->tx_hdr;
fce8a7bb 1731
9cabc269
DJ
1732 /* we need to check DMA results if we are using DMA */
1733 if (res) {
1734 enum dmaengine_tx_result dma_err = res->result;
1735
1736 switch (dma_err) {
1737 case DMA_TRANS_READ_FAILED:
1738 case DMA_TRANS_WRITE_FAILED:
1739 entry->errors++;
df561f66 1740 fallthrough;
9cabc269
DJ
1741 case DMA_TRANS_ABORTED:
1742 {
1743 void __iomem *offset =
1744 qp->tx_mw + qp->tx_max_frame *
1745 entry->tx_index;
1746
1747 /* resubmit via CPU */
1748 ntb_memcpy_tx(entry, offset);
1749 qp->tx_memcpy++;
1750 return;
1751 }
1752
1753 case DMA_TRANS_NOERROR:
1754 default:
1755 break;
1756 }
1757 }
1758
74465645 1759 iowrite32(entry->flags | DESC_DONE_FLAG, &hdr->flags);
fce8a7bb 1760
2b0569b3
LG
1761 if (qp->use_msi)
1762 ntb_msi_peer_trigger(qp->ndev, PIDX, &qp->peer_msi_desc);
1763 else
1764 ntb_peer_db_set(qp->ndev, BIT_ULL(qp->qp_num));
fce8a7bb
JM
1765
1766 /* The entry length can only be zero if the packet is intended to be a
1767 * "link down" or similar. Since no payload is being sent in these
1768 * cases, there is nothing to add to the completion queue.
1769 */
1770 if (entry->len > 0) {
1771 qp->tx_bytes += entry->len;
1772
1773 if (qp->tx_handler)
1774 qp->tx_handler(qp, qp->cb_data, entry->cb_data,
1775 entry->len);
1776 }
1777
1778 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry, &qp->tx_free_q);
1779}
1780
282a2fee 1781static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset)
fce8a7bb 1782{
06917f75
DJ
1783#ifdef ARCH_HAS_NOCACHE_UACCESS
1784 /*
1785 * Using non-temporal mov to improve performance on non-cached
1786 * writes, even though we aren't actually copying from user space.
1787 */
1788 __copy_from_user_inatomic_nocache(offset, entry->buf, entry->len);
1789#else
282a2fee 1790 memcpy_toio(offset, entry->buf, entry->len);
06917f75 1791#endif
282a2fee 1792
e26a5843
AH
1793 /* Ensure that the data is fully copied out before setting the flags */
1794 wmb();
1795
9cabc269 1796 ntb_tx_copy_callback(entry, NULL);
282a2fee
JM
1797}
1798
9cabc269
DJ
1799static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
1800 struct ntb_queue_entry *entry)
282a2fee 1801{
282a2fee 1802 struct dma_async_tx_descriptor *txd;
569410ca 1803 struct dma_chan *chan = qp->tx_dma_chan;
282a2fee 1804 struct dma_device *device;
9cabc269
DJ
1805 size_t len = entry->len;
1806 void *buf = entry->buf;
282a2fee 1807 size_t dest_off, buff_off;
6f57fd05
BZ
1808 struct dmaengine_unmap_data *unmap;
1809 dma_addr_t dest;
282a2fee 1810 dma_cookie_t cookie;
fce8a7bb 1811
282a2fee 1812 device = chan->device;
c59666bb 1813 dest = qp->tx_mw_dma_addr + qp->tx_max_frame * entry->tx_index;
e26a5843
AH
1814 buff_off = (size_t)buf & ~PAGE_MASK;
1815 dest_off = (size_t)dest & ~PAGE_MASK;
282a2fee
JM
1816
1817 if (!is_dma_copy_aligned(device, buff_off, dest_off, len))
1818 goto err;
1819
6f57fd05
BZ
1820 unmap = dmaengine_get_unmap_data(device->dev, 1, GFP_NOWAIT);
1821 if (!unmap)
282a2fee
JM
1822 goto err;
1823
6f57fd05
BZ
1824 unmap->len = len;
1825 unmap->addr[0] = dma_map_page(device->dev, virt_to_page(buf),
1826 buff_off, len, DMA_TO_DEVICE);
1827 if (dma_mapping_error(device->dev, unmap->addr[0]))
1828 goto err_get_unmap;
1829
1830 unmap->to_cnt = 1;
1831
88931ec3
AH
1832 txd = device->device_prep_dma_memcpy(chan, dest, unmap->addr[0], len,
1833 DMA_PREP_INTERRUPT);
1834 if (!txd)
6f57fd05 1835 goto err_get_unmap;
282a2fee 1836
9cabc269 1837 txd->callback_result = ntb_tx_copy_callback;
282a2fee 1838 txd->callback_param = entry;
6f57fd05 1839 dma_set_unmap(txd, unmap);
282a2fee
JM
1840
1841 cookie = dmaengine_submit(txd);
1842 if (dma_submit_error(cookie))
6f57fd05
BZ
1843 goto err_set_unmap;
1844
1845 dmaengine_unmap_put(unmap);
282a2fee
JM
1846
1847 dma_async_issue_pending(chan);
282a2fee 1848
9cabc269 1849 return 0;
6f57fd05
BZ
1850err_set_unmap:
1851 dmaengine_unmap_put(unmap);
1852err_get_unmap:
1853 dmaengine_unmap_put(unmap);
9cabc269
DJ
1854err:
1855 return -ENXIO;
1856}
1857
1858static void ntb_async_tx(struct ntb_transport_qp *qp,
1859 struct ntb_queue_entry *entry)
1860{
1861 struct ntb_payload_header __iomem *hdr;
1862 struct dma_chan *chan = qp->tx_dma_chan;
1863 void __iomem *offset;
1864 int res;
1865
1866 entry->tx_index = qp->tx_index;
1867 offset = qp->tx_mw + qp->tx_max_frame * entry->tx_index;
1868 hdr = offset + qp->tx_max_frame - sizeof(struct ntb_payload_header);
1869 entry->tx_hdr = hdr;
1870
1871 iowrite32(entry->len, &hdr->len);
1872 iowrite32((u32)qp->tx_pkts, &hdr->ver);
1873
1874 if (!chan)
1875 goto err;
1876
1877 if (entry->len < copy_bytes)
1878 goto err;
1879
1880 res = ntb_async_tx_submit(qp, entry);
1881 if (res < 0)
1882 goto err;
1883
1884 if (!entry->retries)
1885 qp->tx_async++;
1886
1887 return;
1888
282a2fee
JM
1889err:
1890 ntb_memcpy_tx(entry, offset);
1891 qp->tx_memcpy++;
1892}
1893
1894static int ntb_process_tx(struct ntb_transport_qp *qp,
1895 struct ntb_queue_entry *entry)
1896{
793c20e9 1897 if (qp->tx_index == qp->remote_rx_info->entry) {
fce8a7bb
JM
1898 qp->tx_ring_full++;
1899 return -EAGAIN;
1900 }
1901
ef114ed5 1902 if (entry->len > qp->tx_max_frame - sizeof(struct ntb_payload_header)) {
fce8a7bb 1903 if (qp->tx_handler)
179f912a 1904 qp->tx_handler(qp, qp->cb_data, NULL, -EIO);
fce8a7bb
JM
1905
1906 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
1907 &qp->tx_free_q);
1908 return 0;
1909 }
1910
282a2fee 1911 ntb_async_tx(qp, entry);
fce8a7bb 1912
793c20e9
JM
1913 qp->tx_index++;
1914 qp->tx_index %= qp->tx_max_entry;
fce8a7bb
JM
1915
1916 qp->tx_pkts++;
1917
1918 return 0;
1919}
1920
1921static void ntb_send_link_down(struct ntb_transport_qp *qp)
1922{
e26a5843 1923 struct pci_dev *pdev = qp->ndev->pdev;
fce8a7bb
JM
1924 struct ntb_queue_entry *entry;
1925 int i, rc;
1926
e26a5843 1927 if (!qp->link_is_up)
fce8a7bb
JM
1928 return;
1929
e22e0b9d 1930 dev_info(&pdev->dev, "qp %d: Send Link Down\n", qp->qp_num);
fce8a7bb
JM
1931
1932 for (i = 0; i < NTB_LINK_DOWN_TIMEOUT; i++) {
f766755c 1933 entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
fce8a7bb
JM
1934 if (entry)
1935 break;
1936 msleep(100);
1937 }
1938
1939 if (!entry)
1940 return;
1941
1942 entry->cb_data = NULL;
1943 entry->buf = NULL;
1944 entry->len = 0;
1945 entry->flags = LINK_DOWN_FLAG;
1946
1947 rc = ntb_process_tx(qp, entry);
1948 if (rc)
1949 dev_err(&pdev->dev, "ntb: QP%d unable to send linkdown msg\n",
1950 qp->qp_num);
2849b5d7
AH
1951
1952 ntb_qp_link_down_reset(qp);
fce8a7bb
JM
1953}
1954
1199aa61
AH
1955static bool ntb_dma_filter_fn(struct dma_chan *chan, void *node)
1956{
1957 return dev_to_node(&chan->dev->device) == (int)(unsigned long)node;
1958}
1959
fce8a7bb
JM
1960/**
1961 * ntb_transport_create_queue - Create a new NTB transport layer queue
1962 * @rx_handler: receive callback function
1963 * @tx_handler: transmit callback function
1964 * @event_handler: event callback function
1965 *
1966 * Create a new NTB transport layer queue and provide the queue with a callback
1967 * routine for both transmit and receive. The receive callback routine will be
1968 * used to pass up data when the transport has received it on the queue. The
1969 * transmit callback routine will be called when the transport has completed the
1970 * transmission of the data on the queue and the data is ready to be freed.
1971 *
1972 * RETURNS: pointer to newly created ntb_queue, NULL on error.
1973 */
1974struct ntb_transport_qp *
e26a5843 1975ntb_transport_create_queue(void *data, struct device *client_dev,
fce8a7bb
JM
1976 const struct ntb_queue_handlers *handlers)
1977{
e26a5843
AH
1978 struct ntb_dev *ndev;
1979 struct pci_dev *pdev;
1980 struct ntb_transport_ctx *nt;
fce8a7bb
JM
1981 struct ntb_queue_entry *entry;
1982 struct ntb_transport_qp *qp;
e26a5843 1983 u64 qp_bit;
fce8a7bb 1984 unsigned int free_queue;
1199aa61
AH
1985 dma_cap_mask_t dma_mask;
1986 int node;
e26a5843 1987 int i;
fce8a7bb 1988
e26a5843
AH
1989 ndev = dev_ntb(client_dev->parent);
1990 pdev = ndev->pdev;
1991 nt = ndev->ctx;
fce8a7bb 1992
1199aa61
AH
1993 node = dev_to_node(&ndev->dev);
1994
8fcd0950 1995 free_queue = ffs(nt->qp_bitmap_free);
fce8a7bb
JM
1996 if (!free_queue)
1997 goto err;
1998
1999 /* decrement free_queue to make it zero based */
2000 free_queue--;
2001
e26a5843
AH
2002 qp = &nt->qp_vec[free_queue];
2003 qp_bit = BIT_ULL(qp->qp_num);
2004
2005 nt->qp_bitmap_free &= ~qp_bit;
fce8a7bb 2006
fce8a7bb
JM
2007 qp->cb_data = data;
2008 qp->rx_handler = handlers->rx_handler;
2009 qp->tx_handler = handlers->tx_handler;
2010 qp->event_handler = handlers->event_handler;
2011
1199aa61
AH
2012 dma_cap_zero(dma_mask);
2013 dma_cap_set(DMA_MEMCPY, dma_mask);
2014
a41ef053 2015 if (use_dma) {
569410ca
DJ
2016 qp->tx_dma_chan =
2017 dma_request_channel(dma_mask, ntb_dma_filter_fn,
2018 (void *)(unsigned long)node);
2019 if (!qp->tx_dma_chan)
2020 dev_info(&pdev->dev, "Unable to allocate TX DMA channel\n");
2021
2022 qp->rx_dma_chan =
2023 dma_request_channel(dma_mask, ntb_dma_filter_fn,
2024 (void *)(unsigned long)node);
2025 if (!qp->rx_dma_chan)
2026 dev_info(&pdev->dev, "Unable to allocate RX DMA channel\n");
a41ef053 2027 } else {
569410ca
DJ
2028 qp->tx_dma_chan = NULL;
2029 qp->rx_dma_chan = NULL;
a41ef053 2030 }
569410ca 2031
51cb8dbf 2032 qp->tx_mw_dma_addr = 0;
c59666bb
LG
2033 if (qp->tx_dma_chan) {
2034 qp->tx_mw_dma_addr =
2035 dma_map_resource(qp->tx_dma_chan->device->dev,
2036 qp->tx_mw_phys, qp->tx_mw_size,
2037 DMA_FROM_DEVICE, 0);
2038 if (dma_mapping_error(qp->tx_dma_chan->device->dev,
2039 qp->tx_mw_dma_addr)) {
2040 qp->tx_mw_dma_addr = 0;
2041 goto err1;
2042 }
2043 }
2044
569410ca
DJ
2045 dev_dbg(&pdev->dev, "Using %s memcpy for TX\n",
2046 qp->tx_dma_chan ? "DMA" : "CPU");
2047
2048 dev_dbg(&pdev->dev, "Using %s memcpy for RX\n",
2049 qp->rx_dma_chan ? "DMA" : "CPU");
282a2fee 2050
fce8a7bb 2051 for (i = 0; i < NTB_QP_DEF_NUM_ENTRIES; i++) {
c9160b69 2052 entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
fce8a7bb
JM
2053 if (!entry)
2054 goto err1;
2055
282a2fee 2056 entry->qp = qp;
da2e5ae5 2057 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
f766755c 2058 &qp->rx_free_q);
fce8a7bb 2059 }
a754a8fc 2060 qp->rx_alloc_entry = NTB_QP_DEF_NUM_ENTRIES;
fce8a7bb 2061
a754a8fc 2062 for (i = 0; i < qp->tx_max_entry; i++) {
c9160b69 2063 entry = kzalloc_node(sizeof(*entry), GFP_KERNEL, node);
fce8a7bb
JM
2064 if (!entry)
2065 goto err2;
2066
282a2fee 2067 entry->qp = qp;
fce8a7bb 2068 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
f766755c 2069 &qp->tx_free_q);
fce8a7bb
JM
2070 }
2071
e26a5843
AH
2072 ntb_db_clear(qp->ndev, qp_bit);
2073 ntb_db_clear_mask(qp->ndev, qp_bit);
fce8a7bb
JM
2074
2075 dev_info(&pdev->dev, "NTB Transport QP %d created\n", qp->qp_num);
2076
2077 return qp;
2078
fce8a7bb 2079err2:
f766755c 2080 while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
fce8a7bb
JM
2081 kfree(entry);
2082err1:
a754a8fc 2083 qp->rx_alloc_entry = 0;
da2e5ae5 2084 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
fce8a7bb 2085 kfree(entry);
c59666bb
LG
2086 if (qp->tx_mw_dma_addr)
2087 dma_unmap_resource(qp->tx_dma_chan->device->dev,
2088 qp->tx_mw_dma_addr, qp->tx_mw_size,
2089 DMA_FROM_DEVICE, 0);
569410ca
DJ
2090 if (qp->tx_dma_chan)
2091 dma_release_channel(qp->tx_dma_chan);
2092 if (qp->rx_dma_chan)
2093 dma_release_channel(qp->rx_dma_chan);
e26a5843 2094 nt->qp_bitmap_free |= qp_bit;
fce8a7bb
JM
2095err:
2096 return NULL;
2097}
2098EXPORT_SYMBOL_GPL(ntb_transport_create_queue);
2099
2100/**
2101 * ntb_transport_free_queue - Frees NTB transport queue
2102 * @qp: NTB queue to be freed
2103 *
2104 * Frees NTB transport queue
2105 */
2106void ntb_transport_free_queue(struct ntb_transport_qp *qp)
2107{
186f27ff 2108 struct pci_dev *pdev;
fce8a7bb 2109 struct ntb_queue_entry *entry;
e26a5843 2110 u64 qp_bit;
fce8a7bb
JM
2111
2112 if (!qp)
2113 return;
2114
e26a5843 2115 pdev = qp->ndev->pdev;
186f27ff 2116
e9021331
DJ
2117 qp->active = false;
2118
569410ca
DJ
2119 if (qp->tx_dma_chan) {
2120 struct dma_chan *chan = qp->tx_dma_chan;
2121 /* Putting the dma_chan to NULL will force any new traffic to be
2122 * processed by the CPU instead of the DAM engine
2123 */
2124 qp->tx_dma_chan = NULL;
2125
2126 /* Try to be nice and wait for any queued DMA engine
2127 * transactions to process before smashing it with a rock
2128 */
2129 dma_sync_wait(chan, qp->last_cookie);
2130 dmaengine_terminate_all(chan);
c59666bb
LG
2131
2132 dma_unmap_resource(chan->device->dev,
2133 qp->tx_mw_dma_addr, qp->tx_mw_size,
2134 DMA_FROM_DEVICE, 0);
2135
569410ca
DJ
2136 dma_release_channel(chan);
2137 }
2138
2139 if (qp->rx_dma_chan) {
2140 struct dma_chan *chan = qp->rx_dma_chan;
282a2fee
JM
2141 /* Putting the dma_chan to NULL will force any new traffic to be
2142 * processed by the CPU instead of the DAM engine
2143 */
569410ca 2144 qp->rx_dma_chan = NULL;
282a2fee
JM
2145
2146 /* Try to be nice and wait for any queued DMA engine
2147 * transactions to process before smashing it with a rock
2148 */
2149 dma_sync_wait(chan, qp->last_cookie);
2150 dmaengine_terminate_all(chan);
1199aa61 2151 dma_release_channel(chan);
282a2fee 2152 }
fce8a7bb 2153
e26a5843
AH
2154 qp_bit = BIT_ULL(qp->qp_num);
2155
2156 ntb_db_set_mask(qp->ndev, qp_bit);
e9021331 2157 tasklet_kill(&qp->rxc_db_work);
fce8a7bb 2158
282a2fee
JM
2159 cancel_delayed_work_sync(&qp->link_work);
2160
e26a5843
AH
2161 qp->cb_data = NULL;
2162 qp->rx_handler = NULL;
2163 qp->tx_handler = NULL;
2164 qp->event_handler = NULL;
2165
da2e5ae5 2166 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
fce8a7bb
JM
2167 kfree(entry);
2168
da2e5ae5
AH
2169 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q))) {
2170 dev_warn(&pdev->dev, "Freeing item from non-empty rx_pend_q\n");
2171 kfree(entry);
2172 }
2173
2174 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_post_q))) {
2175 dev_warn(&pdev->dev, "Freeing item from non-empty rx_post_q\n");
fce8a7bb
JM
2176 kfree(entry);
2177 }
2178
f766755c 2179 while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
fce8a7bb
JM
2180 kfree(entry);
2181
30a4bb1e 2182 qp->transport->qp_bitmap_free |= qp_bit;
fce8a7bb
JM
2183
2184 dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);
2185}
2186EXPORT_SYMBOL_GPL(ntb_transport_free_queue);
2187
2188/**
2189 * ntb_transport_rx_remove - Dequeues enqueued rx packet
2190 * @qp: NTB queue to be freed
2191 * @len: pointer to variable to write enqueued buffers length
2192 *
2193 * Dequeues unused buffers from receive queue. Should only be used during
2194 * shutdown of qp.
2195 *
2196 * RETURNS: NULL error value on error, or void* for success.
2197 */
2198void *ntb_transport_rx_remove(struct ntb_transport_qp *qp, unsigned int *len)
2199{
2200 struct ntb_queue_entry *entry;
2201 void *buf;
2202
e26a5843 2203 if (!qp || qp->client_ready)
fce8a7bb
JM
2204 return NULL;
2205
da2e5ae5 2206 entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q);
fce8a7bb
JM
2207 if (!entry)
2208 return NULL;
2209
2210 buf = entry->cb_data;
2211 *len = entry->len;
2212
da2e5ae5 2213 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_free_q);
fce8a7bb
JM
2214
2215 return buf;
2216}
2217EXPORT_SYMBOL_GPL(ntb_transport_rx_remove);
2218
2219/**
2220 * ntb_transport_rx_enqueue - Enqueue a new NTB queue entry
2221 * @qp: NTB transport layer queue the entry is to be enqueued on
2222 * @cb: per buffer pointer for callback function to use
2223 * @data: pointer to data buffer that incoming packets will be copied into
2224 * @len: length of the data buffer
2225 *
2226 * Enqueue a new receive buffer onto the transport queue into which a NTB
2227 * payload can be received into.
2228 *
2229 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
2230 */
2231int ntb_transport_rx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
2232 unsigned int len)
2233{
2234 struct ntb_queue_entry *entry;
2235
2236 if (!qp)
2237 return -EINVAL;
2238
da2e5ae5 2239 entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q);
fce8a7bb
JM
2240 if (!entry)
2241 return -ENOMEM;
2242
2243 entry->cb_data = cb;
2244 entry->buf = data;
2245 entry->len = len;
da2e5ae5 2246 entry->flags = 0;
72203572
DJ
2247 entry->retries = 0;
2248 entry->errors = 0;
2249 entry->rx_index = 0;
da2e5ae5
AH
2250
2251 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_pend_q);
fce8a7bb 2252
e9021331
DJ
2253 if (qp->active)
2254 tasklet_schedule(&qp->rxc_db_work);
fce8a7bb
JM
2255
2256 return 0;
2257}
2258EXPORT_SYMBOL_GPL(ntb_transport_rx_enqueue);
2259
2260/**
2261 * ntb_transport_tx_enqueue - Enqueue a new NTB queue entry
2262 * @qp: NTB transport layer queue the entry is to be enqueued on
2263 * @cb: per buffer pointer for callback function to use
2264 * @data: pointer to data buffer that will be sent
2265 * @len: length of the data buffer
2266 *
2267 * Enqueue a new transmit buffer onto the transport queue from which a NTB
f9a2cf89 2268 * payload will be transmitted. This assumes that a lock is being held to
fce8a7bb
JM
2269 * serialize access to the qp.
2270 *
2271 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
2272 */
2273int ntb_transport_tx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
2274 unsigned int len)
2275{
2276 struct ntb_queue_entry *entry;
2277 int rc;
2278
e26a5843 2279 if (!qp || !qp->link_is_up || !len)
fce8a7bb
JM
2280 return -EINVAL;
2281
2282 entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
282a2fee
JM
2283 if (!entry) {
2284 qp->tx_err_no_buf++;
e74bfeed 2285 return -EBUSY;
282a2fee 2286 }
fce8a7bb
JM
2287
2288 entry->cb_data = cb;
2289 entry->buf = data;
2290 entry->len = len;
2291 entry->flags = 0;
9cabc269
DJ
2292 entry->errors = 0;
2293 entry->retries = 0;
2294 entry->tx_index = 0;
fce8a7bb
JM
2295
2296 rc = ntb_process_tx(qp, entry);
2297 if (rc)
2298 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
2299 &qp->tx_free_q);
2300
2301 return rc;
2302}
2303EXPORT_SYMBOL_GPL(ntb_transport_tx_enqueue);
2304
2305/**
2306 * ntb_transport_link_up - Notify NTB transport of client readiness to use queue
2307 * @qp: NTB transport layer queue to be enabled
2308 *
2309 * Notify NTB transport layer of client readiness to use queue
2310 */
2311void ntb_transport_link_up(struct ntb_transport_qp *qp)
2312{
2313 if (!qp)
2314 return;
2315
e26a5843 2316 qp->client_ready = true;
fce8a7bb 2317
e26a5843 2318 if (qp->transport->link_is_up)
fce8a7bb
JM
2319 schedule_delayed_work(&qp->link_work, 0);
2320}
2321EXPORT_SYMBOL_GPL(ntb_transport_link_up);
2322
2323/**
2324 * ntb_transport_link_down - Notify NTB transport to no longer enqueue data
2325 * @qp: NTB transport layer queue to be disabled
2326 *
2327 * Notify NTB transport layer of client's desire to no longer receive data on
2328 * transport queue specified. It is the client's responsibility to ensure all
f9a2cf89 2329 * entries on queue are purged or otherwise handled appropriately.
fce8a7bb
JM
2330 */
2331void ntb_transport_link_down(struct ntb_transport_qp *qp)
2332{
e26a5843 2333 int val;
fce8a7bb
JM
2334
2335 if (!qp)
2336 return;
2337
e26a5843 2338 qp->client_ready = false;
fce8a7bb 2339
e26a5843 2340 val = ntb_spad_read(qp->ndev, QP_LINKS);
fce8a7bb 2341
d67288a3 2342 ntb_peer_spad_write(qp->ndev, PIDX, QP_LINKS, val & ~BIT(qp->qp_num));
fce8a7bb 2343
e26a5843 2344 if (qp->link_is_up)
fce8a7bb
JM
2345 ntb_send_link_down(qp);
2346 else
2347 cancel_delayed_work_sync(&qp->link_work);
2348}
2349EXPORT_SYMBOL_GPL(ntb_transport_link_down);
2350
2351/**
2352 * ntb_transport_link_query - Query transport link state
2353 * @qp: NTB transport layer queue to be queried
2354 *
2355 * Query connectivity to the remote system of the NTB transport queue
2356 *
2357 * RETURNS: true for link up or false for link down
2358 */
2359bool ntb_transport_link_query(struct ntb_transport_qp *qp)
2360{
186f27ff
JM
2361 if (!qp)
2362 return false;
2363
e26a5843 2364 return qp->link_is_up;
fce8a7bb
JM
2365}
2366EXPORT_SYMBOL_GPL(ntb_transport_link_query);
2367
2368/**
2369 * ntb_transport_qp_num - Query the qp number
2370 * @qp: NTB transport layer queue to be queried
2371 *
2372 * Query qp number of the NTB transport queue
2373 *
2374 * RETURNS: a zero based number specifying the qp number
2375 */
2376unsigned char ntb_transport_qp_num(struct ntb_transport_qp *qp)
2377{
186f27ff
JM
2378 if (!qp)
2379 return 0;
2380
fce8a7bb
JM
2381 return qp->qp_num;
2382}
2383EXPORT_SYMBOL_GPL(ntb_transport_qp_num);
2384
2385/**
2386 * ntb_transport_max_size - Query the max payload size of a qp
2387 * @qp: NTB transport layer queue to be queried
2388 *
2389 * Query the maximum payload size permissible on the given qp
2390 *
2391 * RETURNS: the max payload size of a qp
2392 */
ef114ed5 2393unsigned int ntb_transport_max_size(struct ntb_transport_qp *qp)
fce8a7bb 2394{
04afde45 2395 unsigned int max_size;
569410ca 2396 unsigned int copy_align;
04afde45 2397 struct dma_chan *rx_chan, *tx_chan;
282a2fee 2398
186f27ff
JM
2399 if (!qp)
2400 return 0;
2401
04afde45
DJ
2402 rx_chan = qp->rx_dma_chan;
2403 tx_chan = qp->tx_dma_chan;
282a2fee 2404
04afde45
DJ
2405 copy_align = max(rx_chan ? rx_chan->device->copy_align : 0,
2406 tx_chan ? tx_chan->device->copy_align : 0);
569410ca 2407
282a2fee 2408 /* If DMA engine usage is possible, try to find the max size for that */
04afde45
DJ
2409 max_size = qp->tx_max_frame - sizeof(struct ntb_payload_header);
2410 max_size = round_down(max_size, 1 << copy_align);
282a2fee 2411
04afde45 2412 return max_size;
fce8a7bb
JM
2413}
2414EXPORT_SYMBOL_GPL(ntb_transport_max_size);
e26a5843 2415
e74bfeed
DJ
2416unsigned int ntb_transport_tx_free_entry(struct ntb_transport_qp *qp)
2417{
2418 unsigned int head = qp->tx_index;
2419 unsigned int tail = qp->remote_rx_info->entry;
2420
2421 return tail > head ? tail - head : qp->tx_max_entry + tail - head;
2422}
2423EXPORT_SYMBOL_GPL(ntb_transport_tx_free_entry);
2424
e26a5843
AH
2425static void ntb_transport_doorbell_callback(void *data, int vector)
2426{
2427 struct ntb_transport_ctx *nt = data;
2428 struct ntb_transport_qp *qp;
2429 u64 db_bits;
2430 unsigned int qp_num;
2431
2b0569b3
LG
2432 if (ntb_db_read(nt->ndev) & nt->msi_db_mask) {
2433 ntb_transport_msi_peer_desc_changed(nt);
2434 ntb_db_clear(nt->ndev, nt->msi_db_mask);
2435 }
2436
e26a5843
AH
2437 db_bits = (nt->qp_bitmap & ~nt->qp_bitmap_free &
2438 ntb_db_vector_mask(nt->ndev, vector));
2439
2440 while (db_bits) {
2441 qp_num = __ffs(db_bits);
2442 qp = &nt->qp_vec[qp_num];
2443
e9021331
DJ
2444 if (qp->active)
2445 tasklet_schedule(&qp->rxc_db_work);
e26a5843
AH
2446
2447 db_bits &= ~BIT_ULL(qp_num);
2448 }
2449}
2450
2451static const struct ntb_ctx_ops ntb_transport_ops = {
2452 .link_event = ntb_transport_event_callback,
2453 .db_event = ntb_transport_doorbell_callback,
2454};
2455
2456static struct ntb_client ntb_transport_client = {
2457 .ops = {
2458 .probe = ntb_transport_probe,
2459 .remove = ntb_transport_free,
2460 },
2461};
2462
2463static int __init ntb_transport_init(void)
2464{
2465 int rc;
2466
7eb38781
DJ
2467 pr_info("%s, version %s\n", NTB_TRANSPORT_DESC, NTB_TRANSPORT_VER);
2468
e26a5843
AH
2469 if (debugfs_initialized())
2470 nt_debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL);
2471
2472 rc = bus_register(&ntb_transport_bus);
2473 if (rc)
2474 goto err_bus;
2475
2476 rc = ntb_register_client(&ntb_transport_client);
2477 if (rc)
2478 goto err_client;
2479
2480 return 0;
2481
2482err_client:
2483 bus_unregister(&ntb_transport_bus);
2484err_bus:
2485 debugfs_remove_recursive(nt_debugfs_dir);
2486 return rc;
2487}
2488module_init(ntb_transport_init);
2489
2490static void __exit ntb_transport_exit(void)
2491{
e26a5843
AH
2492 ntb_unregister_client(&ntb_transport_client);
2493 bus_unregister(&ntb_transport_bus);
dd62245e 2494 debugfs_remove_recursive(nt_debugfs_dir);
e26a5843
AH
2495}
2496module_exit(ntb_transport_exit);