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8fba2453 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
165063f1 MG |
2 | /* |
3 | * TI TRF7970a RFID/NFC Transceiver Driver | |
4 | * | |
5 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com | |
6 | * | |
7 | * Author: Erick Macias <emacias@ti.com> | |
8 | * Author: Felipe Balbi <balbi@ti.com> | |
9 | * Author: Mark A. Greer <mgreer@animalcreek.com> | |
165063f1 MG |
10 | */ |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/device.h> | |
14 | #include <linux/netdevice.h> | |
15 | #include <linux/interrupt.h> | |
e6403b7c | 16 | #include <linux/pm_runtime.h> |
165063f1 MG |
17 | #include <linux/nfc.h> |
18 | #include <linux/skbuff.h> | |
19 | #include <linux/delay.h> | |
d34e48d6 | 20 | #include <linux/gpio/consumer.h> |
165063f1 | 21 | #include <linux/of.h> |
165063f1 MG |
22 | #include <linux/spi/spi.h> |
23 | #include <linux/regulator/consumer.h> | |
24 | ||
25 | #include <net/nfc/nfc.h> | |
26 | #include <net/nfc/digital.h> | |
27 | ||
28 | /* There are 3 ways the host can communicate with the trf7970a: | |
29 | * parallel mode, SPI with Slave Select (SS) mode, and SPI without | |
30 | * SS mode. The driver only supports the two SPI modes. | |
31 | * | |
32 | * The trf7970a is very timing sensitive and the VIN, EN2, and EN | |
33 | * pins must asserted in that order and with specific delays in between. | |
34 | * The delays used in the driver were provided by TI and have been | |
95064bd9 MG |
35 | * confirmed to work with this driver. There is a bug with the current |
36 | * version of the trf7970a that requires that EN2 remain low no matter | |
37 | * what. If it goes high, it will generate an RF field even when in | |
38 | * passive target mode. TI has indicated that the chip will work okay | |
39 | * when EN2 is left low. The 'en2-rf-quirk' device tree property | |
40 | * indicates that trf7970a currently being used has the erratum and | |
41 | * that EN2 must be kept low. | |
165063f1 MG |
42 | * |
43 | * Timeouts are implemented using the delayed workqueue kernel facility. | |
44 | * Timeouts are required so things don't hang when there is no response | |
45 | * from the trf7970a (or tag). Using this mechanism creates a race with | |
46 | * interrupts, however. That is, an interrupt and a timeout could occur | |
47 | * closely enough together that one is blocked by the mutex while the other | |
48 | * executes. When the timeout handler executes first and blocks the | |
49 | * interrupt handler, it will eventually set the state to IDLE so the | |
50 | * interrupt handler will check the state and exit with no harm done. | |
51 | * When the interrupt handler executes first and blocks the timeout handler, | |
52 | * the cancel_delayed_work() call will know that it didn't cancel the | |
53 | * work item (i.e., timeout) and will return zero. That return code is | |
54 | * used by the timer handler to indicate that it should ignore the timeout | |
55 | * once its unblocked. | |
56 | * | |
57 | * Aborting an active command isn't as simple as it seems because the only | |
58 | * way to abort a command that's already been sent to the tag is so turn | |
59 | * off power to the tag. If we do that, though, we'd have to go through | |
60 | * the entire anticollision procedure again but the digital layer doesn't | |
13b4272a | 61 | * support that. So, if an abort is received before trf7970a_send_cmd() |
165063f1 MG |
62 | * has sent the command to the tag, it simply returns -ECANCELED. If the |
63 | * command has already been sent to the tag, then the driver continues | |
64 | * normally and recieves the response data (or error) but just before | |
65 | * sending the data upstream, it frees the rx_skb and sends -ECANCELED | |
66 | * upstream instead. If the command failed, that error will be sent | |
67 | * upstream. | |
68 | * | |
69 | * When recieving data from a tag and the interrupt status register has | |
70 | * only the SRX bit set, it means that all of the data has been received | |
71 | * (once what's in the fifo has been read). However, depending on timing | |
72 | * an interrupt status with only the SRX bit set may not be recived. In | |
5fa3af35 MG |
73 | * those cases, the timeout mechanism is used to wait 20 ms in case more |
74 | * data arrives. After 20 ms, it is assumed that all of the data has been | |
165063f1 MG |
75 | * received and the accumulated rx data is sent upstream. The |
76 | * 'TRF7970A_ST_WAIT_FOR_RX_DATA_CONT' state is used for this purpose | |
77 | * (i.e., it indicates that some data has been received but we're not sure | |
78 | * if there is more coming so a timeout in this state means all data has | |
5fa3af35 MG |
79 | * been received and there isn't an error). The delay is 20 ms since delays |
80 | * of ~16 ms have been observed during testing. | |
165063f1 | 81 | * |
38b4eb1f MG |
82 | * When transmitting a frame larger than the FIFO size (127 bytes), the |
83 | * driver will wait 20 ms for the FIFO to drain past the low-watermark | |
84 | * and generate an interrupt. The low-watermark set to 32 bytes so the | |
85 | * interrupt should fire after 127 - 32 = 95 bytes have been sent. At | |
86 | * the lowest possible bit rate (6.62 kbps for 15693), it will take up | |
87 | * to ~14.35 ms so 20 ms is used for the timeout. | |
88 | * | |
165063f1 MG |
89 | * Type 2 write and sector select commands respond with a 4-bit ACK or NACK. |
90 | * Having only 4 bits in the FIFO won't normally generate an interrupt so | |
91 | * driver enables the '4_bit_RX' bit of the Special Functions register 1 | |
92 | * to cause an interrupt in that case. Leaving that bit for a read command | |
93 | * messes up the data returned so it is only enabled when the framing is | |
94 | * 'NFC_DIGITAL_FRAMING_NFCA_T2T' and the command is not a read command. | |
95 | * Unfortunately, that means that the driver has to peek into tx frames | |
96 | * when the framing is 'NFC_DIGITAL_FRAMING_NFCA_T2T'. This is done by | |
97 | * the trf7970a_per_cmd_config() routine. | |
9d9304b3 MG |
98 | * |
99 | * ISO/IEC 15693 frames specify whether to use single or double sub-carrier | |
100 | * frequencies and whether to use low or high data rates in the flags byte | |
101 | * of the frame. This means that the driver has to peek at all 15693 frames | |
102 | * to determine what speed to set the communication to. In addition, write | |
103 | * and lock commands use the OPTION flag to indicate that an EOF must be | |
104 | * sent to the tag before it will send its response. So the driver has to | |
105 | * examine all frames for that reason too. | |
106 | * | |
107 | * It is unclear how long to wait before sending the EOF. According to the | |
108 | * Note under Table 1-1 in section 1.6 of | |
109 | * http://www.ti.com/lit/ug/scbu011/scbu011.pdf, that wait should be at least | |
110 | * 10 ms for TI Tag-it HF-I tags; however testing has shown that is not long | |
38b4eb1f MG |
111 | * enough so 20 ms is used. So the timer is set to 40 ms - 20 ms to drain |
112 | * up to 127 bytes in the FIFO at the lowest bit rate plus another 20 ms to | |
113 | * ensure the wait is long enough before sending the EOF. This seems to work | |
9d9304b3 | 114 | * reliably. |
165063f1 MG |
115 | */ |
116 | ||
80062891 | 117 | #define TRF7970A_SUPPORTED_PROTOCOLS \ |
9d9304b3 | 118 | (NFC_PROTO_MIFARE_MASK | NFC_PROTO_ISO14443_MASK | \ |
6857bb96 | 119 | NFC_PROTO_ISO14443_B_MASK | NFC_PROTO_FELICA_MASK | \ |
13b4272a | 120 | NFC_PROTO_ISO15693_MASK | NFC_PROTO_NFC_DEP_MASK) |
165063f1 | 121 | |
e2f0f671 | 122 | #define TRF7970A_AUTOSUSPEND_DELAY 30000 /* 30 seconds */ |
837eb4d2 GL |
123 | #define TRF7970A_13MHZ_CLOCK_FREQUENCY 13560000 |
124 | #define TRF7970A_27MHZ_CLOCK_FREQUENCY 27120000 | |
125 | ||
165063f1 MG |
126 | #define TRF7970A_RX_SKB_ALLOC_SIZE 256 |
127 | ||
1568bfef | 128 | #define TRF7970A_FIFO_SIZE 127 |
165063f1 MG |
129 | |
130 | /* TX length is 3 nibbles long ==> 4KB - 1 bytes max */ | |
131 | #define TRF7970A_TX_MAX (4096 - 1) | |
132 | ||
1961843c | 133 | #define TRF7970A_WAIT_FOR_TX_IRQ 20 |
5fa3af35 | 134 | #define TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT 20 |
38b4eb1f MG |
135 | #define TRF7970A_WAIT_FOR_FIFO_DRAIN_TIMEOUT 20 |
136 | #define TRF7970A_WAIT_TO_ISSUE_ISO15693_EOF 40 | |
165063f1 | 137 | |
4e64eff8 MG |
138 | /* Guard times for various RF technologies (in us) */ |
139 | #define TRF7970A_GUARD_TIME_NFCA 5000 | |
140 | #define TRF7970A_GUARD_TIME_NFCB 5000 | |
141 | #define TRF7970A_GUARD_TIME_NFCF 20000 | |
142 | #define TRF7970A_GUARD_TIME_15693 1000 | |
143 | ||
165063f1 MG |
144 | /* Quirks */ |
145 | /* Erratum: When reading IRQ Status register on trf7970a, we must issue a | |
146 | * read continuous command for IRQ Status and Collision Position registers. | |
147 | */ | |
772079eb | 148 | #define TRF7970A_QUIRK_IRQ_STATUS_READ BIT(0) |
95064bd9 | 149 | #define TRF7970A_QUIRK_EN2_MUST_STAY_LOW BIT(1) |
165063f1 MG |
150 | |
151 | /* Direct commands */ | |
152 | #define TRF7970A_CMD_IDLE 0x00 | |
153 | #define TRF7970A_CMD_SOFT_INIT 0x03 | |
154 | #define TRF7970A_CMD_RF_COLLISION 0x04 | |
155 | #define TRF7970A_CMD_RF_COLLISION_RESPONSE_N 0x05 | |
156 | #define TRF7970A_CMD_RF_COLLISION_RESPONSE_0 0x06 | |
157 | #define TRF7970A_CMD_FIFO_RESET 0x0f | |
158 | #define TRF7970A_CMD_TRANSMIT_NO_CRC 0x10 | |
159 | #define TRF7970A_CMD_TRANSMIT 0x11 | |
160 | #define TRF7970A_CMD_DELAY_TRANSMIT_NO_CRC 0x12 | |
161 | #define TRF7970A_CMD_DELAY_TRANSMIT 0x13 | |
162 | #define TRF7970A_CMD_EOF 0x14 | |
163 | #define TRF7970A_CMD_CLOSE_SLOT 0x15 | |
164 | #define TRF7970A_CMD_BLOCK_RX 0x16 | |
165 | #define TRF7970A_CMD_ENABLE_RX 0x17 | |
851ee3cb MG |
166 | #define TRF7970A_CMD_TEST_INT_RF 0x18 |
167 | #define TRF7970A_CMD_TEST_EXT_RF 0x19 | |
165063f1 MG |
168 | #define TRF7970A_CMD_RX_GAIN_ADJUST 0x1a |
169 | ||
170 | /* Bits determining whether its a direct command or register R/W, | |
171 | * whether to use a continuous SPI transaction or not, and the actual | |
172 | * direct cmd opcode or regster address. | |
173 | */ | |
174 | #define TRF7970A_CMD_BIT_CTRL BIT(7) | |
175 | #define TRF7970A_CMD_BIT_RW BIT(6) | |
176 | #define TRF7970A_CMD_BIT_CONTINUOUS BIT(5) | |
177 | #define TRF7970A_CMD_BIT_OPCODE(opcode) ((opcode) & 0x1f) | |
178 | ||
179 | /* Registers addresses */ | |
180 | #define TRF7970A_CHIP_STATUS_CTRL 0x00 | |
181 | #define TRF7970A_ISO_CTRL 0x01 | |
182 | #define TRF7970A_ISO14443B_TX_OPTIONS 0x02 | |
183 | #define TRF7970A_ISO14443A_HIGH_BITRATE_OPTIONS 0x03 | |
184 | #define TRF7970A_TX_TIMER_SETTING_H_BYTE 0x04 | |
185 | #define TRF7970A_TX_TIMER_SETTING_L_BYTE 0x05 | |
186 | #define TRF7970A_TX_PULSE_LENGTH_CTRL 0x06 | |
187 | #define TRF7970A_RX_NO_RESPONSE_WAIT 0x07 | |
188 | #define TRF7970A_RX_WAIT_TIME 0x08 | |
189 | #define TRF7970A_MODULATOR_SYS_CLK_CTRL 0x09 | |
190 | #define TRF7970A_RX_SPECIAL_SETTINGS 0x0a | |
191 | #define TRF7970A_REG_IO_CTRL 0x0b | |
192 | #define TRF7970A_IRQ_STATUS 0x0c | |
193 | #define TRF7970A_COLLISION_IRQ_MASK 0x0d | |
194 | #define TRF7970A_COLLISION_POSITION 0x0e | |
195 | #define TRF7970A_RSSI_OSC_STATUS 0x0f | |
196 | #define TRF7970A_SPECIAL_FCN_REG1 0x10 | |
197 | #define TRF7970A_SPECIAL_FCN_REG2 0x11 | |
198 | #define TRF7970A_RAM1 0x12 | |
199 | #define TRF7970A_RAM2 0x13 | |
200 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS 0x14 | |
201 | #define TRF7970A_NFC_LOW_FIELD_LEVEL 0x16 | |
202 | #define TRF7970A_NFCID1 0x17 | |
203 | #define TRF7970A_NFC_TARGET_LEVEL 0x18 | |
204 | #define TRF79070A_NFC_TARGET_PROTOCOL 0x19 | |
205 | #define TRF7970A_TEST_REGISTER1 0x1a | |
206 | #define TRF7970A_TEST_REGISTER2 0x1b | |
207 | #define TRF7970A_FIFO_STATUS 0x1c | |
208 | #define TRF7970A_TX_LENGTH_BYTE1 0x1d | |
209 | #define TRF7970A_TX_LENGTH_BYTE2 0x1e | |
210 | #define TRF7970A_FIFO_IO_REGISTER 0x1f | |
211 | ||
212 | /* Chip Status Control Register Bits */ | |
213 | #define TRF7970A_CHIP_STATUS_VRS5_3 BIT(0) | |
214 | #define TRF7970A_CHIP_STATUS_REC_ON BIT(1) | |
215 | #define TRF7970A_CHIP_STATUS_AGC_ON BIT(2) | |
216 | #define TRF7970A_CHIP_STATUS_PM_ON BIT(3) | |
217 | #define TRF7970A_CHIP_STATUS_RF_PWR BIT(4) | |
218 | #define TRF7970A_CHIP_STATUS_RF_ON BIT(5) | |
219 | #define TRF7970A_CHIP_STATUS_DIRECT BIT(6) | |
220 | #define TRF7970A_CHIP_STATUS_STBY BIT(7) | |
221 | ||
222 | /* ISO Control Register Bits */ | |
223 | #define TRF7970A_ISO_CTRL_15693_SGL_1OF4_662 0x00 | |
224 | #define TRF7970A_ISO_CTRL_15693_SGL_1OF256_662 0x01 | |
225 | #define TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648 0x02 | |
226 | #define TRF7970A_ISO_CTRL_15693_SGL_1OF256_2648 0x03 | |
227 | #define TRF7970A_ISO_CTRL_15693_DBL_1OF4_667a 0x04 | |
228 | #define TRF7970A_ISO_CTRL_15693_DBL_1OF256_667 0x05 | |
229 | #define TRF7970A_ISO_CTRL_15693_DBL_1OF4_2669 0x06 | |
230 | #define TRF7970A_ISO_CTRL_15693_DBL_1OF256_2669 0x07 | |
231 | #define TRF7970A_ISO_CTRL_14443A_106 0x08 | |
232 | #define TRF7970A_ISO_CTRL_14443A_212 0x09 | |
233 | #define TRF7970A_ISO_CTRL_14443A_424 0x0a | |
234 | #define TRF7970A_ISO_CTRL_14443A_848 0x0b | |
235 | #define TRF7970A_ISO_CTRL_14443B_106 0x0c | |
236 | #define TRF7970A_ISO_CTRL_14443B_212 0x0d | |
237 | #define TRF7970A_ISO_CTRL_14443B_424 0x0e | |
238 | #define TRF7970A_ISO_CTRL_14443B_848 0x0f | |
239 | #define TRF7970A_ISO_CTRL_FELICA_212 0x1a | |
240 | #define TRF7970A_ISO_CTRL_FELICA_424 0x1b | |
13b4272a MG |
241 | #define TRF7970A_ISO_CTRL_NFC_NFCA_106 0x01 |
242 | #define TRF7970A_ISO_CTRL_NFC_NFCF_212 0x02 | |
243 | #define TRF7970A_ISO_CTRL_NFC_NFCF_424 0x03 | |
244 | #define TRF7970A_ISO_CTRL_NFC_CE_14443A 0x00 | |
245 | #define TRF7970A_ISO_CTRL_NFC_CE_14443B 0x01 | |
246 | #define TRF7970A_ISO_CTRL_NFC_CE BIT(2) | |
247 | #define TRF7970A_ISO_CTRL_NFC_ACTIVE BIT(3) | |
248 | #define TRF7970A_ISO_CTRL_NFC_INITIATOR BIT(4) | |
249 | #define TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE BIT(5) | |
165063f1 MG |
250 | #define TRF7970A_ISO_CTRL_RFID BIT(5) |
251 | #define TRF7970A_ISO_CTRL_DIR_MODE BIT(6) | |
252 | #define TRF7970A_ISO_CTRL_RX_CRC_N BIT(7) /* true == No CRC */ | |
253 | ||
254 | #define TRF7970A_ISO_CTRL_RFID_SPEED_MASK 0x1f | |
255 | ||
256 | /* Modulator and SYS_CLK Control Register Bits */ | |
257 | #define TRF7970A_MODULATOR_DEPTH(n) ((n) & 0x7) | |
258 | #define TRF7970A_MODULATOR_DEPTH_ASK10 (TRF7970A_MODULATOR_DEPTH(0)) | |
259 | #define TRF7970A_MODULATOR_DEPTH_OOK (TRF7970A_MODULATOR_DEPTH(1)) | |
260 | #define TRF7970A_MODULATOR_DEPTH_ASK7 (TRF7970A_MODULATOR_DEPTH(2)) | |
261 | #define TRF7970A_MODULATOR_DEPTH_ASK8_5 (TRF7970A_MODULATOR_DEPTH(3)) | |
262 | #define TRF7970A_MODULATOR_DEPTH_ASK13 (TRF7970A_MODULATOR_DEPTH(4)) | |
263 | #define TRF7970A_MODULATOR_DEPTH_ASK16 (TRF7970A_MODULATOR_DEPTH(5)) | |
264 | #define TRF7970A_MODULATOR_DEPTH_ASK22 (TRF7970A_MODULATOR_DEPTH(6)) | |
265 | #define TRF7970A_MODULATOR_DEPTH_ASK30 (TRF7970A_MODULATOR_DEPTH(7)) | |
266 | #define TRF7970A_MODULATOR_EN_ANA BIT(3) | |
267 | #define TRF7970A_MODULATOR_CLK(n) (((n) & 0x3) << 4) | |
268 | #define TRF7970A_MODULATOR_CLK_DISABLED (TRF7970A_MODULATOR_CLK(0)) | |
269 | #define TRF7970A_MODULATOR_CLK_3_6 (TRF7970A_MODULATOR_CLK(1)) | |
270 | #define TRF7970A_MODULATOR_CLK_6_13 (TRF7970A_MODULATOR_CLK(2)) | |
271 | #define TRF7970A_MODULATOR_CLK_13_27 (TRF7970A_MODULATOR_CLK(3)) | |
272 | #define TRF7970A_MODULATOR_EN_OOK BIT(6) | |
273 | #define TRF7970A_MODULATOR_27MHZ BIT(7) | |
274 | ||
13b4272a MG |
275 | #define TRF7970A_RX_SPECIAL_SETTINGS_NO_LIM BIT(0) |
276 | #define TRF7970A_RX_SPECIAL_SETTINGS_AGCR BIT(1) | |
277 | #define TRF7970A_RX_SPECIAL_SETTINGS_GD_0DB (0x0 << 2) | |
278 | #define TRF7970A_RX_SPECIAL_SETTINGS_GD_5DB (0x1 << 2) | |
279 | #define TRF7970A_RX_SPECIAL_SETTINGS_GD_10DB (0x2 << 2) | |
280 | #define TRF7970A_RX_SPECIAL_SETTINGS_GD_15DB (0x3 << 2) | |
281 | #define TRF7970A_RX_SPECIAL_SETTINGS_HBT BIT(4) | |
282 | #define TRF7970A_RX_SPECIAL_SETTINGS_M848 BIT(5) | |
283 | #define TRF7970A_RX_SPECIAL_SETTINGS_C424 BIT(6) | |
284 | #define TRF7970A_RX_SPECIAL_SETTINGS_C212 BIT(7) | |
285 | ||
286 | #define TRF7970A_REG_IO_CTRL_VRS(v) ((v) & 0x07) | |
287 | #define TRF7970A_REG_IO_CTRL_IO_LOW BIT(5) | |
288 | #define TRF7970A_REG_IO_CTRL_EN_EXT_PA BIT(6) | |
289 | #define TRF7970A_REG_IO_CTRL_AUTO_REG BIT(7) | |
290 | ||
165063f1 | 291 | /* IRQ Status Register Bits */ |
e2f0f671 | 292 | #define TRF7970A_IRQ_STATUS_NORESP BIT(0) /* ISO15693 only */ |
13b4272a | 293 | #define TRF7970A_IRQ_STATUS_NFC_COL_ERROR BIT(0) |
165063f1 MG |
294 | #define TRF7970A_IRQ_STATUS_COL BIT(1) |
295 | #define TRF7970A_IRQ_STATUS_FRAMING_EOF_ERROR BIT(2) | |
13b4272a | 296 | #define TRF7970A_IRQ_STATUS_NFC_RF BIT(2) |
165063f1 | 297 | #define TRF7970A_IRQ_STATUS_PARITY_ERROR BIT(3) |
13b4272a | 298 | #define TRF7970A_IRQ_STATUS_NFC_SDD BIT(3) |
165063f1 | 299 | #define TRF7970A_IRQ_STATUS_CRC_ERROR BIT(4) |
13b4272a | 300 | #define TRF7970A_IRQ_STATUS_NFC_PROTO_ERROR BIT(4) |
165063f1 MG |
301 | #define TRF7970A_IRQ_STATUS_FIFO BIT(5) |
302 | #define TRF7970A_IRQ_STATUS_SRX BIT(6) | |
303 | #define TRF7970A_IRQ_STATUS_TX BIT(7) | |
304 | ||
305 | #define TRF7970A_IRQ_STATUS_ERROR \ | |
306 | (TRF7970A_IRQ_STATUS_COL | \ | |
307 | TRF7970A_IRQ_STATUS_FRAMING_EOF_ERROR | \ | |
308 | TRF7970A_IRQ_STATUS_PARITY_ERROR | \ | |
309 | TRF7970A_IRQ_STATUS_CRC_ERROR) | |
310 | ||
851ee3cb MG |
311 | #define TRF7970A_RSSI_OSC_STATUS_RSSI_MASK (BIT(2) | BIT(1) | BIT(0)) |
312 | #define TRF7970A_RSSI_OSC_STATUS_RSSI_X_MASK (BIT(5) | BIT(4) | BIT(3)) | |
313 | #define TRF7970A_RSSI_OSC_STATUS_RSSI_OSC_OK BIT(6) | |
314 | ||
165063f1 MG |
315 | #define TRF7970A_SPECIAL_FCN_REG1_COL_7_6 BIT(0) |
316 | #define TRF7970A_SPECIAL_FCN_REG1_14_ANTICOLL BIT(1) | |
317 | #define TRF7970A_SPECIAL_FCN_REG1_4_BIT_RX BIT(2) | |
318 | #define TRF7970A_SPECIAL_FCN_REG1_SP_DIR_MODE BIT(3) | |
319 | #define TRF7970A_SPECIAL_FCN_REG1_NEXT_SLOT_37US BIT(4) | |
320 | #define TRF7970A_SPECIAL_FCN_REG1_PAR43 BIT(5) | |
321 | ||
322 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_124 (0x0 << 2) | |
323 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_120 (0x1 << 2) | |
324 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_112 (0x2 << 2) | |
325 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_96 (0x3 << 2) | |
326 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_4 0x0 | |
327 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_8 0x1 | |
328 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_16 0x2 | |
329 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_32 0x3 | |
330 | ||
13b4272a MG |
331 | #define TRF7970A_NFC_LOW_FIELD_LEVEL_RFDET(v) ((v) & 0x07) |
332 | #define TRF7970A_NFC_LOW_FIELD_LEVEL_CLEX_DIS BIT(7) | |
333 | ||
334 | #define TRF7970A_NFC_TARGET_LEVEL_RFDET(v) ((v) & 0x07) | |
335 | #define TRF7970A_NFC_TARGET_LEVEL_HI_RF BIT(3) | |
ae291f79 | 336 | #define TRF7970A_NFC_TARGET_LEVEL_SDD_EN BIT(5) |
13b4272a MG |
337 | #define TRF7970A_NFC_TARGET_LEVEL_LD_S_4BYTES (0x0 << 6) |
338 | #define TRF7970A_NFC_TARGET_LEVEL_LD_S_7BYTES (0x1 << 6) | |
339 | #define TRF7970A_NFC_TARGET_LEVEL_LD_S_10BYTES (0x2 << 6) | |
340 | ||
cb174aba MG |
341 | #define TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_106 BIT(0) |
342 | #define TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_212 BIT(1) | |
343 | #define TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_424 (BIT(0) | BIT(1)) | |
344 | #define TRF79070A_NFC_TARGET_PROTOCOL_PAS_14443B BIT(2) | |
345 | #define TRF79070A_NFC_TARGET_PROTOCOL_PAS_106 BIT(3) | |
346 | #define TRF79070A_NFC_TARGET_PROTOCOL_FELICA BIT(4) | |
347 | #define TRF79070A_NFC_TARGET_PROTOCOL_RF_L BIT(6) | |
348 | #define TRF79070A_NFC_TARGET_PROTOCOL_RF_H BIT(7) | |
349 | ||
350 | #define TRF79070A_NFC_TARGET_PROTOCOL_106A \ | |
351 | (TRF79070A_NFC_TARGET_PROTOCOL_RF_H | \ | |
352 | TRF79070A_NFC_TARGET_PROTOCOL_RF_L | \ | |
353 | TRF79070A_NFC_TARGET_PROTOCOL_PAS_106 | \ | |
354 | TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_106) | |
355 | ||
356 | #define TRF79070A_NFC_TARGET_PROTOCOL_106B \ | |
357 | (TRF79070A_NFC_TARGET_PROTOCOL_RF_H | \ | |
358 | TRF79070A_NFC_TARGET_PROTOCOL_RF_L | \ | |
359 | TRF79070A_NFC_TARGET_PROTOCOL_PAS_14443B | \ | |
360 | TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_106) | |
361 | ||
362 | #define TRF79070A_NFC_TARGET_PROTOCOL_212F \ | |
363 | (TRF79070A_NFC_TARGET_PROTOCOL_RF_H | \ | |
364 | TRF79070A_NFC_TARGET_PROTOCOL_RF_L | \ | |
365 | TRF79070A_NFC_TARGET_PROTOCOL_FELICA | \ | |
366 | TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_212) | |
367 | ||
368 | #define TRF79070A_NFC_TARGET_PROTOCOL_424F \ | |
369 | (TRF79070A_NFC_TARGET_PROTOCOL_RF_H | \ | |
370 | TRF79070A_NFC_TARGET_PROTOCOL_RF_L | \ | |
371 | TRF79070A_NFC_TARGET_PROTOCOL_FELICA | \ | |
372 | TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_424) | |
373 | ||
165063f1 MG |
374 | #define TRF7970A_FIFO_STATUS_OVERFLOW BIT(7) |
375 | ||
376 | /* NFC (ISO/IEC 14443A) Type 2 Tag commands */ | |
377 | #define NFC_T2T_CMD_READ 0x30 | |
378 | ||
9d9304b3 MG |
379 | /* ISO 15693 commands codes */ |
380 | #define ISO15693_CMD_INVENTORY 0x01 | |
381 | #define ISO15693_CMD_READ_SINGLE_BLOCK 0x20 | |
382 | #define ISO15693_CMD_WRITE_SINGLE_BLOCK 0x21 | |
383 | #define ISO15693_CMD_LOCK_BLOCK 0x22 | |
384 | #define ISO15693_CMD_READ_MULTIPLE_BLOCK 0x23 | |
385 | #define ISO15693_CMD_WRITE_MULTIPLE_BLOCK 0x24 | |
386 | #define ISO15693_CMD_SELECT 0x25 | |
387 | #define ISO15693_CMD_RESET_TO_READY 0x26 | |
388 | #define ISO15693_CMD_WRITE_AFI 0x27 | |
389 | #define ISO15693_CMD_LOCK_AFI 0x28 | |
390 | #define ISO15693_CMD_WRITE_DSFID 0x29 | |
391 | #define ISO15693_CMD_LOCK_DSFID 0x2a | |
392 | #define ISO15693_CMD_GET_SYSTEM_INFO 0x2b | |
393 | #define ISO15693_CMD_GET_MULTIPLE_BLOCK_SECURITY_STATUS 0x2c | |
394 | ||
395 | /* ISO 15693 request and response flags */ | |
396 | #define ISO15693_REQ_FLAG_SUB_CARRIER BIT(0) | |
397 | #define ISO15693_REQ_FLAG_DATA_RATE BIT(1) | |
398 | #define ISO15693_REQ_FLAG_INVENTORY BIT(2) | |
399 | #define ISO15693_REQ_FLAG_PROTOCOL_EXT BIT(3) | |
400 | #define ISO15693_REQ_FLAG_SELECT BIT(4) | |
401 | #define ISO15693_REQ_FLAG_AFI BIT(4) | |
402 | #define ISO15693_REQ_FLAG_ADDRESS BIT(5) | |
403 | #define ISO15693_REQ_FLAG_NB_SLOTS BIT(5) | |
404 | #define ISO15693_REQ_FLAG_OPTION BIT(6) | |
405 | ||
406 | #define ISO15693_REQ_FLAG_SPEED_MASK \ | |
407 | (ISO15693_REQ_FLAG_SUB_CARRIER | ISO15693_REQ_FLAG_DATA_RATE) | |
408 | ||
165063f1 | 409 | enum trf7970a_state { |
ceccd6aa | 410 | TRF7970A_ST_PWR_OFF, |
b5e17d9b | 411 | TRF7970A_ST_RF_OFF, |
165063f1 MG |
412 | TRF7970A_ST_IDLE, |
413 | TRF7970A_ST_IDLE_RX_BLOCKED, | |
414 | TRF7970A_ST_WAIT_FOR_TX_FIFO, | |
415 | TRF7970A_ST_WAIT_FOR_RX_DATA, | |
416 | TRF7970A_ST_WAIT_FOR_RX_DATA_CONT, | |
9d9304b3 | 417 | TRF7970A_ST_WAIT_TO_ISSUE_EOF, |
13b4272a | 418 | TRF7970A_ST_LISTENING, |
cb174aba | 419 | TRF7970A_ST_LISTENING_MD, |
165063f1 MG |
420 | TRF7970A_ST_MAX |
421 | }; | |
422 | ||
423 | struct trf7970a { | |
424 | enum trf7970a_state state; | |
425 | struct device *dev; | |
426 | struct spi_device *spi; | |
427 | struct regulator *regulator; | |
428 | struct nfc_digital_dev *ddev; | |
429 | u32 quirks; | |
13b4272a | 430 | bool is_initiator; |
165063f1 MG |
431 | bool aborting; |
432 | struct sk_buff *tx_skb; | |
433 | struct sk_buff *rx_skb; | |
434 | nfc_digital_cmd_complete_t cb; | |
435 | void *cb_arg; | |
ebcc5a0d | 436 | u8 chip_status_ctrl; |
165063f1 | 437 | u8 iso_ctrl; |
49d19cc7 | 438 | u8 iso_ctrl_tech; |
12e9ade3 | 439 | u8 modulator_sys_clk_ctrl; |
165063f1 | 440 | u8 special_fcn_reg1; |
49d22c70 | 441 | u8 io_ctrl; |
4e64eff8 | 442 | unsigned int guard_time; |
165063f1 MG |
443 | int technology; |
444 | int framing; | |
cb174aba | 445 | u8 md_rf_tech; |
165063f1 | 446 | u8 tx_cmd; |
9d9304b3 | 447 | bool issue_eof; |
d34e48d6 MG |
448 | struct gpio_desc *en_gpiod; |
449 | struct gpio_desc *en2_gpiod; | |
165063f1 MG |
450 | struct mutex lock; |
451 | unsigned int timeout; | |
452 | bool ignore_timeout; | |
453 | struct delayed_work timeout_work; | |
454 | }; | |
455 | ||
165063f1 MG |
456 | static int trf7970a_cmd(struct trf7970a *trf, u8 opcode) |
457 | { | |
458 | u8 cmd = TRF7970A_CMD_BIT_CTRL | TRF7970A_CMD_BIT_OPCODE(opcode); | |
459 | int ret; | |
460 | ||
461 | dev_dbg(trf->dev, "cmd: 0x%x\n", cmd); | |
462 | ||
463 | ret = spi_write(trf->spi, &cmd, 1); | |
464 | if (ret) | |
465 | dev_err(trf->dev, "%s - cmd: 0x%x, ret: %d\n", __func__, cmd, | |
e2f0f671 | 466 | ret); |
165063f1 MG |
467 | return ret; |
468 | } | |
469 | ||
470 | static int trf7970a_read(struct trf7970a *trf, u8 reg, u8 *val) | |
471 | { | |
472 | u8 addr = TRF7970A_CMD_BIT_RW | reg; | |
473 | int ret; | |
474 | ||
475 | ret = spi_write_then_read(trf->spi, &addr, 1, val, 1); | |
476 | if (ret) | |
477 | dev_err(trf->dev, "%s - addr: 0x%x, ret: %d\n", __func__, addr, | |
e2f0f671 | 478 | ret); |
165063f1 MG |
479 | |
480 | dev_dbg(trf->dev, "read(0x%x): 0x%x\n", addr, *val); | |
481 | ||
482 | return ret; | |
483 | } | |
484 | ||
e2f0f671 MG |
485 | static int trf7970a_read_cont(struct trf7970a *trf, u8 reg, u8 *buf, |
486 | size_t len) | |
165063f1 MG |
487 | { |
488 | u8 addr = reg | TRF7970A_CMD_BIT_RW | TRF7970A_CMD_BIT_CONTINUOUS; | |
3e7f3356 MG |
489 | struct spi_transfer t[2]; |
490 | struct spi_message m; | |
165063f1 MG |
491 | int ret; |
492 | ||
493 | dev_dbg(trf->dev, "read_cont(0x%x, %zd)\n", addr, len); | |
494 | ||
3e7f3356 MG |
495 | spi_message_init(&m); |
496 | ||
497 | memset(&t, 0, sizeof(t)); | |
498 | ||
499 | t[0].tx_buf = &addr; | |
500 | t[0].len = sizeof(addr); | |
501 | spi_message_add_tail(&t[0], &m); | |
502 | ||
503 | t[1].rx_buf = buf; | |
504 | t[1].len = len; | |
505 | spi_message_add_tail(&t[1], &m); | |
506 | ||
507 | ret = spi_sync(trf->spi, &m); | |
165063f1 MG |
508 | if (ret) |
509 | dev_err(trf->dev, "%s - addr: 0x%x, ret: %d\n", __func__, addr, | |
e2f0f671 | 510 | ret); |
165063f1 MG |
511 | return ret; |
512 | } | |
513 | ||
514 | static int trf7970a_write(struct trf7970a *trf, u8 reg, u8 val) | |
515 | { | |
516 | u8 buf[2] = { reg, val }; | |
517 | int ret; | |
518 | ||
519 | dev_dbg(trf->dev, "write(0x%x): 0x%x\n", reg, val); | |
520 | ||
521 | ret = spi_write(trf->spi, buf, 2); | |
522 | if (ret) | |
523 | dev_err(trf->dev, "%s - write: 0x%x 0x%x, ret: %d\n", __func__, | |
e2f0f671 | 524 | buf[0], buf[1], ret); |
165063f1 MG |
525 | |
526 | return ret; | |
527 | } | |
528 | ||
529 | static int trf7970a_read_irqstatus(struct trf7970a *trf, u8 *status) | |
530 | { | |
531 | int ret; | |
532 | u8 buf[2]; | |
533 | u8 addr; | |
534 | ||
535 | addr = TRF7970A_IRQ_STATUS | TRF7970A_CMD_BIT_RW; | |
536 | ||
772079eb | 537 | if (trf->quirks & TRF7970A_QUIRK_IRQ_STATUS_READ) { |
165063f1 MG |
538 | addr |= TRF7970A_CMD_BIT_CONTINUOUS; |
539 | ret = spi_write_then_read(trf->spi, &addr, 1, buf, 2); | |
540 | } else { | |
541 | ret = spi_write_then_read(trf->spi, &addr, 1, buf, 1); | |
542 | } | |
543 | ||
544 | if (ret) | |
545 | dev_err(trf->dev, "%s - irqstatus: Status read failed: %d\n", | |
e2f0f671 | 546 | __func__, ret); |
165063f1 MG |
547 | else |
548 | *status = buf[0]; | |
549 | ||
550 | return ret; | |
551 | } | |
552 | ||
cb174aba MG |
553 | static int trf7970a_read_target_proto(struct trf7970a *trf, u8 *target_proto) |
554 | { | |
555 | int ret; | |
556 | u8 buf[2]; | |
557 | u8 addr; | |
558 | ||
559 | addr = TRF79070A_NFC_TARGET_PROTOCOL | TRF7970A_CMD_BIT_RW | | |
e2f0f671 | 560 | TRF7970A_CMD_BIT_CONTINUOUS; |
cb174aba MG |
561 | |
562 | ret = spi_write_then_read(trf->spi, &addr, 1, buf, 2); | |
563 | if (ret) | |
564 | dev_err(trf->dev, "%s - target_proto: Read failed: %d\n", | |
e2f0f671 | 565 | __func__, ret); |
cb174aba MG |
566 | else |
567 | *target_proto = buf[0]; | |
568 | ||
569 | return ret; | |
570 | } | |
571 | ||
572 | static int trf7970a_mode_detect(struct trf7970a *trf, u8 *rf_tech) | |
573 | { | |
574 | int ret; | |
575 | u8 target_proto, tech; | |
576 | ||
577 | ret = trf7970a_read_target_proto(trf, &target_proto); | |
578 | if (ret) | |
579 | return ret; | |
580 | ||
581 | switch (target_proto) { | |
582 | case TRF79070A_NFC_TARGET_PROTOCOL_106A: | |
583 | tech = NFC_DIGITAL_RF_TECH_106A; | |
584 | break; | |
585 | case TRF79070A_NFC_TARGET_PROTOCOL_106B: | |
586 | tech = NFC_DIGITAL_RF_TECH_106B; | |
587 | break; | |
588 | case TRF79070A_NFC_TARGET_PROTOCOL_212F: | |
589 | tech = NFC_DIGITAL_RF_TECH_212F; | |
590 | break; | |
591 | case TRF79070A_NFC_TARGET_PROTOCOL_424F: | |
592 | tech = NFC_DIGITAL_RF_TECH_424F; | |
593 | break; | |
594 | default: | |
595 | dev_dbg(trf->dev, "%s - mode_detect: target_proto: 0x%x\n", | |
e2f0f671 | 596 | __func__, target_proto); |
cb174aba MG |
597 | return -EIO; |
598 | } | |
599 | ||
600 | *rf_tech = tech; | |
601 | ||
602 | return ret; | |
603 | } | |
604 | ||
165063f1 MG |
605 | static void trf7970a_send_upstream(struct trf7970a *trf) |
606 | { | |
165063f1 MG |
607 | dev_kfree_skb_any(trf->tx_skb); |
608 | trf->tx_skb = NULL; | |
609 | ||
610 | if (trf->rx_skb && !IS_ERR(trf->rx_skb) && !trf->aborting) | |
611 | print_hex_dump_debug("trf7970a rx data: ", DUMP_PREFIX_NONE, | |
e2f0f671 MG |
612 | 16, 1, trf->rx_skb->data, trf->rx_skb->len, |
613 | false); | |
165063f1 | 614 | |
165063f1 MG |
615 | trf->state = TRF7970A_ST_IDLE; |
616 | ||
617 | if (trf->aborting) { | |
618 | dev_dbg(trf->dev, "Abort process complete\n"); | |
619 | ||
620 | if (!IS_ERR(trf->rx_skb)) { | |
621 | kfree_skb(trf->rx_skb); | |
622 | trf->rx_skb = ERR_PTR(-ECANCELED); | |
623 | } | |
624 | ||
625 | trf->aborting = false; | |
626 | } | |
627 | ||
628 | trf->cb(trf->ddev, trf->cb_arg, trf->rx_skb); | |
629 | ||
630 | trf->rx_skb = NULL; | |
631 | } | |
632 | ||
633 | static void trf7970a_send_err_upstream(struct trf7970a *trf, int errno) | |
634 | { | |
635 | dev_dbg(trf->dev, "Error - state: %d, errno: %d\n", trf->state, errno); | |
636 | ||
6fb9edcb MG |
637 | cancel_delayed_work(&trf->timeout_work); |
638 | ||
165063f1 MG |
639 | kfree_skb(trf->rx_skb); |
640 | trf->rx_skb = ERR_PTR(errno); | |
641 | ||
642 | trf7970a_send_upstream(trf); | |
643 | } | |
644 | ||
645 | static int trf7970a_transmit(struct trf7970a *trf, struct sk_buff *skb, | |
e2f0f671 MG |
646 | unsigned int len, u8 *prefix, |
647 | unsigned int prefix_len) | |
165063f1 | 648 | { |
7a1e5552 MG |
649 | struct spi_transfer t[2]; |
650 | struct spi_message m; | |
165063f1 MG |
651 | unsigned int timeout; |
652 | int ret; | |
653 | ||
654 | print_hex_dump_debug("trf7970a tx data: ", DUMP_PREFIX_NONE, | |
e2f0f671 | 655 | 16, 1, skb->data, len, false); |
165063f1 | 656 | |
7a1e5552 MG |
657 | spi_message_init(&m); |
658 | ||
659 | memset(&t, 0, sizeof(t)); | |
660 | ||
661 | t[0].tx_buf = prefix; | |
662 | t[0].len = prefix_len; | |
663 | spi_message_add_tail(&t[0], &m); | |
664 | ||
665 | t[1].tx_buf = skb->data; | |
666 | t[1].len = len; | |
667 | spi_message_add_tail(&t[1], &m); | |
668 | ||
669 | ret = spi_sync(trf->spi, &m); | |
165063f1 MG |
670 | if (ret) { |
671 | dev_err(trf->dev, "%s - Can't send tx data: %d\n", __func__, | |
e2f0f671 | 672 | ret); |
165063f1 MG |
673 | return ret; |
674 | } | |
675 | ||
676 | skb_pull(skb, len); | |
677 | ||
678 | if (skb->len > 0) { | |
679 | trf->state = TRF7970A_ST_WAIT_FOR_TX_FIFO; | |
680 | timeout = TRF7970A_WAIT_FOR_FIFO_DRAIN_TIMEOUT; | |
681 | } else { | |
9d9304b3 MG |
682 | if (trf->issue_eof) { |
683 | trf->state = TRF7970A_ST_WAIT_TO_ISSUE_EOF; | |
684 | timeout = TRF7970A_WAIT_TO_ISSUE_ISO15693_EOF; | |
685 | } else { | |
686 | trf->state = TRF7970A_ST_WAIT_FOR_RX_DATA; | |
1961843c MG |
687 | |
688 | if (!trf->timeout) | |
689 | timeout = TRF7970A_WAIT_FOR_TX_IRQ; | |
690 | else | |
691 | timeout = trf->timeout; | |
9d9304b3 | 692 | } |
165063f1 MG |
693 | } |
694 | ||
695 | dev_dbg(trf->dev, "Setting timeout for %d ms, state: %d\n", timeout, | |
e2f0f671 | 696 | trf->state); |
165063f1 MG |
697 | |
698 | schedule_delayed_work(&trf->timeout_work, msecs_to_jiffies(timeout)); | |
699 | ||
700 | return 0; | |
701 | } | |
702 | ||
703 | static void trf7970a_fill_fifo(struct trf7970a *trf) | |
704 | { | |
705 | struct sk_buff *skb = trf->tx_skb; | |
706 | unsigned int len; | |
707 | int ret; | |
708 | u8 fifo_bytes; | |
7a1e5552 | 709 | u8 prefix; |
165063f1 MG |
710 | |
711 | ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, &fifo_bytes); | |
712 | if (ret) { | |
713 | trf7970a_send_err_upstream(trf, ret); | |
714 | return; | |
715 | } | |
716 | ||
717 | dev_dbg(trf->dev, "Filling FIFO - fifo_bytes: 0x%x\n", fifo_bytes); | |
718 | ||
4542e834 | 719 | fifo_bytes &= ~TRF7970A_FIFO_STATUS_OVERFLOW; |
165063f1 MG |
720 | |
721 | /* Calculate how much more data can be written to the fifo */ | |
722 | len = TRF7970A_FIFO_SIZE - fifo_bytes; | |
0e840ed5 MG |
723 | if (!len) { |
724 | schedule_delayed_work(&trf->timeout_work, | |
725 | msecs_to_jiffies(TRF7970A_WAIT_FOR_FIFO_DRAIN_TIMEOUT)); | |
726 | return; | |
727 | } | |
728 | ||
165063f1 MG |
729 | len = min(skb->len, len); |
730 | ||
7a1e5552 MG |
731 | prefix = TRF7970A_CMD_BIT_CONTINUOUS | TRF7970A_FIFO_IO_REGISTER; |
732 | ||
733 | ret = trf7970a_transmit(trf, skb, len, &prefix, sizeof(prefix)); | |
165063f1 MG |
734 | if (ret) |
735 | trf7970a_send_err_upstream(trf, ret); | |
736 | } | |
737 | ||
738 | static void trf7970a_drain_fifo(struct trf7970a *trf, u8 status) | |
739 | { | |
740 | struct sk_buff *skb = trf->rx_skb; | |
741 | int ret; | |
742 | u8 fifo_bytes; | |
743 | ||
744 | if (status & TRF7970A_IRQ_STATUS_ERROR) { | |
745 | trf7970a_send_err_upstream(trf, -EIO); | |
746 | return; | |
747 | } | |
748 | ||
749 | ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, &fifo_bytes); | |
750 | if (ret) { | |
751 | trf7970a_send_err_upstream(trf, ret); | |
752 | return; | |
753 | } | |
754 | ||
755 | dev_dbg(trf->dev, "Draining FIFO - fifo_bytes: 0x%x\n", fifo_bytes); | |
756 | ||
4542e834 MG |
757 | fifo_bytes &= ~TRF7970A_FIFO_STATUS_OVERFLOW; |
758 | ||
165063f1 MG |
759 | if (!fifo_bytes) |
760 | goto no_rx_data; | |
761 | ||
165063f1 MG |
762 | if (fifo_bytes > skb_tailroom(skb)) { |
763 | skb = skb_copy_expand(skb, skb_headroom(skb), | |
e2f0f671 MG |
764 | max_t(int, fifo_bytes, |
765 | TRF7970A_RX_SKB_ALLOC_SIZE), | |
766 | GFP_KERNEL); | |
165063f1 MG |
767 | if (!skb) { |
768 | trf7970a_send_err_upstream(trf, -ENOMEM); | |
769 | return; | |
770 | } | |
771 | ||
772 | kfree_skb(trf->rx_skb); | |
773 | trf->rx_skb = skb; | |
774 | } | |
775 | ||
776 | ret = trf7970a_read_cont(trf, TRF7970A_FIFO_IO_REGISTER, | |
e2f0f671 | 777 | skb_put(skb, fifo_bytes), fifo_bytes); |
165063f1 MG |
778 | if (ret) { |
779 | trf7970a_send_err_upstream(trf, ret); | |
780 | return; | |
781 | } | |
782 | ||
783 | /* If received Type 2 ACK/NACK, shift right 4 bits and pass up */ | |
784 | if ((trf->framing == NFC_DIGITAL_FRAMING_NFCA_T2T) && (skb->len == 1) && | |
e2f0f671 | 785 | (trf->special_fcn_reg1 == TRF7970A_SPECIAL_FCN_REG1_4_BIT_RX)) { |
165063f1 MG |
786 | skb->data[0] >>= 4; |
787 | status = TRF7970A_IRQ_STATUS_SRX; | |
788 | } else { | |
789 | trf->state = TRF7970A_ST_WAIT_FOR_RX_DATA_CONT; | |
5d8f7594 MG |
790 | |
791 | ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, &fifo_bytes); | |
792 | if (ret) { | |
793 | trf7970a_send_err_upstream(trf, ret); | |
794 | return; | |
795 | } | |
796 | ||
797 | fifo_bytes &= ~TRF7970A_FIFO_STATUS_OVERFLOW; | |
798 | ||
799 | /* If there are bytes in the FIFO, set status to '0' so | |
800 | * the if stmt below doesn't fire and the driver will wait | |
801 | * for the trf7970a to generate another RX interrupt. | |
802 | */ | |
803 | if (fifo_bytes) | |
804 | status = 0; | |
165063f1 MG |
805 | } |
806 | ||
807 | no_rx_data: | |
e2f0f671 | 808 | if (status == TRF7970A_IRQ_STATUS_SRX) { /* Receive complete */ |
165063f1 MG |
809 | trf7970a_send_upstream(trf); |
810 | return; | |
811 | } | |
812 | ||
813 | dev_dbg(trf->dev, "Setting timeout for %d ms\n", | |
e2f0f671 | 814 | TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT); |
165063f1 MG |
815 | |
816 | schedule_delayed_work(&trf->timeout_work, | |
e2f0f671 | 817 | msecs_to_jiffies(TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT)); |
165063f1 MG |
818 | } |
819 | ||
820 | static irqreturn_t trf7970a_irq(int irq, void *dev_id) | |
821 | { | |
822 | struct trf7970a *trf = dev_id; | |
823 | int ret; | |
13b4272a | 824 | u8 status, fifo_bytes, iso_ctrl; |
165063f1 MG |
825 | |
826 | mutex_lock(&trf->lock); | |
827 | ||
b5e17d9b | 828 | if (trf->state == TRF7970A_ST_RF_OFF) { |
165063f1 MG |
829 | mutex_unlock(&trf->lock); |
830 | return IRQ_NONE; | |
831 | } | |
832 | ||
833 | ret = trf7970a_read_irqstatus(trf, &status); | |
834 | if (ret) { | |
835 | mutex_unlock(&trf->lock); | |
836 | return IRQ_NONE; | |
837 | } | |
838 | ||
839 | dev_dbg(trf->dev, "IRQ - state: %d, status: 0x%x\n", trf->state, | |
e2f0f671 | 840 | status); |
165063f1 MG |
841 | |
842 | if (!status) { | |
843 | mutex_unlock(&trf->lock); | |
844 | return IRQ_NONE; | |
845 | } | |
846 | ||
847 | switch (trf->state) { | |
848 | case TRF7970A_ST_IDLE: | |
849 | case TRF7970A_ST_IDLE_RX_BLOCKED: | |
13b4272a MG |
850 | /* If initiator and getting interrupts caused by RF noise, |
851 | * turn off the receiver to avoid unnecessary interrupts. | |
852 | * It will be turned back on in trf7970a_send_cmd() when | |
853 | * the next command is issued. | |
165063f1 | 854 | */ |
13b4272a | 855 | if (trf->is_initiator && (status & TRF7970A_IRQ_STATUS_ERROR)) { |
165063f1 MG |
856 | trf7970a_cmd(trf, TRF7970A_CMD_BLOCK_RX); |
857 | trf->state = TRF7970A_ST_IDLE_RX_BLOCKED; | |
858 | } | |
859 | ||
860 | trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET); | |
861 | break; | |
862 | case TRF7970A_ST_WAIT_FOR_TX_FIFO: | |
863 | if (status & TRF7970A_IRQ_STATUS_TX) { | |
864 | trf->ignore_timeout = | |
e2f0f671 | 865 | !cancel_delayed_work(&trf->timeout_work); |
165063f1 MG |
866 | trf7970a_fill_fifo(trf); |
867 | } else { | |
868 | trf7970a_send_err_upstream(trf, -EIO); | |
869 | } | |
870 | break; | |
871 | case TRF7970A_ST_WAIT_FOR_RX_DATA: | |
872 | case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT: | |
873 | if (status & TRF7970A_IRQ_STATUS_SRX) { | |
874 | trf->ignore_timeout = | |
e2f0f671 | 875 | !cancel_delayed_work(&trf->timeout_work); |
165063f1 | 876 | trf7970a_drain_fifo(trf, status); |
bece3c54 MG |
877 | } else if (status & TRF7970A_IRQ_STATUS_FIFO) { |
878 | ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, | |
e2f0f671 | 879 | &fifo_bytes); |
bece3c54 MG |
880 | |
881 | fifo_bytes &= ~TRF7970A_FIFO_STATUS_OVERFLOW; | |
882 | ||
883 | if (ret) | |
884 | trf7970a_send_err_upstream(trf, ret); | |
885 | else if (!fifo_bytes) | |
886 | trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET); | |
13b4272a | 887 | } else if ((status == TRF7970A_IRQ_STATUS_TX) || |
e2f0f671 MG |
888 | (!trf->is_initiator && |
889 | (status == (TRF7970A_IRQ_STATUS_TX | | |
890 | TRF7970A_IRQ_STATUS_NFC_RF)))) { | |
4dd836e4 | 891 | trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET); |
1961843c MG |
892 | |
893 | if (!trf->timeout) { | |
e2f0f671 MG |
894 | trf->ignore_timeout = |
895 | !cancel_delayed_work(&trf->timeout_work); | |
1961843c MG |
896 | trf->rx_skb = ERR_PTR(0); |
897 | trf7970a_send_upstream(trf); | |
898 | break; | |
899 | } | |
13b4272a MG |
900 | |
901 | if (trf->is_initiator) | |
902 | break; | |
903 | ||
904 | iso_ctrl = trf->iso_ctrl; | |
905 | ||
906 | switch (trf->framing) { | |
907 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD: | |
908 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT_NO_CRC; | |
909 | iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N; | |
910 | trf->iso_ctrl = 0xff; /* Force ISO_CTRL write */ | |
911 | break; | |
912 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD_WITH_CRC_A: | |
913 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; | |
914 | iso_ctrl &= ~TRF7970A_ISO_CTRL_RX_CRC_N; | |
915 | trf->iso_ctrl = 0xff; /* Force ISO_CTRL write */ | |
916 | break; | |
917 | case NFC_DIGITAL_FRAMING_NFCA_ANTICOL_COMPLETE: | |
918 | ret = trf7970a_write(trf, | |
e2f0f671 MG |
919 | TRF7970A_SPECIAL_FCN_REG1, |
920 | TRF7970A_SPECIAL_FCN_REG1_14_ANTICOLL); | |
13b4272a | 921 | if (ret) |
b9e3016a | 922 | goto err_unlock_exit; |
13b4272a MG |
923 | |
924 | trf->special_fcn_reg1 = | |
e2f0f671 | 925 | TRF7970A_SPECIAL_FCN_REG1_14_ANTICOLL; |
13b4272a MG |
926 | break; |
927 | default: | |
928 | break; | |
929 | } | |
930 | ||
931 | if (iso_ctrl != trf->iso_ctrl) { | |
932 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, | |
e2f0f671 | 933 | iso_ctrl); |
13b4272a | 934 | if (ret) |
b9e3016a | 935 | goto err_unlock_exit; |
13b4272a MG |
936 | |
937 | trf->iso_ctrl = iso_ctrl; | |
938 | } | |
4dd836e4 | 939 | } else { |
165063f1 MG |
940 | trf7970a_send_err_upstream(trf, -EIO); |
941 | } | |
942 | break; | |
9d9304b3 MG |
943 | case TRF7970A_ST_WAIT_TO_ISSUE_EOF: |
944 | if (status != TRF7970A_IRQ_STATUS_TX) | |
945 | trf7970a_send_err_upstream(trf, -EIO); | |
946 | break; | |
13b4272a MG |
947 | case TRF7970A_ST_LISTENING: |
948 | if (status & TRF7970A_IRQ_STATUS_SRX) { | |
949 | trf->ignore_timeout = | |
e2f0f671 | 950 | !cancel_delayed_work(&trf->timeout_work); |
13b4272a MG |
951 | trf7970a_drain_fifo(trf, status); |
952 | } else if (!(status & TRF7970A_IRQ_STATUS_NFC_RF)) { | |
953 | trf7970a_send_err_upstream(trf, -EIO); | |
954 | } | |
955 | break; | |
cb174aba MG |
956 | case TRF7970A_ST_LISTENING_MD: |
957 | if (status & TRF7970A_IRQ_STATUS_SRX) { | |
958 | trf->ignore_timeout = | |
e2f0f671 | 959 | !cancel_delayed_work(&trf->timeout_work); |
cb174aba MG |
960 | |
961 | ret = trf7970a_mode_detect(trf, &trf->md_rf_tech); | |
962 | if (ret) { | |
963 | trf7970a_send_err_upstream(trf, ret); | |
964 | } else { | |
965 | trf->state = TRF7970A_ST_LISTENING; | |
966 | trf7970a_drain_fifo(trf, status); | |
967 | } | |
968 | } else if (!(status & TRF7970A_IRQ_STATUS_NFC_RF)) { | |
969 | trf7970a_send_err_upstream(trf, -EIO); | |
970 | } | |
971 | break; | |
165063f1 MG |
972 | default: |
973 | dev_err(trf->dev, "%s - Driver in invalid state: %d\n", | |
e2f0f671 | 974 | __func__, trf->state); |
165063f1 MG |
975 | } |
976 | ||
b9e3016a | 977 | err_unlock_exit: |
165063f1 MG |
978 | mutex_unlock(&trf->lock); |
979 | return IRQ_HANDLED; | |
980 | } | |
981 | ||
9d9304b3 MG |
982 | static void trf7970a_issue_eof(struct trf7970a *trf) |
983 | { | |
984 | int ret; | |
985 | ||
986 | dev_dbg(trf->dev, "Issuing EOF\n"); | |
987 | ||
988 | ret = trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET); | |
989 | if (ret) | |
990 | trf7970a_send_err_upstream(trf, ret); | |
991 | ||
992 | ret = trf7970a_cmd(trf, TRF7970A_CMD_EOF); | |
993 | if (ret) | |
994 | trf7970a_send_err_upstream(trf, ret); | |
995 | ||
996 | trf->state = TRF7970A_ST_WAIT_FOR_RX_DATA; | |
997 | ||
998 | dev_dbg(trf->dev, "Setting timeout for %d ms, state: %d\n", | |
e2f0f671 | 999 | trf->timeout, trf->state); |
9d9304b3 MG |
1000 | |
1001 | schedule_delayed_work(&trf->timeout_work, | |
e2f0f671 | 1002 | msecs_to_jiffies(trf->timeout)); |
9d9304b3 MG |
1003 | } |
1004 | ||
165063f1 MG |
1005 | static void trf7970a_timeout_work_handler(struct work_struct *work) |
1006 | { | |
1007 | struct trf7970a *trf = container_of(work, struct trf7970a, | |
e2f0f671 | 1008 | timeout_work.work); |
165063f1 MG |
1009 | |
1010 | dev_dbg(trf->dev, "Timeout - state: %d, ignore_timeout: %d\n", | |
e2f0f671 | 1011 | trf->state, trf->ignore_timeout); |
165063f1 MG |
1012 | |
1013 | mutex_lock(&trf->lock); | |
1014 | ||
1015 | if (trf->ignore_timeout) | |
1016 | trf->ignore_timeout = false; | |
1017 | else if (trf->state == TRF7970A_ST_WAIT_FOR_RX_DATA_CONT) | |
afa5b5f1 | 1018 | trf7970a_drain_fifo(trf, TRF7970A_IRQ_STATUS_SRX); |
9d9304b3 MG |
1019 | else if (trf->state == TRF7970A_ST_WAIT_TO_ISSUE_EOF) |
1020 | trf7970a_issue_eof(trf); | |
165063f1 MG |
1021 | else |
1022 | trf7970a_send_err_upstream(trf, -ETIMEDOUT); | |
1023 | ||
1024 | mutex_unlock(&trf->lock); | |
1025 | } | |
1026 | ||
1027 | static int trf7970a_init(struct trf7970a *trf) | |
1028 | { | |
1029 | int ret; | |
1030 | ||
1031 | dev_dbg(trf->dev, "Initializing device - state: %d\n", trf->state); | |
1032 | ||
1033 | ret = trf7970a_cmd(trf, TRF7970A_CMD_SOFT_INIT); | |
1034 | if (ret) | |
1035 | goto err_out; | |
1036 | ||
1037 | ret = trf7970a_cmd(trf, TRF7970A_CMD_IDLE); | |
1038 | if (ret) | |
1039 | goto err_out; | |
1040 | ||
49d22c70 | 1041 | ret = trf7970a_write(trf, TRF7970A_REG_IO_CTRL, |
e2f0f671 | 1042 | trf->io_ctrl | TRF7970A_REG_IO_CTRL_VRS(0x1)); |
49d22c70 GL |
1043 | if (ret) |
1044 | goto err_out; | |
1045 | ||
58d46f53 GL |
1046 | ret = trf7970a_write(trf, TRF7970A_NFC_TARGET_LEVEL, 0); |
1047 | if (ret) | |
1048 | goto err_out; | |
1049 | ||
4e007f81 MG |
1050 | usleep_range(1000, 2000); |
1051 | ||
7149d6bf MG |
1052 | trf->chip_status_ctrl &= ~TRF7970A_CHIP_STATUS_RF_ON; |
1053 | ||
837eb4d2 | 1054 | ret = trf7970a_write(trf, TRF7970A_MODULATOR_SYS_CLK_CTRL, |
e2f0f671 | 1055 | trf->modulator_sys_clk_ctrl); |
6c08df42 MG |
1056 | if (ret) |
1057 | goto err_out; | |
1058 | ||
165063f1 | 1059 | ret = trf7970a_write(trf, TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS, |
e2f0f671 MG |
1060 | TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_96 | |
1061 | TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_32); | |
165063f1 MG |
1062 | if (ret) |
1063 | goto err_out; | |
1064 | ||
1065 | ret = trf7970a_write(trf, TRF7970A_SPECIAL_FCN_REG1, 0); | |
1066 | if (ret) | |
1067 | goto err_out; | |
1068 | ||
1069 | trf->special_fcn_reg1 = 0; | |
1070 | ||
49d19cc7 | 1071 | trf->iso_ctrl = 0xff; |
165063f1 MG |
1072 | return 0; |
1073 | ||
1074 | err_out: | |
1075 | dev_dbg(trf->dev, "Couldn't init device: %d\n", ret); | |
1076 | return ret; | |
1077 | } | |
1078 | ||
1079 | static void trf7970a_switch_rf_off(struct trf7970a *trf) | |
1080 | { | |
cfc708db | 1081 | if ((trf->state == TRF7970A_ST_PWR_OFF) || |
e2f0f671 | 1082 | (trf->state == TRF7970A_ST_RF_OFF)) |
cfc708db MG |
1083 | return; |
1084 | ||
165063f1 MG |
1085 | dev_dbg(trf->dev, "Switching rf off\n"); |
1086 | ||
a1d2dc5b MG |
1087 | trf->chip_status_ctrl &= ~TRF7970A_CHIP_STATUS_RF_ON; |
1088 | ||
1089 | trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, trf->chip_status_ctrl); | |
1090 | ||
165063f1 | 1091 | trf->aborting = false; |
b5e17d9b | 1092 | trf->state = TRF7970A_ST_RF_OFF; |
e6403b7c MG |
1093 | |
1094 | pm_runtime_mark_last_busy(trf->dev); | |
1095 | pm_runtime_put_autosuspend(trf->dev); | |
165063f1 MG |
1096 | } |
1097 | ||
0a1de842 | 1098 | static int trf7970a_switch_rf_on(struct trf7970a *trf) |
165063f1 | 1099 | { |
a08e5454 MG |
1100 | int ret; |
1101 | ||
165063f1 MG |
1102 | dev_dbg(trf->dev, "Switching rf on\n"); |
1103 | ||
e6403b7c | 1104 | pm_runtime_get_sync(trf->dev); |
165063f1 | 1105 | |
e2f0f671 | 1106 | if (trf->state != TRF7970A_ST_RF_OFF) { /* Power on, RF off */ |
ceccd6aa | 1107 | dev_err(trf->dev, "%s - Incorrect state: %d\n", __func__, |
e2f0f671 | 1108 | trf->state); |
ceccd6aa MG |
1109 | return -EINVAL; |
1110 | } | |
1111 | ||
a08e5454 MG |
1112 | ret = trf7970a_init(trf); |
1113 | if (ret) { | |
1114 | dev_err(trf->dev, "%s - Can't initialize: %d\n", __func__, ret); | |
0a1de842 | 1115 | return ret; |
a08e5454 MG |
1116 | } |
1117 | ||
e6403b7c | 1118 | trf->state = TRF7970A_ST_IDLE; |
0a1de842 MG |
1119 | |
1120 | return 0; | |
165063f1 MG |
1121 | } |
1122 | ||
1123 | static int trf7970a_switch_rf(struct nfc_digital_dev *ddev, bool on) | |
1124 | { | |
1125 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
0a1de842 | 1126 | int ret = 0; |
165063f1 MG |
1127 | |
1128 | dev_dbg(trf->dev, "Switching RF - state: %d, on: %d\n", trf->state, on); | |
1129 | ||
1130 | mutex_lock(&trf->lock); | |
1131 | ||
1132 | if (on) { | |
1133 | switch (trf->state) { | |
ceccd6aa | 1134 | case TRF7970A_ST_PWR_OFF: |
b5e17d9b | 1135 | case TRF7970A_ST_RF_OFF: |
0a1de842 | 1136 | ret = trf7970a_switch_rf_on(trf); |
165063f1 MG |
1137 | break; |
1138 | case TRF7970A_ST_IDLE: | |
1139 | case TRF7970A_ST_IDLE_RX_BLOCKED: | |
1140 | break; | |
1141 | default: | |
1142 | dev_err(trf->dev, "%s - Invalid request: %d %d\n", | |
e2f0f671 | 1143 | __func__, trf->state, on); |
165063f1 | 1144 | trf7970a_switch_rf_off(trf); |
0a1de842 | 1145 | ret = -EINVAL; |
165063f1 MG |
1146 | } |
1147 | } else { | |
1148 | switch (trf->state) { | |
ceccd6aa | 1149 | case TRF7970A_ST_PWR_OFF: |
b5e17d9b | 1150 | case TRF7970A_ST_RF_OFF: |
165063f1 MG |
1151 | break; |
1152 | default: | |
1153 | dev_err(trf->dev, "%s - Invalid request: %d %d\n", | |
e2f0f671 | 1154 | __func__, trf->state, on); |
0a1de842 | 1155 | ret = -EINVAL; |
165063f1 MG |
1156 | /* FALLTHROUGH */ |
1157 | case TRF7970A_ST_IDLE: | |
1158 | case TRF7970A_ST_IDLE_RX_BLOCKED: | |
13b4272a MG |
1159 | case TRF7970A_ST_WAIT_FOR_RX_DATA: |
1160 | case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT: | |
165063f1 MG |
1161 | trf7970a_switch_rf_off(trf); |
1162 | } | |
1163 | } | |
1164 | ||
1165 | mutex_unlock(&trf->lock); | |
0a1de842 | 1166 | return ret; |
165063f1 MG |
1167 | } |
1168 | ||
307e5caf | 1169 | static int trf7970a_in_config_rf_tech(struct trf7970a *trf, int tech) |
165063f1 MG |
1170 | { |
1171 | int ret = 0; | |
1172 | ||
1173 | dev_dbg(trf->dev, "rf technology: %d\n", tech); | |
1174 | ||
1175 | switch (tech) { | |
1176 | case NFC_DIGITAL_RF_TECH_106A: | |
49d19cc7 | 1177 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_14443A_106; |
837eb4d2 | 1178 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1179 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1180 | TRF7970A_MODULATOR_DEPTH_OOK; | |
4e64eff8 | 1181 | trf->guard_time = TRF7970A_GUARD_TIME_NFCA; |
165063f1 | 1182 | break; |
742b1f9f MG |
1183 | case NFC_DIGITAL_RF_TECH_106B: |
1184 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_14443B_106; | |
837eb4d2 | 1185 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1186 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1187 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
4e64eff8 | 1188 | trf->guard_time = TRF7970A_GUARD_TIME_NFCB; |
742b1f9f | 1189 | break; |
6857bb96 MG |
1190 | case NFC_DIGITAL_RF_TECH_212F: |
1191 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_FELICA_212; | |
837eb4d2 | 1192 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1193 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1194 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
4e64eff8 | 1195 | trf->guard_time = TRF7970A_GUARD_TIME_NFCF; |
6857bb96 MG |
1196 | break; |
1197 | case NFC_DIGITAL_RF_TECH_424F: | |
1198 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_FELICA_424; | |
837eb4d2 | 1199 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1200 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1201 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
4e64eff8 | 1202 | trf->guard_time = TRF7970A_GUARD_TIME_NFCF; |
6857bb96 | 1203 | break; |
9d9304b3 | 1204 | case NFC_DIGITAL_RF_TECH_ISO15693: |
49d19cc7 | 1205 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648; |
837eb4d2 | 1206 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1207 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1208 | TRF7970A_MODULATOR_DEPTH_OOK; | |
4e64eff8 | 1209 | trf->guard_time = TRF7970A_GUARD_TIME_15693; |
9d9304b3 | 1210 | break; |
165063f1 MG |
1211 | default: |
1212 | dev_dbg(trf->dev, "Unsupported rf technology: %d\n", tech); | |
1213 | return -EINVAL; | |
1214 | } | |
1215 | ||
1216 | trf->technology = tech; | |
1217 | ||
13b4272a MG |
1218 | /* If in initiator mode and not changing the RF tech due to a |
1219 | * PSL sequence (indicated by 'trf->iso_ctrl == 0xff' from | |
1220 | * trf7970a_init()), clear the NFC Target Detection Level register | |
1221 | * due to erratum. | |
1222 | */ | |
1223 | if (trf->iso_ctrl == 0xff) | |
1224 | ret = trf7970a_write(trf, TRF7970A_NFC_TARGET_LEVEL, 0); | |
1225 | ||
165063f1 MG |
1226 | return ret; |
1227 | } | |
1228 | ||
851ee3cb MG |
1229 | static int trf7970a_is_rf_field(struct trf7970a *trf, bool *is_rf_field) |
1230 | { | |
1231 | int ret; | |
1232 | u8 rssi; | |
1233 | ||
1234 | ret = trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, | |
e2f0f671 MG |
1235 | trf->chip_status_ctrl | |
1236 | TRF7970A_CHIP_STATUS_REC_ON); | |
851ee3cb MG |
1237 | if (ret) |
1238 | return ret; | |
1239 | ||
1240 | ret = trf7970a_cmd(trf, TRF7970A_CMD_TEST_EXT_RF); | |
1241 | if (ret) | |
1242 | return ret; | |
1243 | ||
1244 | usleep_range(50, 60); | |
1245 | ||
1246 | ret = trf7970a_read(trf, TRF7970A_RSSI_OSC_STATUS, &rssi); | |
1247 | if (ret) | |
1248 | return ret; | |
1249 | ||
1250 | ret = trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, | |
e2f0f671 | 1251 | trf->chip_status_ctrl); |
851ee3cb MG |
1252 | if (ret) |
1253 | return ret; | |
1254 | ||
1255 | if (rssi & TRF7970A_RSSI_OSC_STATUS_RSSI_MASK) | |
1256 | *is_rf_field = true; | |
1257 | else | |
1258 | *is_rf_field = false; | |
1259 | ||
1260 | return 0; | |
1261 | } | |
1262 | ||
307e5caf | 1263 | static int trf7970a_in_config_framing(struct trf7970a *trf, int framing) |
165063f1 | 1264 | { |
49d19cc7 | 1265 | u8 iso_ctrl = trf->iso_ctrl_tech; |
851ee3cb | 1266 | bool is_rf_field = false; |
49d19cc7 MG |
1267 | int ret; |
1268 | ||
165063f1 MG |
1269 | dev_dbg(trf->dev, "framing: %d\n", framing); |
1270 | ||
1271 | switch (framing) { | |
1272 | case NFC_DIGITAL_FRAMING_NFCA_SHORT: | |
1273 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD: | |
1274 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT_NO_CRC; | |
49d19cc7 | 1275 | iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N; |
165063f1 MG |
1276 | break; |
1277 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD_WITH_CRC_A: | |
80062891 | 1278 | case NFC_DIGITAL_FRAMING_NFCA_T4T: |
742b1f9f MG |
1279 | case NFC_DIGITAL_FRAMING_NFCB: |
1280 | case NFC_DIGITAL_FRAMING_NFCB_T4T: | |
6857bb96 MG |
1281 | case NFC_DIGITAL_FRAMING_NFCF: |
1282 | case NFC_DIGITAL_FRAMING_NFCF_T3T: | |
9d9304b3 MG |
1283 | case NFC_DIGITAL_FRAMING_ISO15693_INVENTORY: |
1284 | case NFC_DIGITAL_FRAMING_ISO15693_T5T: | |
13b4272a MG |
1285 | case NFC_DIGITAL_FRAMING_NFCA_NFC_DEP: |
1286 | case NFC_DIGITAL_FRAMING_NFCF_NFC_DEP: | |
165063f1 | 1287 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; |
49d19cc7 | 1288 | iso_ctrl &= ~TRF7970A_ISO_CTRL_RX_CRC_N; |
165063f1 MG |
1289 | break; |
1290 | case NFC_DIGITAL_FRAMING_NFCA_T2T: | |
1291 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; | |
49d19cc7 | 1292 | iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N; |
165063f1 MG |
1293 | break; |
1294 | default: | |
1295 | dev_dbg(trf->dev, "Unsupported Framing: %d\n", framing); | |
1296 | return -EINVAL; | |
1297 | } | |
1298 | ||
1299 | trf->framing = framing; | |
1300 | ||
851ee3cb MG |
1301 | if (!(trf->chip_status_ctrl & TRF7970A_CHIP_STATUS_RF_ON)) { |
1302 | ret = trf7970a_is_rf_field(trf, &is_rf_field); | |
1303 | if (ret) | |
1304 | return ret; | |
1305 | ||
1306 | if (is_rf_field) | |
1307 | return -EBUSY; | |
1308 | } | |
1309 | ||
49d19cc7 MG |
1310 | if (iso_ctrl != trf->iso_ctrl) { |
1311 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, iso_ctrl); | |
1312 | if (ret) | |
1313 | return ret; | |
1314 | ||
1315 | trf->iso_ctrl = iso_ctrl; | |
a0822a7e MG |
1316 | |
1317 | ret = trf7970a_write(trf, TRF7970A_MODULATOR_SYS_CLK_CTRL, | |
e2f0f671 | 1318 | trf->modulator_sys_clk_ctrl); |
a0822a7e MG |
1319 | if (ret) |
1320 | return ret; | |
49d19cc7 MG |
1321 | } |
1322 | ||
a1d2dc5b MG |
1323 | if (!(trf->chip_status_ctrl & TRF7970A_CHIP_STATUS_RF_ON)) { |
1324 | ret = trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, | |
e2f0f671 MG |
1325 | trf->chip_status_ctrl | |
1326 | TRF7970A_CHIP_STATUS_RF_ON); | |
a1d2dc5b MG |
1327 | if (ret) |
1328 | return ret; | |
1329 | ||
1330 | trf->chip_status_ctrl |= TRF7970A_CHIP_STATUS_RF_ON; | |
1331 | ||
4e64eff8 | 1332 | usleep_range(trf->guard_time, trf->guard_time + 1000); |
a1d2dc5b MG |
1333 | } |
1334 | ||
49d19cc7 | 1335 | return 0; |
165063f1 MG |
1336 | } |
1337 | ||
1338 | static int trf7970a_in_configure_hw(struct nfc_digital_dev *ddev, int type, | |
e2f0f671 | 1339 | int param) |
165063f1 MG |
1340 | { |
1341 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
18422e68 | 1342 | int ret; |
165063f1 MG |
1343 | |
1344 | dev_dbg(trf->dev, "Configure hw - type: %d, param: %d\n", type, param); | |
1345 | ||
1346 | mutex_lock(&trf->lock); | |
1347 | ||
13b4272a MG |
1348 | trf->is_initiator = true; |
1349 | ||
ceccd6aa | 1350 | if ((trf->state == TRF7970A_ST_PWR_OFF) || |
e2f0f671 | 1351 | (trf->state == TRF7970A_ST_RF_OFF)) { |
0a1de842 MG |
1352 | ret = trf7970a_switch_rf_on(trf); |
1353 | if (ret) | |
1354 | goto err_unlock; | |
1355 | } | |
165063f1 MG |
1356 | |
1357 | switch (type) { | |
1358 | case NFC_DIGITAL_CONFIG_RF_TECH: | |
307e5caf | 1359 | ret = trf7970a_in_config_rf_tech(trf, param); |
165063f1 MG |
1360 | break; |
1361 | case NFC_DIGITAL_CONFIG_FRAMING: | |
307e5caf | 1362 | ret = trf7970a_in_config_framing(trf, param); |
165063f1 MG |
1363 | break; |
1364 | default: | |
1365 | dev_dbg(trf->dev, "Unknown type: %d\n", type); | |
1366 | ret = -EINVAL; | |
1367 | } | |
1368 | ||
0a1de842 | 1369 | err_unlock: |
165063f1 MG |
1370 | mutex_unlock(&trf->lock); |
1371 | return ret; | |
1372 | } | |
1373 | ||
9d9304b3 MG |
1374 | static int trf7970a_is_iso15693_write_or_lock(u8 cmd) |
1375 | { | |
1376 | switch (cmd) { | |
1377 | case ISO15693_CMD_WRITE_SINGLE_BLOCK: | |
1378 | case ISO15693_CMD_LOCK_BLOCK: | |
1379 | case ISO15693_CMD_WRITE_MULTIPLE_BLOCK: | |
1380 | case ISO15693_CMD_WRITE_AFI: | |
1381 | case ISO15693_CMD_LOCK_AFI: | |
1382 | case ISO15693_CMD_WRITE_DSFID: | |
1383 | case ISO15693_CMD_LOCK_DSFID: | |
1384 | return 1; | |
1385 | break; | |
1386 | default: | |
1387 | return 0; | |
1388 | } | |
1389 | } | |
1390 | ||
165063f1 MG |
1391 | static int trf7970a_per_cmd_config(struct trf7970a *trf, struct sk_buff *skb) |
1392 | { | |
1393 | u8 *req = skb->data; | |
9d9304b3 | 1394 | u8 special_fcn_reg1, iso_ctrl; |
165063f1 MG |
1395 | int ret; |
1396 | ||
9d9304b3 MG |
1397 | trf->issue_eof = false; |
1398 | ||
165063f1 MG |
1399 | /* When issuing Type 2 read command, make sure the '4_bit_RX' bit in |
1400 | * special functions register 1 is cleared; otherwise, its a write or | |
1401 | * sector select command and '4_bit_RX' must be set. | |
9d9304b3 MG |
1402 | * |
1403 | * When issuing an ISO 15693 command, inspect the flags byte to see | |
1404 | * what speed to use. Also, remember if the OPTION flag is set on | |
1405 | * a Type 5 write or lock command so the driver will know that it | |
1406 | * has to send an EOF in order to get a response. | |
165063f1 MG |
1407 | */ |
1408 | if ((trf->technology == NFC_DIGITAL_RF_TECH_106A) && | |
e2f0f671 | 1409 | (trf->framing == NFC_DIGITAL_FRAMING_NFCA_T2T)) { |
165063f1 MG |
1410 | if (req[0] == NFC_T2T_CMD_READ) |
1411 | special_fcn_reg1 = 0; | |
1412 | else | |
1413 | special_fcn_reg1 = TRF7970A_SPECIAL_FCN_REG1_4_BIT_RX; | |
1414 | ||
1415 | if (special_fcn_reg1 != trf->special_fcn_reg1) { | |
1416 | ret = trf7970a_write(trf, TRF7970A_SPECIAL_FCN_REG1, | |
e2f0f671 | 1417 | special_fcn_reg1); |
165063f1 MG |
1418 | if (ret) |
1419 | return ret; | |
1420 | ||
1421 | trf->special_fcn_reg1 = special_fcn_reg1; | |
1422 | } | |
9d9304b3 MG |
1423 | } else if (trf->technology == NFC_DIGITAL_RF_TECH_ISO15693) { |
1424 | iso_ctrl = trf->iso_ctrl & ~TRF7970A_ISO_CTRL_RFID_SPEED_MASK; | |
1425 | ||
1426 | switch (req[0] & ISO15693_REQ_FLAG_SPEED_MASK) { | |
1427 | case 0x00: | |
1428 | iso_ctrl |= TRF7970A_ISO_CTRL_15693_SGL_1OF4_662; | |
1429 | break; | |
1430 | case ISO15693_REQ_FLAG_SUB_CARRIER: | |
1431 | iso_ctrl |= TRF7970A_ISO_CTRL_15693_DBL_1OF4_667a; | |
1432 | break; | |
1433 | case ISO15693_REQ_FLAG_DATA_RATE: | |
1434 | iso_ctrl |= TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648; | |
1435 | break; | |
1436 | case (ISO15693_REQ_FLAG_SUB_CARRIER | | |
e2f0f671 | 1437 | ISO15693_REQ_FLAG_DATA_RATE): |
9d9304b3 MG |
1438 | iso_ctrl |= TRF7970A_ISO_CTRL_15693_DBL_1OF4_2669; |
1439 | break; | |
1440 | } | |
1441 | ||
1442 | if (iso_ctrl != trf->iso_ctrl) { | |
1443 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, iso_ctrl); | |
1444 | if (ret) | |
1445 | return ret; | |
1446 | ||
1447 | trf->iso_ctrl = iso_ctrl; | |
1448 | } | |
1449 | ||
a81d1ab3 MG |
1450 | if ((trf->framing == NFC_DIGITAL_FRAMING_ISO15693_T5T) && |
1451 | trf7970a_is_iso15693_write_or_lock(req[1]) && | |
1452 | (req[0] & ISO15693_REQ_FLAG_OPTION)) | |
1453 | trf->issue_eof = true; | |
165063f1 MG |
1454 | } |
1455 | ||
1456 | return 0; | |
1457 | } | |
1458 | ||
13b4272a | 1459 | static int trf7970a_send_cmd(struct nfc_digital_dev *ddev, |
e2f0f671 MG |
1460 | struct sk_buff *skb, u16 timeout, |
1461 | nfc_digital_cmd_complete_t cb, void *arg) | |
165063f1 MG |
1462 | { |
1463 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
7a1e5552 | 1464 | u8 prefix[5]; |
165063f1 MG |
1465 | unsigned int len; |
1466 | int ret; | |
aff0564a | 1467 | u8 status; |
165063f1 MG |
1468 | |
1469 | dev_dbg(trf->dev, "New request - state: %d, timeout: %d ms, len: %d\n", | |
e2f0f671 | 1470 | trf->state, timeout, skb->len); |
165063f1 MG |
1471 | |
1472 | if (skb->len > TRF7970A_TX_MAX) | |
1473 | return -EINVAL; | |
1474 | ||
1475 | mutex_lock(&trf->lock); | |
1476 | ||
1477 | if ((trf->state != TRF7970A_ST_IDLE) && | |
e2f0f671 | 1478 | (trf->state != TRF7970A_ST_IDLE_RX_BLOCKED)) { |
165063f1 | 1479 | dev_err(trf->dev, "%s - Bogus state: %d\n", __func__, |
e2f0f671 | 1480 | trf->state); |
165063f1 MG |
1481 | ret = -EIO; |
1482 | goto out_err; | |
1483 | } | |
1484 | ||
1485 | if (trf->aborting) { | |
1486 | dev_dbg(trf->dev, "Abort process complete\n"); | |
1487 | trf->aborting = false; | |
1488 | ret = -ECANCELED; | |
1489 | goto out_err; | |
1490 | } | |
1491 | ||
1961843c MG |
1492 | if (timeout) { |
1493 | trf->rx_skb = nfc_alloc_recv_skb(TRF7970A_RX_SKB_ALLOC_SIZE, | |
e2f0f671 | 1494 | GFP_KERNEL); |
1961843c MG |
1495 | if (!trf->rx_skb) { |
1496 | dev_dbg(trf->dev, "Can't alloc rx_skb\n"); | |
1497 | ret = -ENOMEM; | |
1498 | goto out_err; | |
1499 | } | |
165063f1 MG |
1500 | } |
1501 | ||
1502 | if (trf->state == TRF7970A_ST_IDLE_RX_BLOCKED) { | |
1503 | ret = trf7970a_cmd(trf, TRF7970A_CMD_ENABLE_RX); | |
1504 | if (ret) | |
1505 | goto out_err; | |
1506 | ||
1507 | trf->state = TRF7970A_ST_IDLE; | |
1508 | } | |
1509 | ||
13b4272a MG |
1510 | if (trf->is_initiator) { |
1511 | ret = trf7970a_per_cmd_config(trf, skb); | |
1512 | if (ret) | |
1513 | goto out_err; | |
1514 | } | |
165063f1 MG |
1515 | |
1516 | trf->ddev = ddev; | |
1517 | trf->tx_skb = skb; | |
1518 | trf->cb = cb; | |
1519 | trf->cb_arg = arg; | |
1520 | trf->timeout = timeout; | |
1521 | trf->ignore_timeout = false; | |
1522 | ||
1523 | len = skb->len; | |
165063f1 MG |
1524 | |
1525 | /* TX data must be prefixed with a FIFO reset cmd, a cmd that depends | |
1526 | * on what the current framing is, the address of the TX length byte 1 | |
1527 | * register (0x1d), and the 2 byte length of the data to be transmitted. | |
7a1e5552 | 1528 | * That totals 5 bytes. |
165063f1 MG |
1529 | */ |
1530 | prefix[0] = TRF7970A_CMD_BIT_CTRL | | |
e2f0f671 | 1531 | TRF7970A_CMD_BIT_OPCODE(TRF7970A_CMD_FIFO_RESET); |
165063f1 | 1532 | prefix[1] = TRF7970A_CMD_BIT_CTRL | |
e2f0f671 | 1533 | TRF7970A_CMD_BIT_OPCODE(trf->tx_cmd); |
165063f1 MG |
1534 | prefix[2] = TRF7970A_CMD_BIT_CONTINUOUS | TRF7970A_TX_LENGTH_BYTE1; |
1535 | ||
1536 | if (trf->framing == NFC_DIGITAL_FRAMING_NFCA_SHORT) { | |
1537 | prefix[3] = 0x00; | |
e2f0f671 | 1538 | prefix[4] = 0x0f; /* 7 bits */ |
165063f1 MG |
1539 | } else { |
1540 | prefix[3] = (len & 0xf00) >> 4; | |
1541 | prefix[3] |= ((len & 0xf0) >> 4); | |
1542 | prefix[4] = ((len & 0x0f) << 4); | |
1543 | } | |
1544 | ||
1545 | len = min_t(int, skb->len, TRF7970A_FIFO_SIZE); | |
1546 | ||
aff0564a MG |
1547 | /* Clear possible spurious interrupt */ |
1548 | ret = trf7970a_read_irqstatus(trf, &status); | |
1549 | if (ret) | |
1550 | goto out_err; | |
1551 | ||
7a1e5552 | 1552 | ret = trf7970a_transmit(trf, skb, len, prefix, sizeof(prefix)); |
165063f1 MG |
1553 | if (ret) { |
1554 | kfree_skb(trf->rx_skb); | |
1555 | trf->rx_skb = NULL; | |
1556 | } | |
1557 | ||
1558 | out_err: | |
1559 | mutex_unlock(&trf->lock); | |
1560 | return ret; | |
1561 | } | |
1562 | ||
13b4272a | 1563 | static int trf7970a_tg_config_rf_tech(struct trf7970a *trf, int tech) |
165063f1 | 1564 | { |
13b4272a MG |
1565 | int ret = 0; |
1566 | ||
1567 | dev_dbg(trf->dev, "rf technology: %d\n", tech); | |
1568 | ||
1569 | switch (tech) { | |
1570 | case NFC_DIGITAL_RF_TECH_106A: | |
1571 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE | | |
e2f0f671 | 1572 | TRF7970A_ISO_CTRL_NFC_CE | TRF7970A_ISO_CTRL_NFC_CE_14443A; |
837eb4d2 | 1573 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1574 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1575 | TRF7970A_MODULATOR_DEPTH_OOK; | |
13b4272a MG |
1576 | break; |
1577 | case NFC_DIGITAL_RF_TECH_212F: | |
1578 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE | | |
e2f0f671 | 1579 | TRF7970A_ISO_CTRL_NFC_NFCF_212; |
837eb4d2 | 1580 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1581 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1582 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
13b4272a MG |
1583 | break; |
1584 | case NFC_DIGITAL_RF_TECH_424F: | |
1585 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE | | |
e2f0f671 | 1586 | TRF7970A_ISO_CTRL_NFC_NFCF_424; |
837eb4d2 | 1587 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1588 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1589 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
13b4272a MG |
1590 | break; |
1591 | default: | |
1592 | dev_dbg(trf->dev, "Unsupported rf technology: %d\n", tech); | |
1593 | return -EINVAL; | |
1594 | } | |
1595 | ||
1596 | trf->technology = tech; | |
165063f1 | 1597 | |
13b4272a MG |
1598 | /* Normally we write the ISO_CTRL register in |
1599 | * trf7970a_tg_config_framing() because the framing can change | |
1600 | * the value written. However, when sending a PSL RES, | |
1601 | * digital_tg_send_psl_res_complete() doesn't call | |
1602 | * trf7970a_tg_config_framing() so we must write the register | |
1603 | * here. | |
1604 | */ | |
1605 | if ((trf->framing == NFC_DIGITAL_FRAMING_NFC_DEP_ACTIVATED) && | |
e2f0f671 | 1606 | (trf->iso_ctrl_tech != trf->iso_ctrl)) { |
13b4272a | 1607 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, |
e2f0f671 | 1608 | trf->iso_ctrl_tech); |
13b4272a MG |
1609 | |
1610 | trf->iso_ctrl = trf->iso_ctrl_tech; | |
1611 | } | |
165063f1 | 1612 | |
13b4272a | 1613 | return ret; |
165063f1 MG |
1614 | } |
1615 | ||
13b4272a MG |
1616 | /* Since this is a target routine, several of the framing calls are |
1617 | * made between receiving the request and sending the response so they | |
1618 | * should take effect until after the response is sent. This is accomplished | |
1619 | * by skipping the ISO_CTRL register write here and doing it in the interrupt | |
1620 | * handler. | |
1621 | */ | |
1622 | static int trf7970a_tg_config_framing(struct trf7970a *trf, int framing) | |
1623 | { | |
1624 | u8 iso_ctrl = trf->iso_ctrl_tech; | |
1625 | int ret; | |
1626 | ||
1627 | dev_dbg(trf->dev, "framing: %d\n", framing); | |
1628 | ||
1629 | switch (framing) { | |
1630 | case NFC_DIGITAL_FRAMING_NFCA_NFC_DEP: | |
1631 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT_NO_CRC; | |
1632 | iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N; | |
1633 | break; | |
1634 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD: | |
1635 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD_WITH_CRC_A: | |
1636 | case NFC_DIGITAL_FRAMING_NFCA_ANTICOL_COMPLETE: | |
1637 | /* These ones are applied in the interrupt handler */ | |
1638 | iso_ctrl = trf->iso_ctrl; /* Don't write to ISO_CTRL yet */ | |
1639 | break; | |
1640 | case NFC_DIGITAL_FRAMING_NFCF_NFC_DEP: | |
1641 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; | |
1642 | iso_ctrl &= ~TRF7970A_ISO_CTRL_RX_CRC_N; | |
1643 | break; | |
1644 | case NFC_DIGITAL_FRAMING_NFC_DEP_ACTIVATED: | |
1645 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; | |
1646 | iso_ctrl &= ~TRF7970A_ISO_CTRL_RX_CRC_N; | |
1647 | break; | |
1648 | default: | |
1649 | dev_dbg(trf->dev, "Unsupported Framing: %d\n", framing); | |
1650 | return -EINVAL; | |
1651 | } | |
1652 | ||
1653 | trf->framing = framing; | |
1654 | ||
1655 | if (iso_ctrl != trf->iso_ctrl) { | |
1656 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, iso_ctrl); | |
1657 | if (ret) | |
1658 | return ret; | |
1659 | ||
1660 | trf->iso_ctrl = iso_ctrl; | |
1661 | ||
1662 | ret = trf7970a_write(trf, TRF7970A_MODULATOR_SYS_CLK_CTRL, | |
e2f0f671 | 1663 | trf->modulator_sys_clk_ctrl); |
13b4272a MG |
1664 | if (ret) |
1665 | return ret; | |
1666 | } | |
1667 | ||
1668 | if (!(trf->chip_status_ctrl & TRF7970A_CHIP_STATUS_RF_ON)) { | |
1669 | ret = trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, | |
e2f0f671 MG |
1670 | trf->chip_status_ctrl | |
1671 | TRF7970A_CHIP_STATUS_RF_ON); | |
13b4272a MG |
1672 | if (ret) |
1673 | return ret; | |
1674 | ||
1675 | trf->chip_status_ctrl |= TRF7970A_CHIP_STATUS_RF_ON; | |
1676 | } | |
1677 | ||
1678 | return 0; | |
1679 | } | |
1680 | ||
1681 | static int trf7970a_tg_configure_hw(struct nfc_digital_dev *ddev, int type, | |
e2f0f671 | 1682 | int param) |
165063f1 MG |
1683 | { |
1684 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
13b4272a MG |
1685 | int ret; |
1686 | ||
1687 | dev_dbg(trf->dev, "Configure hw - type: %d, param: %d\n", type, param); | |
1688 | ||
1689 | mutex_lock(&trf->lock); | |
1690 | ||
1691 | trf->is_initiator = false; | |
165063f1 | 1692 | |
13b4272a | 1693 | if ((trf->state == TRF7970A_ST_PWR_OFF) || |
e2f0f671 | 1694 | (trf->state == TRF7970A_ST_RF_OFF)) { |
13b4272a MG |
1695 | ret = trf7970a_switch_rf_on(trf); |
1696 | if (ret) | |
1697 | goto err_unlock; | |
1698 | } | |
1699 | ||
1700 | switch (type) { | |
1701 | case NFC_DIGITAL_CONFIG_RF_TECH: | |
1702 | ret = trf7970a_tg_config_rf_tech(trf, param); | |
1703 | break; | |
1704 | case NFC_DIGITAL_CONFIG_FRAMING: | |
1705 | ret = trf7970a_tg_config_framing(trf, param); | |
1706 | break; | |
1707 | default: | |
1708 | dev_dbg(trf->dev, "Unknown type: %d\n", type); | |
1709 | ret = -EINVAL; | |
1710 | } | |
165063f1 | 1711 | |
13b4272a MG |
1712 | err_unlock: |
1713 | mutex_unlock(&trf->lock); | |
1714 | return ret; | |
165063f1 MG |
1715 | } |
1716 | ||
cb174aba | 1717 | static int _trf7970a_tg_listen(struct nfc_digital_dev *ddev, u16 timeout, |
e2f0f671 MG |
1718 | nfc_digital_cmd_complete_t cb, void *arg, |
1719 | bool mode_detect) | |
165063f1 MG |
1720 | { |
1721 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
13b4272a MG |
1722 | int ret; |
1723 | ||
13b4272a | 1724 | mutex_lock(&trf->lock); |
165063f1 | 1725 | |
13b4272a | 1726 | if ((trf->state != TRF7970A_ST_IDLE) && |
e2f0f671 | 1727 | (trf->state != TRF7970A_ST_IDLE_RX_BLOCKED)) { |
13b4272a | 1728 | dev_err(trf->dev, "%s - Bogus state: %d\n", __func__, |
e2f0f671 | 1729 | trf->state); |
13b4272a MG |
1730 | ret = -EIO; |
1731 | goto out_err; | |
1732 | } | |
1733 | ||
1734 | if (trf->aborting) { | |
1735 | dev_dbg(trf->dev, "Abort process complete\n"); | |
1736 | trf->aborting = false; | |
1737 | ret = -ECANCELED; | |
1738 | goto out_err; | |
1739 | } | |
1740 | ||
1741 | trf->rx_skb = nfc_alloc_recv_skb(TRF7970A_RX_SKB_ALLOC_SIZE, | |
e2f0f671 | 1742 | GFP_KERNEL); |
13b4272a MG |
1743 | if (!trf->rx_skb) { |
1744 | dev_dbg(trf->dev, "Can't alloc rx_skb\n"); | |
1745 | ret = -ENOMEM; | |
1746 | goto out_err; | |
1747 | } | |
1748 | ||
1749 | ret = trf7970a_write(trf, TRF7970A_RX_SPECIAL_SETTINGS, | |
e2f0f671 MG |
1750 | TRF7970A_RX_SPECIAL_SETTINGS_HBT | |
1751 | TRF7970A_RX_SPECIAL_SETTINGS_M848 | | |
1752 | TRF7970A_RX_SPECIAL_SETTINGS_C424 | | |
1753 | TRF7970A_RX_SPECIAL_SETTINGS_C212); | |
13b4272a | 1754 | if (ret) |
fc0ae243 | 1755 | goto out_err; |
13b4272a MG |
1756 | |
1757 | ret = trf7970a_write(trf, TRF7970A_REG_IO_CTRL, | |
e2f0f671 | 1758 | trf->io_ctrl | TRF7970A_REG_IO_CTRL_VRS(0x1)); |
13b4272a | 1759 | if (ret) |
fc0ae243 | 1760 | goto out_err; |
165063f1 | 1761 | |
13b4272a | 1762 | ret = trf7970a_write(trf, TRF7970A_NFC_LOW_FIELD_LEVEL, |
e2f0f671 | 1763 | TRF7970A_NFC_LOW_FIELD_LEVEL_RFDET(0x3)); |
13b4272a | 1764 | if (ret) |
fc0ae243 | 1765 | goto out_err; |
13b4272a MG |
1766 | |
1767 | ret = trf7970a_write(trf, TRF7970A_NFC_TARGET_LEVEL, | |
e2f0f671 | 1768 | TRF7970A_NFC_TARGET_LEVEL_RFDET(0x7)); |
13b4272a | 1769 | if (ret) |
fc0ae243 | 1770 | goto out_err; |
13b4272a MG |
1771 | |
1772 | trf->ddev = ddev; | |
1773 | trf->cb = cb; | |
1774 | trf->cb_arg = arg; | |
1775 | trf->timeout = timeout; | |
1776 | trf->ignore_timeout = false; | |
1777 | ||
1778 | ret = trf7970a_cmd(trf, TRF7970A_CMD_ENABLE_RX); | |
1779 | if (ret) | |
1780 | goto out_err; | |
1781 | ||
cb174aba MG |
1782 | trf->state = mode_detect ? TRF7970A_ST_LISTENING_MD : |
1783 | TRF7970A_ST_LISTENING; | |
13b4272a MG |
1784 | |
1785 | schedule_delayed_work(&trf->timeout_work, msecs_to_jiffies(timeout)); | |
1786 | ||
1787 | out_err: | |
1788 | mutex_unlock(&trf->lock); | |
1789 | return ret; | |
165063f1 MG |
1790 | } |
1791 | ||
cb174aba | 1792 | static int trf7970a_tg_listen(struct nfc_digital_dev *ddev, u16 timeout, |
e2f0f671 | 1793 | nfc_digital_cmd_complete_t cb, void *arg) |
cb174aba MG |
1794 | { |
1795 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
1796 | ||
1797 | dev_dbg(trf->dev, "Listen - state: %d, timeout: %d ms\n", | |
e2f0f671 | 1798 | trf->state, timeout); |
cb174aba MG |
1799 | |
1800 | return _trf7970a_tg_listen(ddev, timeout, cb, arg, false); | |
1801 | } | |
1802 | ||
1803 | static int trf7970a_tg_listen_md(struct nfc_digital_dev *ddev, | |
e2f0f671 MG |
1804 | u16 timeout, nfc_digital_cmd_complete_t cb, |
1805 | void *arg) | |
cb174aba MG |
1806 | { |
1807 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
1808 | int ret; | |
1809 | ||
1810 | dev_dbg(trf->dev, "Listen MD - state: %d, timeout: %d ms\n", | |
e2f0f671 | 1811 | trf->state, timeout); |
cb174aba MG |
1812 | |
1813 | ret = trf7970a_tg_configure_hw(ddev, NFC_DIGITAL_CONFIG_RF_TECH, | |
e2f0f671 | 1814 | NFC_DIGITAL_RF_TECH_106A); |
cb174aba MG |
1815 | if (ret) |
1816 | return ret; | |
1817 | ||
1818 | ret = trf7970a_tg_configure_hw(ddev, NFC_DIGITAL_CONFIG_FRAMING, | |
e2f0f671 | 1819 | NFC_DIGITAL_FRAMING_NFCA_NFC_DEP); |
cb174aba MG |
1820 | if (ret) |
1821 | return ret; | |
1822 | ||
1823 | return _trf7970a_tg_listen(ddev, timeout, cb, arg, true); | |
1824 | } | |
1825 | ||
1826 | static int trf7970a_tg_get_rf_tech(struct nfc_digital_dev *ddev, u8 *rf_tech) | |
1827 | { | |
1828 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
1829 | ||
1830 | dev_dbg(trf->dev, "Get RF Tech - state: %d, rf_tech: %d\n", | |
e2f0f671 | 1831 | trf->state, trf->md_rf_tech); |
cb174aba MG |
1832 | |
1833 | *rf_tech = trf->md_rf_tech; | |
1834 | ||
1835 | return 0; | |
1836 | } | |
1837 | ||
165063f1 MG |
1838 | static void trf7970a_abort_cmd(struct nfc_digital_dev *ddev) |
1839 | { | |
1840 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
1841 | ||
1842 | dev_dbg(trf->dev, "Abort process initiated\n"); | |
1843 | ||
1844 | mutex_lock(&trf->lock); | |
5876bc75 MG |
1845 | |
1846 | switch (trf->state) { | |
1847 | case TRF7970A_ST_WAIT_FOR_TX_FIFO: | |
1848 | case TRF7970A_ST_WAIT_FOR_RX_DATA: | |
1849 | case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT: | |
1850 | case TRF7970A_ST_WAIT_TO_ISSUE_EOF: | |
1851 | trf->aborting = true; | |
1852 | break; | |
13b4272a MG |
1853 | case TRF7970A_ST_LISTENING: |
1854 | trf->ignore_timeout = !cancel_delayed_work(&trf->timeout_work); | |
1855 | trf7970a_send_err_upstream(trf, -ECANCELED); | |
1856 | dev_dbg(trf->dev, "Abort process complete\n"); | |
1857 | break; | |
5876bc75 MG |
1858 | default: |
1859 | break; | |
1860 | } | |
1861 | ||
165063f1 MG |
1862 | mutex_unlock(&trf->lock); |
1863 | } | |
1864 | ||
1865 | static struct nfc_digital_ops trf7970a_nfc_ops = { | |
1866 | .in_configure_hw = trf7970a_in_configure_hw, | |
13b4272a | 1867 | .in_send_cmd = trf7970a_send_cmd, |
165063f1 | 1868 | .tg_configure_hw = trf7970a_tg_configure_hw, |
13b4272a | 1869 | .tg_send_cmd = trf7970a_send_cmd, |
165063f1 | 1870 | .tg_listen = trf7970a_tg_listen, |
cb174aba MG |
1871 | .tg_listen_md = trf7970a_tg_listen_md, |
1872 | .tg_get_rf_tech = trf7970a_tg_get_rf_tech, | |
165063f1 MG |
1873 | .switch_rf = trf7970a_switch_rf, |
1874 | .abort_cmd = trf7970a_abort_cmd, | |
1875 | }; | |
1876 | ||
ceccd6aa MG |
1877 | static int trf7970a_power_up(struct trf7970a *trf) |
1878 | { | |
1879 | int ret; | |
1880 | ||
1881 | dev_dbg(trf->dev, "Powering up - state: %d\n", trf->state); | |
1882 | ||
1883 | if (trf->state != TRF7970A_ST_PWR_OFF) | |
1884 | return 0; | |
1885 | ||
1886 | ret = regulator_enable(trf->regulator); | |
1887 | if (ret) { | |
1888 | dev_err(trf->dev, "%s - Can't enable VIN: %d\n", __func__, ret); | |
1889 | return ret; | |
1890 | } | |
1891 | ||
1892 | usleep_range(5000, 6000); | |
1893 | ||
d34e48d6 MG |
1894 | if (trf->en2_gpiod && |
1895 | !(trf->quirks & TRF7970A_QUIRK_EN2_MUST_STAY_LOW)) { | |
1896 | gpiod_set_value_cansleep(trf->en2_gpiod, 1); | |
1897 | usleep_range(1000, 2000); | |
ceccd6aa MG |
1898 | } |
1899 | ||
d34e48d6 | 1900 | gpiod_set_value_cansleep(trf->en_gpiod, 1); |
ceccd6aa MG |
1901 | |
1902 | usleep_range(20000, 21000); | |
1903 | ||
1904 | trf->state = TRF7970A_ST_RF_OFF; | |
1905 | ||
1906 | return 0; | |
1907 | } | |
1908 | ||
1909 | static int trf7970a_power_down(struct trf7970a *trf) | |
1910 | { | |
1911 | int ret; | |
1912 | ||
1913 | dev_dbg(trf->dev, "Powering down - state: %d\n", trf->state); | |
1914 | ||
1915 | if (trf->state == TRF7970A_ST_PWR_OFF) | |
1916 | return 0; | |
1917 | ||
1918 | if (trf->state != TRF7970A_ST_RF_OFF) { | |
1919 | dev_dbg(trf->dev, "Can't power down - not RF_OFF state (%d)\n", | |
e2f0f671 | 1920 | trf->state); |
ceccd6aa MG |
1921 | return -EBUSY; |
1922 | } | |
1923 | ||
d34e48d6 | 1924 | gpiod_set_value_cansleep(trf->en_gpiod, 0); |
67dec192 | 1925 | |
e2f0f671 | 1926 | if (trf->en2_gpiod && !(trf->quirks & TRF7970A_QUIRK_EN2_MUST_STAY_LOW)) |
d34e48d6 | 1927 | gpiod_set_value_cansleep(trf->en2_gpiod, 0); |
ceccd6aa MG |
1928 | |
1929 | ret = regulator_disable(trf->regulator); | |
1930 | if (ret) | |
1931 | dev_err(trf->dev, "%s - Can't disable VIN: %d\n", __func__, | |
e2f0f671 | 1932 | ret); |
ceccd6aa MG |
1933 | |
1934 | trf->state = TRF7970A_ST_PWR_OFF; | |
1935 | ||
1936 | return ret; | |
1937 | } | |
1938 | ||
b528281b MG |
1939 | static int trf7970a_startup(struct trf7970a *trf) |
1940 | { | |
1941 | int ret; | |
1942 | ||
1943 | ret = trf7970a_power_up(trf); | |
1944 | if (ret) | |
1945 | return ret; | |
1946 | ||
1947 | pm_runtime_set_active(trf->dev); | |
1948 | pm_runtime_enable(trf->dev); | |
1949 | pm_runtime_mark_last_busy(trf->dev); | |
1950 | ||
1951 | return 0; | |
1952 | } | |
1953 | ||
1954 | static void trf7970a_shutdown(struct trf7970a *trf) | |
1955 | { | |
1956 | switch (trf->state) { | |
1957 | case TRF7970A_ST_WAIT_FOR_TX_FIFO: | |
1958 | case TRF7970A_ST_WAIT_FOR_RX_DATA: | |
1959 | case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT: | |
1960 | case TRF7970A_ST_WAIT_TO_ISSUE_EOF: | |
13b4272a | 1961 | case TRF7970A_ST_LISTENING: |
b528281b MG |
1962 | trf7970a_send_err_upstream(trf, -ECANCELED); |
1963 | /* FALLTHROUGH */ | |
1964 | case TRF7970A_ST_IDLE: | |
1965 | case TRF7970A_ST_IDLE_RX_BLOCKED: | |
1966 | trf7970a_switch_rf_off(trf); | |
1967 | break; | |
1968 | default: | |
1969 | break; | |
1970 | } | |
1971 | ||
1972 | pm_runtime_disable(trf->dev); | |
1973 | pm_runtime_set_suspended(trf->dev); | |
1974 | ||
1975 | trf7970a_power_down(trf); | |
1976 | } | |
1977 | ||
fd0c8280 MG |
1978 | static int trf7970a_get_autosuspend_delay(struct device_node *np) |
1979 | { | |
1980 | int autosuspend_delay, ret; | |
1981 | ||
1982 | ret = of_property_read_u32(np, "autosuspend-delay", &autosuspend_delay); | |
1983 | if (ret) | |
1984 | autosuspend_delay = TRF7970A_AUTOSUSPEND_DELAY; | |
1985 | ||
fd0c8280 MG |
1986 | return autosuspend_delay; |
1987 | } | |
1988 | ||
165063f1 MG |
1989 | static int trf7970a_probe(struct spi_device *spi) |
1990 | { | |
1991 | struct device_node *np = spi->dev.of_node; | |
165063f1 | 1992 | struct trf7970a *trf; |
fd0c8280 | 1993 | int uvolts, autosuspend_delay, ret; |
837eb4d2 | 1994 | u32 clk_freq = TRF7970A_13MHZ_CLOCK_FREQUENCY; |
165063f1 MG |
1995 | |
1996 | if (!np) { | |
1997 | dev_err(&spi->dev, "No Device Tree entry\n"); | |
1998 | return -EINVAL; | |
1999 | } | |
2000 | ||
2001 | trf = devm_kzalloc(&spi->dev, sizeof(*trf), GFP_KERNEL); | |
2002 | if (!trf) | |
2003 | return -ENOMEM; | |
2004 | ||
ceccd6aa | 2005 | trf->state = TRF7970A_ST_PWR_OFF; |
165063f1 MG |
2006 | trf->dev = &spi->dev; |
2007 | trf->spi = spi; | |
165063f1 MG |
2008 | |
2009 | spi->mode = SPI_MODE_1; | |
2010 | spi->bits_per_word = 8; | |
2011 | ||
24707296 MG |
2012 | ret = spi_setup(spi); |
2013 | if (ret < 0) { | |
2014 | dev_err(trf->dev, "Can't set up SPI Communication\n"); | |
2015 | return ret; | |
2016 | } | |
2017 | ||
772079eb MG |
2018 | if (of_property_read_bool(np, "irq-status-read-quirk")) |
2019 | trf->quirks |= TRF7970A_QUIRK_IRQ_STATUS_READ; | |
2020 | ||
69f984f0 | 2021 | /* There are two enable pins - only EN must be present in the DT */ |
d34e48d6 MG |
2022 | trf->en_gpiod = devm_gpiod_get_index(trf->dev, "ti,enable", 0, |
2023 | GPIOD_OUT_LOW); | |
2024 | if (IS_ERR(trf->en_gpiod)) { | |
165063f1 | 2025 | dev_err(trf->dev, "No EN GPIO property\n"); |
d34e48d6 | 2026 | return PTR_ERR(trf->en_gpiod); |
165063f1 MG |
2027 | } |
2028 | ||
d34e48d6 MG |
2029 | trf->en2_gpiod = devm_gpiod_get_index_optional(trf->dev, "ti,enable", 1, |
2030 | GPIOD_OUT_LOW); | |
2031 | if (!trf->en2_gpiod) { | |
ce69b95c | 2032 | dev_info(trf->dev, "No EN2 GPIO property\n"); |
d34e48d6 MG |
2033 | } else if (IS_ERR(trf->en2_gpiod)) { |
2034 | dev_err(trf->dev, "Error getting EN2 GPIO property: %ld\n", | |
2035 | PTR_ERR(trf->en2_gpiod)); | |
2036 | return PTR_ERR(trf->en2_gpiod); | |
2037 | } else if (of_property_read_bool(np, "en2-rf-quirk")) { | |
2038 | trf->quirks |= TRF7970A_QUIRK_EN2_MUST_STAY_LOW; | |
165063f1 MG |
2039 | } |
2040 | ||
837eb4d2 | 2041 | of_property_read_u32(np, "clock-frequency", &clk_freq); |
e1038535 | 2042 | if ((clk_freq != TRF7970A_27MHZ_CLOCK_FREQUENCY) && |
e2f0f671 | 2043 | (clk_freq != TRF7970A_13MHZ_CLOCK_FREQUENCY)) { |
837eb4d2 | 2044 | dev_err(trf->dev, |
e2f0f671 | 2045 | "clock-frequency (%u Hz) unsupported\n", clk_freq); |
837eb4d2 GL |
2046 | return -EINVAL; |
2047 | } | |
2048 | ||
bd751808 GL |
2049 | if (clk_freq == TRF7970A_27MHZ_CLOCK_FREQUENCY) { |
2050 | trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_27MHZ; | |
2051 | dev_dbg(trf->dev, "trf7970a configured for 27MHz crystal\n"); | |
2052 | } else { | |
2053 | trf->modulator_sys_clk_ctrl = 0; | |
2054 | } | |
2055 | ||
165063f1 | 2056 | ret = devm_request_threaded_irq(trf->dev, spi->irq, NULL, |
e2f0f671 MG |
2057 | trf7970a_irq, |
2058 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, | |
2059 | "trf7970a", trf); | |
165063f1 MG |
2060 | if (ret) { |
2061 | dev_err(trf->dev, "Can't request IRQ#%d: %d\n", spi->irq, ret); | |
2062 | return ret; | |
2063 | } | |
2064 | ||
2065 | mutex_init(&trf->lock); | |
2066 | INIT_DELAYED_WORK(&trf->timeout_work, trf7970a_timeout_work_handler); | |
2067 | ||
2068 | trf->regulator = devm_regulator_get(&spi->dev, "vin"); | |
2069 | if (IS_ERR(trf->regulator)) { | |
2070 | ret = PTR_ERR(trf->regulator); | |
2071 | dev_err(trf->dev, "Can't get VIN regulator: %d\n", ret); | |
2072 | goto err_destroy_lock; | |
2073 | } | |
2074 | ||
2075 | ret = regulator_enable(trf->regulator); | |
2076 | if (ret) { | |
2077 | dev_err(trf->dev, "Can't enable VIN: %d\n", ret); | |
2078 | goto err_destroy_lock; | |
2079 | } | |
2080 | ||
a34631c2 | 2081 | uvolts = regulator_get_voltage(trf->regulator); |
ebcc5a0d MG |
2082 | if (uvolts > 4000000) |
2083 | trf->chip_status_ctrl = TRF7970A_CHIP_STATUS_VRS5_3; | |
2084 | ||
49d22c70 GL |
2085 | trf->regulator = devm_regulator_get(&spi->dev, "vdd-io"); |
2086 | if (IS_ERR(trf->regulator)) { | |
2087 | ret = PTR_ERR(trf->regulator); | |
2088 | dev_err(trf->dev, "Can't get VDD_IO regulator: %d\n", ret); | |
2089 | goto err_destroy_lock; | |
2090 | } | |
2091 | ||
2092 | ret = regulator_enable(trf->regulator); | |
2093 | if (ret) { | |
2094 | dev_err(trf->dev, "Can't enable VDD_IO: %d\n", ret); | |
2095 | goto err_destroy_lock; | |
2096 | } | |
2097 | ||
2098 | if (regulator_get_voltage(trf->regulator) == 1800000) { | |
2099 | trf->io_ctrl = TRF7970A_REG_IO_CTRL_IO_LOW; | |
2100 | dev_dbg(trf->dev, "trf7970a config vdd_io to 1.8V\n"); | |
2101 | } | |
2102 | ||
165063f1 | 2103 | trf->ddev = nfc_digital_allocate_device(&trf7970a_nfc_ops, |
e2f0f671 MG |
2104 | TRF7970A_SUPPORTED_PROTOCOLS, |
2105 | NFC_DIGITAL_DRV_CAPS_IN_CRC | | |
2106 | NFC_DIGITAL_DRV_CAPS_TG_CRC, 0, | |
2107 | 0); | |
165063f1 MG |
2108 | if (!trf->ddev) { |
2109 | dev_err(trf->dev, "Can't allocate NFC digital device\n"); | |
2110 | ret = -ENOMEM; | |
2111 | goto err_disable_regulator; | |
2112 | } | |
2113 | ||
2114 | nfc_digital_set_parent_dev(trf->ddev, trf->dev); | |
2115 | nfc_digital_set_drvdata(trf->ddev, trf); | |
2116 | spi_set_drvdata(spi, trf); | |
2117 | ||
fd0c8280 MG |
2118 | autosuspend_delay = trf7970a_get_autosuspend_delay(np); |
2119 | ||
2120 | pm_runtime_set_autosuspend_delay(trf->dev, autosuspend_delay); | |
e6403b7c | 2121 | pm_runtime_use_autosuspend(trf->dev); |
ceccd6aa | 2122 | |
b528281b | 2123 | ret = trf7970a_startup(trf); |
ceccd6aa MG |
2124 | if (ret) |
2125 | goto err_free_ddev; | |
2126 | ||
165063f1 MG |
2127 | ret = nfc_digital_register_device(trf->ddev); |
2128 | if (ret) { | |
2129 | dev_err(trf->dev, "Can't register NFC digital device: %d\n", | |
e2f0f671 | 2130 | ret); |
b528281b | 2131 | goto err_shutdown; |
165063f1 MG |
2132 | } |
2133 | ||
2134 | return 0; | |
2135 | ||
b528281b MG |
2136 | err_shutdown: |
2137 | trf7970a_shutdown(trf); | |
ceccd6aa | 2138 | err_free_ddev: |
165063f1 MG |
2139 | nfc_digital_free_device(trf->ddev); |
2140 | err_disable_regulator: | |
2141 | regulator_disable(trf->regulator); | |
2142 | err_destroy_lock: | |
2143 | mutex_destroy(&trf->lock); | |
2144 | return ret; | |
2145 | } | |
2146 | ||
2147 | static int trf7970a_remove(struct spi_device *spi) | |
2148 | { | |
2149 | struct trf7970a *trf = spi_get_drvdata(spi); | |
2150 | ||
2151 | mutex_lock(&trf->lock); | |
2152 | ||
b528281b | 2153 | trf7970a_shutdown(trf); |
ceccd6aa MG |
2154 | |
2155 | mutex_unlock(&trf->lock); | |
e6403b7c | 2156 | |
165063f1 MG |
2157 | nfc_digital_unregister_device(trf->ddev); |
2158 | nfc_digital_free_device(trf->ddev); | |
2159 | ||
2160 | regulator_disable(trf->regulator); | |
2161 | ||
2162 | mutex_destroy(&trf->lock); | |
2163 | ||
2164 | return 0; | |
2165 | } | |
2166 | ||
77c9539d MG |
2167 | #ifdef CONFIG_PM_SLEEP |
2168 | static int trf7970a_suspend(struct device *dev) | |
2169 | { | |
88e2ce01 | 2170 | struct spi_device *spi = to_spi_device(dev); |
77c9539d | 2171 | struct trf7970a *trf = spi_get_drvdata(spi); |
77c9539d MG |
2172 | |
2173 | dev_dbg(dev, "Suspend\n"); | |
2174 | ||
2175 | mutex_lock(&trf->lock); | |
2176 | ||
2177 | trf7970a_shutdown(trf); | |
2178 | ||
2179 | mutex_unlock(&trf->lock); | |
2180 | ||
671970f5 | 2181 | return 0; |
77c9539d MG |
2182 | } |
2183 | ||
2184 | static int trf7970a_resume(struct device *dev) | |
2185 | { | |
88e2ce01 | 2186 | struct spi_device *spi = to_spi_device(dev); |
77c9539d | 2187 | struct trf7970a *trf = spi_get_drvdata(spi); |
55ef2e75 | 2188 | int ret; |
77c9539d MG |
2189 | |
2190 | dev_dbg(dev, "Resume\n"); | |
2191 | ||
2192 | mutex_lock(&trf->lock); | |
2193 | ||
2194 | ret = trf7970a_startup(trf); | |
2195 | ||
2196 | mutex_unlock(&trf->lock); | |
2197 | ||
2198 | return ret; | |
2199 | } | |
2200 | #endif | |
2201 | ||
e8a9235c | 2202 | #ifdef CONFIG_PM |
e6403b7c MG |
2203 | static int trf7970a_pm_runtime_suspend(struct device *dev) |
2204 | { | |
88e2ce01 | 2205 | struct spi_device *spi = to_spi_device(dev); |
e6403b7c MG |
2206 | struct trf7970a *trf = spi_get_drvdata(spi); |
2207 | int ret; | |
2208 | ||
2209 | dev_dbg(dev, "Runtime suspend\n"); | |
2210 | ||
ceccd6aa | 2211 | mutex_lock(&trf->lock); |
e6403b7c | 2212 | |
ceccd6aa | 2213 | ret = trf7970a_power_down(trf); |
e6403b7c | 2214 | |
ceccd6aa | 2215 | mutex_unlock(&trf->lock); |
e6403b7c MG |
2216 | |
2217 | return ret; | |
2218 | } | |
2219 | ||
2220 | static int trf7970a_pm_runtime_resume(struct device *dev) | |
2221 | { | |
88e2ce01 | 2222 | struct spi_device *spi = to_spi_device(dev); |
e6403b7c MG |
2223 | struct trf7970a *trf = spi_get_drvdata(spi); |
2224 | int ret; | |
2225 | ||
2226 | dev_dbg(dev, "Runtime resume\n"); | |
2227 | ||
ceccd6aa MG |
2228 | ret = trf7970a_power_up(trf); |
2229 | if (!ret) | |
2230 | pm_runtime_mark_last_busy(dev); | |
e6403b7c | 2231 | |
ceccd6aa | 2232 | return ret; |
e6403b7c MG |
2233 | } |
2234 | #endif | |
2235 | ||
2236 | static const struct dev_pm_ops trf7970a_pm_ops = { | |
77c9539d | 2237 | SET_SYSTEM_SLEEP_PM_OPS(trf7970a_suspend, trf7970a_resume) |
e6403b7c | 2238 | SET_RUNTIME_PM_OPS(trf7970a_pm_runtime_suspend, |
e2f0f671 | 2239 | trf7970a_pm_runtime_resume, NULL) |
e6403b7c MG |
2240 | }; |
2241 | ||
3c39c1a5 | 2242 | static const struct of_device_id trf7970a_of_match[] = { |
e2f0f671 | 2243 | {.compatible = "ti,trf7970a",}, |
fcc652f6 | 2244 | {}, |
3c39c1a5 | 2245 | }; |
e2f0f671 | 2246 | |
3c39c1a5 JMC |
2247 | MODULE_DEVICE_TABLE(of, trf7970a_of_match); |
2248 | ||
165063f1 | 2249 | static const struct spi_device_id trf7970a_id_table[] = { |
e2f0f671 MG |
2250 | {"trf7970a", 0}, |
2251 | {} | |
165063f1 | 2252 | }; |
e2f0f671 | 2253 | |
165063f1 MG |
2254 | MODULE_DEVICE_TABLE(spi, trf7970a_id_table); |
2255 | ||
2256 | static struct spi_driver trf7970a_spi_driver = { | |
2257 | .probe = trf7970a_probe, | |
2258 | .remove = trf7970a_remove, | |
2259 | .id_table = trf7970a_id_table, | |
e2f0f671 MG |
2260 | .driver = { |
2261 | .name = "trf7970a", | |
2262 | .of_match_table = of_match_ptr(trf7970a_of_match), | |
2263 | .pm = &trf7970a_pm_ops, | |
165063f1 MG |
2264 | }, |
2265 | }; | |
2266 | ||
2267 | module_spi_driver(trf7970a_spi_driver); | |
2268 | ||
2269 | MODULE_AUTHOR("Mark A. Greer <mgreer@animalcreek.com>"); | |
2270 | MODULE_LICENSE("GPL v2"); | |
2271 | MODULE_DESCRIPTION("TI trf7970a RFID/NFC Transceiver Driver"); |