[linux-2.6-block.git] / drivers / net / wireless / wl12xx / rx.c

/*
 * This file is part of wl1271
 *
 * Copyright (C) 2009 Nokia Corporation
 *
 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/gfp.h>
#include <linux/sched.h>

#include "wl12xx.h"
#include "debug.h"
#include "acx.h"
#include "reg.h"
#include "rx.h"
#include "tx.h"
#include "io.h"

static u8 wl12xx_rx_get_mem_block(struct wl12xx_fw_status *status,
				  u32 drv_rx_counter)
{
	return le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
		RX_MEM_BLOCK_MASK;
}

static u32 wl12xx_rx_get_buf_size(struct wl12xx_fw_status *status,
				 u32 drv_rx_counter)
{
	return (le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
		RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV;
}

static bool wl12xx_rx_get_unaligned(struct wl12xx_fw_status *status,
				    u32 drv_rx_counter)
{
	/* Convert the value to bool */
	return !!(le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
		RX_BUF_UNALIGNED_PAYLOAD);
}

static void wl1271_rx_status(struct wl1271 *wl,
			     struct wl1271_rx_descriptor *desc,
			     struct ieee80211_rx_status *status,
			     u8 beacon)
{
	memset(status, 0, sizeof(struct ieee80211_rx_status));

	if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG)
		status->band = IEEE80211_BAND_2GHZ;
	else
		status->band = IEEE80211_BAND_5GHZ;

	status->rate_idx = wl1271_rate_to_idx(desc->rate, status->band);

	/* 11n support */
	if (desc->rate <= CONF_HW_RXTX_RATE_MCS0)
		status->flag |= RX_FLAG_HT;

	status->signal = desc->rssi;

	/*
	 * FIXME: In wl1251, the SNR should be divided by two.  In wl1271 we
	 * need to divide by two for now, but TI has been discussing about
	 * changing it.  This needs to be rechecked.
	 */
	wl->noise = desc->rssi - (desc->snr >> 1);

	status->freq = ieee80211_channel_to_frequency(desc->channel,
						      status->band);

	if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
		u8 desc_err_code = desc->status & WL1271_RX_DESC_STATUS_MASK;

		status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED |
				RX_FLAG_DECRYPTED;

		if (unlikely(desc_err_code == WL1271_RX_DESC_MIC_FAIL)) {
			status->flag |= RX_FLAG_MMIC_ERROR;
			wl1271_warning("Michael MIC error");
		}
	}
}

static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
				 bool unaligned, u8 *hlid)
{
	struct wl1271_rx_descriptor *desc;
	struct sk_buff *skb;
	struct ieee80211_hdr *hdr;
	u8 *buf;
	u8 beacon = 0;
	u8 is_data = 0;
	u8 reserved = unaligned ? NET_IP_ALIGN : 0;
	u16 seq_num;

	/*
	 * In PLT mode we seem to get frames and mac80211 warns about them,
	 * workaround this by not retrieving them at all.
	 */
	if (unlikely(wl->plt))
		return -EINVAL;

	/* the data read starts with the descriptor */
	desc = (struct wl1271_rx_descriptor *) data;

	if (desc->packet_class == WL12XX_RX_CLASS_LOGGER) {
		size_t len = length - sizeof(*desc);
		wl12xx_copy_fwlog(wl, data + sizeof(*desc), len);
		wake_up_interruptible(&wl->fwlog_waitq);
		return 0;
	}

	switch (desc->status & WL1271_RX_DESC_STATUS_MASK) {
	/* discard corrupted packets */
	case WL1271_RX_DESC_DRIVER_RX_Q_FAIL:
	case WL1271_RX_DESC_DECRYPT_FAIL:
		wl1271_warning("corrupted packet in RX with status: 0x%x",
			       desc->status & WL1271_RX_DESC_STATUS_MASK);
		return -EINVAL;
	case WL1271_RX_DESC_SUCCESS:
	case WL1271_RX_DESC_MIC_FAIL:
		break;
	default:
		wl1271_error("invalid RX descriptor status: 0x%x",
			     desc->status & WL1271_RX_DESC_STATUS_MASK);
		return -EINVAL;
	}

	/* skb length not included rx descriptor */
	skb = __dev_alloc_skb(length + reserved - sizeof(*desc), GFP_KERNEL);
	if (!skb) {
		wl1271_error("Couldn't allocate RX frame");
		return -ENOMEM;
	}

	/* reserve the unaligned payload(if any) */
	skb_reserve(skb, reserved);

	buf = skb_put(skb, length - sizeof(*desc));

	/*
	 * Copy packets from aggregation buffer to the skbs without rx
	 * descriptor and with packet payload aligned care. In case of unaligned
	 * packets copy the packets in offset of 2 bytes guarantee IP header
	 * payload aligned to 4 bytes.
	 */
	memcpy(buf, data + sizeof(*desc), length - sizeof(*desc));
	*hlid = desc->hlid;

	hdr = (struct ieee80211_hdr *)skb->data;
	if (ieee80211_is_beacon(hdr->frame_control))
		beacon = 1;
	if (ieee80211_is_data_present(hdr->frame_control))
		is_data = 1;

	wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);

	seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
	wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d hlid %d", skb,
		     skb->len - desc->pad_len,
		     beacon ? "beacon" : "",
		     seq_num, *hlid);

	skb_trim(skb, skb->len - desc->pad_len);

	skb_queue_tail(&wl->deferred_rx_queue, skb);
	queue_work(wl->freezable_wq, &wl->netstack_work);

	return is_data;
}

void wl12xx_rx(struct wl1271 *wl, struct wl12xx_fw_status *status)
{
	struct wl1271_acx_mem_map *wl_mem_map = wl->target_mem_map;
	unsigned long active_hlids[BITS_TO_LONGS(WL12XX_MAX_LINKS)] = {0};
	u32 buf_size;
	u32 fw_rx_counter  = status->fw_rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
	u32 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
	u32 rx_counter;
	u32 mem_block;
	u32 pkt_length;
	u32 pkt_offset;
	u8 hlid;
	bool unaligned = false;

	while (drv_rx_counter != fw_rx_counter) {
		buf_size = 0;
		rx_counter = drv_rx_counter;
		while (rx_counter != fw_rx_counter) {
			pkt_length = wl12xx_rx_get_buf_size(status, rx_counter);
			if (buf_size + pkt_length > WL1271_AGGR_BUFFER_SIZE)
				break;
			buf_size += pkt_length;
			rx_counter++;
			rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
		}

		if (buf_size == 0) {
			wl1271_warning("received empty data");
			break;
		}

		if (wl->chip.id != CHIP_ID_1283_PG20) {
			/*
			 * Choose the block we want to read
			 * For aggregated packets, only the first memory block
			 * should be retrieved. The FW takes care of the rest.
			 */
			mem_block = wl12xx_rx_get_mem_block(status,
							    drv_rx_counter);

			wl->rx_mem_pool_addr.addr = (mem_block << 8) +
			   le32_to_cpu(wl_mem_map->packet_memory_pool_start);

			wl->rx_mem_pool_addr.addr_extra =
				wl->rx_mem_pool_addr.addr + 4;

			wl1271_write(wl, WL1271_SLV_REG_DATA,
				     &wl->rx_mem_pool_addr,
				     sizeof(wl->rx_mem_pool_addr), false);
		}

		/* Read all available packets at once */
		wl1271_read(wl, WL1271_SLV_MEM_DATA, wl->aggr_buf,
				buf_size, true);

		/* Split data into separate packets */
		pkt_offset = 0;
		while (pkt_offset < buf_size) {
			pkt_length = wl12xx_rx_get_buf_size(status,
					drv_rx_counter);

			unaligned = wl12xx_rx_get_unaligned(status,
					drv_rx_counter);

			/*
			 * the handle data call can only fail in memory-outage
			 * conditions, in that case the received frame will just
			 * be dropped.
			 */
			if (wl1271_rx_handle_data(wl,
						  wl->aggr_buf + pkt_offset,
						  pkt_length, unaligned,
						  &hlid) == 1) {
				if (hlid < WL12XX_MAX_LINKS)
					__set_bit(hlid, active_hlids);
				else
					WARN(1,
					     "hlid exceeded WL12XX_MAX_LINKS "
					     "(%d)\n", hlid);
			}

			wl->rx_counter++;
			drv_rx_counter++;
			drv_rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
			pkt_offset += pkt_length;
		}
	}

	/*
	 * Write the driver's packet counter to the FW. This is only required
	 * for older hardware revisions
	 */
	if (wl->quirks & WL12XX_QUIRK_END_OF_TRANSACTION)
		wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl->rx_counter);

	wl12xx_rearm_rx_streaming(wl, active_hlids);
}
Commit	Line	Data
f5fc0f86 LC	1	/*
	2	* This file is part of wl1271
	3	*
	4	* Copyright (C) 2009 Nokia Corporation
	5	*
	6	* Contact: Luciano Coelho <luciano.coelho@nokia.com>
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	*/
	23
5a0e3ad6	24	#include <linux/gfp.h>
95dac04f	25	#include <linux/sched.h>
5a0e3ad6	26
00d20100	27	#include "wl12xx.h"
0f4e3122	28	#include "debug.h"
00d20100 SL	29	#include "acx.h"
	30	#include "reg.h"
	31	#include "rx.h"
9eb599e9	32	#include "tx.h"
00d20100	33	#include "io.h"
f5fc0f86	34
4d56ad9c	35	static u8 wl12xx_rx_get_mem_block(struct wl12xx_fw_status *status,
f5fc0f86 LC	36	u32 drv_rx_counter)
f5fc0f86 LC	37	{
d0f63b20 LC	38	return le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
d0f63b20 LC	39	RX_MEM_BLOCK_MASK;
f5fc0f86 LC	40	}
f5fc0f86 LC	41
4d56ad9c EP	42	static u32 wl12xx_rx_get_buf_size(struct wl12xx_fw_status *status,
4d56ad9c EP	43	u32 drv_rx_counter)
f5fc0f86	44	{
d0f63b20 LC	45	return (le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
d0f63b20 LC	46	RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV;
f5fc0f86 LC	47	}
f5fc0f86 LC	48
4d56ad9c	49	static bool wl12xx_rx_get_unaligned(struct wl12xx_fw_status *status,
0a1d3abc SL	50	u32 drv_rx_counter)
	51	{
	52	/* Convert the value to bool */
	53	return !!(le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
	54	RX_BUF_UNALIGNED_PAYLOAD);
	55	}
	56
f5fc0f86 LC	57	static void wl1271_rx_status(struct wl1271 *wl,
	58	struct wl1271_rx_descriptor *desc,
	59	struct ieee80211_rx_status *status,
	60	u8 beacon)
	61	{
	62	memset(status, 0, sizeof(struct ieee80211_rx_status));
	63
6a2de93b	64	if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG)
0af0467f	65	status->band = IEEE80211_BAND_2GHZ;
6a2de93b	66	else
0af0467f	67	status->band = IEEE80211_BAND_5GHZ;
6a2de93b	68
0af0467f	69	status->rate_idx = wl1271_rate_to_idx(desc->rate, status->band);
a4102645	70
18357850 SL	71	/* 11n support */
	72	if (desc->rate <= CONF_HW_RXTX_RATE_MCS0)
	73	status->flag \|= RX_FLAG_HT;
18357850	74
f5fc0f86 LC	75	status->signal = desc->rssi;
f5fc0f86 LC	76
ece550d0 JL	77	/*
	78	* FIXME: In wl1251, the SNR should be divided by two. In wl1271 we
	79	* need to divide by two for now, but TI has been discussing about
	80	* changing it. This needs to be rechecked.
	81	*/
	82	wl->noise = desc->rssi - (desc->snr >> 1);
	83
0af0467f JO	84	status->freq = ieee80211_channel_to_frequency(desc->channel,
0af0467f JO	85	status->band);
f5fc0f86 LC	86
f5fc0f86 LC	87	if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
34c8e3d2	88	u8 desc_err_code = desc->status & WL1271_RX_DESC_STATUS_MASK;
f5fc0f86	89
34c8e3d2 AN	90	status->flag \|= RX_FLAG_IV_STRIPPED \| RX_FLAG_MMIC_STRIPPED \|
	91	RX_FLAG_DECRYPTED;
	92
	93	if (unlikely(desc_err_code == WL1271_RX_DESC_MIC_FAIL)) {
5d07b668	94	status->flag \|= RX_FLAG_MMIC_ERROR;
34c8e3d2 AN	95	wl1271_warning("Michael MIC error");
34c8e3d2 AN	96	}
f5fc0f86	97	}
f5fc0f86 LC	98	}
f5fc0f86 LC	99
0a1d3abc	100	static int wl1271_rx_handle_data(struct wl1271 wl, u8 data, u32 length,
9eb599e9	101	bool unaligned, u8 *hlid)
f5fc0f86	102	{
f5fc0f86 LC	103	struct wl1271_rx_descriptor *desc;
f5fc0f86 LC	104	struct sk_buff *skb;
92fe9b5f	105	struct ieee80211_hdr *hdr;
f5fc0f86 LC	106	u8 *buf;
f5fc0f86 LC	107	u8 beacon = 0;
77ddaa10	108	u8 is_data = 0;
0a1d3abc	109	u8 reserved = unaligned ? NET_IP_ALIGN : 0;
5c472148	110	u16 seq_num;
f5fc0f86	111
93c5bb68 KV	112	/*
	113	* In PLT mode we seem to get frames and mac80211 warns about them,
	114	* workaround this by not retrieving them at all.
	115	*/
3fcdab70	116	if (unlikely(wl->plt))
1f37cbc9	117	return -EINVAL;
93c5bb68	118
34c8e3d2 AN	119	/* the data read starts with the descriptor */
	120	desc = (struct wl1271_rx_descriptor *) data;
	121
95dac04f IY	122	if (desc->packet_class == WL12XX_RX_CLASS_LOGGER) {
	123	size_t len = length - sizeof(*desc);
	124	wl12xx_copy_fwlog(wl, data + sizeof(*desc), len);
	125	wake_up_interruptible(&wl->fwlog_waitq);
	126	return 0;
	127	}
	128
34c8e3d2 AN	129	switch (desc->status & WL1271_RX_DESC_STATUS_MASK) {
	130	/* discard corrupted packets */
	131	case WL1271_RX_DESC_DRIVER_RX_Q_FAIL:
	132	case WL1271_RX_DESC_DECRYPT_FAIL:
	133	wl1271_warning("corrupted packet in RX with status: 0x%x",
	134	desc->status & WL1271_RX_DESC_STATUS_MASK);
	135	return -EINVAL;
	136	case WL1271_RX_DESC_SUCCESS:
	137	case WL1271_RX_DESC_MIC_FAIL:
	138	break;
	139	default:
	140	wl1271_error("invalid RX descriptor status: 0x%x",
	141	desc->status & WL1271_RX_DESC_STATUS_MASK);
	142	return -EINVAL;
	143	}
	144
0a1d3abc SL	145	/* skb length not included rx descriptor */
0a1d3abc SL	146	skb = __dev_alloc_skb(length + reserved - sizeof(*desc), GFP_KERNEL);
f5fc0f86 LC	147	if (!skb) {
f5fc0f86 LC	148	wl1271_error("Couldn't allocate RX frame");
1f37cbc9	149	return -ENOMEM;
f5fc0f86 LC	150	}
f5fc0f86 LC	151
0a1d3abc SL	152	/* reserve the unaligned payload(if any) */
	153	skb_reserve(skb, reserved);
	154
	155	buf = skb_put(skb, length - sizeof(*desc));
f5fc0f86	156
0a1d3abc SL	157	/*
	158	* Copy packets from aggregation buffer to the skbs without rx
	159	* descriptor and with packet payload aligned care. In case of unaligned
	160	* packets copy the packets in offset of 2 bytes guarantee IP header
	161	* payload aligned to 4 bytes.
	162	*/
	163	memcpy(buf, data + sizeof(desc), length - sizeof(desc));
9eb599e9	164	*hlid = desc->hlid;
f5fc0f86	165
92fe9b5f EP	166	hdr = (struct ieee80211_hdr *)skb->data;
92fe9b5f EP	167	if (ieee80211_is_beacon(hdr->frame_control))
f5fc0f86	168	beacon = 1;
77ddaa10 EP	169	if (ieee80211_is_data_present(hdr->frame_control))
77ddaa10 EP	170	is_data = 1;
f5fc0f86	171
58be4607	172	wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);
f5fc0f86	173
5c472148	174	seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
9eb599e9	175	wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d hlid %d", skb,
a20a5b7e	176	skb->len - desc->pad_len,
5c472148	177	beacon ? "beacon" : "",
9eb599e9	178	seq_num, *hlid);
f5fc0f86	179
b9f2e39d JO	180	skb_trim(skb, skb->len - desc->pad_len);
b9f2e39d JO	181
a620865e	182	skb_queue_tail(&wl->deferred_rx_queue, skb);
92ef8960	183	queue_work(wl->freezable_wq, &wl->netstack_work);
1f37cbc9	184
77ddaa10	185	return is_data;
f5fc0f86 LC	186	}
f5fc0f86 LC	187
4d56ad9c	188	void wl12xx_rx(struct wl1271 wl, struct wl12xx_fw_status status)
f5fc0f86 LC	189	{
f5fc0f86 LC	190	struct wl1271_acx_mem_map *wl_mem_map = wl->target_mem_map;
9eb599e9	191	unsigned long active_hlids[BITS_TO_LONGS(WL12XX_MAX_LINKS)] = {0};
f5fc0f86 LC	192	u32 buf_size;
	193	u32 fw_rx_counter = status->fw_rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
	194	u32 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
1f37cbc9	195	u32 rx_counter;
f5fc0f86	196	u32 mem_block;
1f37cbc9 IY	197	u32 pkt_length;
1f37cbc9 IY	198	u32 pkt_offset;
9eb599e9	199	u8 hlid;
0a1d3abc	200	bool unaligned = false;
f5fc0f86 LC	201
f5fc0f86 LC	202	while (drv_rx_counter != fw_rx_counter) {
1f37cbc9 IY	203	buf_size = 0;
	204	rx_counter = drv_rx_counter;
	205	while (rx_counter != fw_rx_counter) {
4d56ad9c	206	pkt_length = wl12xx_rx_get_buf_size(status, rx_counter);
1f37cbc9 IY	207	if (buf_size + pkt_length > WL1271_AGGR_BUFFER_SIZE)
	208	break;
	209	buf_size += pkt_length;
	210	rx_counter++;
	211	rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
	212	}
f5fc0f86 LC	213
	214	if (buf_size == 0) {
	215	wl1271_warning("received empty data");
	216	break;
	217	}
	218
ae77eccf SL	219	if (wl->chip.id != CHIP_ID_1283_PG20) {
	220	/*
	221	* Choose the block we want to read
	222	* For aggregated packets, only the first memory block
	223	* should be retrieved. The FW takes care of the rest.
	224	*/
4d56ad9c	225	mem_block = wl12xx_rx_get_mem_block(status,
ae77eccf SL	226	drv_rx_counter);
	227
	228	wl->rx_mem_pool_addr.addr = (mem_block << 8) +
	229	le32_to_cpu(wl_mem_map->packet_memory_pool_start);
	230
	231	wl->rx_mem_pool_addr.addr_extra =
	232	wl->rx_mem_pool_addr.addr + 4;
	233
	234	wl1271_write(wl, WL1271_SLV_REG_DATA,
	235	&wl->rx_mem_pool_addr,
	236	sizeof(wl->rx_mem_pool_addr), false);
	237	}
1f37cbc9 IY	238
	239	/* Read all available packets at once */
	240	wl1271_read(wl, WL1271_SLV_MEM_DATA, wl->aggr_buf,
	241	buf_size, true);
	242
	243	/* Split data into separate packets */
	244	pkt_offset = 0;
	245	while (pkt_offset < buf_size) {
4d56ad9c	246	pkt_length = wl12xx_rx_get_buf_size(status,
1f37cbc9	247	drv_rx_counter);
0a1d3abc	248
4d56ad9c	249	unaligned = wl12xx_rx_get_unaligned(status,
0a1d3abc SL	250	drv_rx_counter);
0a1d3abc SL	251
fb2382c7 JO	252	/*
	253	* the handle data call can only fail in memory-outage
	254	* conditions, in that case the received frame will just
	255	* be dropped.
	256	*/
77ddaa10 EP	257	if (wl1271_rx_handle_data(wl,
77ddaa10 EP	258	wl->aggr_buf + pkt_offset,
9eb599e9 EP	259	pkt_length, unaligned,
9eb599e9 EP	260	&hlid) == 1) {
f414218e LC	261	if (hlid < WL12XX_MAX_LINKS)
	262	__set_bit(hlid, active_hlids);
	263	else
	264	WARN(1,
	265	"hlid exceeded WL12XX_MAX_LINKS "
	266	"(%d)\n", hlid);
9eb599e9	267	}
77ddaa10	268
1f37cbc9 IY	269	wl->rx_counter++;
	270	drv_rx_counter++;
	271	drv_rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
	272	pkt_offset += pkt_length;
	273	}
f5fc0f86	274	}
606ea9fa IY	275
	276	/*
	277	* Write the driver's packet counter to the FW. This is only required
	278	* for older hardware revisions
	279	*/
	280	if (wl->quirks & WL12XX_QUIRK_END_OF_TRANSACTION)
	281	wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl->rx_counter);
77ddaa10	282
9eb599e9	283	wl12xx_rearm_rx_streaming(wl, active_hlids);
f5fc0f86	284	}