[linux-2.6-block.git] / drivers / net / wireless / wl12xx / ini.h

/*
 * This file is part of wl1271
 *
 * Copyright (C) 2010 Nokia Corporation
 *
 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#ifndef __INI_H__
#define __INI_H__

#define GENERAL_SETTINGS_DRPW_LPD 0xc0
#define SCRATCH_ENABLE_LPD        BIT(25)

#define WL1271_INI_MAX_SMART_REFLEX_PARAM 16

struct wl1271_ini_general_params {
	u8 ref_clock;
	u8 settling_time;
	u8 clk_valid_on_wakeup;
	u8 dc2dc_mode;
	u8 dual_mode_select;
	u8 tx_bip_fem_auto_detect;
	u8 tx_bip_fem_manufacturer;
	u8 general_settings;
	u8 sr_state;
	u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
	u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
	u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
} __packed;

#define WL128X_INI_MAX_SETTINGS_PARAM 4

struct wl128x_ini_general_params {
	u8 ref_clock;
	u8 settling_time;
	u8 clk_valid_on_wakeup;
	u8 tcxo_ref_clock;
	u8 tcxo_settling_time;
	u8 tcxo_valid_on_wakeup;
	u8 tcxo_ldo_voltage;
	u8 xtal_itrim_val;
	u8 platform_conf;
	u8 dual_mode_select;
	u8 tx_bip_fem_auto_detect;
	u8 tx_bip_fem_manufacturer;
	u8 general_settings[WL128X_INI_MAX_SETTINGS_PARAM];
	u8 sr_state;
	u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
	u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
	u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
} __packed;

#define WL1271_INI_RSSI_PROCESS_COMPENS_SIZE 15

struct wl1271_ini_band_params_2 {
	u8 rx_trace_insertion_loss;
	u8 tx_trace_loss;
	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
} __packed;

#define WL1271_INI_CHANNEL_COUNT_2 14

struct wl128x_ini_band_params_2 {
	u8 rx_trace_insertion_loss;
	u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_2];
	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
} __packed;

#define WL1271_INI_RATE_GROUP_COUNT 6

struct wl1271_ini_fem_params_2 {
	__le16 tx_bip_ref_pd_voltage;
	u8 tx_bip_ref_power;
	u8 tx_bip_ref_offset;
	u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
	u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
	u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
	u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
	u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
	u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
	u8 rx_fem_insertion_loss;
	u8 degraded_low_to_normal_thr;
	u8 normal_to_degraded_high_thr;
} __packed;

#define WL128X_INI_RATE_GROUP_COUNT 7
/* low and high temperatures */
#define WL128X_INI_PD_VS_TEMPERATURE_RANGES 2

struct wl128x_ini_fem_params_2 {
	__le16 tx_bip_ref_pd_voltage;
	u8 tx_bip_ref_power;
	u8 tx_bip_ref_offset;
	u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
	u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
	u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
	u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
	u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
	u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT + 1];
	u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_2];
	u8 tx_pd_vs_temperature[WL128X_INI_PD_VS_TEMPERATURE_RANGES];
	u8 rx_fem_insertion_loss;
	u8 degraded_low_to_normal_thr;
	u8 normal_to_degraded_high_thr;
} __packed;

#define WL1271_INI_CHANNEL_COUNT_5 35
#define WL1271_INI_SUB_BAND_COUNT_5 7

struct wl1271_ini_band_params_5 {
	u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
	u8 tx_trace_loss[WL1271_INI_SUB_BAND_COUNT_5];
	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
} __packed;

struct wl128x_ini_band_params_5 {
	u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
	u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_5];
	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
} __packed;

struct wl1271_ini_fem_params_5 {
	__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
	u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
	u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
	u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
	u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
	u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
	u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
	u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
	u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
	u8 degraded_low_to_normal_thr;
	u8 normal_to_degraded_high_thr;
} __packed;

struct wl128x_ini_fem_params_5 {
	__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
	u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
	u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
	u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
	u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
	u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
	u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
	u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT];
	u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_5];
	u8 tx_pd_vs_temperature[WL1271_INI_SUB_BAND_COUNT_5 *
		WL128X_INI_PD_VS_TEMPERATURE_RANGES];
	u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
	u8 degraded_low_to_normal_thr;
	u8 normal_to_degraded_high_thr;
} __packed;

/* NVS data structure */
#define WL1271_INI_NVS_SECTION_SIZE		     468
#define WL1271_INI_FEM_MODULE_COUNT                  2

#define WL1271_INI_LEGACY_NVS_FILE_SIZE              800

struct wl1271_nvs_file {
	/* NVS section - must be first! */
	u8 nvs[WL1271_INI_NVS_SECTION_SIZE];

	/* INI section */
	struct wl1271_ini_general_params general_params;
	u8 padding1;
	struct wl1271_ini_band_params_2 stat_radio_params_2;
	u8 padding2;
	struct {
		struct wl1271_ini_fem_params_2 params;
		u8 padding;
	} dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
	struct wl1271_ini_band_params_5 stat_radio_params_5;
	u8 padding3;
	struct {
		struct wl1271_ini_fem_params_5 params;
		u8 padding;
	} dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
} __packed;

struct wl128x_nvs_file {
	/* NVS section - must be first! */
	u8 nvs[WL1271_INI_NVS_SECTION_SIZE];

	/* INI section */
	struct wl128x_ini_general_params general_params;
	u8 fem_vendor_and_options;
	struct wl128x_ini_band_params_2 stat_radio_params_2;
	u8 padding2;
	struct {
		struct wl128x_ini_fem_params_2 params;
		u8 padding;
	} dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
	struct wl128x_ini_band_params_5 stat_radio_params_5;
	u8 padding3;
	struct {
		struct wl128x_ini_fem_params_5 params;
		u8 padding;
	} dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
} __packed;
#endif
Commit	Line	Data
eb70eb72 JO	1	/*
	2	* This file is part of wl1271
	3	*
	4	* Copyright (C) 2010 Nokia Corporation
	5	*
	6	* Contact: Luciano Coelho <luciano.coelho@nokia.com>
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	*/
	23
00d20100 SL	24	#ifndef __INI_H__
00d20100 SL	25	#define __INI_H__
eb70eb72	26
0c005048 SL	27	#define GENERAL_SETTINGS_DRPW_LPD 0xc0
	28	#define SCRATCH_ENABLE_LPD BIT(25)
	29
eb70eb72 JO	30	#define WL1271_INI_MAX_SMART_REFLEX_PARAM 16
	31
	32	struct wl1271_ini_general_params {
	33	u8 ref_clock;
	34	u8 settling_time;
	35	u8 clk_valid_on_wakeup;
	36	u8 dc2dc_mode;
	37	u8 dual_mode_select;
	38	u8 tx_bip_fem_auto_detect;
	39	u8 tx_bip_fem_manufacturer;
	40	u8 general_settings;
	41	u8 sr_state;
	42	u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
	43	u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
	44	u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
14599f1e	45	} __packed;
eb70eb72	46
49d750ca SL	47	#define WL128X_INI_MAX_SETTINGS_PARAM 4
	48
	49	struct wl128x_ini_general_params {
	50	u8 ref_clock;
	51	u8 settling_time;
	52	u8 clk_valid_on_wakeup;
	53	u8 tcxo_ref_clock;
	54	u8 tcxo_settling_time;
	55	u8 tcxo_valid_on_wakeup;
	56	u8 tcxo_ldo_voltage;
	57	u8 xtal_itrim_val;
	58	u8 platform_conf;
	59	u8 dual_mode_select;
	60	u8 tx_bip_fem_auto_detect;
	61	u8 tx_bip_fem_manufacturer;
	62	u8 general_settings[WL128X_INI_MAX_SETTINGS_PARAM];
	63	u8 sr_state;
	64	u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
	65	u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
	66	u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
	67	} __packed;
	68
eb70eb72 JO	69	#define WL1271_INI_RSSI_PROCESS_COMPENS_SIZE 15
	70
	71	struct wl1271_ini_band_params_2 {
	72	u8 rx_trace_insertion_loss;
	73	u8 tx_trace_loss;
	74	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
14599f1e	75	} __packed;
eb70eb72	76
eb70eb72 JO	77	#define WL1271_INI_CHANNEL_COUNT_2 14
eb70eb72 JO	78
49d750ca SL	79	struct wl128x_ini_band_params_2 {
	80	u8 rx_trace_insertion_loss;
	81	u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_2];
	82	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
	83	} __packed;
	84
	85	#define WL1271_INI_RATE_GROUP_COUNT 6
	86
eb70eb72 JO	87	struct wl1271_ini_fem_params_2 {
	88	__le16 tx_bip_ref_pd_voltage;
	89	u8 tx_bip_ref_power;
	90	u8 tx_bip_ref_offset;
	91	u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
	92	u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
	93	u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
	94	u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
	95	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
	96	u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
	97	u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
	98	u8 rx_fem_insertion_loss;
	99	u8 degraded_low_to_normal_thr;
	100	u8 normal_to_degraded_high_thr;
14599f1e	101	} __packed;
eb70eb72	102
49d750ca SL	103	#define WL128X_INI_RATE_GROUP_COUNT 7
	104	/* low and high temperatures */
	105	#define WL128X_INI_PD_VS_TEMPERATURE_RANGES 2
	106
	107	struct wl128x_ini_fem_params_2 {
	108	__le16 tx_bip_ref_pd_voltage;
	109	u8 tx_bip_ref_power;
	110	u8 tx_bip_ref_offset;
	111	u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
	112	u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
	113	u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
	114	u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
	115	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
	116	u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
	117	u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT + 1];
	118	u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_2];
	119	u8 tx_pd_vs_temperature[WL128X_INI_PD_VS_TEMPERATURE_RANGES];
	120	u8 rx_fem_insertion_loss;
	121	u8 degraded_low_to_normal_thr;
	122	u8 normal_to_degraded_high_thr;
	123	} __packed;
	124
eb70eb72 JO	125	#define WL1271_INI_CHANNEL_COUNT_5 35
	126	#define WL1271_INI_SUB_BAND_COUNT_5 7
	127
	128	struct wl1271_ini_band_params_5 {
	129	u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
	130	u8 tx_trace_loss[WL1271_INI_SUB_BAND_COUNT_5];
	131	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
14599f1e	132	} __packed;
eb70eb72	133
49d750ca SL	134	struct wl128x_ini_band_params_5 {
	135	u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
	136	u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_5];
	137	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
	138	} __packed;
	139
eb70eb72 JO	140	struct wl1271_ini_fem_params_5 {
	141	__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
	142	u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
	143	u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
	144	u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
	145	u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
	146	u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
	147	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
	148	u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
	149	u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
	150	u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
	151	u8 degraded_low_to_normal_thr;
	152	u8 normal_to_degraded_high_thr;
14599f1e	153	} __packed;
eb70eb72	154
49d750ca SL	155	struct wl128x_ini_fem_params_5 {
	156	__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
	157	u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
	158	u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
	159	u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
	160	u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
	161	u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
	162	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
	163	u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
	164	u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT];
	165	u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_5];
	166	u8 tx_pd_vs_temperature[WL1271_INI_SUB_BAND_COUNT_5 *
	167	WL128X_INI_PD_VS_TEMPERATURE_RANGES];
	168	u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
	169	u8 degraded_low_to_normal_thr;
	170	u8 normal_to_degraded_high_thr;
	171	} __packed;
eb70eb72 JO	172
	173	/* NVS data structure */
	174	#define WL1271_INI_NVS_SECTION_SIZE 468
eb70eb72 JO	175	#define WL1271_INI_FEM_MODULE_COUNT 2
eb70eb72 JO	176
a7da74fc JO	177	#define WL1271_INI_LEGACY_NVS_FILE_SIZE 800
a7da74fc JO	178
eb70eb72	179	struct wl1271_nvs_file {
bc765bf3	180	/* NVS section - must be first! */
eb70eb72 JO	181	u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
	182
	183	/* INI section */
	184	struct wl1271_ini_general_params general_params;
	185	u8 padding1;
	186	struct wl1271_ini_band_params_2 stat_radio_params_2;
	187	u8 padding2;
	188	struct {
	189	struct wl1271_ini_fem_params_2 params;
	190	u8 padding;
	191	} dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
a7da74fc JO	192	struct wl1271_ini_band_params_5 stat_radio_params_5;
	193	u8 padding3;
	194	struct {
	195	struct wl1271_ini_fem_params_5 params;
	196	u8 padding;
	197	} dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
14599f1e	198	} __packed;
eb70eb72	199
49d750ca	200	struct wl128x_nvs_file {
bc765bf3	201	/* NVS section - must be first! */
49d750ca SL	202	u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
	203
	204	/* INI section */
	205	struct wl128x_ini_general_params general_params;
	206	u8 fem_vendor_and_options;
	207	struct wl128x_ini_band_params_2 stat_radio_params_2;
	208	u8 padding2;
	209	struct {
	210	struct wl128x_ini_fem_params_2 params;
	211	u8 padding;
	212	} dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
	213	struct wl128x_ini_band_params_5 stat_radio_params_5;
	214	u8 padding3;
	215	struct {
	216	struct wl128x_ini_fem_params_5 params;
	217	u8 padding;
	218	} dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
	219	} __packed;
eb70eb72	220	#endif