[linux-2.6-block.git] / drivers / net / wireless / ti / wlcore / spi.c

/*
 * This file is part of wl1271
 *
 * Copyright (C) 2008-2009 Nokia Corporation
 *
 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/crc7.h>
#include <linux/spi/spi.h>
#include <linux/wl12xx.h>
#include <linux/platform_device.h>
#include <linux/slab.h>

#include "wlcore.h"
#include "wl12xx_80211.h"
#include "io.h"

#define WSPI_CMD_READ                 0x40000000
#define WSPI_CMD_WRITE                0x00000000
#define WSPI_CMD_FIXED                0x20000000
#define WSPI_CMD_BYTE_LENGTH          0x1FFE0000
#define WSPI_CMD_BYTE_LENGTH_OFFSET   17
#define WSPI_CMD_BYTE_ADDR            0x0001FFFF

#define WSPI_INIT_CMD_CRC_LEN       5

#define WSPI_INIT_CMD_START         0x00
#define WSPI_INIT_CMD_TX            0x40
/* the extra bypass bit is sampled by the TNET as '1' */
#define WSPI_INIT_CMD_BYPASS_BIT    0x80
#define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
#define WSPI_INIT_CMD_EN_FIXEDBUSY  0x80
#define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
#define WSPI_INIT_CMD_IOD           0x40
#define WSPI_INIT_CMD_IP            0x20
#define WSPI_INIT_CMD_CS            0x10
#define WSPI_INIT_CMD_WS            0x08
#define WSPI_INIT_CMD_WSPI          0x01
#define WSPI_INIT_CMD_END           0x01

#define WSPI_INIT_CMD_LEN           8

#define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
		((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
#define HW_ACCESS_WSPI_INIT_CMD_MASK  0

/* HW limitation: maximum possible chunk size is 4095 bytes */
#define WSPI_MAX_CHUNK_SIZE    4092

/*
 * only support SPI for 12xx - this code should be reworked when 18xx
 * support is introduced
 */
#define SPI_AGGR_BUFFER_SIZE (4 * PAGE_SIZE)

#define WSPI_MAX_NUM_OF_CHUNKS (SPI_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE)

struct wl12xx_spi_glue {
	struct device *dev;
	struct platform_device *core;
};

static void wl12xx_spi_reset(struct device *child)
{
	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
	u8 *cmd;
	struct spi_transfer t;
	struct spi_message m;

	cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
	if (!cmd) {
		dev_err(child->parent,
			"could not allocate cmd for spi reset\n");
		return;
	}

	memset(&t, 0, sizeof(t));
	spi_message_init(&m);

	memset(cmd, 0xff, WSPI_INIT_CMD_LEN);

	t.tx_buf = cmd;
	t.len = WSPI_INIT_CMD_LEN;
	spi_message_add_tail(&t, &m);

	spi_sync(to_spi_device(glue->dev), &m);

	kfree(cmd);
}

static void wl12xx_spi_init(struct device *child)
{
	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
	u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
	struct spi_transfer t;
	struct spi_message m;

	cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
	if (!cmd) {
		dev_err(child->parent,
			"could not allocate cmd for spi init\n");
		return;
	}

	memset(crc, 0, sizeof(crc));
	memset(&t, 0, sizeof(t));
	spi_message_init(&m);

	/*
	 * Set WSPI_INIT_COMMAND
	 * the data is being send from the MSB to LSB
	 */
	cmd[2] = 0xff;
	cmd[3] = 0xff;
	cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
	cmd[0] = 0;
	cmd[7] = 0;
	cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
	cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;

	if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
		cmd[5] |=  WSPI_INIT_CMD_DIS_FIXEDBUSY;
	else
		cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;

	cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
		| WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;

	crc[0] = cmd[1];
	crc[1] = cmd[0];
	crc[2] = cmd[7];
	crc[3] = cmd[6];
	crc[4] = cmd[5];

	cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
	cmd[4] |= WSPI_INIT_CMD_END;

	t.tx_buf = cmd;
	t.len = WSPI_INIT_CMD_LEN;
	spi_message_add_tail(&t, &m);

	spi_sync(to_spi_device(glue->dev), &m);
	kfree(cmd);
}

#define WL1271_BUSY_WORD_TIMEOUT 1000

static int wl12xx_spi_read_busy(struct device *child)
{
	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
	struct wl1271 *wl = dev_get_drvdata(child);
	struct spi_transfer t[1];
	struct spi_message m;
	u32 *busy_buf;
	int num_busy_bytes = 0;

	/*
	 * Read further busy words from SPI until a non-busy word is
	 * encountered, then read the data itself into the buffer.
	 */

	num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
	busy_buf = wl->buffer_busyword;
	while (num_busy_bytes) {
		num_busy_bytes--;
		spi_message_init(&m);
		memset(t, 0, sizeof(t));
		t[0].rx_buf = busy_buf;
		t[0].len = sizeof(u32);
		t[0].cs_change = true;
		spi_message_add_tail(&t[0], &m);
		spi_sync(to_spi_device(glue->dev), &m);

		if (*busy_buf & 0x1)
			return 0;
	}

	/* The SPI bus is unresponsive, the read failed. */
	dev_err(child->parent, "SPI read busy-word timeout!\n");
	return -ETIMEDOUT;
}

static int __must_check wl12xx_spi_raw_read(struct device *child, int addr,
					    void *buf, size_t len, bool fixed)
{
	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
	struct wl1271 *wl = dev_get_drvdata(child);
	struct spi_transfer t[2];
	struct spi_message m;
	u32 *busy_buf;
	u32 *cmd;
	u32 chunk_len;

	while (len > 0) {
		chunk_len = min_t(size_t, WSPI_MAX_CHUNK_SIZE, len);

		cmd = &wl->buffer_cmd;
		busy_buf = wl->buffer_busyword;

		*cmd = 0;
		*cmd |= WSPI_CMD_READ;
		*cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
			WSPI_CMD_BYTE_LENGTH;
		*cmd |= addr & WSPI_CMD_BYTE_ADDR;

		if (fixed)
			*cmd |= WSPI_CMD_FIXED;

		spi_message_init(&m);
		memset(t, 0, sizeof(t));

		t[0].tx_buf = cmd;
		t[0].len = 4;
		t[0].cs_change = true;
		spi_message_add_tail(&t[0], &m);

		/* Busy and non busy words read */
		t[1].rx_buf = busy_buf;
		t[1].len = WL1271_BUSY_WORD_LEN;
		t[1].cs_change = true;
		spi_message_add_tail(&t[1], &m);

		spi_sync(to_spi_device(glue->dev), &m);

		if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
		    wl12xx_spi_read_busy(child)) {
			memset(buf, 0, chunk_len);
			return 0;
		}

		spi_message_init(&m);
		memset(t, 0, sizeof(t));

		t[0].rx_buf = buf;
		t[0].len = chunk_len;
		t[0].cs_change = true;
		spi_message_add_tail(&t[0], &m);

		spi_sync(to_spi_device(glue->dev), &m);

		if (!fixed)
			addr += chunk_len;
		buf += chunk_len;
		len -= chunk_len;
	}

	return 0;
}

static int __must_check wl12xx_spi_raw_write(struct device *child, int addr,
					     void *buf, size_t len, bool fixed)
{
	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
	struct spi_transfer t[2 * (WSPI_MAX_NUM_OF_CHUNKS + 1)];
	struct spi_message m;
	u32 commands[WSPI_MAX_NUM_OF_CHUNKS];
	u32 *cmd;
	u32 chunk_len;
	int i;

	WARN_ON(len > SPI_AGGR_BUFFER_SIZE);

	spi_message_init(&m);
	memset(t, 0, sizeof(t));

	cmd = &commands[0];
	i = 0;
	while (len > 0) {
		chunk_len = min_t(size_t, WSPI_MAX_CHUNK_SIZE, len);

		*cmd = 0;
		*cmd |= WSPI_CMD_WRITE;
		*cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
			WSPI_CMD_BYTE_LENGTH;
		*cmd |= addr & WSPI_CMD_BYTE_ADDR;

		if (fixed)
			*cmd |= WSPI_CMD_FIXED;

		t[i].tx_buf = cmd;
		t[i].len = sizeof(*cmd);
		spi_message_add_tail(&t[i++], &m);

		t[i].tx_buf = buf;
		t[i].len = chunk_len;
		spi_message_add_tail(&t[i++], &m);

		if (!fixed)
			addr += chunk_len;
		buf += chunk_len;
		len -= chunk_len;
		cmd++;
	}

	spi_sync(to_spi_device(glue->dev), &m);

	return 0;
}

static struct wl1271_if_operations spi_ops = {
	.read		= wl12xx_spi_raw_read,
	.write		= wl12xx_spi_raw_write,
	.reset		= wl12xx_spi_reset,
	.init		= wl12xx_spi_init,
	.set_block_size = NULL,
};

static int wl1271_probe(struct spi_device *spi)
{
	struct wl12xx_spi_glue *glue;
	struct wlcore_platdev_data pdev_data;
	struct resource res[1];
	int ret = -ENOMEM;

	memset(&pdev_data, 0x00, sizeof(pdev_data));

	pdev_data.pdata = dev_get_platdata(&spi->dev);
	if (!pdev_data.pdata) {
		dev_err(&spi->dev, "no platform data\n");
		ret = -ENODEV;
		goto out;
	}

	pdev_data.if_ops = &spi_ops;

	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
	if (!glue) {
		dev_err(&spi->dev, "can't allocate glue\n");
		goto out;
	}

	glue->dev = &spi->dev;

	spi_set_drvdata(spi, glue);

	/* This is the only SPI value that we need to set here, the rest
	 * comes from the board-peripherals file */
	spi->bits_per_word = 32;

	ret = spi_setup(spi);
	if (ret < 0) {
		dev_err(glue->dev, "spi_setup failed\n");
		goto out_free_glue;
	}

	glue->core = platform_device_alloc("wl12xx", PLATFORM_DEVID_AUTO);
	if (!glue->core) {
		dev_err(glue->dev, "can't allocate platform_device\n");
		ret = -ENOMEM;
		goto out_free_glue;
	}

	glue->core->dev.parent = &spi->dev;

	memset(res, 0x00, sizeof(res));

	res[0].start = spi->irq;
	res[0].flags = IORESOURCE_IRQ;
	res[0].name = "irq";

	ret = platform_device_add_resources(glue->core, res, ARRAY_SIZE(res));
	if (ret) {
		dev_err(glue->dev, "can't add resources\n");
		goto out_dev_put;
	}

	ret = platform_device_add_data(glue->core, &pdev_data,
				       sizeof(pdev_data));
	if (ret) {
		dev_err(glue->dev, "can't add platform data\n");
		goto out_dev_put;
	}

	ret = platform_device_add(glue->core);
	if (ret) {
		dev_err(glue->dev, "can't register platform device\n");
		goto out_dev_put;
	}

	return 0;

out_dev_put:
	platform_device_put(glue->core);

out_free_glue:
	kfree(glue);

out:
	return ret;
}

static int wl1271_remove(struct spi_device *spi)
{
	struct wl12xx_spi_glue *glue = spi_get_drvdata(spi);

	platform_device_unregister(glue->core);
	kfree(glue);

	return 0;
}


static struct spi_driver wl1271_spi_driver = {
	.driver = {
		.name		= "wl1271_spi",
		.owner		= THIS_MODULE,
	},

	.probe		= wl1271_probe,
	.remove		= wl1271_remove,
};

module_spi_driver(wl1271_spi_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
MODULE_ALIAS("spi:wl1271");
Commit	Line	Data
f5fc0f86 LC	1	/*
	2	* This file is part of wl1271
	3	*
	4	* Copyright (C) 2008-2009 Nokia Corporation
	5	*
	6	* Contact: Luciano Coelho <luciano.coelho@nokia.com>
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	*/
	23
a6b7a407	24	#include <linux/interrupt.h>
2d5e82b8	25	#include <linux/irq.h>
f5fc0f86	26	#include <linux/module.h>
f5fc0f86 LC	27	#include <linux/crc7.h>
f5fc0f86 LC	28	#include <linux/spi/spi.h>
c1f9a095	29	#include <linux/wl12xx.h>
0969d679	30	#include <linux/platform_device.h>
5a0e3ad6	31	#include <linux/slab.h>
f5fc0f86	32
c31be25a	33	#include "wlcore.h"
f5fc0f86	34	#include "wl12xx_80211.h"
00d20100	35	#include "io.h"
f5fc0f86	36
760d969f TP	37	#define WSPI_CMD_READ 0x40000000
	38	#define WSPI_CMD_WRITE 0x00000000
	39	#define WSPI_CMD_FIXED 0x20000000
	40	#define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
	41	#define WSPI_CMD_BYTE_LENGTH_OFFSET 17
	42	#define WSPI_CMD_BYTE_ADDR 0x0001FFFF
	43
	44	#define WSPI_INIT_CMD_CRC_LEN 5
	45
	46	#define WSPI_INIT_CMD_START 0x00
	47	#define WSPI_INIT_CMD_TX 0x40
	48	/* the extra bypass bit is sampled by the TNET as '1' */
	49	#define WSPI_INIT_CMD_BYPASS_BIT 0x80
	50	#define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
	51	#define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
	52	#define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
	53	#define WSPI_INIT_CMD_IOD 0x40
	54	#define WSPI_INIT_CMD_IP 0x20
	55	#define WSPI_INIT_CMD_CS 0x10
	56	#define WSPI_INIT_CMD_WS 0x08
	57	#define WSPI_INIT_CMD_WSPI 0x01
	58	#define WSPI_INIT_CMD_END 0x01
	59
	60	#define WSPI_INIT_CMD_LEN 8
	61
	62	#define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
	63	((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
	64	#define HW_ACCESS_WSPI_INIT_CMD_MASK 0
	65
5c57a901 IY	66	/* HW limitation: maximum possible chunk size is 4095 bytes */
	67	#define WSPI_MAX_CHUNK_SIZE 4092
	68
61932ba5 AN	69	/*
	70	* only support SPI for 12xx - this code should be reworked when 18xx
	71	* support is introduced
	72	*/
	73	#define SPI_AGGR_BUFFER_SIZE (4 * PAGE_SIZE)
	74
	75	#define WSPI_MAX_NUM_OF_CHUNKS (SPI_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE)
5c57a901	76
b65019f6 FB	77	struct wl12xx_spi_glue {
b65019f6 FB	78	struct device *dev;
0969d679	79	struct platform_device *core;
b65019f6 FB	80	};
b65019f6 FB	81
a390e85c	82	static void wl12xx_spi_reset(struct device *child)
8197b711	83	{
a390e85c	84	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
f5fc0f86 LC	85	u8 *cmd;
	86	struct spi_transfer t;
	87	struct spi_message m;
	88
	89	cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
	90	if (!cmd) {
e5d3625e LC	91	dev_err(child->parent,
e5d3625e LC	92	"could not allocate cmd for spi reset\n");
f5fc0f86 LC	93	return;
	94	}
	95
	96	memset(&t, 0, sizeof(t));
	97	spi_message_init(&m);
	98
	99	memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
	100
	101	t.tx_buf = cmd;
	102	t.len = WSPI_INIT_CMD_LEN;
	103	spi_message_add_tail(&t, &m);
	104
b65019f6	105	spi_sync(to_spi_device(glue->dev), &m);
f5fc0f86	106
0dd38667	107	kfree(cmd);
f5fc0f86 LC	108	}
f5fc0f86 LC	109
a390e85c	110	static void wl12xx_spi_init(struct device *child)
f5fc0f86	111	{
a390e85c	112	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
f5fc0f86 LC	113	u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
	114	struct spi_transfer t;
	115	struct spi_message m;
	116
	117	cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
	118	if (!cmd) {
e5d3625e LC	119	dev_err(child->parent,
e5d3625e LC	120	"could not allocate cmd for spi init\n");
f5fc0f86 LC	121	return;
	122	}
	123
	124	memset(crc, 0, sizeof(crc));
	125	memset(&t, 0, sizeof(t));
	126	spi_message_init(&m);
	127
	128	/*
	129	* Set WSPI_INIT_COMMAND
	130	* the data is being send from the MSB to LSB
	131	*/
	132	cmd[2] = 0xff;
	133	cmd[3] = 0xff;
	134	cmd[1] = WSPI_INIT_CMD_START \| WSPI_INIT_CMD_TX;
	135	cmd[0] = 0;
	136	cmd[7] = 0;
	137	cmd[6] \|= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
	138	cmd[6] \|= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
	139
	140	if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
	141	cmd[5] \|= WSPI_INIT_CMD_DIS_FIXEDBUSY;
	142	else
	143	cmd[5] \|= WSPI_INIT_CMD_EN_FIXEDBUSY;
	144
	145	cmd[5] \|= WSPI_INIT_CMD_IOD \| WSPI_INIT_CMD_IP \| WSPI_INIT_CMD_CS
	146	\| WSPI_INIT_CMD_WSPI \| WSPI_INIT_CMD_WS;
	147
	148	crc[0] = cmd[1];
	149	crc[1] = cmd[0];
	150	crc[2] = cmd[7];
	151	crc[3] = cmd[6];
	152	crc[4] = cmd[5];
	153
	154	cmd[4] \|= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
	155	cmd[4] \|= WSPI_INIT_CMD_END;
	156
	157	t.tx_buf = cmd;
	158	t.len = WSPI_INIT_CMD_LEN;
	159	spi_message_add_tail(&t, &m);
	160
b65019f6	161	spi_sync(to_spi_device(glue->dev), &m);
bb123611	162	kfree(cmd);
f5fc0f86 LC	163	}
f5fc0f86 LC	164
545f1da8 JO	165	#define WL1271_BUSY_WORD_TIMEOUT 1000
545f1da8 JO	166
a390e85c	167	static int wl12xx_spi_read_busy(struct device *child)
545f1da8	168	{
a390e85c FB	169	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
a390e85c FB	170	struct wl1271 *wl = dev_get_drvdata(child);
545f1da8 JO	171	struct spi_transfer t[1];
	172	struct spi_message m;
	173	u32 *busy_buf;
	174	int num_busy_bytes = 0;
	175
545f1da8 JO	176	/*
	177	* Read further busy words from SPI until a non-busy word is
	178	* encountered, then read the data itself into the buffer.
	179	*/
545f1da8 JO	180
	181	num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
	182	busy_buf = wl->buffer_busyword;
	183	while (num_busy_bytes) {
	184	num_busy_bytes--;
	185	spi_message_init(&m);
	186	memset(t, 0, sizeof(t));
	187	t[0].rx_buf = busy_buf;
	188	t[0].len = sizeof(u32);
259da430	189	t[0].cs_change = true;
545f1da8	190	spi_message_add_tail(&t[0], &m);
b65019f6	191	spi_sync(to_spi_device(glue->dev), &m);
545f1da8	192
259da430 JO	193	if (*busy_buf & 0x1)
259da430 JO	194	return 0;
545f1da8 JO	195	}
	196
	197	/* The SPI bus is unresponsive, the read failed. */
e5d3625e	198	dev_err(child->parent, "SPI read busy-word timeout!\n");
259da430	199	return -ETIMEDOUT;
545f1da8 JO	200	}
545f1da8 JO	201
f1a26e63 IY	202	static int __must_check wl12xx_spi_raw_read(struct device *child, int addr,
f1a26e63 IY	203	void *buf, size_t len, bool fixed)
f5fc0f86	204	{
a390e85c FB	205	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
a390e85c FB	206	struct wl1271 *wl = dev_get_drvdata(child);
5c57a901	207	struct spi_transfer t[2];
f5fc0f86	208	struct spi_message m;
545f1da8	209	u32 *busy_buf;
f5fc0f86	210	u32 *cmd;
5c57a901	211	u32 chunk_len;
f5fc0f86	212
5c57a901	213	while (len > 0) {
c8e49556	214	chunk_len = min_t(size_t, WSPI_MAX_CHUNK_SIZE, len);
f5fc0f86	215
5c57a901 IY	216	cmd = &wl->buffer_cmd;
5c57a901 IY	217	busy_buf = wl->buffer_busyword;
f5fc0f86	218
5c57a901 IY	219	*cmd = 0;
	220	*cmd \|= WSPI_CMD_READ;
	221	*cmd \|= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
	222	WSPI_CMD_BYTE_LENGTH;
	223	*cmd \|= addr & WSPI_CMD_BYTE_ADDR;
f5fc0f86	224
5c57a901 IY	225	if (fixed)
5c57a901 IY	226	*cmd \|= WSPI_CMD_FIXED;
f5fc0f86	227
5c57a901 IY	228	spi_message_init(&m);
5c57a901 IY	229	memset(t, 0, sizeof(t));
f5fc0f86	230
5c57a901 IY	231	t[0].tx_buf = cmd;
	232	t[0].len = 4;
	233	t[0].cs_change = true;
	234	spi_message_add_tail(&t[0], &m);
f5fc0f86	235
5c57a901 IY	236	/* Busy and non busy words read */
	237	t[1].rx_buf = busy_buf;
	238	t[1].len = WL1271_BUSY_WORD_LEN;
	239	t[1].cs_change = true;
	240	spi_message_add_tail(&t[1], &m);
f5fc0f86	241
b65019f6	242	spi_sync(to_spi_device(glue->dev), &m);
259da430	243
5c57a901	244	if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
a390e85c	245	wl12xx_spi_read_busy(child)) {
5c57a901	246	memset(buf, 0, chunk_len);
02eb1d9d	247	return 0;
5c57a901	248	}
259da430	249
5c57a901 IY	250	spi_message_init(&m);
5c57a901 IY	251	memset(t, 0, sizeof(t));
259da430	252
5c57a901 IY	253	t[0].rx_buf = buf;
	254	t[0].len = chunk_len;
	255	t[0].cs_change = true;
	256	spi_message_add_tail(&t[0], &m);
	257
b65019f6	258	spi_sync(to_spi_device(glue->dev), &m);
f5fc0f86	259
5c57a901 IY	260	if (!fixed)
	261	addr += chunk_len;
	262	buf += chunk_len;
	263	len -= chunk_len;
	264	}
02eb1d9d IY	265
02eb1d9d IY	266	return 0;
f5fc0f86 LC	267	}
f5fc0f86 LC	268
f1a26e63 IY	269	static int __must_check wl12xx_spi_raw_write(struct device *child, int addr,
f1a26e63 IY	270	void *buf, size_t len, bool fixed)
f5fc0f86	271	{
a390e85c	272	struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
4eeac22c	273	struct spi_transfer t[2 * (WSPI_MAX_NUM_OF_CHUNKS + 1)];
f5fc0f86	274	struct spi_message m;
5c57a901	275	u32 commands[WSPI_MAX_NUM_OF_CHUNKS];
f5fc0f86	276	u32 *cmd;
5c57a901 IY	277	u32 chunk_len;
5c57a901 IY	278	int i;
f5fc0f86	279
61932ba5	280	WARN_ON(len > SPI_AGGR_BUFFER_SIZE);
f5fc0f86 LC	281
	282	spi_message_init(&m);
	283	memset(t, 0, sizeof(t));
	284
5c57a901 IY	285	cmd = &commands[0];
	286	i = 0;
	287	while (len > 0) {
c8e49556	288	chunk_len = min_t(size_t, WSPI_MAX_CHUNK_SIZE, len);
f5fc0f86	289
5c57a901 IY	290	*cmd = 0;
	291	*cmd \|= WSPI_CMD_WRITE;
	292	*cmd \|= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
	293	WSPI_CMD_BYTE_LENGTH;
	294	*cmd \|= addr & WSPI_CMD_BYTE_ADDR;
f5fc0f86	295
5c57a901 IY	296	if (fixed)
	297	*cmd \|= WSPI_CMD_FIXED;
	298
	299	t[i].tx_buf = cmd;
	300	t[i].len = sizeof(*cmd);
	301	spi_message_add_tail(&t[i++], &m);
	302
	303	t[i].tx_buf = buf;
	304	t[i].len = chunk_len;
	305	spi_message_add_tail(&t[i++], &m);
f5fc0f86	306
5c57a901 IY	307	if (!fixed)
	308	addr += chunk_len;
	309	buf += chunk_len;
	310	len -= chunk_len;
	311	cmd++;
	312	}
	313
b65019f6	314	spi_sync(to_spi_device(glue->dev), &m);
02eb1d9d IY	315
02eb1d9d IY	316	return 0;
f5fc0f86	317	}
2d5e82b8	318
8197b711	319	static struct wl1271_if_operations spi_ops = {
a390e85c FB	320	.read = wl12xx_spi_raw_read,
	321	.write = wl12xx_spi_raw_write,
	322	.reset = wl12xx_spi_reset,
	323	.init = wl12xx_spi_init,
a81159ed	324	.set_block_size = NULL,
8197b711 TP	325	};
8197b711 TP	326
b74324d1	327	static int wl1271_probe(struct spi_device *spi)
2d5e82b8	328	{
b65019f6	329	struct wl12xx_spi_glue *glue;
4c104162	330	struct wlcore_platdev_data pdev_data;
0969d679	331	struct resource res[1];
b65019f6	332	int ret = -ENOMEM;
2d5e82b8	333
4c104162	334	memset(&pdev_data, 0x00, sizeof(pdev_data));
afb43e6d	335
4c104162 CE	336	pdev_data.pdata = dev_get_platdata(&spi->dev);
4c104162 CE	337	if (!pdev_data.pdata) {
91147a6c LC	338	dev_err(&spi->dev, "no platform data\n");
91147a6c LC	339	ret = -ENODEV;
4c104162	340	goto out;
91147a6c LC	341	}
91147a6c LC	342
4c104162	343	pdev_data.if_ops = &spi_ops;
a390e85c	344
b65019f6 FB	345	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
b65019f6 FB	346	if (!glue) {
e5d3625e	347	dev_err(&spi->dev, "can't allocate glue\n");
4c104162	348	goto out;
b65019f6 FB	349	}
b65019f6 FB	350
b65019f6	351	glue->dev = &spi->dev;
b65019f6 FB	352
b65019f6 FB	353	spi_set_drvdata(spi, glue);
2d5e82b8 TP	354
	355	/* This is the only SPI value that we need to set here, the rest
	356	* comes from the board-peripherals file */
	357	spi->bits_per_word = 32;
	358
	359	ret = spi_setup(spi);
	360	if (ret < 0) {
e5d3625e	361	dev_err(glue->dev, "spi_setup failed\n");
a390e85c	362	goto out_free_glue;
2d5e82b8 TP	363	}
2d5e82b8 TP	364
06ab4058	365	glue->core = platform_device_alloc("wl12xx", PLATFORM_DEVID_AUTO);
0969d679	366	if (!glue->core) {
e5d3625e	367	dev_err(glue->dev, "can't allocate platform_device\n");
0969d679	368	ret = -ENOMEM;
a390e85c	369	goto out_free_glue;
0969d679 FB	370	}
	371
	372	glue->core->dev.parent = &spi->dev;
	373
	374	memset(res, 0x00, sizeof(res));
	375
	376	res[0].start = spi->irq;
	377	res[0].flags = IORESOURCE_IRQ;
	378	res[0].name = "irq";
	379
	380	ret = platform_device_add_resources(glue->core, res, ARRAY_SIZE(res));
	381	if (ret) {
e5d3625e	382	dev_err(glue->dev, "can't add resources\n");
0969d679 FB	383	goto out_dev_put;
	384	}
	385
4c104162 CE	386	ret = platform_device_add_data(glue->core, &pdev_data,
4c104162 CE	387	sizeof(pdev_data));
0969d679	388	if (ret) {
e5d3625e	389	dev_err(glue->dev, "can't add platform data\n");
0969d679 FB	390	goto out_dev_put;
	391	}
	392
	393	ret = platform_device_add(glue->core);
	394	if (ret) {
e5d3625e	395	dev_err(glue->dev, "can't register platform device\n");
0969d679 FB	396	goto out_dev_put;
	397	}
	398
2d5e82b8 TP	399	return 0;
2d5e82b8 TP	400
0969d679 FB	401	out_dev_put:
	402	platform_device_put(glue->core);
	403
b65019f6 FB	404	out_free_glue:
b65019f6 FB	405	kfree(glue);
afb43e6d	406
b65019f6	407	out:
2d5e82b8 TP	408	return ret;
	409	}
	410
b74324d1	411	static int wl1271_remove(struct spi_device *spi)
2d5e82b8	412	{
b65019f6	413	struct wl12xx_spi_glue *glue = spi_get_drvdata(spi);
2d5e82b8	414
ca6dc103	415	platform_device_unregister(glue->core);
b65019f6	416	kfree(glue);
2d5e82b8 TP	417
	418	return 0;
	419	}
	420
	421
	422	static struct spi_driver wl1271_spi_driver = {
	423	.driver = {
7fdd50d0	424	.name = "wl1271_spi",
2d5e82b8 TP	425	.owner = THIS_MODULE,
	426	},
	427
	428	.probe = wl1271_probe,
b74324d1	429	.remove = wl1271_remove,
2d5e82b8 TP	430	};
2d5e82b8 TP	431
d5a49178	432	module_spi_driver(wl1271_spi_driver);
2d5e82b8	433	MODULE_LICENSE("GPL");
5245e3a9	434	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
2d5e82b8	435	MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
f148cfdd	436	MODULE_ALIAS("spi:wl1271");