mac80211: Remove unused third address from mesh address extension header.
[linux-2.6-block.git] / drivers / net / wireless / rtlwifi / rtl8192ce / rtl8192c-phy.h
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0c817338
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1/******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30#ifndef __RTL92C_PHY_H__
31#define __RTL92C_PHY_H__
32
33#define MAX_PRECMD_CNT 16
34#define MAX_RFDEPENDCMD_CNT 16
35#define MAX_POSTCMD_CNT 16
36
37#define MAX_DOZE_WAITING_TIMES_9x 64
38
39#define RT_CANNOT_IO(hw) false
40#define HIGHPOWER_RADIOA_ARRAYLEN 22
41
42#define MAX_TOLERANCE 5
43#define IQK_DELAY_TIME 1
44
45#define APK_BB_REG_NUM 5
46#define APK_AFE_REG_NUM 16
47#define APK_CURVE_REG_NUM 4
48#define PATH_NUM 2
49
50#define LOOP_LIMIT 5
51#define MAX_STALL_TIME 50
52#define AntennaDiversityValue 0x80
53#define MAX_TXPWR_IDX_NMODE_92S 63
54#define Reset_Cnt_Limit 3
55
56#define IQK_ADDA_REG_NUM 16
57#define IQK_MAC_REG_NUM 4
58
59#define RF90_PATH_MAX 2
60#define CHANNEL_MAX_NUMBER 14
61#define CHANNEL_GROUP_MAX 3
62
63#define CT_OFFSET_MAC_ADDR 0X16
64
65#define CT_OFFSET_CCK_TX_PWR_IDX 0x5A
66#define CT_OFFSET_HT401S_TX_PWR_IDX 0x60
67#define CT_OFFSET_HT402S_TX_PWR_IDX_DIF 0x66
68#define CT_OFFSET_HT20_TX_PWR_IDX_DIFF 0x69
69#define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF 0x6C
70
71#define CT_OFFSET_HT40_MAX_PWR_OFFSET 0x6F
72#define CT_OFFSET_HT20_MAX_PWR_OFFSET 0x72
73
74#define CT_OFFSET_CHANNEL_PLAH 0x75
75#define CT_OFFSET_THERMAL_METER 0x78
76#define CT_OFFSET_RF_OPTION 0x79
77#define CT_OFFSET_VERSION 0x7E
78#define CT_OFFSET_CUSTOMER_ID 0x7F
79
80#define RTL92C_MAX_PATH_NUM 2
81#define CHANNEL_MAX_NUMBER 14
82#define CHANNEL_GROUP_MAX 3
83
84enum swchnlcmd_id {
85 CMDID_END,
86 CMDID_SET_TXPOWEROWER_LEVEL,
87 CMDID_BBREGWRITE10,
88 CMDID_WRITEPORT_ULONG,
89 CMDID_WRITEPORT_USHORT,
90 CMDID_WRITEPORT_UCHAR,
91 CMDID_RF_WRITEREG,
92};
93
94struct swchnlcmd {
95 enum swchnlcmd_id cmdid;
96 u32 para1;
97 u32 para2;
98 u32 msdelay;
99};
100
101enum hw90_block_e {
102 HW90_BLOCK_MAC = 0,
103 HW90_BLOCK_PHY0 = 1,
104 HW90_BLOCK_PHY1 = 2,
105 HW90_BLOCK_RF = 3,
106 HW90_BLOCK_MAXIMUM = 4,
107};
108
109enum baseband_config_type {
110 BASEBAND_CONFIG_PHY_REG = 0,
111 BASEBAND_CONFIG_AGC_TAB = 1,
112};
113
114enum ra_offset_area {
115 RA_OFFSET_LEGACY_OFDM1,
116 RA_OFFSET_LEGACY_OFDM2,
117 RA_OFFSET_HT_OFDM1,
118 RA_OFFSET_HT_OFDM2,
119 RA_OFFSET_HT_OFDM3,
120 RA_OFFSET_HT_OFDM4,
121 RA_OFFSET_HT_CCK,
122};
123
124enum antenna_path {
125 ANTENNA_NONE,
126 ANTENNA_D,
127 ANTENNA_C,
128 ANTENNA_CD,
129 ANTENNA_B,
130 ANTENNA_BD,
131 ANTENNA_BC,
132 ANTENNA_BCD,
133 ANTENNA_A,
134 ANTENNA_AD,
135 ANTENNA_AC,
136 ANTENNA_ACD,
137 ANTENNA_AB,
138 ANTENNA_ABD,
139 ANTENNA_ABC,
140 ANTENNA_ABCD
141};
142
143struct r_antenna_select_ofdm {
144 u32 r_tx_antenna:4;
145 u32 r_ant_l:4;
146 u32 r_ant_non_ht:4;
147 u32 r_ant_ht1:4;
148 u32 r_ant_ht2:4;
149 u32 r_ant_ht_s1:4;
150 u32 r_ant_non_ht_s1:4;
151 u32 ofdm_txsc:2;
152 u32 reserved:2;
153};
154
155struct r_antenna_select_cck {
156 u8 r_cckrx_enable_2:2;
157 u8 r_cckrx_enable:2;
158 u8 r_ccktx_enable:4;
159};
160
161struct efuse_contents {
162 u8 mac_addr[ETH_ALEN];
163 u8 cck_tx_power_idx[6];
164 u8 ht40_1s_tx_power_idx[6];
165 u8 ht40_2s_tx_power_idx_diff[3];
166 u8 ht20_tx_power_idx_diff[3];
167 u8 ofdm_tx_power_idx_diff[3];
168 u8 ht40_max_power_offset[3];
169 u8 ht20_max_power_offset[3];
170 u8 channel_plan;
171 u8 thermal_meter;
172 u8 rf_option[5];
173 u8 version;
174 u8 oem_id;
175 u8 regulatory;
176};
177
178struct tx_power_struct {
179 u8 cck[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
180 u8 ht40_1s[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
181 u8 ht40_2s[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
182 u8 ht20_diff[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
183 u8 legacy_ht_diff[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
184 u8 legacy_ht_txpowerdiff;
185 u8 groupht20[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
186 u8 groupht40[RTL92C_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
187 u8 pwrgroup_cnt;
188 u32 mcs_original_offset[4][16];
189};
190
191extern u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw,
192 u32 regaddr, u32 bitmask);
193extern void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw,
194 u32 regaddr, u32 bitmask, u32 data);
195extern u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
196 enum radio_path rfpath, u32 regaddr,
197 u32 bitmask);
198extern void rtl92c_phy_set_rf_reg(struct ieee80211_hw *hw,
199 enum radio_path rfpath, u32 regaddr,
200 u32 bitmask, u32 data);
201extern bool rtl92c_phy_mac_config(struct ieee80211_hw *hw);
202extern bool rtl92c_phy_bb_config(struct ieee80211_hw *hw);
203extern bool rtl92c_phy_rf_config(struct ieee80211_hw *hw);
204extern bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
205 enum radio_path rfpath);
206extern void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
207extern void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw,
208 long *powerlevel);
209extern void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
210extern bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw,
211 long power_indbm);
212extern void rtl92c_phy_scan_operation_backup(struct ieee80211_hw *hw,
213 u8 operation);
214extern void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
215extern void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
216 enum nl80211_channel_type ch_type);
217extern void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw);
218extern u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw);
219extern void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
220extern void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw,
221 u16 beaconinterval);
222void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
223void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
224void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
225bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
226 enum radio_path rfpath);
227extern bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw,
228 u32 rfpath);
229bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
230extern bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
231 enum rf_pwrstate rfpwr_state);
232void rtl92c_phy_config_bb_external_pa(struct ieee80211_hw *hw);
233void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw);
234bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
235void rtl92c_phy_set_io(struct ieee80211_hw *hw);
236
237#endif