Commit | Line | Data |
---|---|---|
605bebe2 MW |
1 | /* |
2 | * Linux device driver for RTL8187 | |
3 | * | |
4 | * Copyright 2007 Michael Wu <flamingice@sourmilk.net> | |
5 | * Copyright 2007 Andrea Merello <andreamrl@tiscali.it> | |
6 | * | |
7 | * Based on the r8187 driver, which is: | |
8 | * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al. | |
9 | * | |
3461fc12 LF |
10 | * The driver was extended to the RTL8187B in 2008 by: |
11 | * Herton Ronaldo Krzesinski <herton@mandriva.com.br> | |
12 | * Hin-Tak Leung <htl10@users.sourceforge.net> | |
13 | * Larry Finger <Larry.Finger@lwfinger.net> | |
14 | * | |
0aec00ae JL |
15 | * Magic delays and register offsets below are taken from the original |
16 | * r8187 driver sources. Thanks to Realtek for their support! | |
605bebe2 MW |
17 | * |
18 | * This program is free software; you can redistribute it and/or modify | |
19 | * it under the terms of the GNU General Public License version 2 as | |
20 | * published by the Free Software Foundation. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/usb.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
605bebe2 MW |
26 | #include <linux/delay.h> |
27 | #include <linux/etherdevice.h> | |
28 | #include <linux/eeprom_93cx6.h> | |
29 | #include <net/mac80211.h> | |
30 | ||
31 | #include "rtl8187.h" | |
32 | #include "rtl8187_rtl8225.h" | |
a027087a LF |
33 | #ifdef CONFIG_RTL8187_LEDS |
34 | #include "rtl8187_leds.h" | |
35 | #endif | |
ca9152e3 | 36 | #include "rtl8187_rfkill.h" |
605bebe2 MW |
37 | |
38 | MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); | |
39 | MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); | |
3461fc12 LF |
40 | MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>"); |
41 | MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>"); | |
42 | MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>"); | |
f8a08c34 | 43 | MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver"); |
605bebe2 MW |
44 | MODULE_LICENSE("GPL"); |
45 | ||
46 | static struct usb_device_id rtl8187_table[] __devinitdata = { | |
7c7e6af3 AM |
47 | /* Asus */ |
48 | {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187}, | |
eaca90da FF |
49 | /* Belkin */ |
50 | {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B}, | |
605bebe2 | 51 | /* Realtek */ |
f8a08c34 HTL |
52 | {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, |
53 | {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, | |
54 | {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B}, | |
746db510 | 55 | {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B}, |
046ee5d2 LF |
56 | /* Surecom */ |
57 | {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187}, | |
58 | /* Logitech */ | |
59 | {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187}, | |
605bebe2 | 60 | /* Netgear */ |
f8a08c34 HTL |
61 | {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187}, |
62 | {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187}, | |
fcd7cc14 | 63 | {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B}, |
c3cf60a9 | 64 | /* HP */ |
f8a08c34 | 65 | {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187}, |
9934550d | 66 | /* Sitecom */ |
f8a08c34 | 67 | {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187}, |
f3c76918 | 68 | {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B}, |
174b2496 | 69 | {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B}, |
046ee5d2 LF |
70 | /* Sphairon Access Systems GmbH */ |
71 | {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187}, | |
72 | /* Dick Smith Electronics */ | |
73 | {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187}, | |
8f7c41d4 IK |
74 | /* Abocom */ |
75 | {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187}, | |
046ee5d2 LF |
76 | /* Qcom */ |
77 | {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187}, | |
78 | /* AirLive */ | |
79 | {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187}, | |
aeeab4ff JL |
80 | /* Linksys */ |
81 | {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B}, | |
605bebe2 MW |
82 | {} |
83 | }; | |
84 | ||
85 | MODULE_DEVICE_TABLE(usb, rtl8187_table); | |
86 | ||
8318d78a JB |
87 | static const struct ieee80211_rate rtl818x_rates[] = { |
88 | { .bitrate = 10, .hw_value = 0, }, | |
89 | { .bitrate = 20, .hw_value = 1, }, | |
90 | { .bitrate = 55, .hw_value = 2, }, | |
91 | { .bitrate = 110, .hw_value = 3, }, | |
92 | { .bitrate = 60, .hw_value = 4, }, | |
93 | { .bitrate = 90, .hw_value = 5, }, | |
94 | { .bitrate = 120, .hw_value = 6, }, | |
95 | { .bitrate = 180, .hw_value = 7, }, | |
96 | { .bitrate = 240, .hw_value = 8, }, | |
97 | { .bitrate = 360, .hw_value = 9, }, | |
98 | { .bitrate = 480, .hw_value = 10, }, | |
99 | { .bitrate = 540, .hw_value = 11, }, | |
100 | }; | |
101 | ||
102 | static const struct ieee80211_channel rtl818x_channels[] = { | |
103 | { .center_freq = 2412 }, | |
104 | { .center_freq = 2417 }, | |
105 | { .center_freq = 2422 }, | |
106 | { .center_freq = 2427 }, | |
107 | { .center_freq = 2432 }, | |
108 | { .center_freq = 2437 }, | |
109 | { .center_freq = 2442 }, | |
110 | { .center_freq = 2447 }, | |
111 | { .center_freq = 2452 }, | |
112 | { .center_freq = 2457 }, | |
113 | { .center_freq = 2462 }, | |
114 | { .center_freq = 2467 }, | |
115 | { .center_freq = 2472 }, | |
116 | { .center_freq = 2484 }, | |
117 | }; | |
118 | ||
4150c572 JB |
119 | static void rtl8187_iowrite_async_cb(struct urb *urb) |
120 | { | |
121 | kfree(urb->context); | |
4150c572 JB |
122 | } |
123 | ||
124 | static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr, | |
125 | void *data, u16 len) | |
126 | { | |
127 | struct usb_ctrlrequest *dr; | |
128 | struct urb *urb; | |
129 | struct rtl8187_async_write_data { | |
130 | u8 data[4]; | |
131 | struct usb_ctrlrequest dr; | |
132 | } *buf; | |
ea8ee240 | 133 | int rc; |
4150c572 JB |
134 | |
135 | buf = kmalloc(sizeof(*buf), GFP_ATOMIC); | |
136 | if (!buf) | |
137 | return; | |
138 | ||
139 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
140 | if (!urb) { | |
141 | kfree(buf); | |
142 | return; | |
143 | } | |
144 | ||
145 | dr = &buf->dr; | |
146 | ||
147 | dr->bRequestType = RTL8187_REQT_WRITE; | |
148 | dr->bRequest = RTL8187_REQ_SET_REG; | |
149 | dr->wValue = addr; | |
150 | dr->wIndex = 0; | |
151 | dr->wLength = cpu_to_le16(len); | |
152 | ||
153 | memcpy(buf, data, len); | |
154 | ||
155 | usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0), | |
156 | (unsigned char *)dr, buf, len, | |
157 | rtl8187_iowrite_async_cb, buf); | |
c1db52b9 | 158 | usb_anchor_urb(urb, &priv->anchored); |
ea8ee240 ON |
159 | rc = usb_submit_urb(urb, GFP_ATOMIC); |
160 | if (rc < 0) { | |
161 | kfree(buf); | |
c1db52b9 | 162 | usb_unanchor_urb(urb); |
ea8ee240 | 163 | } |
c1db52b9 | 164 | usb_free_urb(urb); |
4150c572 JB |
165 | } |
166 | ||
167 | static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv, | |
168 | __le32 *addr, u32 val) | |
169 | { | |
170 | __le32 buf = cpu_to_le32(val); | |
171 | ||
172 | rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr), | |
173 | &buf, sizeof(buf)); | |
174 | } | |
175 | ||
605bebe2 MW |
176 | void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) |
177 | { | |
178 | struct rtl8187_priv *priv = dev->priv; | |
179 | ||
180 | data <<= 8; | |
181 | data |= addr | 0x80; | |
182 | ||
183 | rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); | |
184 | rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); | |
185 | rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); | |
186 | rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); | |
605bebe2 MW |
187 | } |
188 | ||
189 | static void rtl8187_tx_cb(struct urb *urb) | |
190 | { | |
605bebe2 | 191 | struct sk_buff *skb = (struct sk_buff *)urb->context; |
e039fa4a | 192 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
e6a9854b | 193 | struct ieee80211_hw *hw = info->rate_driver_data[0]; |
6f7853f3 | 194 | struct rtl8187_priv *priv = hw->priv; |
605bebe2 | 195 | |
6f7853f3 HTL |
196 | skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) : |
197 | sizeof(struct rtl8187_tx_hdr)); | |
e6a9854b | 198 | ieee80211_tx_info_clear_status(info); |
3517afde | 199 | |
2f47690e LF |
200 | if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) { |
201 | if (priv->is_rtl8187b) { | |
202 | skb_queue_tail(&priv->b_tx_status.queue, skb); | |
203 | ||
204 | /* queue is "full", discard last items */ | |
205 | while (skb_queue_len(&priv->b_tx_status.queue) > 5) { | |
206 | struct sk_buff *old_skb; | |
207 | ||
208 | dev_dbg(&priv->udev->dev, | |
209 | "transmit status queue full\n"); | |
210 | ||
211 | old_skb = skb_dequeue(&priv->b_tx_status.queue); | |
212 | ieee80211_tx_status_irqsafe(hw, old_skb); | |
213 | } | |
214 | return; | |
215 | } else { | |
3517afde | 216 | info->flags |= IEEE80211_TX_STAT_ACK; |
2f47690e LF |
217 | } |
218 | } | |
219 | if (priv->is_rtl8187b) | |
3517afde | 220 | ieee80211_tx_status_irqsafe(hw, skb); |
2f47690e LF |
221 | else { |
222 | /* Retry information for the RTI8187 is only available by | |
223 | * reading a register in the device. We are in interrupt mode | |
224 | * here, thus queue the skb and finish on a work queue. */ | |
225 | skb_queue_tail(&priv->b_tx_status.queue, skb); | |
42935eca | 226 | ieee80211_queue_delayed_work(hw, &priv->work, 0); |
3517afde | 227 | } |
605bebe2 MW |
228 | } |
229 | ||
e039fa4a | 230 | static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb) |
605bebe2 MW |
231 | { |
232 | struct rtl8187_priv *priv = dev->priv; | |
e039fa4a | 233 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
6f7853f3 HTL |
234 | unsigned int ep; |
235 | void *buf; | |
605bebe2 | 236 | struct urb *urb; |
98798f48 MW |
237 | __le16 rts_dur = 0; |
238 | u32 flags; | |
ea8ee240 | 239 | int rc; |
605bebe2 MW |
240 | |
241 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
242 | if (!urb) { | |
243 | kfree_skb(skb); | |
d6e2be98 | 244 | return NETDEV_TX_OK; |
605bebe2 MW |
245 | } |
246 | ||
98798f48 | 247 | flags = skb->len; |
38e3b0d8 | 248 | flags |= RTL818X_TX_DESC_FLAG_NO_ENC; |
aa68cbfb | 249 | |
e039fa4a | 250 | flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24; |
8b7b1e05 | 251 | if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control)) |
38e3b0d8 | 252 | flags |= RTL818X_TX_DESC_FLAG_MOREFRAG; |
e6a9854b | 253 | if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { |
38e3b0d8 | 254 | flags |= RTL818X_TX_DESC_FLAG_RTS; |
e039fa4a | 255 | flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
32bfd35d | 256 | rts_dur = ieee80211_rts_duration(dev, priv->vif, |
e039fa4a | 257 | skb->len, info); |
e6a9854b | 258 | } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
38e3b0d8 | 259 | flags |= RTL818X_TX_DESC_FLAG_CTS; |
e039fa4a | 260 | flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
aa68cbfb | 261 | } |
98798f48 | 262 | |
6f7853f3 HTL |
263 | if (!priv->is_rtl8187b) { |
264 | struct rtl8187_tx_hdr *hdr = | |
265 | (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
266 | hdr->flags = cpu_to_le32(flags); | |
267 | hdr->len = 0; | |
268 | hdr->rts_duration = rts_dur; | |
d9a1f486 | 269 | hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); |
6f7853f3 HTL |
270 | buf = hdr; |
271 | ||
272 | ep = 2; | |
273 | } else { | |
274 | /* fc needs to be calculated before skb_push() */ | |
275 | unsigned int epmap[4] = { 6, 7, 5, 4 }; | |
276 | struct ieee80211_hdr *tx_hdr = | |
277 | (struct ieee80211_hdr *)(skb->data); | |
278 | u16 fc = le16_to_cpu(tx_hdr->frame_control); | |
279 | ||
280 | struct rtl8187b_tx_hdr *hdr = | |
281 | (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
282 | struct ieee80211_rate *txrate = | |
283 | ieee80211_get_tx_rate(dev, info); | |
284 | memset(hdr, 0, sizeof(*hdr)); | |
285 | hdr->flags = cpu_to_le32(flags); | |
286 | hdr->rts_duration = rts_dur; | |
d9a1f486 | 287 | hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); |
6f7853f3 HTL |
288 | hdr->tx_duration = |
289 | ieee80211_generic_frame_duration(dev, priv->vif, | |
290 | skb->len, txrate); | |
291 | buf = hdr; | |
292 | ||
293 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | |
294 | ep = 12; | |
295 | else | |
296 | ep = epmap[skb_get_queue_mapping(skb)]; | |
297 | } | |
605bebe2 | 298 | |
e6a9854b JB |
299 | info->rate_driver_data[0] = dev; |
300 | info->rate_driver_data[1] = urb; | |
6f7853f3 HTL |
301 | |
302 | usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep), | |
303 | buf, skb->len, rtl8187_tx_cb, skb); | |
2fcbab04 | 304 | urb->transfer_flags |= URB_ZERO_PACKET; |
c1db52b9 | 305 | usb_anchor_urb(urb, &priv->anchored); |
ea8ee240 ON |
306 | rc = usb_submit_urb(urb, GFP_ATOMIC); |
307 | if (rc < 0) { | |
c1db52b9 | 308 | usb_unanchor_urb(urb); |
ea8ee240 ON |
309 | kfree_skb(skb); |
310 | } | |
c1db52b9 | 311 | usb_free_urb(urb); |
605bebe2 | 312 | |
d6e2be98 | 313 | return NETDEV_TX_OK; |
605bebe2 MW |
314 | } |
315 | ||
316 | static void rtl8187_rx_cb(struct urb *urb) | |
317 | { | |
318 | struct sk_buff *skb = (struct sk_buff *)urb->context; | |
319 | struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; | |
320 | struct ieee80211_hw *dev = info->dev; | |
321 | struct rtl8187_priv *priv = dev->priv; | |
605bebe2 MW |
322 | struct ieee80211_rx_status rx_status = { 0 }; |
323 | int rate, signal; | |
4150c572 | 324 | u32 flags; |
d8588227 | 325 | unsigned long f; |
605bebe2 | 326 | |
d8588227 | 327 | spin_lock_irqsave(&priv->rx_queue.lock, f); |
46c37672 | 328 | __skb_unlink(skb, &priv->rx_queue); |
d8588227 | 329 | spin_unlock_irqrestore(&priv->rx_queue.lock, f); |
c1db52b9 | 330 | skb_put(skb, urb->actual_length); |
605bebe2 MW |
331 | |
332 | if (unlikely(urb->status)) { | |
605bebe2 MW |
333 | dev_kfree_skb_irq(skb); |
334 | return; | |
335 | } | |
336 | ||
6f7853f3 HTL |
337 | if (!priv->is_rtl8187b) { |
338 | struct rtl8187_rx_hdr *hdr = | |
339 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); | |
340 | flags = le32_to_cpu(hdr->flags); | |
a7db74f4 | 341 | /* As with the RTL8187B below, the AGC is used to calculate |
70d9f405 | 342 | * signal strength. In this case, the scaling |
a7db74f4 LF |
343 | * constants are derived from the output of p54usb. |
344 | */ | |
a7db74f4 | 345 | signal = -4 - ((27 * hdr->agc) >> 6); |
6f7853f3 | 346 | rx_status.antenna = (hdr->signal >> 7) & 1; |
6f7853f3 | 347 | rx_status.mactime = le64_to_cpu(hdr->mac_time); |
6f7853f3 HTL |
348 | } else { |
349 | struct rtl8187b_rx_hdr *hdr = | |
350 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); | |
0ccd58fc LF |
351 | /* The Realtek datasheet for the RTL8187B shows that the RX |
352 | * header contains the following quantities: signal quality, | |
353 | * RSSI, AGC, the received power in dB, and the measured SNR. | |
354 | * In testing, none of these quantities show qualitative | |
355 | * agreement with AP signal strength, except for the AGC, | |
356 | * which is inversely proportional to the strength of the | |
70d9f405 LF |
357 | * signal. In the following, the signal strength |
358 | * is derived from the AGC. The arbitrary scaling constants | |
0ccd58fc LF |
359 | * are chosen to make the results close to the values obtained |
360 | * for a BCM4312 using b43 as the driver. The noise is ignored | |
361 | * for now. | |
362 | */ | |
6f7853f3 | 363 | flags = le32_to_cpu(hdr->flags); |
0ccd58fc | 364 | signal = 14 - hdr->agc / 2; |
0ccd58fc | 365 | rx_status.antenna = (hdr->rssi >> 7) & 1; |
6f7853f3 | 366 | rx_status.mactime = le64_to_cpu(hdr->mac_time); |
6f7853f3 | 367 | } |
605bebe2 | 368 | |
a7db74f4 LF |
369 | rx_status.signal = signal; |
370 | priv->signal = signal; | |
371 | rate = (flags >> 20) & 0xF; | |
6f7853f3 | 372 | skb_trim(skb, flags & 0x0FFF); |
8318d78a JB |
373 | rx_status.rate_idx = rate; |
374 | rx_status.freq = dev->conf.channel->center_freq; | |
375 | rx_status.band = dev->conf.channel->band; | |
03bffc13 | 376 | rx_status.flag |= RX_FLAG_TSFT; |
38e3b0d8 | 377 | if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) |
4150c572 | 378 | rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; |
f1d58c25 JB |
379 | memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); |
380 | ieee80211_rx_irqsafe(dev, skb); | |
605bebe2 MW |
381 | |
382 | skb = dev_alloc_skb(RTL8187_MAX_RX); | |
383 | if (unlikely(!skb)) { | |
605bebe2 MW |
384 | /* TODO check rx queue length and refill *somewhere* */ |
385 | return; | |
386 | } | |
387 | ||
388 | info = (struct rtl8187_rx_info *)skb->cb; | |
389 | info->urb = urb; | |
390 | info->dev = dev; | |
391 | urb->transfer_buffer = skb_tail_pointer(skb); | |
392 | urb->context = skb; | |
393 | skb_queue_tail(&priv->rx_queue, skb); | |
394 | ||
c1db52b9 LF |
395 | usb_anchor_urb(urb, &priv->anchored); |
396 | if (usb_submit_urb(urb, GFP_ATOMIC)) { | |
397 | usb_unanchor_urb(urb); | |
398 | skb_unlink(skb, &priv->rx_queue); | |
399 | dev_kfree_skb_irq(skb); | |
400 | } | |
605bebe2 MW |
401 | } |
402 | ||
403 | static int rtl8187_init_urbs(struct ieee80211_hw *dev) | |
404 | { | |
405 | struct rtl8187_priv *priv = dev->priv; | |
c1db52b9 | 406 | struct urb *entry = NULL; |
605bebe2 MW |
407 | struct sk_buff *skb; |
408 | struct rtl8187_rx_info *info; | |
c1db52b9 | 409 | int ret = 0; |
605bebe2 | 410 | |
2a57cf3e | 411 | while (skb_queue_len(&priv->rx_queue) < 16) { |
605bebe2 | 412 | skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); |
c1db52b9 LF |
413 | if (!skb) { |
414 | ret = -ENOMEM; | |
415 | goto err; | |
416 | } | |
605bebe2 MW |
417 | entry = usb_alloc_urb(0, GFP_KERNEL); |
418 | if (!entry) { | |
c1db52b9 LF |
419 | ret = -ENOMEM; |
420 | goto err; | |
605bebe2 MW |
421 | } |
422 | usb_fill_bulk_urb(entry, priv->udev, | |
6f7853f3 HTL |
423 | usb_rcvbulkpipe(priv->udev, |
424 | priv->is_rtl8187b ? 3 : 1), | |
605bebe2 MW |
425 | skb_tail_pointer(skb), |
426 | RTL8187_MAX_RX, rtl8187_rx_cb, skb); | |
427 | info = (struct rtl8187_rx_info *)skb->cb; | |
428 | info->urb = entry; | |
429 | info->dev = dev; | |
430 | skb_queue_tail(&priv->rx_queue, skb); | |
c1db52b9 LF |
431 | usb_anchor_urb(entry, &priv->anchored); |
432 | ret = usb_submit_urb(entry, GFP_KERNEL); | |
433 | if (ret) { | |
434 | skb_unlink(skb, &priv->rx_queue); | |
435 | usb_unanchor_urb(entry); | |
436 | goto err; | |
437 | } | |
438 | usb_free_urb(entry); | |
605bebe2 | 439 | } |
c1db52b9 | 440 | return ret; |
605bebe2 | 441 | |
c1db52b9 LF |
442 | err: |
443 | usb_free_urb(entry); | |
444 | kfree_skb(skb); | |
445 | usb_kill_anchored_urbs(&priv->anchored); | |
446 | return ret; | |
605bebe2 MW |
447 | } |
448 | ||
3517afde HRK |
449 | static void rtl8187b_status_cb(struct urb *urb) |
450 | { | |
451 | struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context; | |
452 | struct rtl8187_priv *priv = hw->priv; | |
453 | u64 val; | |
454 | unsigned int cmd_type; | |
455 | ||
c1db52b9 | 456 | if (unlikely(urb->status)) |
3517afde | 457 | return; |
3517afde HRK |
458 | |
459 | /* | |
460 | * Read from status buffer: | |
461 | * | |
462 | * bits [30:31] = cmd type: | |
463 | * - 0 indicates tx beacon interrupt | |
464 | * - 1 indicates tx close descriptor | |
465 | * | |
466 | * In the case of tx beacon interrupt: | |
467 | * [0:9] = Last Beacon CW | |
468 | * [10:29] = reserved | |
469 | * [30:31] = 00b | |
470 | * [32:63] = Last Beacon TSF | |
471 | * | |
472 | * If it's tx close descriptor: | |
473 | * [0:7] = Packet Retry Count | |
474 | * [8:14] = RTS Retry Count | |
475 | * [15] = TOK | |
476 | * [16:27] = Sequence No | |
477 | * [28] = LS | |
478 | * [29] = FS | |
479 | * [30:31] = 01b | |
480 | * [32:47] = unused (reserved?) | |
481 | * [48:63] = MAC Used Time | |
482 | */ | |
483 | val = le64_to_cpu(priv->b_tx_status.buf); | |
484 | ||
485 | cmd_type = (val >> 30) & 0x3; | |
486 | if (cmd_type == 1) { | |
487 | unsigned int pkt_rc, seq_no; | |
488 | bool tok; | |
489 | struct sk_buff *skb; | |
490 | struct ieee80211_hdr *ieee80211hdr; | |
491 | unsigned long flags; | |
492 | ||
493 | pkt_rc = val & 0xFF; | |
494 | tok = val & (1 << 15); | |
495 | seq_no = (val >> 16) & 0xFFF; | |
496 | ||
497 | spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags); | |
498 | skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) { | |
499 | ieee80211hdr = (struct ieee80211_hdr *)skb->data; | |
500 | ||
501 | /* | |
502 | * While testing, it was discovered that the seq_no | |
503 | * doesn't actually contains the sequence number. | |
504 | * Instead of returning just the 12 bits of sequence | |
505 | * number, hardware is returning entire sequence control | |
506 | * (fragment number plus sequence number) in a 12 bit | |
507 | * only field overflowing after some time. As a | |
508 | * workaround, just consider the lower bits, and expect | |
509 | * it's unlikely we wrongly ack some sent data | |
510 | */ | |
511 | if ((le16_to_cpu(ieee80211hdr->seq_ctrl) | |
512 | & 0xFFF) == seq_no) | |
513 | break; | |
514 | } | |
515 | if (skb != (struct sk_buff *) &priv->b_tx_status.queue) { | |
516 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | |
517 | ||
518 | __skb_unlink(skb, &priv->b_tx_status.queue); | |
519 | if (tok) | |
520 | info->flags |= IEEE80211_TX_STAT_ACK; | |
1548c86a | 521 | info->status.rates[0].count = pkt_rc + 1; |
3517afde HRK |
522 | |
523 | ieee80211_tx_status_irqsafe(hw, skb); | |
524 | } | |
525 | spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags); | |
526 | } | |
527 | ||
c1db52b9 LF |
528 | usb_anchor_urb(urb, &priv->anchored); |
529 | if (usb_submit_urb(urb, GFP_ATOMIC)) | |
530 | usb_unanchor_urb(urb); | |
3517afde HRK |
531 | } |
532 | ||
533 | static int rtl8187b_init_status_urb(struct ieee80211_hw *dev) | |
534 | { | |
535 | struct rtl8187_priv *priv = dev->priv; | |
536 | struct urb *entry; | |
c1db52b9 | 537 | int ret = 0; |
3517afde HRK |
538 | |
539 | entry = usb_alloc_urb(0, GFP_KERNEL); | |
540 | if (!entry) | |
541 | return -ENOMEM; | |
3517afde HRK |
542 | |
543 | usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9), | |
544 | &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf), | |
545 | rtl8187b_status_cb, dev); | |
546 | ||
c1db52b9 LF |
547 | usb_anchor_urb(entry, &priv->anchored); |
548 | ret = usb_submit_urb(entry, GFP_KERNEL); | |
549 | if (ret) | |
550 | usb_unanchor_urb(entry); | |
551 | usb_free_urb(entry); | |
3517afde | 552 | |
c1db52b9 | 553 | return ret; |
3517afde HRK |
554 | } |
555 | ||
0bf198eb HRK |
556 | static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon) |
557 | { | |
558 | u32 anaparam, anaparam2; | |
559 | u8 anaparam3, reg; | |
560 | ||
561 | if (!priv->is_rtl8187b) { | |
562 | if (rfon) { | |
563 | anaparam = RTL8187_RTL8225_ANAPARAM_ON; | |
564 | anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON; | |
565 | } else { | |
566 | anaparam = RTL8187_RTL8225_ANAPARAM_OFF; | |
567 | anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF; | |
568 | } | |
569 | } else { | |
570 | if (rfon) { | |
571 | anaparam = RTL8187B_RTL8225_ANAPARAM_ON; | |
572 | anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON; | |
573 | anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON; | |
574 | } else { | |
575 | anaparam = RTL8187B_RTL8225_ANAPARAM_OFF; | |
576 | anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF; | |
577 | anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF; | |
578 | } | |
579 | } | |
580 | ||
581 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
582 | RTL818X_EEPROM_CMD_CONFIG); | |
583 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
584 | reg |= RTL818X_CONFIG3_ANAPARAM_WRITE; | |
585 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
586 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam); | |
587 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2); | |
588 | if (priv->is_rtl8187b) | |
589 | rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, anaparam3); | |
590 | reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE; | |
591 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
592 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
593 | RTL818X_EEPROM_CMD_NORMAL); | |
594 | } | |
595 | ||
f8a08c34 | 596 | static int rtl8187_cmd_reset(struct ieee80211_hw *dev) |
605bebe2 MW |
597 | { |
598 | struct rtl8187_priv *priv = dev->priv; | |
599 | u8 reg; | |
600 | int i; | |
601 | ||
605bebe2 MW |
602 | reg = rtl818x_ioread8(priv, &priv->map->CMD); |
603 | reg &= (1 << 1); | |
604 | reg |= RTL818X_CMD_RESET; | |
605 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
606 | ||
607 | i = 10; | |
608 | do { | |
609 | msleep(2); | |
610 | if (!(rtl818x_ioread8(priv, &priv->map->CMD) & | |
611 | RTL818X_CMD_RESET)) | |
612 | break; | |
613 | } while (--i); | |
614 | ||
615 | if (!i) { | |
5db55844 | 616 | wiphy_err(dev->wiphy, "Reset timeout!\n"); |
605bebe2 MW |
617 | return -ETIMEDOUT; |
618 | } | |
619 | ||
620 | /* reload registers from eeprom */ | |
621 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); | |
622 | ||
623 | i = 10; | |
624 | do { | |
625 | msleep(4); | |
626 | if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & | |
627 | RTL818X_EEPROM_CMD_CONFIG)) | |
628 | break; | |
629 | } while (--i); | |
630 | ||
631 | if (!i) { | |
c96c31e4 | 632 | wiphy_err(dev->wiphy, "eeprom reset timeout!\n"); |
605bebe2 MW |
633 | return -ETIMEDOUT; |
634 | } | |
635 | ||
f8a08c34 HTL |
636 | return 0; |
637 | } | |
638 | ||
639 | static int rtl8187_init_hw(struct ieee80211_hw *dev) | |
640 | { | |
641 | struct rtl8187_priv *priv = dev->priv; | |
642 | u8 reg; | |
643 | int res; | |
644 | ||
645 | /* reset */ | |
0bf198eb | 646 | rtl8187_set_anaparam(priv, true); |
f8a08c34 HTL |
647 | |
648 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); | |
649 | ||
650 | msleep(200); | |
651 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); | |
652 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); | |
653 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); | |
654 | msleep(200); | |
655 | ||
656 | res = rtl8187_cmd_reset(dev); | |
657 | if (res) | |
658 | return res; | |
659 | ||
0bf198eb | 660 | rtl8187_set_anaparam(priv, true); |
605bebe2 MW |
661 | |
662 | /* setup card */ | |
663 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
ca9152e3 | 664 | rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); |
605bebe2 MW |
665 | |
666 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
ca9152e3 | 667 | rtl818x_iowrite8(priv, &priv->map->GPIO0, 1); |
605bebe2 MW |
668 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); |
669 | ||
670 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
605bebe2 MW |
671 | |
672 | rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); | |
673 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
674 | reg &= 0x3F; | |
675 | reg |= 0x80; | |
676 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); | |
677 | ||
678 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
679 | ||
680 | rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); | |
681 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
2f47690e | 682 | rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0); |
605bebe2 MW |
683 | |
684 | // TODO: set RESP_RATE and BRSR properly | |
685 | rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); | |
686 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
687 | ||
688 | /* host_usb_init */ | |
689 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
ca9152e3 | 690 | rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); |
605bebe2 MW |
691 | reg = rtl818x_ioread8(priv, (u8 *)0xFE53); |
692 | rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); | |
693 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
ca9152e3 | 694 | rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20); |
605bebe2 MW |
695 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); |
696 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); | |
697 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); | |
698 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); | |
699 | msleep(100); | |
700 | ||
701 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); | |
702 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); | |
703 | rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); | |
f8a08c34 HTL |
704 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
705 | RTL818X_EEPROM_CMD_CONFIG); | |
605bebe2 | 706 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); |
f8a08c34 HTL |
707 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
708 | RTL818X_EEPROM_CMD_NORMAL); | |
605bebe2 MW |
709 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); |
710 | msleep(100); | |
711 | ||
f6532111 | 712 | priv->rf->init(dev); |
605bebe2 MW |
713 | |
714 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
f6532111 MW |
715 | reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; |
716 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); | |
605bebe2 MW |
717 | rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); |
718 | rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); | |
719 | rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); | |
f6532111 | 720 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); |
605bebe2 MW |
721 | |
722 | return 0; | |
723 | } | |
724 | ||
f8a08c34 HTL |
725 | static const u8 rtl8187b_reg_table[][3] = { |
726 | {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0}, | |
727 | {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0}, | |
728 | {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0}, | |
729 | {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0}, | |
730 | ||
731 | {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1}, | |
732 | {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1}, | |
327571ea HRK |
733 | {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, |
734 | {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, | |
735 | {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1}, | |
f8a08c34 HTL |
736 | |
737 | {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2}, | |
738 | {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2}, | |
739 | {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2}, | |
740 | {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2}, | |
741 | {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2}, | |
742 | {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2}, | |
a8ff34e3 | 743 | {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, |
f8a08c34 | 744 | |
60f58914 HRK |
745 | {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0}, |
746 | {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, | |
747 | {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, | |
748 | {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, | |
749 | {0xEE, 0x00, 0}, {0x4C, 0x00, 2}, | |
f8a08c34 | 750 | |
a027087a LF |
751 | {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0}, |
752 | {0x8F, 0x00, 0} | |
f8a08c34 HTL |
753 | }; |
754 | ||
755 | static int rtl8187b_init_hw(struct ieee80211_hw *dev) | |
756 | { | |
757 | struct rtl8187_priv *priv = dev->priv; | |
758 | int res, i; | |
759 | u8 reg; | |
760 | ||
0bf198eb | 761 | rtl8187_set_anaparam(priv, true); |
f8a08c34 | 762 | |
896cae65 HRK |
763 | /* Reset PLL sequence on 8187B. Realtek note: reduces power |
764 | * consumption about 30 mA */ | |
765 | rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10); | |
766 | reg = rtl818x_ioread8(priv, (u8 *)0xFF62); | |
767 | rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5)); | |
768 | rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5)); | |
769 | ||
f8a08c34 HTL |
770 | res = rtl8187_cmd_reset(dev); |
771 | if (res) | |
772 | return res; | |
773 | ||
daeeb074 HRK |
774 | rtl8187_set_anaparam(priv, true); |
775 | ||
60f58914 HRK |
776 | /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as |
777 | * RESP_RATE on 8187L in Realtek sources: each bit should be each | |
778 | * one of the 12 rates, all are enabled */ | |
779 | rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF); | |
780 | ||
f8a08c34 HTL |
781 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); |
782 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
783 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
f8a08c34 | 784 | |
327571ea | 785 | /* Auto Rate Fallback Register (ARFR): 1M-54M setting */ |
f8a08c34 | 786 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1); |
327571ea | 787 | rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1); |
f8a08c34 | 788 | |
f8a08c34 HTL |
789 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1); |
790 | ||
791 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
792 | RTL818X_EEPROM_CMD_CONFIG); | |
793 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
794 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80); | |
795 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
796 | RTL818X_EEPROM_CMD_NORMAL); | |
797 | ||
798 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
799 | for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) { | |
800 | rtl818x_iowrite8_idx(priv, | |
801 | (u8 *)(uintptr_t) | |
802 | (rtl8187b_reg_table[i][0] | 0xFF00), | |
803 | rtl8187b_reg_table[i][1], | |
804 | rtl8187b_reg_table[i][2]); | |
805 | } | |
806 | ||
807 | rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50); | |
808 | rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0); | |
809 | ||
810 | rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1); | |
811 | rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1); | |
812 | rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1); | |
813 | ||
814 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001); | |
815 | ||
a8ff34e3 | 816 | /* RFSW_CTRL register */ |
f8a08c34 HTL |
817 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2); |
818 | ||
f8a08c34 HTL |
819 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); |
820 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488); | |
821 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); | |
2f20596b | 822 | msleep(100); |
f8a08c34 HTL |
823 | |
824 | priv->rf->init(dev); | |
825 | ||
826 | reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE; | |
827 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
828 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); | |
829 | ||
830 | rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4); | |
831 | rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00); | |
832 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); | |
833 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); | |
834 | rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F); | |
835 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); | |
836 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); | |
837 | ||
838 | reg = rtl818x_ioread8(priv, (u8 *)0xFFDB); | |
839 | rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2)); | |
840 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3); | |
841 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3); | |
842 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3); | |
843 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3); | |
844 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3); | |
845 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3); | |
846 | rtl818x_iowrite8(priv, (u8 *)0xFF61, 0); | |
847 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1); | |
848 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1); | |
849 | rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10); | |
850 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2); | |
851 | ||
852 | rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B); | |
853 | ||
854 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1); | |
855 | ||
b4572a92 HRK |
856 | priv->slot_time = 0x9; |
857 | priv->aifsn[0] = 2; /* AIFSN[AC_VO] */ | |
858 | priv->aifsn[1] = 2; /* AIFSN[AC_VI] */ | |
859 | priv->aifsn[2] = 7; /* AIFSN[AC_BK] */ | |
860 | priv->aifsn[3] = 3; /* AIFSN[AC_BE] */ | |
861 | rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0); | |
862 | ||
1a9937b7 HRK |
863 | /* ENEDCA flag must always be set, transmit issues? */ |
864 | rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA); | |
865 | ||
f8a08c34 HTL |
866 | return 0; |
867 | } | |
868 | ||
2f47690e LF |
869 | static void rtl8187_work(struct work_struct *work) |
870 | { | |
871 | /* The RTL8187 returns the retry count through register 0xFFFA. In | |
872 | * addition, it appears to be a cumulative retry count, not the | |
873 | * value for the current TX packet. When multiple TX entries are | |
874 | * queued, the retry count will be valid for the last one in the queue. | |
875 | * The "error" should not matter for purposes of rate setting. */ | |
876 | struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv, | |
877 | work.work); | |
878 | struct ieee80211_tx_info *info; | |
879 | struct ieee80211_hw *dev = priv->dev; | |
880 | static u16 retry; | |
881 | u16 tmp; | |
882 | ||
883 | mutex_lock(&priv->conf_mutex); | |
884 | tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA); | |
885 | while (skb_queue_len(&priv->b_tx_status.queue) > 0) { | |
886 | struct sk_buff *old_skb; | |
887 | ||
888 | old_skb = skb_dequeue(&priv->b_tx_status.queue); | |
889 | info = IEEE80211_SKB_CB(old_skb); | |
890 | info->status.rates[0].count = tmp - retry + 1; | |
891 | ieee80211_tx_status_irqsafe(dev, old_skb); | |
892 | } | |
893 | retry = tmp; | |
894 | mutex_unlock(&priv->conf_mutex); | |
895 | } | |
896 | ||
4150c572 | 897 | static int rtl8187_start(struct ieee80211_hw *dev) |
605bebe2 MW |
898 | { |
899 | struct rtl8187_priv *priv = dev->priv; | |
900 | u32 reg; | |
901 | int ret; | |
902 | ||
ca9152e3 HRK |
903 | mutex_lock(&priv->conf_mutex); |
904 | ||
f8a08c34 HTL |
905 | ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) : |
906 | rtl8187b_init_hw(dev); | |
605bebe2 | 907 | if (ret) |
ca9152e3 | 908 | goto rtl8187_start_exit; |
c1db52b9 LF |
909 | |
910 | init_usb_anchor(&priv->anchored); | |
2f47690e | 911 | priv->dev = dev; |
c1db52b9 | 912 | |
f8a08c34 HTL |
913 | if (priv->is_rtl8187b) { |
914 | reg = RTL818X_RX_CONF_MGMT | | |
915 | RTL818X_RX_CONF_DATA | | |
916 | RTL818X_RX_CONF_BROADCAST | | |
917 | RTL818X_RX_CONF_NICMAC | | |
918 | RTL818X_RX_CONF_BSSID | | |
919 | (7 << 13 /* RX FIFO threshold NONE */) | | |
920 | (7 << 10 /* MAX RX DMA */) | | |
921 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
922 | RTL818X_RX_CONF_ONLYERLPKT | | |
923 | RTL818X_RX_CONF_MULTICAST; | |
924 | priv->rx_conf = reg; | |
925 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); | |
926 | ||
19999792 TLSC |
927 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); |
928 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; | |
929 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
930 | reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; | |
931 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
932 | ||
f8a08c34 HTL |
933 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, |
934 | RTL818X_TX_CONF_HW_SEQNUM | | |
935 | RTL818X_TX_CONF_DISREQQSIZE | | |
936 | (7 << 8 /* short retry limit */) | | |
937 | (7 << 0 /* long retry limit */) | | |
938 | (7 << 21 /* MAX TX DMA */)); | |
939 | rtl8187_init_urbs(dev); | |
3517afde | 940 | rtl8187b_init_status_urb(dev); |
ca9152e3 | 941 | goto rtl8187_start_exit; |
f8a08c34 HTL |
942 | } |
943 | ||
605bebe2 MW |
944 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); |
945 | ||
2fe14263 MW |
946 | rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); |
947 | rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); | |
948 | ||
605bebe2 MW |
949 | rtl8187_init_urbs(dev); |
950 | ||
951 | reg = RTL818X_RX_CONF_ONLYERLPKT | | |
952 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
953 | RTL818X_RX_CONF_BSSID | | |
954 | RTL818X_RX_CONF_MGMT | | |
605bebe2 MW |
955 | RTL818X_RX_CONF_DATA | |
956 | (7 << 13 /* RX FIFO threshold NONE */) | | |
957 | (7 << 10 /* MAX RX DMA */) | | |
958 | RTL818X_RX_CONF_BROADCAST | | |
605bebe2 | 959 | RTL818X_RX_CONF_NICMAC; |
605bebe2 | 960 | |
4150c572 | 961 | priv->rx_conf = reg; |
605bebe2 MW |
962 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); |
963 | ||
964 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); | |
965 | reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT; | |
966 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
967 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
968 | ||
969 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); | |
970 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; | |
971 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
972 | reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; | |
973 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
974 | ||
975 | reg = RTL818X_TX_CONF_CW_MIN | | |
976 | (7 << 21 /* MAX TX DMA */) | | |
977 | RTL818X_TX_CONF_NO_ICV; | |
978 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
979 | ||
980 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
981 | reg |= RTL818X_CMD_TX_ENABLE; | |
982 | reg |= RTL818X_CMD_RX_ENABLE; | |
983 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
2f47690e | 984 | INIT_DELAYED_WORK(&priv->work, rtl8187_work); |
605bebe2 | 985 | |
ca9152e3 HRK |
986 | rtl8187_start_exit: |
987 | mutex_unlock(&priv->conf_mutex); | |
988 | return ret; | |
605bebe2 MW |
989 | } |
990 | ||
4150c572 | 991 | static void rtl8187_stop(struct ieee80211_hw *dev) |
605bebe2 MW |
992 | { |
993 | struct rtl8187_priv *priv = dev->priv; | |
605bebe2 MW |
994 | struct sk_buff *skb; |
995 | u32 reg; | |
996 | ||
7dcdd073 | 997 | mutex_lock(&priv->conf_mutex); |
605bebe2 MW |
998 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); |
999 | ||
1000 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
1001 | reg &= ~RTL818X_CMD_TX_ENABLE; | |
1002 | reg &= ~RTL818X_CMD_RX_ENABLE; | |
1003 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
1004 | ||
f6532111 | 1005 | priv->rf->stop(dev); |
0bf198eb | 1006 | rtl8187_set_anaparam(priv, false); |
605bebe2 MW |
1007 | |
1008 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
1009 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); | |
1010 | rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); | |
1011 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
1012 | ||
3517afde HRK |
1013 | while ((skb = skb_dequeue(&priv->b_tx_status.queue))) |
1014 | dev_kfree_skb_any(skb); | |
c1db52b9 LF |
1015 | |
1016 | usb_kill_anchored_urbs(&priv->anchored); | |
6a8171f2 HRK |
1017 | mutex_unlock(&priv->conf_mutex); |
1018 | ||
2f47690e LF |
1019 | if (!priv->is_rtl8187b) |
1020 | cancel_delayed_work_sync(&priv->work); | |
605bebe2 MW |
1021 | } |
1022 | ||
1023 | static int rtl8187_add_interface(struct ieee80211_hw *dev, | |
1ed32e4f | 1024 | struct ieee80211_vif *vif) |
605bebe2 MW |
1025 | { |
1026 | struct rtl8187_priv *priv = dev->priv; | |
4150c572 | 1027 | int i; |
66aafd9a | 1028 | int ret = -EOPNOTSUPP; |
605bebe2 | 1029 | |
66aafd9a | 1030 | mutex_lock(&priv->conf_mutex); |
d30506e0 | 1031 | if (priv->vif) |
66aafd9a | 1032 | goto exit; |
605bebe2 | 1033 | |
1ed32e4f | 1034 | switch (vif->type) { |
05c914fe | 1035 | case NL80211_IFTYPE_STATION: |
605bebe2 MW |
1036 | break; |
1037 | default: | |
66aafd9a | 1038 | goto exit; |
605bebe2 MW |
1039 | } |
1040 | ||
66aafd9a | 1041 | ret = 0; |
1ed32e4f | 1042 | priv->vif = vif; |
aa979a6a | 1043 | |
4150c572 JB |
1044 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
1045 | for (i = 0; i < ETH_ALEN; i++) | |
1046 | rtl818x_iowrite8(priv, &priv->map->MAC[i], | |
1ed32e4f | 1047 | ((u8 *)vif->addr)[i]); |
4150c572 | 1048 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
605bebe2 | 1049 | |
66aafd9a | 1050 | exit: |
7dcdd073 | 1051 | mutex_unlock(&priv->conf_mutex); |
66aafd9a | 1052 | return ret; |
605bebe2 MW |
1053 | } |
1054 | ||
1055 | static void rtl8187_remove_interface(struct ieee80211_hw *dev, | |
1ed32e4f | 1056 | struct ieee80211_vif *vif) |
605bebe2 MW |
1057 | { |
1058 | struct rtl8187_priv *priv = dev->priv; | |
7dcdd073 | 1059 | mutex_lock(&priv->conf_mutex); |
aa979a6a | 1060 | priv->vif = NULL; |
7dcdd073 | 1061 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
1062 | } |
1063 | ||
e8975581 | 1064 | static int rtl8187_config(struct ieee80211_hw *dev, u32 changed) |
605bebe2 MW |
1065 | { |
1066 | struct rtl8187_priv *priv = dev->priv; | |
e8975581 | 1067 | struct ieee80211_conf *conf = &dev->conf; |
f6532111 MW |
1068 | u32 reg; |
1069 | ||
7dcdd073 | 1070 | mutex_lock(&priv->conf_mutex); |
f6532111 MW |
1071 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); |
1072 | /* Enable TX loopback on MAC level to avoid TX during channel | |
1073 | * changes, as this has be seen to causes problems and the | |
1074 | * card will stop work until next reset | |
1075 | */ | |
1076 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, | |
1077 | reg | RTL818X_TX_CONF_LOOPBACK_MAC); | |
f6532111 MW |
1078 | priv->rf->set_chan(dev, conf); |
1079 | msleep(10); | |
1080 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
605bebe2 | 1081 | |
605bebe2 MW |
1082 | rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); |
1083 | rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); | |
1084 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | |
1085 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); | |
7dcdd073 | 1086 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
1087 | return 0; |
1088 | } | |
1089 | ||
b4572a92 HRK |
1090 | /* |
1091 | * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for | |
1092 | * example. Thus we have to use raw values for AC_*_PARAM register addresses. | |
1093 | */ | |
1094 | static __le32 *rtl8187b_ac_addr[4] = { | |
1095 | (__le32 *) 0xFFF0, /* AC_VO */ | |
1096 | (__le32 *) 0xFFF4, /* AC_VI */ | |
1097 | (__le32 *) 0xFFFC, /* AC_BK */ | |
1098 | (__le32 *) 0xFFF8, /* AC_BE */ | |
1099 | }; | |
1100 | ||
1101 | #define SIFS_TIME 0xa | |
1102 | ||
f8288317 HRK |
1103 | static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot, |
1104 | bool use_short_preamble) | |
64761077 | 1105 | { |
f8288317 | 1106 | if (priv->is_rtl8187b) { |
b4572a92 | 1107 | u8 difs, eifs; |
f8288317 | 1108 | u16 ack_timeout; |
b4572a92 | 1109 | int queue; |
f8288317 HRK |
1110 | |
1111 | if (use_short_slot) { | |
b4572a92 | 1112 | priv->slot_time = 0x9; |
f8288317 HRK |
1113 | difs = 0x1c; |
1114 | eifs = 0x53; | |
1115 | } else { | |
b4572a92 | 1116 | priv->slot_time = 0x14; |
f8288317 HRK |
1117 | difs = 0x32; |
1118 | eifs = 0x5b; | |
1119 | } | |
54ac218a | 1120 | rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); |
b4572a92 | 1121 | rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time); |
f8288317 HRK |
1122 | rtl818x_iowrite8(priv, &priv->map->DIFS, difs); |
1123 | ||
1124 | /* | |
1125 | * BRSR+1 on 8187B is in fact EIFS register | |
1126 | * Value in units of 4 us | |
1127 | */ | |
1128 | rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs); | |
1129 | ||
1130 | /* | |
1131 | * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout | |
1132 | * register. In units of 4 us like eifs register | |
1133 | * ack_timeout = ack duration + plcp + difs + preamble | |
1134 | */ | |
1135 | ack_timeout = 112 + 48 + difs; | |
1136 | if (use_short_preamble) | |
1137 | ack_timeout += 72; | |
1138 | else | |
1139 | ack_timeout += 144; | |
1140 | rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, | |
1141 | DIV_ROUND_UP(ack_timeout, 4)); | |
b4572a92 HRK |
1142 | |
1143 | for (queue = 0; queue < 4; queue++) | |
1144 | rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue], | |
1145 | priv->aifsn[queue] * priv->slot_time + | |
1146 | SIFS_TIME); | |
f8288317 | 1147 | } else { |
64761077 HRK |
1148 | rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); |
1149 | if (use_short_slot) { | |
1150 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); | |
1151 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); | |
1152 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); | |
64761077 HRK |
1153 | } else { |
1154 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); | |
1155 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); | |
1156 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); | |
64761077 HRK |
1157 | } |
1158 | } | |
1159 | } | |
1160 | ||
1161 | static void rtl8187_bss_info_changed(struct ieee80211_hw *dev, | |
1162 | struct ieee80211_vif *vif, | |
1163 | struct ieee80211_bss_conf *info, | |
1164 | u32 changed) | |
1165 | { | |
1166 | struct rtl8187_priv *priv = dev->priv; | |
2d0ddec5 JB |
1167 | int i; |
1168 | u8 reg; | |
1169 | ||
1170 | if (changed & BSS_CHANGED_BSSID) { | |
1171 | mutex_lock(&priv->conf_mutex); | |
1172 | for (i = 0; i < ETH_ALEN; i++) | |
1173 | rtl818x_iowrite8(priv, &priv->map->BSSID[i], | |
1174 | info->bssid[i]); | |
1175 | ||
1a9937b7 HRK |
1176 | if (priv->is_rtl8187b) |
1177 | reg = RTL818X_MSR_ENEDCA; | |
1178 | else | |
1179 | reg = 0; | |
1180 | ||
31a5cdda | 1181 | if (is_valid_ether_addr(info->bssid)) |
1a9937b7 | 1182 | reg |= RTL818X_MSR_INFRA; |
31a5cdda | 1183 | else |
1a9937b7 | 1184 | reg |= RTL818X_MSR_NO_LINK; |
31a5cdda JL |
1185 | |
1186 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); | |
2d0ddec5 JB |
1187 | |
1188 | mutex_unlock(&priv->conf_mutex); | |
1189 | } | |
64761077 | 1190 | |
f8288317 HRK |
1191 | if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) |
1192 | rtl8187_conf_erp(priv, info->use_short_slot, | |
1193 | info->use_short_preamble); | |
64761077 HRK |
1194 | } |
1195 | ||
3ac64bee | 1196 | static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev, |
22bedad3 | 1197 | struct netdev_hw_addr_list *mc_list) |
3ac64bee | 1198 | { |
22bedad3 | 1199 | return netdev_hw_addr_list_count(mc_list); |
3ac64bee JB |
1200 | } |
1201 | ||
4150c572 JB |
1202 | static void rtl8187_configure_filter(struct ieee80211_hw *dev, |
1203 | unsigned int changed_flags, | |
1204 | unsigned int *total_flags, | |
3ac64bee | 1205 | u64 multicast) |
4150c572 JB |
1206 | { |
1207 | struct rtl8187_priv *priv = dev->priv; | |
1208 | ||
4150c572 JB |
1209 | if (changed_flags & FIF_FCSFAIL) |
1210 | priv->rx_conf ^= RTL818X_RX_CONF_FCS; | |
1211 | if (changed_flags & FIF_CONTROL) | |
1212 | priv->rx_conf ^= RTL818X_RX_CONF_CTRL; | |
1213 | if (changed_flags & FIF_OTHER_BSS) | |
1214 | priv->rx_conf ^= RTL818X_RX_CONF_MONITOR; | |
3ac64bee | 1215 | if (*total_flags & FIF_ALLMULTI || multicast > 0) |
4150c572 | 1216 | priv->rx_conf |= RTL818X_RX_CONF_MULTICAST; |
2fe14263 MW |
1217 | else |
1218 | priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST; | |
1219 | ||
1220 | *total_flags = 0; | |
4150c572 | 1221 | |
4150c572 JB |
1222 | if (priv->rx_conf & RTL818X_RX_CONF_FCS) |
1223 | *total_flags |= FIF_FCSFAIL; | |
1224 | if (priv->rx_conf & RTL818X_RX_CONF_CTRL) | |
1225 | *total_flags |= FIF_CONTROL; | |
1226 | if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) | |
1227 | *total_flags |= FIF_OTHER_BSS; | |
2fe14263 MW |
1228 | if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST) |
1229 | *total_flags |= FIF_ALLMULTI; | |
4150c572 JB |
1230 | |
1231 | rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf); | |
1232 | } | |
1233 | ||
b4572a92 HRK |
1234 | static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue, |
1235 | const struct ieee80211_tx_queue_params *params) | |
1236 | { | |
1237 | struct rtl8187_priv *priv = dev->priv; | |
1238 | u8 cw_min, cw_max; | |
1239 | ||
1240 | if (queue > 3) | |
1241 | return -EINVAL; | |
1242 | ||
1243 | cw_min = fls(params->cw_min); | |
1244 | cw_max = fls(params->cw_max); | |
1245 | ||
1246 | if (priv->is_rtl8187b) { | |
1247 | priv->aifsn[queue] = params->aifs; | |
1248 | ||
1249 | /* | |
1250 | * This is the structure of AC_*_PARAM registers in 8187B: | |
1251 | * - TXOP limit field, bit offset = 16 | |
1252 | * - ECWmax, bit offset = 12 | |
1253 | * - ECWmin, bit offset = 8 | |
1254 | * - AIFS, bit offset = 0 | |
1255 | */ | |
1256 | rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue], | |
1257 | (params->txop << 16) | (cw_max << 12) | | |
1258 | (cw_min << 8) | (params->aifs * | |
1259 | priv->slot_time + SIFS_TIME)); | |
1260 | } else { | |
1261 | if (queue != 0) | |
1262 | return -EINVAL; | |
1263 | ||
1264 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, | |
1265 | cw_min | (cw_max << 4)); | |
1266 | } | |
1267 | return 0; | |
1268 | } | |
1269 | ||
22e16e55 LF |
1270 | static u64 rtl8187_get_tsf(struct ieee80211_hw *dev) |
1271 | { | |
1272 | struct rtl8187_priv *priv = dev->priv; | |
1273 | ||
1274 | return rtl818x_ioread32(priv, &priv->map->TSFT[0]) | | |
1275 | (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32; | |
1276 | } | |
1277 | ||
605bebe2 MW |
1278 | static const struct ieee80211_ops rtl8187_ops = { |
1279 | .tx = rtl8187_tx, | |
4150c572 | 1280 | .start = rtl8187_start, |
605bebe2 MW |
1281 | .stop = rtl8187_stop, |
1282 | .add_interface = rtl8187_add_interface, | |
1283 | .remove_interface = rtl8187_remove_interface, | |
1284 | .config = rtl8187_config, | |
64761077 | 1285 | .bss_info_changed = rtl8187_bss_info_changed, |
3ac64bee | 1286 | .prepare_multicast = rtl8187_prepare_multicast, |
4150c572 | 1287 | .configure_filter = rtl8187_configure_filter, |
ca9152e3 | 1288 | .conf_tx = rtl8187_conf_tx, |
22e16e55 LF |
1289 | .rfkill_poll = rtl8187_rfkill_poll, |
1290 | .get_tsf = rtl8187_get_tsf, | |
605bebe2 MW |
1291 | }; |
1292 | ||
1293 | static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) | |
1294 | { | |
1295 | struct ieee80211_hw *dev = eeprom->data; | |
1296 | struct rtl8187_priv *priv = dev->priv; | |
1297 | u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); | |
1298 | ||
1299 | eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; | |
1300 | eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; | |
1301 | eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; | |
1302 | eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; | |
1303 | } | |
1304 | ||
1305 | static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) | |
1306 | { | |
1307 | struct ieee80211_hw *dev = eeprom->data; | |
1308 | struct rtl8187_priv *priv = dev->priv; | |
1309 | u8 reg = RTL818X_EEPROM_CMD_PROGRAM; | |
1310 | ||
1311 | if (eeprom->reg_data_in) | |
1312 | reg |= RTL818X_EEPROM_CMD_WRITE; | |
1313 | if (eeprom->reg_data_out) | |
1314 | reg |= RTL818X_EEPROM_CMD_READ; | |
1315 | if (eeprom->reg_data_clock) | |
1316 | reg |= RTL818X_EEPROM_CMD_CK; | |
1317 | if (eeprom->reg_chip_select) | |
1318 | reg |= RTL818X_EEPROM_CMD_CS; | |
1319 | ||
1320 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); | |
1321 | udelay(10); | |
1322 | } | |
1323 | ||
1324 | static int __devinit rtl8187_probe(struct usb_interface *intf, | |
1325 | const struct usb_device_id *id) | |
1326 | { | |
1327 | struct usb_device *udev = interface_to_usbdev(intf); | |
1328 | struct ieee80211_hw *dev; | |
1329 | struct rtl8187_priv *priv; | |
1330 | struct eeprom_93cx6 eeprom; | |
1331 | struct ieee80211_channel *channel; | |
6f7853f3 | 1332 | const char *chip_name; |
605bebe2 | 1333 | u16 txpwr, reg; |
70d57139 | 1334 | u16 product_id = le16_to_cpu(udev->descriptor.idProduct); |
605bebe2 | 1335 | int err, i; |
f2c98382 | 1336 | u8 mac_addr[ETH_ALEN]; |
605bebe2 MW |
1337 | |
1338 | dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); | |
1339 | if (!dev) { | |
1340 | printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); | |
1341 | return -ENOMEM; | |
1342 | } | |
1343 | ||
1344 | priv = dev->priv; | |
0e25b4ef | 1345 | priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B); |
605bebe2 | 1346 | |
9be6f0d4 JL |
1347 | /* allocate "DMA aware" buffer for register accesses */ |
1348 | priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL); | |
1349 | if (!priv->io_dmabuf) { | |
1350 | err = -ENOMEM; | |
1351 | goto err_free_dev; | |
1352 | } | |
1353 | mutex_init(&priv->io_mutex); | |
1354 | ||
605bebe2 MW |
1355 | SET_IEEE80211_DEV(dev, &intf->dev); |
1356 | usb_set_intfdata(intf, dev); | |
1357 | priv->udev = udev; | |
1358 | ||
1359 | usb_get_dev(udev); | |
1360 | ||
1361 | skb_queue_head_init(&priv->rx_queue); | |
8318d78a JB |
1362 | |
1363 | BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels)); | |
1364 | BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates)); | |
1365 | ||
605bebe2 MW |
1366 | memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); |
1367 | memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); | |
1368 | priv->map = (struct rtl818x_csr *)0xFF00; | |
8318d78a JB |
1369 | |
1370 | priv->band.band = IEEE80211_BAND_2GHZ; | |
1371 | priv->band.channels = priv->channels; | |
1372 | priv->band.n_channels = ARRAY_SIZE(rtl818x_channels); | |
1373 | priv->band.bitrates = priv->rates; | |
1374 | priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates); | |
1375 | dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band; | |
1376 | ||
1377 | ||
605bebe2 | 1378 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
a7db74f4 | 1379 | IEEE80211_HW_SIGNAL_DBM | |
0ccd58fc | 1380 | IEEE80211_HW_RX_INCLUDES_FCS; |
605bebe2 | 1381 | |
605bebe2 MW |
1382 | eeprom.data = dev; |
1383 | eeprom.register_read = rtl8187_eeprom_register_read; | |
1384 | eeprom.register_write = rtl8187_eeprom_register_write; | |
1385 | if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) | |
1386 | eeprom.width = PCI_EEPROM_WIDTH_93C66; | |
1387 | else | |
1388 | eeprom.width = PCI_EEPROM_WIDTH_93C46; | |
1389 | ||
1390 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
1391 | udelay(10); | |
1392 | ||
1393 | eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, | |
f2c98382 JL |
1394 | (__le16 __force *)mac_addr, 3); |
1395 | if (!is_valid_ether_addr(mac_addr)) { | |
605bebe2 MW |
1396 | printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " |
1397 | "generated MAC address\n"); | |
f2c98382 | 1398 | random_ether_addr(mac_addr); |
605bebe2 | 1399 | } |
f2c98382 | 1400 | SET_IEEE80211_PERM_ADDR(dev, mac_addr); |
605bebe2 MW |
1401 | |
1402 | channel = priv->channels; | |
1403 | for (i = 0; i < 3; i++) { | |
1404 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, | |
1405 | &txpwr); | |
8318d78a JB |
1406 | (*channel++).hw_value = txpwr & 0xFF; |
1407 | (*channel++).hw_value = txpwr >> 8; | |
605bebe2 MW |
1408 | } |
1409 | for (i = 0; i < 2; i++) { | |
1410 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, | |
1411 | &txpwr); | |
8318d78a JB |
1412 | (*channel++).hw_value = txpwr & 0xFF; |
1413 | (*channel++).hw_value = txpwr >> 8; | |
605bebe2 | 1414 | } |
605bebe2 MW |
1415 | |
1416 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, | |
1417 | &priv->txpwr_base); | |
1418 | ||
f6532111 MW |
1419 | reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; |
1420 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); | |
605bebe2 MW |
1421 | /* 0 means asic B-cut, we should use SW 3 wire |
1422 | * bit-by-bit banging for radio. 1 means we can use | |
1423 | * USB specific request to write radio registers */ | |
1424 | priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; | |
f6532111 | 1425 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); |
605bebe2 MW |
1426 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
1427 | ||
6f7853f3 HTL |
1428 | if (!priv->is_rtl8187b) { |
1429 | u32 reg32; | |
1430 | reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF); | |
1431 | reg32 &= RTL818X_TX_CONF_HWVER_MASK; | |
1432 | switch (reg32) { | |
0e25b4ef LF |
1433 | case RTL818X_TX_CONF_R8187vD_B: |
1434 | /* Some RTL8187B devices have a USB ID of 0x8187 | |
1435 | * detect them here */ | |
1436 | chip_name = "RTL8187BvB(early)"; | |
1437 | priv->is_rtl8187b = 1; | |
1438 | priv->hw_rev = RTL8187BvB; | |
1439 | break; | |
1440 | case RTL818X_TX_CONF_R8187vD: | |
6f7853f3 HTL |
1441 | chip_name = "RTL8187vD"; |
1442 | break; | |
1443 | default: | |
1444 | chip_name = "RTL8187vB (default)"; | |
1445 | } | |
1446 | } else { | |
6f7853f3 HTL |
1447 | /* |
1448 | * Force USB request to write radio registers for 8187B, Realtek | |
1449 | * only uses it in their sources | |
1450 | */ | |
1451 | /*if (priv->asic_rev == 0) { | |
1452 | printk(KERN_WARNING "rtl8187: Forcing use of USB " | |
1453 | "requests to write to radio registers\n"); | |
1454 | priv->asic_rev = 1; | |
1455 | }*/ | |
1456 | switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) { | |
1457 | case RTL818X_R8187B_B: | |
1458 | chip_name = "RTL8187BvB"; | |
1459 | priv->hw_rev = RTL8187BvB; | |
1460 | break; | |
1461 | case RTL818X_R8187B_D: | |
1462 | chip_name = "RTL8187BvD"; | |
1463 | priv->hw_rev = RTL8187BvD; | |
1464 | break; | |
1465 | case RTL818X_R8187B_E: | |
1466 | chip_name = "RTL8187BvE"; | |
1467 | priv->hw_rev = RTL8187BvE; | |
1468 | break; | |
1469 | default: | |
1470 | chip_name = "RTL8187BvB (default)"; | |
1471 | priv->hw_rev = RTL8187BvB; | |
1472 | } | |
1473 | } | |
1474 | ||
0e25b4ef LF |
1475 | if (!priv->is_rtl8187b) { |
1476 | for (i = 0; i < 2; i++) { | |
1477 | eeprom_93cx6_read(&eeprom, | |
1478 | RTL8187_EEPROM_TXPWR_CHAN_6 + i, | |
1479 | &txpwr); | |
1480 | (*channel++).hw_value = txpwr & 0xFF; | |
1481 | (*channel++).hw_value = txpwr >> 8; | |
1482 | } | |
1483 | } else { | |
1484 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6, | |
1485 | &txpwr); | |
1486 | (*channel++).hw_value = txpwr & 0xFF; | |
1487 | ||
1488 | eeprom_93cx6_read(&eeprom, 0x0A, &txpwr); | |
1489 | (*channel++).hw_value = txpwr & 0xFF; | |
1490 | ||
1491 | eeprom_93cx6_read(&eeprom, 0x1C, &txpwr); | |
1492 | (*channel++).hw_value = txpwr & 0xFF; | |
1493 | (*channel++).hw_value = txpwr >> 8; | |
1494 | } | |
70d57139 LF |
1495 | /* Handle the differing rfkill GPIO bit in different models */ |
1496 | priv->rfkill_mask = RFKILL_MASK_8187_89_97; | |
1497 | if (product_id == 0x8197 || product_id == 0x8198) { | |
1498 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, ®); | |
1499 | if (reg & 0xFF00) | |
1500 | priv->rfkill_mask = RFKILL_MASK_8198; | |
1501 | } | |
0e25b4ef | 1502 | |
94778280 JB |
1503 | /* |
1504 | * XXX: Once this driver supports anything that requires | |
1505 | * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ. | |
1506 | */ | |
f59ac048 LR |
1507 | dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); |
1508 | ||
0e25b4ef LF |
1509 | if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b) |
1510 | printk(KERN_INFO "rtl8187: inconsistency between id with OEM" | |
1511 | " info!\n"); | |
1512 | ||
f6532111 | 1513 | priv->rf = rtl8187_detect_rf(dev); |
0e25b4ef LF |
1514 | dev->extra_tx_headroom = (!priv->is_rtl8187b) ? |
1515 | sizeof(struct rtl8187_tx_hdr) : | |
1516 | sizeof(struct rtl8187b_tx_hdr); | |
1517 | if (!priv->is_rtl8187b) | |
1518 | dev->queues = 1; | |
1519 | else | |
1520 | dev->queues = 4; | |
605bebe2 MW |
1521 | |
1522 | err = ieee80211_register_hw(dev); | |
1523 | if (err) { | |
1524 | printk(KERN_ERR "rtl8187: Cannot register device\n"); | |
9be6f0d4 | 1525 | goto err_free_dmabuf; |
605bebe2 | 1526 | } |
7dcdd073 | 1527 | mutex_init(&priv->conf_mutex); |
3517afde | 1528 | skb_queue_head_init(&priv->b_tx_status.queue); |
605bebe2 | 1529 | |
5db55844 | 1530 | wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n", |
c96c31e4 JP |
1531 | mac_addr, chip_name, priv->asic_rev, priv->rf->name, |
1532 | priv->rfkill_mask); | |
605bebe2 | 1533 | |
a027087a LF |
1534 | #ifdef CONFIG_RTL8187_LEDS |
1535 | eeprom_93cx6_read(&eeprom, 0x3F, ®); | |
1536 | reg &= 0xFF; | |
1537 | rtl8187_leds_init(dev, reg); | |
1538 | #endif | |
ca9152e3 | 1539 | rtl8187_rfkill_init(dev); |
a027087a | 1540 | |
605bebe2 MW |
1541 | return 0; |
1542 | ||
9be6f0d4 JL |
1543 | err_free_dmabuf: |
1544 | kfree(priv->io_dmabuf); | |
605bebe2 MW |
1545 | err_free_dev: |
1546 | ieee80211_free_hw(dev); | |
1547 | usb_set_intfdata(intf, NULL); | |
1548 | usb_put_dev(udev); | |
1549 | return err; | |
1550 | } | |
1551 | ||
1552 | static void __devexit rtl8187_disconnect(struct usb_interface *intf) | |
1553 | { | |
1554 | struct ieee80211_hw *dev = usb_get_intfdata(intf); | |
1555 | struct rtl8187_priv *priv; | |
1556 | ||
1557 | if (!dev) | |
1558 | return; | |
1559 | ||
a027087a LF |
1560 | #ifdef CONFIG_RTL8187_LEDS |
1561 | rtl8187_leds_exit(dev); | |
1562 | #endif | |
ca9152e3 | 1563 | rtl8187_rfkill_exit(dev); |
605bebe2 MW |
1564 | ieee80211_unregister_hw(dev); |
1565 | ||
1566 | priv = dev->priv; | |
d6e2be98 | 1567 | usb_reset_device(priv->udev); |
605bebe2 | 1568 | usb_put_dev(interface_to_usbdev(intf)); |
9be6f0d4 | 1569 | kfree(priv->io_dmabuf); |
605bebe2 MW |
1570 | ieee80211_free_hw(dev); |
1571 | } | |
1572 | ||
1573 | static struct usb_driver rtl8187_driver = { | |
1574 | .name = KBUILD_MODNAME, | |
1575 | .id_table = rtl8187_table, | |
1576 | .probe = rtl8187_probe, | |
500c1197 | 1577 | .disconnect = __devexit_p(rtl8187_disconnect), |
605bebe2 MW |
1578 | }; |
1579 | ||
1580 | static int __init rtl8187_init(void) | |
1581 | { | |
1582 | return usb_register(&rtl8187_driver); | |
1583 | } | |
1584 | ||
1585 | static void __exit rtl8187_exit(void) | |
1586 | { | |
1587 | usb_deregister(&rtl8187_driver); | |
1588 | } | |
1589 | ||
1590 | module_init(rtl8187_init); | |
1591 | module_exit(rtl8187_exit); |