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mac80211: add helpers for frame control testing
[linux-2.6-block.git] / drivers / net / wireless / rtl8187_dev.c
CommitLineData
605bebe2
MW		 1/*
2 * Linux device driver for RTL8187
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9 *
0aec00ae
JL		 10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
605bebe2
MW		 12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18#include <linux/init.h>
19#include <linux/usb.h>
20#include <linux/delay.h>
21#include <linux/etherdevice.h>
22#include <linux/eeprom_93cx6.h>
23#include <net/mac80211.h>
24
25#include "rtl8187.h"
26#include "rtl8187_rtl8225.h"
27
28MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30MODULE_DESCRIPTION("RTL8187 USB wireless driver");
31MODULE_LICENSE("GPL");
32
33static struct usb_device_id rtl8187_table[] __devinitdata = {
34 /* Realtek */
35 {USB_DEVICE(0x0bda, 0x8187)},
36 /* Netgear */
37 {USB_DEVICE(0x0846, 0x6100)},
38 {USB_DEVICE(0x0846, 0x6a00)},
c3cf60a9
MW		 39 /* HP */
40 {USB_DEVICE(0x03f0, 0xca02)},
9934550d
MM		 41 /* Sitecom */
42 {USB_DEVICE(0x0df6, 0x000d)},
605bebe2
MW		 43 {}
44};
45
46MODULE_DEVICE_TABLE(usb, rtl8187_table);
47
8318d78a
JB		 48static const struct ieee80211_rate rtl818x_rates[] = {
49 { .bitrate = 10, .hw_value = 0, },
50 { .bitrate = 20, .hw_value = 1, },
51 { .bitrate = 55, .hw_value = 2, },
52 { .bitrate = 110, .hw_value = 3, },
53 { .bitrate = 60, .hw_value = 4, },
54 { .bitrate = 90, .hw_value = 5, },
55 { .bitrate = 120, .hw_value = 6, },
56 { .bitrate = 180, .hw_value = 7, },
57 { .bitrate = 240, .hw_value = 8, },
58 { .bitrate = 360, .hw_value = 9, },
59 { .bitrate = 480, .hw_value = 10, },
60 { .bitrate = 540, .hw_value = 11, },
61};
62
63static const struct ieee80211_channel rtl818x_channels[] = {
64 { .center_freq = 2412 },
65 { .center_freq = 2417 },
66 { .center_freq = 2422 },
67 { .center_freq = 2427 },
68 { .center_freq = 2432 },
69 { .center_freq = 2437 },
70 { .center_freq = 2442 },
71 { .center_freq = 2447 },
72 { .center_freq = 2452 },
73 { .center_freq = 2457 },
74 { .center_freq = 2462 },
75 { .center_freq = 2467 },
76 { .center_freq = 2472 },
77 { .center_freq = 2484 },
78};
79
4150c572
JB		 80static void rtl8187_iowrite_async_cb(struct urb *urb)
81{
82 kfree(urb->context);
83 usb_free_urb(urb);
84}
85
86static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
87 void *data, u16 len)
88{
89 struct usb_ctrlrequest *dr;
90 struct urb *urb;
91 struct rtl8187_async_write_data {
92 u8 data[4];
93 struct usb_ctrlrequest dr;
94 } *buf;
ea8ee240 95 int rc;
4150c572
JB		 96
97 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
98 if (!buf)
99 return;
100
101 urb = usb_alloc_urb(0, GFP_ATOMIC);
102 if (!urb) {
103 kfree(buf);
104 return;
105 }
106
107 dr = &buf->dr;
108
109 dr->bRequestType = RTL8187_REQT_WRITE;
110 dr->bRequest = RTL8187_REQ_SET_REG;
111 dr->wValue = addr;
112 dr->wIndex = 0;
113 dr->wLength = cpu_to_le16(len);
114
115 memcpy(buf, data, len);
116
117 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
118 (unsigned char *)dr, buf, len,
119 rtl8187_iowrite_async_cb, buf);
ea8ee240
ON		 120 rc = usb_submit_urb(urb, GFP_ATOMIC);
121 if (rc < 0) {
122 kfree(buf);
123 usb_free_urb(urb);
124 }
4150c572
JB		 125}
126
127static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
128 __le32 *addr, u32 val)
129{
130 __le32 buf = cpu_to_le32(val);
131
132 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
133 &buf, sizeof(buf));
134}
135
605bebe2
MW		 136void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
137{
138 struct rtl8187_priv *priv = dev->priv;
139
140 data <<= 8;
141 data |= addr | 0x80;
142
143 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
144 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
145 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
146 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
147
148 msleep(1);
149}
150
151static void rtl8187_tx_cb(struct urb *urb)
152{
605bebe2 153 struct sk_buff *skb = (struct sk_buff *)urb->context;
e039fa4a
JB		 154 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
155 struct ieee80211_hw *hw = info->driver_data[0];
605bebe2 156
e039fa4a 157 usb_free_urb(info->driver_data[1]);
605bebe2 158 skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
e039fa4a
JB		 159 memset(&info->status, 0, sizeof(info->status));
160 info->flags |= IEEE80211_TX_STAT_ACK;
161 ieee80211_tx_status_irqsafe(hw, skb);
605bebe2
MW		 162}
163
e039fa4a 164static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
605bebe2
MW		 165{
166 struct rtl8187_priv *priv = dev->priv;
e039fa4a 167 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
605bebe2 168 struct rtl8187_tx_hdr *hdr;
605bebe2 169 struct urb *urb;
98798f48
MW		 170 __le16 rts_dur = 0;
171 u32 flags;
ea8ee240 172 int rc;
605bebe2
MW		 173
174 urb = usb_alloc_urb(0, GFP_ATOMIC);
175 if (!urb) {
176 kfree_skb(skb);
177 return 0;
178 }
179
98798f48
MW		 180 flags = skb->len;
181 flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
aa68cbfb 182
e039fa4a 183 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
98798f48
MW		 184 if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
185 flags |= RTL8187_TX_FLAG_MORE_FRAG;
e039fa4a 186 if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
98798f48 187 flags |= RTL8187_TX_FLAG_RTS;
e039fa4a 188 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
32bfd35d 189 rts_dur = ieee80211_rts_duration(dev, priv->vif,
e039fa4a
JB		 190 skb->len, info);
191 } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
98798f48 192 flags |= RTL8187_TX_FLAG_CTS;
e039fa4a 193 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
aa68cbfb 194 }
98798f48
MW		 195
196 hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
197 hdr->flags = cpu_to_le32(flags);
605bebe2 198 hdr->len = 0;
98798f48 199 hdr->rts_duration = rts_dur;
e039fa4a 200 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
605bebe2 201
e039fa4a
JB		 202 info->driver_data[0] = dev;
203 info->driver_data[1] = urb;
605bebe2
MW		 204 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
205 hdr, skb->len, rtl8187_tx_cb, skb);
ea8ee240
ON		 206 rc = usb_submit_urb(urb, GFP_ATOMIC);
207 if (rc < 0) {
208 usb_free_urb(urb);
209 kfree_skb(skb);
210 }
605bebe2
MW		 211
212 return 0;
213}
214
215static void rtl8187_rx_cb(struct urb *urb)
216{
217 struct sk_buff *skb = (struct sk_buff *)urb->context;
218 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
219 struct ieee80211_hw *dev = info->dev;
220 struct rtl8187_priv *priv = dev->priv;
221 struct rtl8187_rx_hdr *hdr;
222 struct ieee80211_rx_status rx_status = { 0 };
223 int rate, signal;
4150c572 224 u32 flags;
605bebe2
MW		 225
226 spin_lock(&priv->rx_queue.lock);
227 if (skb->next)
228 __skb_unlink(skb, &priv->rx_queue);
229 else {
230 spin_unlock(&priv->rx_queue.lock);
231 return;
232 }
233 spin_unlock(&priv->rx_queue.lock);
234
235 if (unlikely(urb->status)) {
236 usb_free_urb(urb);
237 dev_kfree_skb_irq(skb);
238 return;
239 }
240
241 skb_put(skb, urb->actual_length);
242 hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
4150c572
JB		 243 flags = le32_to_cpu(hdr->flags);
244 skb_trim(skb, flags & 0x0FFF);
605bebe2
MW		 245
246 signal = hdr->agc >> 1;
4150c572 247 rate = (flags >> 20) & 0xF;
605bebe2
MW		 248 if (rate > 3) { /* OFDM rate */
249 if (signal > 90)
250 signal = 90;
251 else if (signal < 25)
252 signal = 25;
253 signal = 90 - signal;
254 } else { /* CCK rate */
255 if (signal > 95)
256 signal = 95;
257 else if (signal < 30)
258 signal = 30;
259 signal = 95 - signal;
260 }
261
262 rx_status.antenna = (hdr->signal >> 7) & 1;
566bfe5a
BR		 263 rx_status.qual = 64 - min(hdr->noise, (u8)64);
264 rx_status.signal = signal;
8318d78a
JB		 265 rx_status.rate_idx = rate;
266 rx_status.freq = dev->conf.channel->center_freq;
267 rx_status.band = dev->conf.channel->band;
605bebe2 268 rx_status.mactime = le64_to_cpu(hdr->mac_time);
03bffc13 269 rx_status.flag |= RX_FLAG_TSFT;
4150c572
JB		 270 if (flags & (1 << 13))
271 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
605bebe2
MW		 272 ieee80211_rx_irqsafe(dev, skb, &rx_status);
273
274 skb = dev_alloc_skb(RTL8187_MAX_RX);
275 if (unlikely(!skb)) {
276 usb_free_urb(urb);
277 /* TODO check rx queue length and refill *somewhere* */
278 return;
279 }
280
281 info = (struct rtl8187_rx_info *)skb->cb;
282 info->urb = urb;
283 info->dev = dev;
284 urb->transfer_buffer = skb_tail_pointer(skb);
285 urb->context = skb;
286 skb_queue_tail(&priv->rx_queue, skb);
287
288 usb_submit_urb(urb, GFP_ATOMIC);
289}
290
291static int rtl8187_init_urbs(struct ieee80211_hw *dev)
292{
293 struct rtl8187_priv *priv = dev->priv;
294 struct urb *entry;
295 struct sk_buff *skb;
296 struct rtl8187_rx_info *info;
297
298 while (skb_queue_len(&priv->rx_queue) < 8) {
299 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
300 if (!skb)
301 break;
302 entry = usb_alloc_urb(0, GFP_KERNEL);
303 if (!entry) {
304 kfree_skb(skb);
305 break;
306 }
307 usb_fill_bulk_urb(entry, priv->udev,
308 usb_rcvbulkpipe(priv->udev, 1),
309 skb_tail_pointer(skb),
310 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
311 info = (struct rtl8187_rx_info *)skb->cb;
312 info->urb = entry;
313 info->dev = dev;
314 skb_queue_tail(&priv->rx_queue, skb);
315 usb_submit_urb(entry, GFP_KERNEL);
316 }
317
318 return 0;
319}
320
321static int rtl8187_init_hw(struct ieee80211_hw *dev)
322{
323 struct rtl8187_priv *priv = dev->priv;
324 u8 reg;
325 int i;
326
327 /* reset */
328 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
329 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
330 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
331 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
332 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
333 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
334 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
335
336 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
337
338 msleep(200);
339 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
340 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
341 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
342 msleep(200);
343
344 reg = rtl818x_ioread8(priv, &priv->map->CMD);
345 reg &= (1 << 1);
346 reg |= RTL818X_CMD_RESET;
347 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
348
349 i = 10;
350 do {
351 msleep(2);
352 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
353 RTL818X_CMD_RESET))
354 break;
355 } while (--i);
356
357 if (!i) {
358 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
359 return -ETIMEDOUT;
360 }
361
362 /* reload registers from eeprom */
363 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
364
365 i = 10;
366 do {
367 msleep(4);
368 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
369 RTL818X_EEPROM_CMD_CONFIG))
370 break;
371 } while (--i);
372
373 if (!i) {
374 printk(KERN_ERR "%s: eeprom reset timeout!\n",
375 wiphy_name(dev->wiphy));
376 return -ETIMEDOUT;
377 }
378
379 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
380 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
381 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
382 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
383 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
384 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
385 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
386
387 /* setup card */
388 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
389 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
390
391 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
392 rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
393 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
394
395 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
605bebe2
MW		 396
397 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
398 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
399 reg &= 0x3F;
400 reg |= 0x80;
401 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
402
403 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
404
405 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
406 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
407 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
408
409 // TODO: set RESP_RATE and BRSR properly
410 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
411 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
412
413 /* host_usb_init */
414 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
415 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
416 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
417 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
418 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
419 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
420 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
421 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
422 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
423 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
424 msleep(100);
425
426 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
427 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
428 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
429 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
430 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
431 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
432 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
433 msleep(100);
434
f6532111 435 priv->rf->init(dev);
605bebe2
MW		 436
437 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
f6532111
MW		 438 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
439 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
605bebe2
MW		 440 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
441 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
442 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
f6532111 443 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
605bebe2
MW		 444
445 return 0;
446}
447
4150c572 448static int rtl8187_start(struct ieee80211_hw *dev)
605bebe2
MW		 449{
450 struct rtl8187_priv *priv = dev->priv;
451 u32 reg;
452 int ret;
453
454 ret = rtl8187_init_hw(dev);
455 if (ret)
456 return ret;
457
458 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
459
2fe14263
MW		 460 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
461 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
462
605bebe2
MW		 463 rtl8187_init_urbs(dev);
464
465 reg = RTL818X_RX_CONF_ONLYERLPKT |
466 RTL818X_RX_CONF_RX_AUTORESETPHY |
467 RTL818X_RX_CONF_BSSID |
468 RTL818X_RX_CONF_MGMT |
605bebe2
MW		 469 RTL818X_RX_CONF_DATA |
470 (7 << 13 /* RX FIFO threshold NONE */) |
471 (7 << 10 /* MAX RX DMA */) |
472 RTL818X_RX_CONF_BROADCAST |
605bebe2 473 RTL818X_RX_CONF_NICMAC;
605bebe2 474
4150c572 475 priv->rx_conf = reg;
605bebe2
MW		 476 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
477
478 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
479 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
480 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
481 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
482
483 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
484 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
485 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
486 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
487 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
488
489 reg = RTL818X_TX_CONF_CW_MIN |
490 (7 << 21 /* MAX TX DMA */) |
491 RTL818X_TX_CONF_NO_ICV;
492 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
493
494 reg = rtl818x_ioread8(priv, &priv->map->CMD);
495 reg |= RTL818X_CMD_TX_ENABLE;
496 reg |= RTL818X_CMD_RX_ENABLE;
497 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
498
499 return 0;
500}
501
4150c572 502static void rtl8187_stop(struct ieee80211_hw *dev)
605bebe2
MW		 503{
504 struct rtl8187_priv *priv = dev->priv;
505 struct rtl8187_rx_info *info;
506 struct sk_buff *skb;
507 u32 reg;
508
509 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
510
511 reg = rtl818x_ioread8(priv, &priv->map->CMD);
512 reg &= ~RTL818X_CMD_TX_ENABLE;
513 reg &= ~RTL818X_CMD_RX_ENABLE;
514 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
515
f6532111 516 priv->rf->stop(dev);
605bebe2
MW		 517
518 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
519 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
520 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
521 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
522
523 while ((skb = skb_dequeue(&priv->rx_queue))) {
524 info = (struct rtl8187_rx_info *)skb->cb;
525 usb_kill_urb(info->urb);
526 kfree_skb(skb);
527 }
4150c572 528 return;
605bebe2
MW		 529}
530
531static int rtl8187_add_interface(struct ieee80211_hw *dev,
532 struct ieee80211_if_init_conf *conf)
533{
534 struct rtl8187_priv *priv = dev->priv;
4150c572 535 int i;
605bebe2 536
4150c572
JB		 537 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
538 return -EOPNOTSUPP;
605bebe2
MW		 539
540 switch (conf->type) {
541 case IEEE80211_IF_TYPE_STA:
605bebe2
MW		 542 priv->mode = conf->type;
543 break;
544 default:
545 return -EOPNOTSUPP;
546 }
547
aa979a6a
HRK		 548 priv->vif = conf->vif;
549
4150c572
JB		 550 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
551 for (i = 0; i < ETH_ALEN; i++)
552 rtl818x_iowrite8(priv, &priv->map->MAC[i],
553 ((u8 *)conf->mac_addr)[i]);
554 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
605bebe2
MW		 555
556 return 0;
557}
558
559static void rtl8187_remove_interface(struct ieee80211_hw *dev,
560 struct ieee80211_if_init_conf *conf)
561{
562 struct rtl8187_priv *priv = dev->priv;
4150c572 563 priv->mode = IEEE80211_IF_TYPE_MNTR;
aa979a6a 564 priv->vif = NULL;
605bebe2
MW		 565}
566
567static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
568{
569 struct rtl8187_priv *priv = dev->priv;
f6532111
MW		 570 u32 reg;
571
572 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
573 /* Enable TX loopback on MAC level to avoid TX during channel
574 * changes, as this has be seen to causes problems and the
575 * card will stop work until next reset
576 */
577 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
578 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
579 msleep(10);
580 priv->rf->set_chan(dev, conf);
581 msleep(10);
582 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
605bebe2
MW		 583
584 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
585
586 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
587 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
588 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
589 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
590 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
591 } else {
592 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
593 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
594 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
595 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
596 }
597
598 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
599 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
600 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
601 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
602 return 0;
603}
604
32bfd35d
JB		 605static int rtl8187_config_interface(struct ieee80211_hw *dev,
606 struct ieee80211_vif *vif,
605bebe2
MW		 607 struct ieee80211_if_conf *conf)
608{
609 struct rtl8187_priv *priv = dev->priv;
610 int i;
611
612 for (i = 0; i < ETH_ALEN; i++)
613 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
614
615 if (is_valid_ether_addr(conf->bssid))
616 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
617 else
618 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
619
620 return 0;
621}
622
4150c572
JB		 623static void rtl8187_configure_filter(struct ieee80211_hw *dev,
624 unsigned int changed_flags,
625 unsigned int *total_flags,
2fe14263 626 int mc_count, struct dev_addr_list *mclist)
4150c572
JB		 627{
628 struct rtl8187_priv *priv = dev->priv;
629
4150c572
JB		 630 if (changed_flags & FIF_FCSFAIL)
631 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
632 if (changed_flags & FIF_CONTROL)
633 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
634 if (changed_flags & FIF_OTHER_BSS)
635 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
2fe14263 636 if (*total_flags & FIF_ALLMULTI || mc_count > 0)
4150c572 637 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
2fe14263
MW		 638 else
639 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
640
641 *total_flags = 0;
4150c572 642
4150c572
JB		 643 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
644 *total_flags |= FIF_FCSFAIL;
645 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
646 *total_flags |= FIF_CONTROL;
647 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
648 *total_flags |= FIF_OTHER_BSS;
2fe14263
MW		 649 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
650 *total_flags |= FIF_ALLMULTI;
4150c572
JB		 651
652 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
653}
654
605bebe2
MW		 655static const struct ieee80211_ops rtl8187_ops = {
656 .tx = rtl8187_tx,
4150c572 657 .start = rtl8187_start,
605bebe2
MW		 658 .stop = rtl8187_stop,
659 .add_interface = rtl8187_add_interface,
660 .remove_interface = rtl8187_remove_interface,
661 .config = rtl8187_config,
662 .config_interface = rtl8187_config_interface,
4150c572 663 .configure_filter = rtl8187_configure_filter,
605bebe2
MW		 664};
665
666static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
667{
668 struct ieee80211_hw *dev = eeprom->data;
669 struct rtl8187_priv *priv = dev->priv;
670 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
671
672 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
673 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
674 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
675 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
676}
677
678static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
679{
680 struct ieee80211_hw *dev = eeprom->data;
681 struct rtl8187_priv *priv = dev->priv;
682 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
683
684 if (eeprom->reg_data_in)
685 reg |= RTL818X_EEPROM_CMD_WRITE;
686 if (eeprom->reg_data_out)
687 reg |= RTL818X_EEPROM_CMD_READ;
688 if (eeprom->reg_data_clock)
689 reg |= RTL818X_EEPROM_CMD_CK;
690 if (eeprom->reg_chip_select)
691 reg |= RTL818X_EEPROM_CMD_CS;
692
693 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
694 udelay(10);
695}
696
697static int __devinit rtl8187_probe(struct usb_interface *intf,
698 const struct usb_device_id *id)
699{
700 struct usb_device *udev = interface_to_usbdev(intf);
701 struct ieee80211_hw *dev;
702 struct rtl8187_priv *priv;
703 struct eeprom_93cx6 eeprom;
704 struct ieee80211_channel *channel;
705 u16 txpwr, reg;
706 int err, i;
0795af57 707 DECLARE_MAC_BUF(mac);
605bebe2
MW		 708
709 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
710 if (!dev) {
711 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
712 return -ENOMEM;
713 }
714
715 priv = dev->priv;
716
717 SET_IEEE80211_DEV(dev, &intf->dev);
718 usb_set_intfdata(intf, dev);
719 priv->udev = udev;
720
721 usb_get_dev(udev);
722
723 skb_queue_head_init(&priv->rx_queue);
8318d78a
JB		 724
725 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
726 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
727
605bebe2
MW		 728 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
729 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
730 priv->map = (struct rtl818x_csr *)0xFF00;
8318d78a
JB		 731
732 priv->band.band = IEEE80211_BAND_2GHZ;
733 priv->band.channels = priv->channels;
734 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
735 priv->band.bitrates = priv->rates;
736 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
737 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
738
739
4150c572 740 priv->mode = IEEE80211_IF_TYPE_MNTR;
605bebe2 741 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
566bfe5a
BR		 742 IEEE80211_HW_RX_INCLUDES_FCS |
743 IEEE80211_HW_SIGNAL_UNSPEC;
605bebe2
MW		 744 dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
745 dev->queues = 1;
566bfe5a 746 dev->max_signal = 65;
605bebe2 747
605bebe2
MW		 748 eeprom.data = dev;
749 eeprom.register_read = rtl8187_eeprom_register_read;
750 eeprom.register_write = rtl8187_eeprom_register_write;
751 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
752 eeprom.width = PCI_EEPROM_WIDTH_93C66;
753 else
754 eeprom.width = PCI_EEPROM_WIDTH_93C46;
755
756 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
757 udelay(10);
758
759 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
760 (__le16 __force *)dev->wiphy->perm_addr, 3);
761 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
762 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
763 "generated MAC address\n");
764 random_ether_addr(dev->wiphy->perm_addr);
765 }
766
767 channel = priv->channels;
768 for (i = 0; i < 3; i++) {
769 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
770 &txpwr);
8318d78a
JB		 771 (*channel++).hw_value = txpwr & 0xFF;
772 (*channel++).hw_value = txpwr >> 8;
605bebe2
MW		 773 }
774 for (i = 0; i < 2; i++) {
775 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
776 &txpwr);
8318d78a
JB		 777 (*channel++).hw_value = txpwr & 0xFF;
778 (*channel++).hw_value = txpwr >> 8;
605bebe2
MW		 779 }
780 for (i = 0; i < 2; i++) {
781 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
782 &txpwr);
8318d78a
JB		 783 (*channel++).hw_value = txpwr & 0xFF;
784 (*channel++).hw_value = txpwr >> 8;
605bebe2
MW		 785 }
786
787 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
788 &priv->txpwr_base);
789
f6532111
MW		 790 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
791 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
605bebe2
MW		 792 /* 0 means asic B-cut, we should use SW 3 wire
793 * bit-by-bit banging for radio. 1 means we can use
794 * USB specific request to write radio registers */
795 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
f6532111 796 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
605bebe2
MW		 797 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
798
f6532111 799 priv->rf = rtl8187_detect_rf(dev);
605bebe2
MW		 800
801 err = ieee80211_register_hw(dev);
802 if (err) {
803 printk(KERN_ERR "rtl8187: Cannot register device\n");
804 goto err_free_dev;
805 }
806
0795af57
JP		 807 printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
808 wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
f6532111 809 priv->asic_rev, priv->rf->name);
605bebe2
MW		 810
811 return 0;
812
813 err_free_dev:
814 ieee80211_free_hw(dev);
815 usb_set_intfdata(intf, NULL);
816 usb_put_dev(udev);
817 return err;
818}
819
820static void __devexit rtl8187_disconnect(struct usb_interface *intf)
821{
822 struct ieee80211_hw *dev = usb_get_intfdata(intf);
823 struct rtl8187_priv *priv;
824
825 if (!dev)
826 return;
827
828 ieee80211_unregister_hw(dev);
829
830 priv = dev->priv;
831 usb_put_dev(interface_to_usbdev(intf));
832 ieee80211_free_hw(dev);
833}
834
835static struct usb_driver rtl8187_driver = {
836 .name = KBUILD_MODNAME,
837 .id_table = rtl8187_table,
838 .probe = rtl8187_probe,
839 .disconnect = rtl8187_disconnect,
840};
841
842static int __init rtl8187_init(void)
843{
844 return usb_register(&rtl8187_driver);
845}
846
847static void __exit rtl8187_exit(void)
848{
849 usb_deregister(&rtl8187_driver);
850}
851
852module_init(rtl8187_init);
853module_exit(rtl8187_exit);
Linux 6.x block layer and io_uring tree(s)