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605bebe2 MW |
1 | /* |
2 | * Linux device driver for RTL8187 | |
3 | * | |
4 | * Copyright 2007 Michael Wu <flamingice@sourmilk.net> | |
5 | * Copyright 2007 Andrea Merello <andreamrl@tiscali.it> | |
6 | * | |
7 | * Based on the r8187 driver, which is: | |
8 | * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al. | |
9 | * | |
0aec00ae JL |
10 | * Magic delays and register offsets below are taken from the original |
11 | * r8187 driver sources. Thanks to Realtek for their support! | |
605bebe2 MW |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | */ | |
17 | ||
18 | #include <linux/init.h> | |
19 | #include <linux/usb.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/etherdevice.h> | |
22 | #include <linux/eeprom_93cx6.h> | |
23 | #include <net/mac80211.h> | |
24 | ||
25 | #include "rtl8187.h" | |
26 | #include "rtl8187_rtl8225.h" | |
27 | ||
28 | MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); | |
29 | MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); | |
30 | MODULE_DESCRIPTION("RTL8187 USB wireless driver"); | |
31 | MODULE_LICENSE("GPL"); | |
32 | ||
33 | static struct usb_device_id rtl8187_table[] __devinitdata = { | |
34 | /* Realtek */ | |
35 | {USB_DEVICE(0x0bda, 0x8187)}, | |
36 | /* Netgear */ | |
37 | {USB_DEVICE(0x0846, 0x6100)}, | |
38 | {USB_DEVICE(0x0846, 0x6a00)}, | |
39 | {} | |
40 | }; | |
41 | ||
42 | MODULE_DEVICE_TABLE(usb, rtl8187_table); | |
43 | ||
44 | void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) | |
45 | { | |
46 | struct rtl8187_priv *priv = dev->priv; | |
47 | ||
48 | data <<= 8; | |
49 | data |= addr | 0x80; | |
50 | ||
51 | rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); | |
52 | rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); | |
53 | rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); | |
54 | rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); | |
55 | ||
56 | msleep(1); | |
57 | } | |
58 | ||
59 | static void rtl8187_tx_cb(struct urb *urb) | |
60 | { | |
61 | struct ieee80211_tx_status status = { {0} }; | |
62 | struct sk_buff *skb = (struct sk_buff *)urb->context; | |
63 | struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb; | |
64 | ||
65 | usb_free_urb(info->urb); | |
66 | if (info->control) | |
67 | memcpy(&status.control, info->control, sizeof(status.control)); | |
68 | kfree(info->control); | |
69 | skb_pull(skb, sizeof(struct rtl8187_tx_hdr)); | |
70 | status.flags |= IEEE80211_TX_STATUS_ACK; | |
71 | ieee80211_tx_status_irqsafe(info->dev, skb, &status); | |
72 | } | |
73 | ||
74 | static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb, | |
75 | struct ieee80211_tx_control *control) | |
76 | { | |
77 | struct rtl8187_priv *priv = dev->priv; | |
78 | struct rtl8187_tx_hdr *hdr; | |
79 | struct rtl8187_tx_info *info; | |
80 | struct urb *urb; | |
81 | u32 tmp; | |
82 | ||
83 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
84 | if (!urb) { | |
85 | kfree_skb(skb); | |
86 | return 0; | |
87 | } | |
88 | ||
89 | hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
90 | tmp = skb->len - sizeof(*hdr); | |
91 | tmp |= RTL8187_TX_FLAG_NO_ENCRYPT; | |
92 | tmp |= control->rts_cts_rate << 19; | |
93 | tmp |= control->tx_rate << 24; | |
94 | if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb)) | |
95 | tmp |= RTL8187_TX_FLAG_MORE_FRAG; | |
96 | if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) { | |
97 | tmp |= RTL8187_TX_FLAG_RTS; | |
98 | hdr->rts_duration = | |
7e9ed188 | 99 | ieee80211_rts_duration(dev, priv->if_id, skb->len, control); |
605bebe2 MW |
100 | } |
101 | if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) | |
102 | tmp |= RTL8187_TX_FLAG_CTS; | |
103 | hdr->flags = cpu_to_le32(tmp); | |
104 | hdr->len = 0; | |
105 | tmp = control->retry_limit << 8; | |
106 | hdr->retry = cpu_to_le32(tmp); | |
107 | ||
108 | info = (struct rtl8187_tx_info *)skb->cb; | |
109 | info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC); | |
110 | info->urb = urb; | |
111 | info->dev = dev; | |
112 | usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2), | |
113 | hdr, skb->len, rtl8187_tx_cb, skb); | |
114 | usb_submit_urb(urb, GFP_ATOMIC); | |
115 | ||
116 | return 0; | |
117 | } | |
118 | ||
119 | static void rtl8187_rx_cb(struct urb *urb) | |
120 | { | |
121 | struct sk_buff *skb = (struct sk_buff *)urb->context; | |
122 | struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; | |
123 | struct ieee80211_hw *dev = info->dev; | |
124 | struct rtl8187_priv *priv = dev->priv; | |
125 | struct rtl8187_rx_hdr *hdr; | |
126 | struct ieee80211_rx_status rx_status = { 0 }; | |
127 | int rate, signal; | |
128 | ||
129 | spin_lock(&priv->rx_queue.lock); | |
130 | if (skb->next) | |
131 | __skb_unlink(skb, &priv->rx_queue); | |
132 | else { | |
133 | spin_unlock(&priv->rx_queue.lock); | |
134 | return; | |
135 | } | |
136 | spin_unlock(&priv->rx_queue.lock); | |
137 | ||
138 | if (unlikely(urb->status)) { | |
139 | usb_free_urb(urb); | |
140 | dev_kfree_skb_irq(skb); | |
141 | return; | |
142 | } | |
143 | ||
144 | skb_put(skb, urb->actual_length); | |
145 | hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr)); | |
146 | skb_trim(skb, le16_to_cpu(hdr->len) & 0x0FFF); | |
147 | ||
148 | signal = hdr->agc >> 1; | |
149 | rate = (le16_to_cpu(hdr->rate) >> 4) & 0xF; | |
150 | if (rate > 3) { /* OFDM rate */ | |
151 | if (signal > 90) | |
152 | signal = 90; | |
153 | else if (signal < 25) | |
154 | signal = 25; | |
155 | signal = 90 - signal; | |
156 | } else { /* CCK rate */ | |
157 | if (signal > 95) | |
158 | signal = 95; | |
159 | else if (signal < 30) | |
160 | signal = 30; | |
161 | signal = 95 - signal; | |
162 | } | |
163 | ||
164 | rx_status.antenna = (hdr->signal >> 7) & 1; | |
165 | rx_status.signal = 64 - min(hdr->noise, (u8)64); | |
166 | rx_status.ssi = signal; | |
167 | rx_status.rate = rate; | |
168 | rx_status.freq = dev->conf.freq; | |
169 | rx_status.channel = dev->conf.channel; | |
170 | rx_status.phymode = dev->conf.phymode; | |
171 | rx_status.mactime = le64_to_cpu(hdr->mac_time); | |
172 | ieee80211_rx_irqsafe(dev, skb, &rx_status); | |
173 | ||
174 | skb = dev_alloc_skb(RTL8187_MAX_RX); | |
175 | if (unlikely(!skb)) { | |
176 | usb_free_urb(urb); | |
177 | /* TODO check rx queue length and refill *somewhere* */ | |
178 | return; | |
179 | } | |
180 | ||
181 | info = (struct rtl8187_rx_info *)skb->cb; | |
182 | info->urb = urb; | |
183 | info->dev = dev; | |
184 | urb->transfer_buffer = skb_tail_pointer(skb); | |
185 | urb->context = skb; | |
186 | skb_queue_tail(&priv->rx_queue, skb); | |
187 | ||
188 | usb_submit_urb(urb, GFP_ATOMIC); | |
189 | } | |
190 | ||
191 | static int rtl8187_init_urbs(struct ieee80211_hw *dev) | |
192 | { | |
193 | struct rtl8187_priv *priv = dev->priv; | |
194 | struct urb *entry; | |
195 | struct sk_buff *skb; | |
196 | struct rtl8187_rx_info *info; | |
197 | ||
198 | while (skb_queue_len(&priv->rx_queue) < 8) { | |
199 | skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); | |
200 | if (!skb) | |
201 | break; | |
202 | entry = usb_alloc_urb(0, GFP_KERNEL); | |
203 | if (!entry) { | |
204 | kfree_skb(skb); | |
205 | break; | |
206 | } | |
207 | usb_fill_bulk_urb(entry, priv->udev, | |
208 | usb_rcvbulkpipe(priv->udev, 1), | |
209 | skb_tail_pointer(skb), | |
210 | RTL8187_MAX_RX, rtl8187_rx_cb, skb); | |
211 | info = (struct rtl8187_rx_info *)skb->cb; | |
212 | info->urb = entry; | |
213 | info->dev = dev; | |
214 | skb_queue_tail(&priv->rx_queue, skb); | |
215 | usb_submit_urb(entry, GFP_KERNEL); | |
216 | } | |
217 | ||
218 | return 0; | |
219 | } | |
220 | ||
221 | static int rtl8187_init_hw(struct ieee80211_hw *dev) | |
222 | { | |
223 | struct rtl8187_priv *priv = dev->priv; | |
224 | u8 reg; | |
225 | int i; | |
226 | ||
227 | /* reset */ | |
228 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
229 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
230 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
231 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON); | |
232 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON); | |
233 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
234 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
235 | ||
236 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); | |
237 | ||
238 | msleep(200); | |
239 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); | |
240 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); | |
241 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); | |
242 | msleep(200); | |
243 | ||
244 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
245 | reg &= (1 << 1); | |
246 | reg |= RTL818X_CMD_RESET; | |
247 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
248 | ||
249 | i = 10; | |
250 | do { | |
251 | msleep(2); | |
252 | if (!(rtl818x_ioread8(priv, &priv->map->CMD) & | |
253 | RTL818X_CMD_RESET)) | |
254 | break; | |
255 | } while (--i); | |
256 | ||
257 | if (!i) { | |
258 | printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy)); | |
259 | return -ETIMEDOUT; | |
260 | } | |
261 | ||
262 | /* reload registers from eeprom */ | |
263 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); | |
264 | ||
265 | i = 10; | |
266 | do { | |
267 | msleep(4); | |
268 | if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & | |
269 | RTL818X_EEPROM_CMD_CONFIG)) | |
270 | break; | |
271 | } while (--i); | |
272 | ||
273 | if (!i) { | |
274 | printk(KERN_ERR "%s: eeprom reset timeout!\n", | |
275 | wiphy_name(dev->wiphy)); | |
276 | return -ETIMEDOUT; | |
277 | } | |
278 | ||
279 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
280 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
281 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
282 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON); | |
283 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON); | |
284 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
285 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
286 | ||
287 | /* setup card */ | |
288 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
289 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0); | |
290 | ||
291 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
292 | rtl818x_iowrite8(priv, &priv->map->GPIO, 1); | |
293 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); | |
294 | ||
295 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
296 | for (i = 0; i < ETH_ALEN; i++) | |
297 | rtl818x_iowrite8(priv, &priv->map->MAC[i], priv->hwaddr[i]); | |
298 | ||
299 | rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); | |
300 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
301 | reg &= 0x3F; | |
302 | reg |= 0x80; | |
303 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); | |
304 | ||
305 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
306 | ||
307 | rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); | |
308 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
309 | rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81); | |
310 | ||
311 | // TODO: set RESP_RATE and BRSR properly | |
312 | rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); | |
313 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
314 | ||
315 | /* host_usb_init */ | |
316 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
317 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0); | |
318 | reg = rtl818x_ioread8(priv, (u8 *)0xFE53); | |
319 | rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); | |
320 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
321 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20); | |
322 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); | |
323 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); | |
324 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); | |
325 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); | |
326 | msleep(100); | |
327 | ||
328 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); | |
329 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); | |
330 | rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); | |
331 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
332 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); | |
333 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
334 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); | |
335 | msleep(100); | |
336 | ||
337 | priv->rf_init(dev); | |
338 | ||
339 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
340 | reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & 0xfffe; | |
341 | rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 0x1); | |
342 | rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); | |
343 | rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); | |
344 | rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); | |
345 | rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg); | |
346 | ||
347 | return 0; | |
348 | } | |
349 | ||
350 | static void rtl8187_set_channel(struct ieee80211_hw *dev, int channel) | |
351 | { | |
352 | u32 reg; | |
353 | struct rtl8187_priv *priv = dev->priv; | |
354 | ||
355 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); | |
356 | /* Enable TX loopback on MAC level to avoid TX during channel | |
357 | * changes, as this has be seen to causes problems and the | |
358 | * card will stop work until next reset | |
359 | */ | |
360 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, | |
361 | reg | RTL818X_TX_CONF_LOOPBACK_MAC); | |
362 | msleep(10); | |
363 | rtl8225_rf_set_channel(dev, channel); | |
364 | msleep(10); | |
365 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
366 | } | |
367 | ||
368 | static int rtl8187_open(struct ieee80211_hw *dev) | |
369 | { | |
370 | struct rtl8187_priv *priv = dev->priv; | |
371 | u32 reg; | |
372 | int ret; | |
373 | ||
374 | ret = rtl8187_init_hw(dev); | |
375 | if (ret) | |
376 | return ret; | |
377 | ||
378 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); | |
379 | ||
380 | rtl8187_init_urbs(dev); | |
381 | ||
382 | reg = RTL818X_RX_CONF_ONLYERLPKT | | |
383 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
384 | RTL818X_RX_CONF_BSSID | | |
385 | RTL818X_RX_CONF_MGMT | | |
386 | RTL818X_RX_CONF_CTRL | | |
387 | RTL818X_RX_CONF_DATA | | |
388 | (7 << 13 /* RX FIFO threshold NONE */) | | |
389 | (7 << 10 /* MAX RX DMA */) | | |
390 | RTL818X_RX_CONF_BROADCAST | | |
391 | RTL818X_RX_CONF_MULTICAST | | |
392 | RTL818X_RX_CONF_NICMAC; | |
393 | if (priv->mode == IEEE80211_IF_TYPE_MNTR) | |
394 | reg |= RTL818X_RX_CONF_MONITOR; | |
395 | ||
396 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); | |
397 | ||
398 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); | |
399 | reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT; | |
400 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
401 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
402 | ||
403 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); | |
404 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; | |
405 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
406 | reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; | |
407 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
408 | ||
409 | reg = RTL818X_TX_CONF_CW_MIN | | |
410 | (7 << 21 /* MAX TX DMA */) | | |
411 | RTL818X_TX_CONF_NO_ICV; | |
412 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
413 | ||
414 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
415 | reg |= RTL818X_CMD_TX_ENABLE; | |
416 | reg |= RTL818X_CMD_RX_ENABLE; | |
417 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
418 | ||
419 | return 0; | |
420 | } | |
421 | ||
422 | static int rtl8187_stop(struct ieee80211_hw *dev) | |
423 | { | |
424 | struct rtl8187_priv *priv = dev->priv; | |
425 | struct rtl8187_rx_info *info; | |
426 | struct sk_buff *skb; | |
427 | u32 reg; | |
428 | ||
429 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); | |
430 | ||
431 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
432 | reg &= ~RTL818X_CMD_TX_ENABLE; | |
433 | reg &= ~RTL818X_CMD_RX_ENABLE; | |
434 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
435 | ||
436 | rtl8225_rf_stop(dev); | |
437 | ||
438 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
439 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); | |
440 | rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); | |
441 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
442 | ||
443 | while ((skb = skb_dequeue(&priv->rx_queue))) { | |
444 | info = (struct rtl8187_rx_info *)skb->cb; | |
445 | usb_kill_urb(info->urb); | |
446 | kfree_skb(skb); | |
447 | } | |
448 | return 0; | |
449 | } | |
450 | ||
451 | static int rtl8187_add_interface(struct ieee80211_hw *dev, | |
452 | struct ieee80211_if_init_conf *conf) | |
453 | { | |
454 | struct rtl8187_priv *priv = dev->priv; | |
455 | ||
456 | /* NOTE: using IEEE80211_IF_TYPE_MGMT to indicate no mode selected */ | |
457 | if (priv->mode != IEEE80211_IF_TYPE_MGMT) | |
458 | return -1; | |
459 | ||
460 | switch (conf->type) { | |
461 | case IEEE80211_IF_TYPE_STA: | |
462 | case IEEE80211_IF_TYPE_MNTR: | |
463 | priv->mode = conf->type; | |
464 | break; | |
465 | default: | |
466 | return -EOPNOTSUPP; | |
467 | } | |
468 | ||
c43bff43 | 469 | priv->hwaddr = conf->mac_addr ? conf->mac_addr : dev->wiphy->perm_addr; |
605bebe2 MW |
470 | |
471 | return 0; | |
472 | } | |
473 | ||
474 | static void rtl8187_remove_interface(struct ieee80211_hw *dev, | |
475 | struct ieee80211_if_init_conf *conf) | |
476 | { | |
477 | struct rtl8187_priv *priv = dev->priv; | |
478 | priv->mode = IEEE80211_IF_TYPE_MGMT; | |
479 | } | |
480 | ||
481 | static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) | |
482 | { | |
483 | struct rtl8187_priv *priv = dev->priv; | |
484 | rtl8187_set_channel(dev, conf->channel); | |
485 | ||
486 | rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); | |
487 | ||
488 | if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) { | |
489 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); | |
490 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); | |
491 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); | |
492 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73); | |
493 | } else { | |
494 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); | |
495 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); | |
496 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); | |
497 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5); | |
498 | } | |
499 | ||
500 | rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); | |
501 | rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); | |
502 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | |
503 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); | |
504 | return 0; | |
505 | } | |
506 | ||
507 | static int rtl8187_config_interface(struct ieee80211_hw *dev, int if_id, | |
508 | struct ieee80211_if_conf *conf) | |
509 | { | |
510 | struct rtl8187_priv *priv = dev->priv; | |
511 | int i; | |
512 | ||
7e9ed188 DD |
513 | priv->if_id = if_id; |
514 | ||
605bebe2 MW |
515 | for (i = 0; i < ETH_ALEN; i++) |
516 | rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]); | |
517 | ||
518 | if (is_valid_ether_addr(conf->bssid)) | |
519 | rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA); | |
520 | else | |
521 | rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK); | |
522 | ||
523 | return 0; | |
524 | } | |
525 | ||
526 | static const struct ieee80211_ops rtl8187_ops = { | |
527 | .tx = rtl8187_tx, | |
528 | .open = rtl8187_open, | |
529 | .stop = rtl8187_stop, | |
530 | .add_interface = rtl8187_add_interface, | |
531 | .remove_interface = rtl8187_remove_interface, | |
532 | .config = rtl8187_config, | |
533 | .config_interface = rtl8187_config_interface, | |
534 | }; | |
535 | ||
536 | static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) | |
537 | { | |
538 | struct ieee80211_hw *dev = eeprom->data; | |
539 | struct rtl8187_priv *priv = dev->priv; | |
540 | u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); | |
541 | ||
542 | eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; | |
543 | eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; | |
544 | eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; | |
545 | eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; | |
546 | } | |
547 | ||
548 | static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) | |
549 | { | |
550 | struct ieee80211_hw *dev = eeprom->data; | |
551 | struct rtl8187_priv *priv = dev->priv; | |
552 | u8 reg = RTL818X_EEPROM_CMD_PROGRAM; | |
553 | ||
554 | if (eeprom->reg_data_in) | |
555 | reg |= RTL818X_EEPROM_CMD_WRITE; | |
556 | if (eeprom->reg_data_out) | |
557 | reg |= RTL818X_EEPROM_CMD_READ; | |
558 | if (eeprom->reg_data_clock) | |
559 | reg |= RTL818X_EEPROM_CMD_CK; | |
560 | if (eeprom->reg_chip_select) | |
561 | reg |= RTL818X_EEPROM_CMD_CS; | |
562 | ||
563 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); | |
564 | udelay(10); | |
565 | } | |
566 | ||
567 | static int __devinit rtl8187_probe(struct usb_interface *intf, | |
568 | const struct usb_device_id *id) | |
569 | { | |
570 | struct usb_device *udev = interface_to_usbdev(intf); | |
571 | struct ieee80211_hw *dev; | |
572 | struct rtl8187_priv *priv; | |
573 | struct eeprom_93cx6 eeprom; | |
574 | struct ieee80211_channel *channel; | |
575 | u16 txpwr, reg; | |
576 | int err, i; | |
0795af57 | 577 | DECLARE_MAC_BUF(mac); |
605bebe2 MW |
578 | |
579 | dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); | |
580 | if (!dev) { | |
581 | printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); | |
582 | return -ENOMEM; | |
583 | } | |
584 | ||
585 | priv = dev->priv; | |
586 | ||
587 | SET_IEEE80211_DEV(dev, &intf->dev); | |
588 | usb_set_intfdata(intf, dev); | |
589 | priv->udev = udev; | |
590 | ||
591 | usb_get_dev(udev); | |
592 | ||
593 | skb_queue_head_init(&priv->rx_queue); | |
594 | memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); | |
595 | memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); | |
596 | priv->map = (struct rtl818x_csr *)0xFF00; | |
597 | priv->modes[0].mode = MODE_IEEE80211G; | |
598 | priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates); | |
599 | priv->modes[0].rates = priv->rates; | |
600 | priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels); | |
601 | priv->modes[0].channels = priv->channels; | |
602 | priv->modes[1].mode = MODE_IEEE80211B; | |
603 | priv->modes[1].num_rates = 4; | |
604 | priv->modes[1].rates = priv->rates; | |
605 | priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels); | |
606 | priv->modes[1].channels = priv->channels; | |
607 | priv->mode = IEEE80211_IF_TYPE_MGMT; | |
608 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | | |
7848ba7d | 609 | IEEE80211_HW_RX_INCLUDES_FCS; |
605bebe2 MW |
610 | dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr); |
611 | dev->queues = 1; | |
612 | dev->max_rssi = 65; | |
613 | dev->max_signal = 64; | |
614 | ||
615 | for (i = 0; i < 2; i++) | |
616 | if ((err = ieee80211_register_hwmode(dev, &priv->modes[i]))) | |
617 | goto err_free_dev; | |
618 | ||
619 | eeprom.data = dev; | |
620 | eeprom.register_read = rtl8187_eeprom_register_read; | |
621 | eeprom.register_write = rtl8187_eeprom_register_write; | |
622 | if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) | |
623 | eeprom.width = PCI_EEPROM_WIDTH_93C66; | |
624 | else | |
625 | eeprom.width = PCI_EEPROM_WIDTH_93C46; | |
626 | ||
627 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
628 | udelay(10); | |
629 | ||
630 | eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, | |
631 | (__le16 __force *)dev->wiphy->perm_addr, 3); | |
632 | if (!is_valid_ether_addr(dev->wiphy->perm_addr)) { | |
633 | printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " | |
634 | "generated MAC address\n"); | |
635 | random_ether_addr(dev->wiphy->perm_addr); | |
636 | } | |
637 | ||
638 | channel = priv->channels; | |
639 | for (i = 0; i < 3; i++) { | |
640 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, | |
641 | &txpwr); | |
642 | (*channel++).val = txpwr & 0xFF; | |
643 | (*channel++).val = txpwr >> 8; | |
644 | } | |
645 | for (i = 0; i < 2; i++) { | |
646 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, | |
647 | &txpwr); | |
648 | (*channel++).val = txpwr & 0xFF; | |
649 | (*channel++).val = txpwr >> 8; | |
650 | } | |
651 | for (i = 0; i < 2; i++) { | |
652 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i, | |
653 | &txpwr); | |
654 | (*channel++).val = txpwr & 0xFF; | |
655 | (*channel++).val = txpwr >> 8; | |
656 | } | |
657 | ||
658 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, | |
659 | &priv->txpwr_base); | |
660 | ||
661 | reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & ~1; | |
662 | rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 1); | |
663 | /* 0 means asic B-cut, we should use SW 3 wire | |
664 | * bit-by-bit banging for radio. 1 means we can use | |
665 | * USB specific request to write radio registers */ | |
666 | priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; | |
667 | rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg); | |
668 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
669 | ||
670 | rtl8225_write(dev, 0, 0x1B7); | |
671 | ||
672 | if (rtl8225_read(dev, 8) != 0x588 || rtl8225_read(dev, 9) != 0x700) | |
673 | priv->rf_init = rtl8225_rf_init; | |
674 | else | |
675 | priv->rf_init = rtl8225z2_rf_init; | |
676 | ||
677 | rtl8225_write(dev, 0, 0x0B7); | |
678 | ||
679 | err = ieee80211_register_hw(dev); | |
680 | if (err) { | |
681 | printk(KERN_ERR "rtl8187: Cannot register device\n"); | |
682 | goto err_free_dev; | |
683 | } | |
684 | ||
0795af57 JP |
685 | printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n", |
686 | wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr), | |
605bebe2 MW |
687 | priv->asic_rev, priv->rf_init == rtl8225_rf_init ? |
688 | "rtl8225" : "rtl8225z2"); | |
689 | ||
690 | return 0; | |
691 | ||
692 | err_free_dev: | |
693 | ieee80211_free_hw(dev); | |
694 | usb_set_intfdata(intf, NULL); | |
695 | usb_put_dev(udev); | |
696 | return err; | |
697 | } | |
698 | ||
699 | static void __devexit rtl8187_disconnect(struct usb_interface *intf) | |
700 | { | |
701 | struct ieee80211_hw *dev = usb_get_intfdata(intf); | |
702 | struct rtl8187_priv *priv; | |
703 | ||
704 | if (!dev) | |
705 | return; | |
706 | ||
707 | ieee80211_unregister_hw(dev); | |
708 | ||
709 | priv = dev->priv; | |
710 | usb_put_dev(interface_to_usbdev(intf)); | |
711 | ieee80211_free_hw(dev); | |
712 | } | |
713 | ||
714 | static struct usb_driver rtl8187_driver = { | |
715 | .name = KBUILD_MODNAME, | |
716 | .id_table = rtl8187_table, | |
717 | .probe = rtl8187_probe, | |
718 | .disconnect = rtl8187_disconnect, | |
719 | }; | |
720 | ||
721 | static int __init rtl8187_init(void) | |
722 | { | |
723 | return usb_register(&rtl8187_driver); | |
724 | } | |
725 | ||
726 | static void __exit rtl8187_exit(void) | |
727 | { | |
728 | usb_deregister(&rtl8187_driver); | |
729 | } | |
730 | ||
731 | module_init(rtl8187_init); | |
732 | module_exit(rtl8187_exit); |