projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 30519460 | 1 | /* |
| dad0d04f FF |
2 | * Copyright (c) 2014 Redpine Signals Inc. |
| 3 | * | |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any | |
| 5 | * purpose with or without fee is hereby granted, provided that the above | |
| 6 | * copyright notice and this permission notice appear in all copies. | |
| 7 | * | |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
| 15 | */ | |
| 16 | ||
| 17 | #ifndef __RSI_MGMT_H__ | |
| 18 | #define __RSI_MGMT_H__ | |
| 19 | ||
| 20 | #include <linux/sort.h> | |
| 21 | #include "rsi_boot_params.h" | |
| 22 | #include "rsi_main.h" | |
| 23 | ||
| 24 | #define MAX_MGMT_PKT_SIZE 512 | |
| abbe87d3 | 25 | #define RSI_NEEDED_HEADROOM 84 |
| dad0d04f FF |
26 | #define RSI_RCV_BUFFER_LEN 2000 |
| 27 | ||
| 28 | #define RSI_11B_MODE 0 | |
| 29 | #define RSI_11G_MODE BIT(7) | |
| 30 | #define RETRY_COUNT 8 | |
| 31 | #define RETRY_LONG 4 | |
| 32 | #define RETRY_SHORT 7 | |
| 33 | #define WMM_SHORT_SLOT_TIME 9 | |
| 34 | #define SIFS_DURATION 16 | |
| 35 | ||
| 4fd6c476 | 36 | #define EAPOL4_PACKET_LEN 0x85 |
| dad0d04f FF |
37 | #define KEY_TYPE_CLEAR 0 |
| 38 | #define RSI_PAIRWISE_KEY 1 | |
| 39 | #define RSI_GROUP_KEY 2 | |
| 40 | ||
| 41 | /* EPPROM_READ_ADDRESS */ | |
| 42 | #define WLAN_MAC_EEPROM_ADDR 40 | |
| 43 | #define WLAN_MAC_MAGIC_WORD_LEN 0x01 | |
| 44 | #define WLAN_HOST_MODE_LEN 0x04 | |
| 45 | #define WLAN_FW_VERSION_LEN 0x08 | |
| 46 | #define MAGIC_WORD 0x5A | |
| 09cfb41f | 47 | #define WLAN_EEPROM_RFTYPE_ADDR 424 |
| dad0d04f | 48 | |
| f3ac4e73 KE |
49 | /*WOWLAN RESUME WAKEUP TYPES*/ |
| 50 | #define RSI_UNICAST_MAGIC_PKT BIT(0) | |
| 51 | #define RSI_BROADCAST_MAGICPKT BIT(1) | |
| 52 | #define RSI_EAPOL_PKT BIT(2) | |
| 53 | #define RSI_DISCONNECT_PKT BIT(3) | |
| 54 | #define RSI_HW_BMISS_PKT BIT(4) | |
| 55 | #define RSI_INSERT_SEQ_IN_FW BIT(2) | |
| 56 | ||
| 57 | #define WOW_MAX_FILTERS_PER_LIST 16 | |
| 58 | #define WOW_PATTERN_SIZE 256 | |
| 59 | ||
| dad0d04f | 60 | /* Receive Frame Types */ |
| 2108df3c | 61 | #define RSI_RX_DESC_MSG_TYPE_OFFSET 2 |
| dad0d04f FF |
62 | #define TA_CONFIRM_TYPE 0x01 |
| 63 | #define RX_DOT11_MGMT 0x02 | |
| 64 | #define TX_STATUS_IND 0x04 | |
| d26a9559 | 65 | #define BEACON_EVENT_IND 0x08 |
| 4fd6c476 | 66 | #define EAPOL4_CONFIRM 1 |
| dad0d04f FF |
67 | #define PROBEREQ_CONFIRM 2 |
| 68 | #define CARD_READY_IND 0x00 | |
| 2108df3c | 69 | #define SLEEP_NOTIFY_IND 0x06 |
| 4fd6c476 PRG |
70 | #define RSI_TX_STATUS_TYPE 15 |
| 71 | #define RSI_TX_STATUS 12 | |
| dad0d04f FF |
72 | |
| 73 | #define RSI_DELETE_PEER 0x0 | |
| 74 | #define RSI_ADD_PEER 0x1 | |
| 75 | #define START_AMPDU_AGGR 0x1 | |
| 76 | #define STOP_AMPDU_AGGR 0x0 | |
| 77 | #define INTERNAL_MGMT_PKT 0x99 | |
| 78 | ||
| 79 | #define PUT_BBP_RESET 0 | |
| 80 | #define BBP_REG_WRITE 0 | |
| 81 | #define RF_RESET_ENABLE BIT(3) | |
| 82 | #define RATE_INFO_ENABLE BIT(0) | |
| 19844c0a | 83 | #define MORE_DATA_PRESENT BIT(1) |
| dad0d04f | 84 | #define RSI_BROADCAST_PKT BIT(9) |
| 6507de6d | 85 | #define RSI_DESC_REQUIRE_CFM_TO_HOST BIT(2) |
| 0eb42586 PM |
86 | #define RSI_ADD_DELTA_TSF_VAP_ID BIT(3) |
| 87 | #define RSI_FETCH_RETRY_CNT_FRM_HST BIT(4) | |
| af193097 | 88 | #define RSI_QOS_ENABLE BIT(12) |
| 0eb42586 | 89 | #define RSI_REKEY_PURPOSE BIT(13) |
| af193097 | 90 | #define RSI_ENCRYPT_PKT BIT(15) |
| ce86893f | 91 | #define RSI_SET_PS_ENABLE BIT(12) |
| dad0d04f | 92 | |
| 6abdf2c1 PRG |
93 | #define RSI_CMDDESC_40MHZ BIT(4) |
| 94 | #define RSI_CMDDESC_UPPER_20_ENABLE BIT(5) | |
| 95 | #define RSI_CMDDESC_LOWER_20_ENABLE BIT(6) | |
| 96 | #define RSI_CMDDESC_FULL_40_ENABLE (BIT(5) | BIT(6)) | |
| dad0d04f FF |
97 | #define UPPER_20_ENABLE (0x2 << 12) |
| 98 | #define LOWER_20_ENABLE (0x4 << 12) | |
| 99 | #define FULL40M_ENABLE 0x6 | |
| 100 | ||
| 101 | #define RSI_LMAC_CLOCK_80MHZ 0x1 | |
| 102 | #define RSI_ENABLE_40MHZ (0x1 << 3) | |
| 2bfa6969 | 103 | #define ENABLE_SHORTGI_RATE BIT(9) |
| dad0d04f FF |
104 | |
| 105 | #define RX_BA_INDICATION 1 | |
| 106 | #define RSI_TBL_SZ 40 | |
| 107 | #define MAX_RETRIES 8 | |
| 48d11dc3 | 108 | #define RSI_IFTYPE_STATION 0 |
| dad0d04f FF |
109 | |
| 110 | #define STD_RATE_MCS7 0x07 | |
| 111 | #define STD_RATE_MCS6 0x06 | |
| 112 | #define STD_RATE_MCS5 0x05 | |
| 113 | #define STD_RATE_MCS4 0x04 | |
| 114 | #define STD_RATE_MCS3 0x03 | |
| 115 | #define STD_RATE_MCS2 0x02 | |
| 116 | #define STD_RATE_MCS1 0x01 | |
| 117 | #define STD_RATE_MCS0 0x00 | |
| 118 | #define STD_RATE_54 0x6c | |
| 119 | #define STD_RATE_48 0x60 | |
| 120 | #define STD_RATE_36 0x48 | |
| 121 | #define STD_RATE_24 0x30 | |
| 122 | #define STD_RATE_18 0x24 | |
| 123 | #define STD_RATE_12 0x18 | |
| 124 | #define STD_RATE_11 0x16 | |
| 125 | #define STD_RATE_09 0x12 | |
| 126 | #define STD_RATE_06 0x0C | |
| 127 | #define STD_RATE_5_5 0x0B | |
| 128 | #define STD_RATE_02 0x04 | |
| 129 | #define STD_RATE_01 0x02 | |
| 130 | ||
| 131 | #define RSI_RF_TYPE 1 | |
| 132 | #define RSI_RATE_00 0x00 | |
| 133 | #define RSI_RATE_1 0x0 | |
| 134 | #define RSI_RATE_2 0x2 | |
| 135 | #define RSI_RATE_5_5 0x4 | |
| 136 | #define RSI_RATE_11 0x6 | |
| 137 | #define RSI_RATE_6 0x8b | |
| 138 | #define RSI_RATE_9 0x8f | |
| 139 | #define RSI_RATE_12 0x8a | |
| 140 | #define RSI_RATE_18 0x8e | |
| 141 | #define RSI_RATE_24 0x89 | |
| 142 | #define RSI_RATE_36 0x8d | |
| 143 | #define RSI_RATE_48 0x88 | |
| 144 | #define RSI_RATE_54 0x8c | |
| 145 | #define RSI_RATE_MCS0 0x100 | |
| 146 | #define RSI_RATE_MCS1 0x101 | |
| 147 | #define RSI_RATE_MCS2 0x102 | |
| 148 | #define RSI_RATE_MCS3 0x103 | |
| 149 | #define RSI_RATE_MCS4 0x104 | |
| 150 | #define RSI_RATE_MCS5 0x105 | |
| 151 | #define RSI_RATE_MCS6 0x106 | |
| 152 | #define RSI_RATE_MCS7 0x107 | |
| 153 | #define RSI_RATE_MCS7_SG 0x307 | |
| af193097 | 154 | #define RSI_RATE_AUTO 0xffff |
| dad0d04f FF |
155 | |
| 156 | #define BW_20MHZ 0 | |
| 157 | #define BW_40MHZ 1 | |
| 158 | ||
| f870a340 JM |
159 | #define EP_2GHZ_20MHZ 0 |
| 160 | #define EP_2GHZ_40MHZ 1 | |
| 161 | #define EP_5GHZ_20MHZ 2 | |
| 162 | #define EP_5GHZ_40MHZ 3 | |
| 163 | ||
| 4550faac JM |
164 | #define SIFS_TX_11N_VALUE 580 |
| 165 | #define SIFS_TX_11B_VALUE 346 | |
| 166 | #define SHORT_SLOT_VALUE 360 | |
| 167 | #define LONG_SLOT_VALUE 640 | |
| 168 | #define OFDM_ACK_TOUT_VALUE 2720 | |
| 169 | #define CCK_ACK_TOUT_VALUE 9440 | |
| 170 | #define LONG_PREAMBLE 0x0000 | |
| 171 | #define SHORT_PREAMBLE 0x0001 | |
| 172 | ||
| dad0d04f FF |
173 | #define RSI_SUPP_FILTERS (FIF_ALLMULTI | FIF_PROBE_REQ |\ |
| 174 | FIF_BCN_PRBRESP_PROMISC) | |
| e6d64284 | 175 | |
| 4edbcd1a PRG |
176 | #define ANTENNA_SEL_INT 0x02 /* RF_OUT_2 / Integerated */ |
| 177 | #define ANTENNA_SEL_UFL 0x03 /* RF_OUT_1 / U.FL */ | |
| 588349a1 PM |
178 | #define ANTENNA_MASK_VALUE 0x00ff |
| 179 | #define ANTENNA_SEL_TYPE 1 | |
| 4edbcd1a | 180 | |
| e6d64284 PRG |
181 | /* Rx filter word definitions */ |
| 182 | #define PROMISCOUS_MODE BIT(0) | |
| 183 | #define ALLOW_DATA_ASSOC_PEER BIT(1) | |
| 184 | #define ALLOW_MGMT_ASSOC_PEER BIT(2) | |
| 185 | #define ALLOW_CTRL_ASSOC_PEER BIT(3) | |
| 186 | #define DISALLOW_BEACONS BIT(4) | |
| 187 | #define ALLOW_CONN_PEER_MGMT_WHILE_BUF_FULL BIT(5) | |
| 188 | #define DISALLOW_BROADCAST_DATA BIT(6) | |
| 189 | ||
| 59e006dc | 190 | #define RSI_MPDU_DENSITY 0x8 |
| f04854fa | 191 | #define RSI_CHAN_RADAR BIT(7) |
| de1d1813 PRG |
192 | #define RSI_BEACON_INTERVAL 200 |
| 193 | #define RSI_DTIM_COUNT 2 | |
| 59e006dc | 194 | |
| ce86893f KE |
195 | #define RSI_PS_DISABLE_IND BIT(15) |
| 196 | #define RSI_PS_ENABLE 1 | |
| 197 | #define RSI_PS_DISABLE 0 | |
| 198 | #define RSI_DEEP_SLEEP 1 | |
| 199 | #define RSI_CONNECTED_SLEEP 2 | |
| 200 | #define RSI_SLEEP_REQUEST 1 | |
| 201 | #define RSI_WAKEUP_REQUEST 2 | |
| 202 | ||
| db07971d KE |
203 | #define RSI_IEEE80211_UAPSD_QUEUES \ |
| 204 | (IEEE80211_WMM_IE_STA_QOSINFO_AC_VO | \ | |
| 205 | IEEE80211_WMM_IE_STA_QOSINFO_AC_VI | \ | |
| 206 | IEEE80211_WMM_IE_STA_QOSINFO_AC_BE | \ | |
| 207 | IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) | |
| 208 | ||
| a39644b2 | 209 | #define RSI_DESC_VAP_ID_MASK 0xC000u |
| 4671c209 | 210 | #define RSI_DESC_VAP_ID_OFST 14 |
| d26a9559 PRG |
211 | #define RSI_DATA_DESC_MAC_BBP_INFO BIT(0) |
| 212 | #define RSI_DATA_DESC_NO_ACK_IND BIT(9) | |
| 213 | #define RSI_DATA_DESC_QOS_EN BIT(12) | |
| 214 | #define RSI_DATA_DESC_NORMAL_FRAME 0x00 | |
| 215 | #define RSI_DATA_DESC_DTIM_BEACON_GATED_FRAME BIT(10) | |
| 216 | #define RSI_DATA_DESC_BEACON_FRAME BIT(11) | |
| 217 | #define RSI_DATA_DESC_DTIM_BEACON (BIT(10) | BIT(11)) | |
| 218 | #define RSI_DATA_DESC_INSERT_TSF BIT(15) | |
| 219 | #define RSI_DATA_DESC_INSERT_SEQ_NO BIT(2) | |
| 220 | ||
| f3ac4e73 KE |
221 | #ifdef CONFIG_PM |
| 222 | #define RSI_WOW_ANY BIT(1) | |
| 223 | #define RSI_WOW_GTK_REKEY BIT(3) | |
| 224 | #define RSI_WOW_MAGIC_PKT BIT(4) | |
| 225 | #define RSI_WOW_DISCONNECT BIT(5) | |
| 226 | #endif | |
| 227 | ||
| a55e50f0 AK |
228 | #define RSI_MAX_TX_AGGR_FRMS 8 |
| 229 | #define RSI_MAX_RX_AGGR_FRMS 8 | |
| 230 | ||
| 7fdcb8e1 PRG |
231 | #define RSI_MAX_SCAN_SSIDS 16 |
| 232 | #define RSI_MAX_SCAN_IE_LEN 256 | |
| 233 | ||
| dad0d04f | 234 | enum opmode { |
| b8bd3a43 PRG |
235 | RSI_OPMODE_UNSUPPORTED = -1, |
| 236 | RSI_OPMODE_AP = 0, | |
| 237 | RSI_OPMODE_STA, | |
| 238 | RSI_OPMODE_P2P_GO, | |
| 239 | RSI_OPMODE_P2P_CLIENT | |
| dad0d04f FF |
240 | }; |
| 241 | ||
| 77364aae PRG |
242 | enum vap_status { |
| 243 | VAP_ADD = 1, | |
| 244 | VAP_DELETE = 2, | |
| 245 | VAP_UPDATE = 3 | |
| 246 | }; | |
| 247 | ||
| 3528608f PRG |
248 | enum peer_type { |
| 249 | PEER_TYPE_AP, | |
| 250 | PEER_TYPE_STA, | |
| 251 | }; | |
| dad0d04f FF |
252 | extern struct ieee80211_rate rsi_rates[12]; |
| 253 | extern const u16 rsi_mcsrates[8]; | |
| 254 | ||
| 255 | enum sta_notify_events { | |
| 256 | STA_CONNECTED = 0, | |
| 257 | STA_DISCONNECTED, | |
| 258 | STA_TX_ADDBA_DONE, | |
| 259 | STA_TX_DELBA, | |
| 260 | STA_RX_ADDBA_DONE, | |
| 261 | STA_RX_DELBA | |
| 262 | }; | |
| 263 | ||
| 264 | /* Send Frames Types */ | |
| 265 | enum cmd_frame_type { | |
| 266 | TX_DOT11_MGMT, | |
| 267 | RESET_MAC_REQ, | |
| 268 | RADIO_CAPABILITIES, | |
| 269 | BB_PROG_VALUES_REQUEST, | |
| 270 | RF_PROG_VALUES_REQUEST, | |
| 271 | WAKEUP_SLEEP_REQUEST, | |
| 272 | SCAN_REQUEST, | |
| 273 | TSF_UPDATE, | |
| 274 | PEER_NOTIFY, | |
| 686a2541 | 275 | BLOCK_HW_QUEUE, |
| dad0d04f FF |
276 | SET_KEY_REQ, |
| 277 | AUTO_RATE_IND, | |
| 278 | BOOTUP_PARAMS_REQUEST, | |
| 279 | VAP_CAPABILITIES, | |
| 09cfb41f | 280 | EEPROM_READ, |
| dad0d04f FF |
281 | EEPROM_WRITE, |
| 282 | GPIO_PIN_CONFIG , | |
| 283 | SET_RX_FILTER, | |
| 284 | AMPDU_IND, | |
| 285 | STATS_REQUEST_FRAME, | |
| 286 | BB_BUF_PROG_VALUES_REQ, | |
| 287 | BBP_PROG_IN_TA, | |
| 288 | BG_SCAN_PARAMS, | |
| 289 | BG_SCAN_PROBE_REQ, | |
| 290 | CW_MODE_REQ, | |
| 8b36de8c | 291 | PER_CMD_PKT, |
| 4edbcd1a | 292 | ANT_SEL_FRAME = 0x20, |
| 80a88ecf | 293 | VAP_DYNAMIC_UPDATE = 0x27, |
| 9920322c | 294 | COMMON_DEV_CONFIG = 0x28, |
| f3ac4e73 KE |
295 | RADIO_PARAMS_UPDATE = 0x29, |
| 296 | WOWLAN_CONFIG_PARAMS = 0x2B, | |
| 1533f976 | 297 | FEATURES_ENABLE = 0x33, |
| f3ac4e73 | 298 | WOWLAN_WAKEUP_REASON = 0xc5 |
| dad0d04f FF |
299 | }; |
| 300 | ||
| 301 | struct rsi_mac_frame { | |
| 302 | __le16 desc_word[8]; | |
| 303 | } __packed; | |
| 304 | ||
| 6c8ab76d PRG |
305 | #define PWR_SAVE_WAKEUP_IND BIT(0) |
| 306 | #define TCP_CHECK_SUM_OFFLOAD BIT(1) | |
| 307 | #define CONFIRM_REQUIRED_TO_HOST BIT(2) | |
| 308 | #define ADD_DELTA_TSF BIT(3) | |
| 309 | #define FETCH_RETRY_CNT_FROM_HOST_DESC BIT(4) | |
| 310 | #define EOSP_INDICATION BIT(5) | |
| 311 | #define REQUIRE_TSF_SYNC_CONFIRM BIT(6) | |
| 312 | #define ENCAP_MGMT_PKT BIT(7) | |
| 9a629faf | 313 | #define DESC_IMMEDIATE_WAKEUP BIT(15) |
| 6c8ab76d | 314 | |
| 5dc36387 PRG |
315 | struct rsi_xtended_desc { |
| 316 | u8 confirm_frame_type; | |
| 317 | u8 retry_cnt; | |
| 318 | u16 reserved; | |
| 319 | }; | |
| 320 | ||
| 6c8ab76d PRG |
321 | struct rsi_cmd_desc_dword0 { |
| 322 | __le16 len_qno; | |
| 323 | u8 frame_type; | |
| 324 | u8 misc_flags; | |
| 325 | }; | |
| 326 | ||
| 327 | struct rsi_cmd_desc_dword1 { | |
| 328 | u8 xtend_desc_size; | |
| 329 | u8 reserved1; | |
| 330 | __le16 reserved2; | |
| 331 | }; | |
| 332 | ||
| 333 | struct rsi_cmd_desc_dword2 { | |
| 334 | __le32 pkt_info; /* Packet specific data */ | |
| 335 | }; | |
| 336 | ||
| 337 | struct rsi_cmd_desc_dword3 { | |
| 338 | __le16 token; | |
| 339 | u8 qid_tid; | |
| 340 | u8 sta_id; | |
| 341 | }; | |
| 342 | ||
| 343 | struct rsi_cmd_desc { | |
| 344 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 345 | struct rsi_cmd_desc_dword1 desc_dword1; | |
| 346 | struct rsi_cmd_desc_dword2 desc_dword2; | |
| 347 | struct rsi_cmd_desc_dword3 desc_dword3; | |
| 348 | }; | |
| 349 | ||
| dad0d04f FF |
350 | struct rsi_boot_params { |
| 351 | __le16 desc_word[8]; | |
| 352 | struct bootup_params bootup_params; | |
| 353 | } __packed; | |
| 354 | ||
| f911c861 SR |
355 | struct rsi_boot_params_9116 { |
| 356 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 357 | struct rsi_cmd_desc_dword1 desc_dword1; | |
| 358 | struct rsi_cmd_desc_dword2 desc_dword2; | |
| 359 | __le16 reserved; | |
| 360 | __le16 umac_clk; | |
| 361 | struct bootup_params_9116 bootup_params; | |
| 362 | } __packed; | |
| 363 | ||
| dad0d04f | 364 | struct rsi_peer_notify { |
| 59e006dc | 365 | struct rsi_cmd_desc desc; |
| dad0d04f FF |
366 | u8 mac_addr[6]; |
| 367 | __le16 command; | |
| 368 | __le16 mpdu_density; | |
| 369 | __le16 reserved; | |
| 370 | __le32 sta_flags; | |
| 371 | } __packed; | |
| 372 | ||
| 3a9828c9 PRG |
373 | /* Aggregation params flags */ |
| 374 | #define RSI_AGGR_PARAMS_TID_MASK 0xf | |
| 375 | #define RSI_AGGR_PARAMS_START BIT(4) | |
| 376 | #define RSI_AGGR_PARAMS_RX_AGGR BIT(5) | |
| 377 | struct rsi_aggr_params { | |
| 378 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 379 | struct rsi_cmd_desc_dword0 desc_dword1; | |
| 380 | __le16 seq_start; | |
| 381 | __le16 baw_size; | |
| 382 | __le16 token; | |
| 383 | u8 aggr_params; | |
| 384 | u8 peer_id; | |
| 385 | } __packed; | |
| 386 | ||
| 5c7ca1bb PRG |
387 | struct rsi_bb_rf_prog { |
| 388 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 389 | __le16 reserved1; | |
| 390 | u8 rf_power_mode; | |
| 391 | u8 reserved2; | |
| 392 | u8 endpoint; | |
| 393 | u8 reserved3; | |
| 394 | __le16 reserved4; | |
| 395 | __le16 reserved5; | |
| 396 | __le16 flags; | |
| 397 | } __packed; | |
| 398 | ||
| f04854fa PRG |
399 | struct rsi_chan_config { |
| 400 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 401 | struct rsi_cmd_desc_dword1 desc_dword1; | |
| 402 | u8 channel_number; | |
| 403 | u8 antenna_gain_offset_2g; | |
| 404 | u8 antenna_gain_offset_5g; | |
| 405 | u8 channel_width; | |
| 406 | __le16 tx_power; | |
| 407 | u8 region_rftype; | |
| 408 | u8 flags; | |
| 409 | } __packed; | |
| 410 | ||
| dad0d04f | 411 | struct rsi_vap_caps { |
| de1d1813 PRG |
412 | struct rsi_cmd_desc_dword0 desc_dword0; |
| 413 | u8 reserved1; | |
| 414 | u8 status; | |
| 415 | __le16 reserved2; | |
| 416 | u8 vif_type; | |
| 417 | u8 channel_bw; | |
| 418 | __le16 antenna_info; | |
| b8bd3a43 | 419 | __le16 token; |
| de1d1813 PRG |
420 | u8 radioid_macid; |
| 421 | u8 vap_id; | |
| dad0d04f FF |
422 | u8 mac_addr[6]; |
| 423 | __le16 keep_alive_period; | |
| 424 | u8 bssid[6]; | |
| de1d1813 | 425 | __le16 reserved4; |
| dad0d04f FF |
426 | __le32 flags; |
| 427 | __le16 frag_threshold; | |
| 428 | __le16 rts_threshold; | |
| 429 | __le32 default_mgmt_rate; | |
| de1d1813 PRG |
430 | __le16 default_ctrl_rate; |
| 431 | __le16 ctrl_rate_flags; | |
| dad0d04f FF |
432 | __le32 default_data_rate; |
| 433 | __le16 beacon_interval; | |
| 434 | __le16 dtim_period; | |
| de1d1813 | 435 | __le16 beacon_miss_threshold; |
| dad0d04f FF |
436 | } __packed; |
| 437 | ||
| 588349a1 PM |
438 | struct rsi_ant_sel_frame { |
| 439 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 440 | u8 reserved; | |
| 441 | u8 sub_frame_type; | |
| 442 | __le16 ant_value; | |
| 443 | __le32 reserved1; | |
| 444 | __le32 reserved2; | |
| 445 | } __packed; | |
| 446 | ||
| 80a88ecf KE |
447 | struct rsi_dynamic_s { |
| 448 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 449 | struct rsi_cmd_desc_dword1 desc_dword1; | |
| 450 | struct rsi_cmd_desc_dword2 desc_dword2; | |
| 451 | struct rsi_cmd_desc_dword3 desc_dword3; | |
| 452 | struct framebody { | |
| 453 | __le16 data_rate; | |
| 454 | __le16 mgmt_rate; | |
| 455 | __le16 keep_alive_period; | |
| 456 | } frame_body; | |
| 457 | } __packed; | |
| 458 | ||
| a84faab0 PRG |
459 | /* Key descriptor flags */ |
| 460 | #define RSI_KEY_TYPE_BROADCAST BIT(1) | |
| 461 | #define RSI_WEP_KEY BIT(2) | |
| 462 | #define RSI_WEP_KEY_104 BIT(3) | |
| 463 | #define RSI_CIPHER_WPA BIT(4) | |
| 464 | #define RSI_CIPHER_TKIP BIT(5) | |
| 38ef6235 | 465 | #define RSI_KEY_MODE_AP BIT(7) |
| a84faab0 PRG |
466 | #define RSI_PROTECT_DATA_FRAMES BIT(13) |
| 467 | #define RSI_KEY_ID_MASK 0xC0 | |
| 468 | #define RSI_KEY_ID_OFFSET 14 | |
| dad0d04f | 469 | struct rsi_set_key { |
| a84faab0 PRG |
470 | struct rsi_cmd_desc_dword0 desc_dword0; |
| 471 | struct rsi_cmd_desc_dword1 desc_dword1; | |
| 472 | __le16 key_desc; | |
| 473 | __le32 bpn; | |
| 474 | u8 sta_id; | |
| 475 | u8 vap_id; | |
| dad0d04f FF |
476 | u8 key[4][32]; |
| 477 | u8 tx_mic_key[8]; | |
| 478 | u8 rx_mic_key[8]; | |
| 479 | } __packed; | |
| 480 | ||
| 481 | struct rsi_auto_rate { | |
| 6572f054 | 482 | struct rsi_cmd_desc desc; |
| dad0d04f FF |
483 | __le16 failure_limit; |
| 484 | __le16 initial_boundary; | |
| 485 | __le16 max_threshold_limt; | |
| 486 | __le16 num_supported_rates; | |
| 487 | __le16 aarf_rssi; | |
| 488 | __le16 moderate_rate_inx; | |
| 489 | __le16 collision_tolerance; | |
| 490 | __le16 supported_rates[40]; | |
| 491 | } __packed; | |
| 492 | ||
| 79e590d9 PRG |
493 | #define QUIET_INFO_VALID BIT(0) |
| 494 | #define QUIET_ENABLE BIT(1) | |
| 495 | struct rsi_block_unblock_data { | |
| 496 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 497 | u8 xtend_desc_size; | |
| 498 | u8 host_quiet_info; | |
| 499 | __le16 reserved; | |
| 500 | __le16 block_q_bitmap; | |
| 501 | __le16 unblock_q_bitmap; | |
| 502 | __le16 token; | |
| 503 | __le16 flush_q_bitmap; | |
| 504 | } __packed; | |
| 505 | ||
| dad0d04f FF |
506 | struct qos_params { |
| 507 | __le16 cont_win_min_q; | |
| 508 | __le16 cont_win_max_q; | |
| 509 | __le16 aifsn_val_q; | |
| 510 | __le16 txop_q; | |
| 511 | } __packed; | |
| 512 | ||
| 513 | struct rsi_radio_caps { | |
| 6abdf2c1 PRG |
514 | struct rsi_cmd_desc_dword0 desc_dword0; |
| 515 | struct rsi_cmd_desc_dword0 desc_dword1; | |
| 516 | u8 channel_num; | |
| 517 | u8 rf_model; | |
| 518 | __le16 ppe_ack_rate; | |
| 519 | __le16 mode_11j; | |
| 520 | u8 radio_cfg_info; | |
| 521 | u8 radio_info; | |
| dad0d04f FF |
522 | struct qos_params qos_params[MAX_HW_QUEUES]; |
| 523 | u8 num_11n_rates; | |
| 524 | u8 num_11ac_rates; | |
| 525 | __le16 gcpd_per_rate[20]; | |
| 4550faac JM |
526 | __le16 sifs_tx_11n; |
| 527 | __le16 sifs_tx_11b; | |
| 528 | __le16 slot_rx_11n; | |
| 529 | __le16 ofdm_ack_tout; | |
| 530 | __le16 cck_ack_tout; | |
| 531 | __le16 preamble_type; | |
| dad0d04f FF |
532 | } __packed; |
| 533 | ||
| 9920322c PRG |
534 | /* ULP GPIO flags */ |
| 535 | #define RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP BIT(0) | |
| 536 | #define RSI_GPIO_SLEEP_IND_FROM_DEVICE BIT(1) | |
| 537 | #define RSI_GPIO_2_ULP BIT(2) | |
| 538 | #define RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP BIT(3) | |
| 539 | ||
| 540 | /* SOC GPIO flags */ | |
| 541 | #define RSI_GPIO_0_PSPI_CSN_0 BIT(0) | |
| 542 | #define RSI_GPIO_1_PSPI_CSN_1 BIT(1) | |
| 543 | #define RSI_GPIO_2_HOST_WAKEUP_INTR BIT(2) | |
| 544 | #define RSI_GPIO_3_PSPI_DATA_0 BIT(3) | |
| 545 | #define RSI_GPIO_4_PSPI_DATA_1 BIT(4) | |
| 546 | #define RSI_GPIO_5_PSPI_DATA_2 BIT(5) | |
| 547 | #define RSI_GPIO_6_PSPI_DATA_3 BIT(6) | |
| 548 | #define RSI_GPIO_7_I2C_SCL BIT(7) | |
| 549 | #define RSI_GPIO_8_I2C_SDA BIT(8) | |
| 550 | #define RSI_GPIO_9_UART1_RX BIT(9) | |
| 551 | #define RSI_GPIO_10_UART1_TX BIT(10) | |
| 552 | #define RSI_GPIO_11_UART1_RTS_I2S_CLK BIT(11) | |
| 553 | #define RSI_GPIO_12_UART1_CTS_I2S_WS BIT(12) | |
| 554 | #define RSI_GPIO_13_DBG_UART_RX_I2S_DIN BIT(13) | |
| 555 | #define RSI_GPIO_14_DBG_UART_RX_I2S_DOUT BIT(14) | |
| 556 | #define RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS BIT(15) | |
| 557 | #define RSI_GPIO_16_LED_0 BIT(16) | |
| 558 | #define RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL BIT(17) | |
| 559 | #define RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL BIT(18) | |
| 560 | #define RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF BIT(19) | |
| 561 | #define RSI_GPIO_20_RF_RESET BIT(20) | |
| 562 | #define RSI_GPIO_21_SLEEP_IND_FROM_DEVICE BIT(21) | |
| 563 | ||
| 564 | #define RSI_UNUSED_SOC_GPIO_BITMAP (RSI_GPIO_9_UART1_RX | \ | |
| 565 | RSI_GPIO_10_UART1_TX | \ | |
| 566 | RSI_GPIO_11_UART1_RTS_I2S_CLK | \ | |
| 567 | RSI_GPIO_12_UART1_CTS_I2S_WS | \ | |
| 568 | RSI_GPIO_13_DBG_UART_RX_I2S_DIN | \ | |
| 569 | RSI_GPIO_14_DBG_UART_RX_I2S_DOUT | \ | |
| 570 | RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS | \ | |
| 571 | RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL | \ | |
| 572 | RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL | \ | |
| 573 | RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF | \ | |
| 574 | RSI_GPIO_21_SLEEP_IND_FROM_DEVICE) | |
| 575 | ||
| 576 | #define RSI_UNUSED_ULP_GPIO_BITMAP (RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP | \ | |
| 577 | RSI_GPIO_SLEEP_IND_FROM_DEVICE | \ | |
| 578 | RSI_GPIO_2_ULP | \ | |
| 579 | RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP); | |
| 580 | struct rsi_config_vals { | |
| 581 | __le16 len_qno; | |
| 582 | u8 pkt_type; | |
| 583 | u8 misc_flags; | |
| 584 | __le16 reserved1[6]; | |
| 585 | u8 lp_ps_handshake; | |
| 586 | u8 ulp_ps_handshake; | |
| 587 | u8 sleep_config_params; /* 0 for no handshake, | |
| 588 | * 1 for GPIO based handshake, | |
| 589 | * 2 packet handshake | |
| 590 | */ | |
| 591 | u8 unused_ulp_gpio; | |
| 592 | __le32 unused_soc_gpio_bitmap; | |
| 593 | u8 ext_pa_or_bt_coex_en; | |
| 594 | u8 opermode; | |
| 595 | u8 wlan_rf_pwr_mode; | |
| 596 | u8 bt_rf_pwr_mode; | |
| 597 | u8 zigbee_rf_pwr_mode; | |
| 598 | u8 driver_mode; | |
| 599 | u8 region_code; | |
| 600 | u8 antenna_sel_val; | |
| 601 | u8 reserved2[16]; | |
| 602 | } __packed; | |
| 603 | ||
| 09cfb41f PRG |
604 | /* Packet info flags */ |
| 605 | #define RSI_EEPROM_HDR_SIZE_OFFSET 8 | |
| 606 | #define RSI_EEPROM_HDR_SIZE_MASK 0x300 | |
| 607 | #define RSI_EEPROM_LEN_OFFSET 20 | |
| 608 | #define RSI_EEPROM_LEN_MASK 0xFFF00000 | |
| 609 | ||
| 610 | struct rsi_eeprom_read_frame { | |
| 611 | __le16 len_qno; | |
| 612 | u8 pkt_type; | |
| 613 | u8 misc_flags; | |
| 614 | __le32 pkt_info; | |
| 615 | __le32 eeprom_offset; | |
| 616 | __le16 delay_ms; | |
| 617 | __le16 reserved3; | |
| 618 | } __packed; | |
| 619 | ||
| ce86893f KE |
620 | struct rsi_request_ps { |
| 621 | struct rsi_cmd_desc desc; | |
| 622 | struct ps_sleep_params ps_sleep; | |
| 623 | u8 ps_mimic_support; | |
| 624 | u8 ps_uapsd_acs; | |
| 625 | u8 ps_uapsd_wakeup_period; | |
| 626 | u8 reserved; | |
| 627 | __le32 ps_listen_interval; | |
| 628 | __le32 ps_dtim_interval_duration; | |
| 629 | __le16 ps_num_dtim_intervals; | |
| 630 | } __packed; | |
| 631 | ||
| f3ac4e73 KE |
632 | struct rsi_wowlan_req { |
| 633 | struct rsi_cmd_desc desc; | |
| 634 | u8 sourceid[ETH_ALEN]; | |
| 635 | u16 wow_flags; | |
| 636 | u16 host_sleep_status; | |
| 637 | } __packed; | |
| 638 | ||
| 7fdcb8e1 PRG |
639 | #define RSI_START_BGSCAN 1 |
| 640 | #define RSI_STOP_BGSCAN 0 | |
| 641 | #define HOST_BG_SCAN_TRIG BIT(4) | |
| 642 | struct rsi_bgscan_config { | |
| 643 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 644 | __le64 reserved; | |
| 645 | __le32 reserved1; | |
| 646 | __le16 bgscan_threshold; | |
| 647 | __le16 roam_threshold; | |
| 648 | __le16 bgscan_periodicity; | |
| 649 | u8 num_bgscan_channels; | |
| 650 | u8 two_probe; | |
| 651 | __le16 active_scan_duration; | |
| 652 | __le16 passive_scan_duration; | |
| 653 | __le16 channels2scan[MAX_BGSCAN_CHANNELS_DUAL_BAND]; | |
| 654 | } __packed; | |
| 655 | ||
| 656 | struct rsi_bgscan_probe { | |
| 657 | struct rsi_cmd_desc_dword0 desc_dword0; | |
| 658 | __le64 reserved; | |
| 659 | __le32 reserved1; | |
| 660 | __le16 mgmt_rate; | |
| 661 | __le16 flags; | |
| 662 | __le16 def_chan; | |
| 663 | __le16 channel_scan_time; | |
| 664 | __le16 probe_req_length; | |
| 665 | } __packed; | |
| 666 | ||
| 1533f976 SR |
667 | #define RSI_DUTY_CYCLING BIT(0) |
| 668 | #define RSI_END_OF_FRAME BIT(1) | |
| 669 | #define RSI_SIFS_TX_ENABLE BIT(2) | |
| 670 | #define RSI_DPD BIT(3) | |
| 671 | struct rsi_wlan_9116_features { | |
| 672 | struct rsi_cmd_desc desc; | |
| 673 | u8 pll_mode; | |
| 674 | u8 rf_type; | |
| 675 | u8 wireless_mode; | |
| 676 | u8 enable_ppe; | |
| 677 | u8 afe_type; | |
| 678 | u8 reserved1; | |
| 679 | __le16 reserved2; | |
| 680 | __le32 feature_enable; | |
| 681 | }; | |
| 682 | ||
| dad0d04f FF |
683 | static inline u32 rsi_get_queueno(u8 *addr, u16 offset) |
| 684 | { | |
| 685 | return (le16_to_cpu(*(__le16 *)&addr[offset]) & 0x7000) >> 12; | |
| 686 | } | |
| 687 | ||
| 688 | static inline u32 rsi_get_length(u8 *addr, u16 offset) | |
| 689 | { | |
| 690 | return (le16_to_cpu(*(__le16 *)&addr[offset])) & 0x0fff; | |
| 691 | } | |
| 692 | ||
| 693 | static inline u8 rsi_get_extended_desc(u8 *addr, u16 offset) | |
| 694 | { | |
| 695 | return le16_to_cpu(*((__le16 *)&addr[offset + 4])) & 0x00ff; | |
| 696 | } | |
| 697 | ||
| 698 | static inline u8 rsi_get_rssi(u8 *addr) | |
| 699 | { | |
| 700 | return *(u8 *)(addr + FRAME_DESC_SZ); | |
| 701 | } | |
| 702 | ||
| 703 | static inline u8 rsi_get_channel(u8 *addr) | |
| 704 | { | |
| 705 | return *(char *)(addr + 15); | |
| 706 | } | |
| 707 | ||
| 9920322c PRG |
708 | static inline void rsi_set_len_qno(__le16 *addr, u16 len, u8 qno) |
| 709 | { | |
| 710 | *addr = cpu_to_le16(len | ((qno & 7) << 12)); | |
| 711 | } | |
| 712 | ||
| 2108df3c | 713 | int rsi_handle_card_ready(struct rsi_common *common, u8 *msg); |
| dad0d04f | 714 | int rsi_mgmt_pkt_recv(struct rsi_common *common, u8 *msg); |
| 77364aae | 715 | int rsi_set_vap_capabilities(struct rsi_common *common, enum opmode mode, |
| 03c34c0d | 716 | u8 *mac_addr, u8 vap_id, u8 vap_status); |
| dad0d04f | 717 | int rsi_send_aggregation_params_frame(struct rsi_common *common, u16 tid, |
| 32be57a6 PRG |
718 | u16 ssn, u8 buf_size, u8 event, |
| 719 | u8 sta_id); | |
| dad0d04f | 720 | int rsi_hal_load_key(struct rsi_common *common, u8 *data, u16 key_len, |
| eac4eed3 PRG |
721 | u8 key_type, u8 key_id, u32 cipher, s16 sta_id, |
| 722 | struct ieee80211_vif *vif); | |
| 61d10842 PRG |
723 | int rsi_set_channel(struct rsi_common *common, |
| 724 | struct ieee80211_channel *channel); | |
| 80a88ecf | 725 | int rsi_send_vap_dynamic_update(struct rsi_common *common); |
| 686a2541 | 726 | int rsi_send_block_unblock_frame(struct rsi_common *common, bool event); |
| 4fd6c476 PRG |
727 | int rsi_hal_send_sta_notify_frame(struct rsi_common *common, enum opmode opmode, |
| 728 | u8 notify_event, const unsigned char *bssid, | |
| 729 | u8 qos_enable, u16 aid, u16 sta_id, | |
| 730 | struct ieee80211_vif *vif); | |
| 3528608f PRG |
731 | void rsi_inform_bss_status(struct rsi_common *common, enum opmode opmode, |
| 732 | u8 status, const u8 *addr, u8 qos_enable, u16 aid, | |
| 4671c209 | 733 | struct ieee80211_sta *sta, u16 sta_id, |
| 4fd6c476 | 734 | u16 assoc_cap, struct ieee80211_vif *vif); |
| dad0d04f FF |
735 | void rsi_indicate_pkt_to_os(struct rsi_common *common, struct sk_buff *skb); |
| 736 | int rsi_mac80211_attach(struct rsi_common *common); | |
| 737 | void rsi_indicate_tx_status(struct rsi_hw *common, struct sk_buff *skb, | |
| 738 | int status); | |
| 739 | bool rsi_is_cipher_wep(struct rsi_common *common); | |
| 740 | void rsi_core_qos_processor(struct rsi_common *common); | |
| 741 | void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb); | |
| 742 | int rsi_send_mgmt_pkt(struct rsi_common *common, struct sk_buff *skb); | |
| 743 | int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb); | |
| df771911 | 744 | int rsi_band_check(struct rsi_common *common, struct ieee80211_channel *chan); |
| e6d64284 | 745 | int rsi_send_rx_filter_frame(struct rsi_common *common, u16 rx_filter_word); |
| 8b36de8c | 746 | int rsi_send_radio_params_update(struct rsi_common *common); |
| 4edbcd1a | 747 | int rsi_set_antenna(struct rsi_common *common, u8 antenna); |
| e6b3b2ed | 748 | #ifdef CONFIG_PM |
| f3ac4e73 KE |
749 | int rsi_send_wowlan_request(struct rsi_common *common, u16 flags, |
| 750 | u16 sleep_status); | |
| e6b3b2ed | 751 | #endif |
| efe877aa PRG |
752 | int rsi_send_ps_request(struct rsi_hw *adapter, bool enable, |
| 753 | struct ieee80211_vif *vif); | |
| 7fdcb8e1 PRG |
754 | void init_bgscan_params(struct rsi_common *common); |
| 755 | int rsi_send_bgscan_params(struct rsi_common *common, int enable); | |
| 756 | int rsi_send_bgscan_probe_req(struct rsi_common *common, | |
| 757 | struct ieee80211_vif *vif); | |
| dad0d04f | 758 | #endif |