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d930faee AK |
1 | /* |
2 | * Marvell Wireless LAN device driver: PCIE specific handling | |
3 | * | |
4 | * Copyright (C) 2011, Marvell International Ltd. | |
5 | * | |
6 | * This software file (the "File") is distributed by Marvell International | |
7 | * Ltd. under the terms of the GNU General Public License Version 2, June 1991 | |
8 | * (the "License"). You may use, redistribute and/or modify this File in | |
9 | * accordance with the terms and conditions of the License, a copy of which | |
10 | * is available by writing to the Free Software Foundation, Inc., | |
11 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the | |
12 | * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. | |
13 | * | |
14 | * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE | |
15 | * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE | |
16 | * ARE EXPRESSLY DISCLAIMED. The License provides additional details about | |
17 | * this warranty disclaimer. | |
18 | */ | |
19 | ||
20 | #include <linux/firmware.h> | |
21 | ||
22 | #include "decl.h" | |
23 | #include "ioctl.h" | |
24 | #include "util.h" | |
25 | #include "fw.h" | |
26 | #include "main.h" | |
27 | #include "wmm.h" | |
28 | #include "11n.h" | |
29 | #include "pcie.h" | |
30 | ||
31 | #define PCIE_VERSION "1.0" | |
32 | #define DRV_NAME "Marvell mwifiex PCIe" | |
33 | ||
34 | static u8 user_rmmod; | |
35 | ||
36 | static struct mwifiex_if_ops pcie_ops; | |
37 | ||
38 | static struct semaphore add_remove_card_sem; | |
39 | static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter); | |
40 | static int mwifiex_pcie_resume(struct pci_dev *pdev); | |
41 | ||
fc331460 AP |
42 | static int |
43 | mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb, | |
44 | int size, int flags) | |
d930faee | 45 | { |
fc331460 AP |
46 | struct pcie_service_card *card = adapter->card; |
47 | dma_addr_t buf_pa; | |
d930faee | 48 | |
fc331460 AP |
49 | buf_pa = pci_map_single(card->dev, skb->data, size, flags); |
50 | if (pci_dma_mapping_error(card->dev, buf_pa)) { | |
51 | dev_err(adapter->dev, "failed to map pci memory!\n"); | |
52 | return -1; | |
53 | } | |
54 | memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t)); | |
55 | return 0; | |
d930faee AK |
56 | } |
57 | ||
58 | /* | |
59 | * This function reads sleep cookie and checks if FW is ready | |
60 | */ | |
61 | static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter) | |
62 | { | |
63 | u32 *cookie_addr; | |
64 | struct pcie_service_card *card = adapter->card; | |
52301a81 AP |
65 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
66 | ||
67 | if (!reg->sleep_cookie) | |
68 | return true; | |
d930faee | 69 | |
fc331460 AP |
70 | if (card->sleep_cookie_vbase) { |
71 | cookie_addr = (u32 *)card->sleep_cookie_vbase; | |
d930faee AK |
72 | dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n", |
73 | *cookie_addr); | |
74 | if (*cookie_addr == FW_AWAKE_COOKIE) | |
75 | return true; | |
76 | } | |
77 | ||
78 | return false; | |
79 | } | |
80 | ||
81 | /* | |
82 | * This function probes an mwifiex device and registers it. It allocates | |
83 | * the card structure, enables PCIE function number and initiates the | |
84 | * device registration and initialization procedure by adding a logical | |
85 | * interface. | |
86 | */ | |
87 | static int mwifiex_pcie_probe(struct pci_dev *pdev, | |
88 | const struct pci_device_id *ent) | |
89 | { | |
90 | struct pcie_service_card *card; | |
91 | ||
92 | pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n", | |
f57c1edc | 93 | pdev->vendor, pdev->device, pdev->revision); |
d930faee AK |
94 | |
95 | card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL); | |
e404decb | 96 | if (!card) |
d930faee | 97 | return -ENOMEM; |
d930faee AK |
98 | |
99 | card->dev = pdev; | |
100 | ||
dd04e6ac AP |
101 | if (ent->driver_data) { |
102 | struct mwifiex_pcie_device *data = (void *)ent->driver_data; | |
103 | card->pcie.firmware = data->firmware; | |
104 | card->pcie.reg = data->reg; | |
105 | card->pcie.blksz_fw_dl = data->blksz_fw_dl; | |
106 | } | |
107 | ||
d930faee AK |
108 | if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops, |
109 | MWIFIEX_PCIE)) { | |
110 | pr_err("%s failed\n", __func__); | |
111 | kfree(card); | |
112 | return -1; | |
113 | } | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
118 | /* | |
119 | * This function removes the interface and frees up the card structure. | |
120 | */ | |
121 | static void mwifiex_pcie_remove(struct pci_dev *pdev) | |
122 | { | |
123 | struct pcie_service_card *card; | |
124 | struct mwifiex_adapter *adapter; | |
f57c1edc | 125 | struct mwifiex_private *priv; |
d930faee AK |
126 | int i; |
127 | ||
128 | card = pci_get_drvdata(pdev); | |
129 | if (!card) | |
130 | return; | |
131 | ||
132 | adapter = card->adapter; | |
133 | if (!adapter || !adapter->priv_num) | |
134 | return; | |
135 | ||
59a4cc25 AK |
136 | /* In case driver is removed when asynchronous FW load is in progress */ |
137 | wait_for_completion(&adapter->fw_load); | |
138 | ||
d930faee AK |
139 | if (user_rmmod) { |
140 | #ifdef CONFIG_PM | |
141 | if (adapter->is_suspended) | |
142 | mwifiex_pcie_resume(pdev); | |
143 | #endif | |
144 | ||
145 | for (i = 0; i < adapter->priv_num; i++) | |
146 | if ((GET_BSS_ROLE(adapter->priv[i]) == | |
f57c1edc YAP |
147 | MWIFIEX_BSS_ROLE_STA) && |
148 | adapter->priv[i]->media_connected) | |
d930faee AK |
149 | mwifiex_deauthenticate(adapter->priv[i], NULL); |
150 | ||
f57c1edc | 151 | priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); |
d930faee | 152 | |
f57c1edc YAP |
153 | mwifiex_disable_auto_ds(priv); |
154 | ||
155 | mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN); | |
d930faee AK |
156 | } |
157 | ||
158 | mwifiex_remove_card(card->adapter, &add_remove_card_sem); | |
159 | kfree(card); | |
160 | } | |
161 | ||
162 | /* | |
163 | * Kernel needs to suspend all functions separately. Therefore all | |
164 | * registered functions must have drivers with suspend and resume | |
165 | * methods. Failing that the kernel simply removes the whole card. | |
166 | * | |
167 | * If already not suspended, this function allocates and sends a host | |
168 | * sleep activate request to the firmware and turns off the traffic. | |
169 | */ | |
170 | static int mwifiex_pcie_suspend(struct pci_dev *pdev, pm_message_t state) | |
171 | { | |
172 | struct mwifiex_adapter *adapter; | |
173 | struct pcie_service_card *card; | |
1499d9fa | 174 | int hs_actived; |
d930faee AK |
175 | |
176 | if (pdev) { | |
177 | card = (struct pcie_service_card *) pci_get_drvdata(pdev); | |
83f0c6d1 | 178 | if (!card || !card->adapter) { |
d930faee AK |
179 | pr_err("Card or adapter structure is not valid\n"); |
180 | return 0; | |
181 | } | |
182 | } else { | |
183 | pr_err("PCIE device is not specified\n"); | |
184 | return 0; | |
185 | } | |
186 | ||
187 | adapter = card->adapter; | |
188 | ||
189 | hs_actived = mwifiex_enable_hs(adapter); | |
190 | ||
191 | /* Indicate device suspended */ | |
192 | adapter->is_suspended = true; | |
193 | ||
d930faee AK |
194 | return 0; |
195 | } | |
196 | ||
197 | /* | |
198 | * Kernel needs to suspend all functions separately. Therefore all | |
199 | * registered functions must have drivers with suspend and resume | |
200 | * methods. Failing that the kernel simply removes the whole card. | |
201 | * | |
202 | * If already not resumed, this function turns on the traffic and | |
203 | * sends a host sleep cancel request to the firmware. | |
204 | */ | |
205 | static int mwifiex_pcie_resume(struct pci_dev *pdev) | |
206 | { | |
207 | struct mwifiex_adapter *adapter; | |
208 | struct pcie_service_card *card; | |
d930faee AK |
209 | |
210 | if (pdev) { | |
211 | card = (struct pcie_service_card *) pci_get_drvdata(pdev); | |
212 | if (!card || !card->adapter) { | |
213 | pr_err("Card or adapter structure is not valid\n"); | |
214 | return 0; | |
215 | } | |
216 | } else { | |
217 | pr_err("PCIE device is not specified\n"); | |
218 | return 0; | |
219 | } | |
220 | ||
221 | adapter = card->adapter; | |
222 | ||
223 | if (!adapter->is_suspended) { | |
224 | dev_warn(adapter->dev, "Device already resumed\n"); | |
225 | return 0; | |
226 | } | |
227 | ||
228 | adapter->is_suspended = false; | |
229 | ||
d930faee | 230 | mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA), |
f57c1edc | 231 | MWIFIEX_ASYNC_CMD); |
d930faee AK |
232 | |
233 | return 0; | |
234 | } | |
235 | ||
d930faee AK |
236 | static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = { |
237 | { | |
238 | PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P, | |
239 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | |
dd04e6ac | 240 | .driver_data = (unsigned long) &mwifiex_pcie8766, |
d930faee | 241 | }, |
ca8f2112 AP |
242 | { |
243 | PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897, | |
244 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | |
245 | .driver_data = (unsigned long) &mwifiex_pcie8897, | |
246 | }, | |
d930faee AK |
247 | {}, |
248 | }; | |
249 | ||
250 | MODULE_DEVICE_TABLE(pci, mwifiex_ids); | |
251 | ||
252 | /* PCI Device Driver */ | |
253 | static struct pci_driver __refdata mwifiex_pcie = { | |
254 | .name = "mwifiex_pcie", | |
255 | .id_table = mwifiex_ids, | |
256 | .probe = mwifiex_pcie_probe, | |
257 | .remove = mwifiex_pcie_remove, | |
258 | #ifdef CONFIG_PM | |
259 | /* Power Management Hooks */ | |
260 | .suspend = mwifiex_pcie_suspend, | |
261 | .resume = mwifiex_pcie_resume, | |
262 | #endif | |
263 | }; | |
264 | ||
265 | /* | |
266 | * This function writes data into PCIE card register. | |
267 | */ | |
268 | static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data) | |
269 | { | |
270 | struct pcie_service_card *card = adapter->card; | |
271 | ||
272 | iowrite32(data, card->pci_mmap1 + reg); | |
273 | ||
274 | return 0; | |
275 | } | |
276 | ||
277 | /* | |
278 | * This function reads data from PCIE card register. | |
279 | */ | |
280 | static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data) | |
281 | { | |
282 | struct pcie_service_card *card = adapter->card; | |
283 | ||
284 | *data = ioread32(card->pci_mmap1 + reg); | |
285 | ||
286 | return 0; | |
287 | } | |
288 | ||
289 | /* | |
290 | * This function wakes up the card. | |
291 | * | |
292 | * A host power up command is written to the card configuration | |
293 | * register to wake up the card. | |
294 | */ | |
295 | static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter) | |
296 | { | |
297 | int i = 0; | |
52301a81 AP |
298 | struct pcie_service_card *card = adapter->card; |
299 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | |
d930faee | 300 | |
52301a81 | 301 | while (reg->sleep_cookie && mwifiex_pcie_ok_to_access_hw(adapter)) { |
d930faee | 302 | i++; |
e7891ba2 | 303 | usleep_range(10, 20); |
d930faee | 304 | /* 50ms max wait */ |
3e7a4ff7 | 305 | if (i == 5000) |
d930faee AK |
306 | break; |
307 | } | |
308 | ||
309 | dev_dbg(adapter->dev, "event: Wakeup device...\n"); | |
310 | ||
311 | /* Enable interrupts or any chip access will wakeup device */ | |
312 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, HOST_INTR_MASK)) { | |
313 | dev_warn(adapter->dev, "Enable host interrupt failed\n"); | |
314 | return -1; | |
315 | } | |
316 | ||
317 | dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n"); | |
318 | adapter->ps_state = PS_STATE_AWAKE; | |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
323 | /* | |
324 | * This function is called after the card has woken up. | |
325 | * | |
326 | * The card configuration register is reset. | |
327 | */ | |
328 | static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter) | |
329 | { | |
330 | dev_dbg(adapter->dev, "cmd: Wakeup device completed\n"); | |
331 | ||
332 | return 0; | |
333 | } | |
334 | ||
335 | /* | |
336 | * This function disables the host interrupt. | |
337 | * | |
338 | * The host interrupt mask is read, the disable bit is reset and | |
339 | * written back to the card host interrupt mask register. | |
340 | */ | |
341 | static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter) | |
342 | { | |
343 | if (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
344 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, | |
345 | 0x00000000)) { | |
346 | dev_warn(adapter->dev, "Disable host interrupt failed\n"); | |
347 | return -1; | |
348 | } | |
349 | } | |
350 | ||
351 | return 0; | |
352 | } | |
353 | ||
354 | /* | |
355 | * This function enables the host interrupt. | |
356 | * | |
357 | * The host interrupt enable mask is written to the card | |
358 | * host interrupt mask register. | |
359 | */ | |
360 | static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter) | |
361 | { | |
362 | if (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
363 | /* Simply write the mask to the register */ | |
364 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, | |
365 | HOST_INTR_MASK)) { | |
366 | dev_warn(adapter->dev, "Enable host interrupt failed\n"); | |
367 | return -1; | |
368 | } | |
369 | } | |
370 | ||
371 | return 0; | |
372 | } | |
373 | ||
374 | /* | |
0732484b AP |
375 | * This function initializes TX buffer ring descriptors |
376 | */ | |
377 | static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter) | |
378 | { | |
379 | struct pcie_service_card *card = adapter->card; | |
ca8f2112 | 380 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
0732484b | 381 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 382 | struct mwifiex_pfu_buf_desc *desc2; |
0732484b AP |
383 | int i; |
384 | ||
385 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
386 | card->tx_buf_list[i] = NULL; | |
ca8f2112 AP |
387 | if (reg->pfu_enabled) { |
388 | card->txbd_ring[i] = (void *)card->txbd_ring_vbase + | |
389 | (sizeof(*desc2) * i); | |
390 | desc2 = card->txbd_ring[i]; | |
391 | memset(desc2, 0, sizeof(*desc2)); | |
392 | } else { | |
393 | card->txbd_ring[i] = (void *)card->txbd_ring_vbase + | |
394 | (sizeof(*desc) * i); | |
395 | desc = card->txbd_ring[i]; | |
396 | memset(desc, 0, sizeof(*desc)); | |
397 | } | |
0732484b AP |
398 | } |
399 | ||
400 | return 0; | |
401 | } | |
402 | ||
403 | /* This function initializes RX buffer ring descriptors. Each SKB is allocated | |
404 | * here and after mapping PCI memory, its physical address is assigned to | |
405 | * PCIE Rx buffer descriptor's physical address. | |
406 | */ | |
407 | static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter) | |
408 | { | |
409 | struct pcie_service_card *card = adapter->card; | |
ca8f2112 | 410 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
0732484b AP |
411 | struct sk_buff *skb; |
412 | struct mwifiex_pcie_buf_desc *desc; | |
ca8f2112 | 413 | struct mwifiex_pfu_buf_desc *desc2; |
0732484b AP |
414 | dma_addr_t buf_pa; |
415 | int i; | |
416 | ||
417 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
418 | /* Allocate skb here so that firmware can DMA data from it */ | |
419 | skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE); | |
420 | if (!skb) { | |
421 | dev_err(adapter->dev, | |
422 | "Unable to allocate skb for RX ring.\n"); | |
423 | kfree(card->rxbd_ring_vbase); | |
424 | return -ENOMEM; | |
425 | } | |
426 | ||
427 | if (mwifiex_map_pci_memory(adapter, skb, | |
428 | MWIFIEX_RX_DATA_BUF_SIZE, | |
429 | PCI_DMA_FROMDEVICE)) | |
430 | return -1; | |
431 | ||
432 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
433 | ||
434 | dev_dbg(adapter->dev, | |
435 | "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", | |
436 | skb, skb->len, skb->data, (u32)buf_pa, | |
437 | (u32)((u64)buf_pa >> 32)); | |
438 | ||
439 | card->rx_buf_list[i] = skb; | |
ca8f2112 AP |
440 | if (reg->pfu_enabled) { |
441 | card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase + | |
442 | (sizeof(*desc2) * i); | |
443 | desc2 = card->rxbd_ring[i]; | |
444 | desc2->paddr = buf_pa; | |
445 | desc2->len = (u16)skb->len; | |
446 | desc2->frag_len = (u16)skb->len; | |
447 | desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop; | |
448 | desc2->offset = 0; | |
449 | } else { | |
450 | card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase + | |
451 | (sizeof(*desc) * i)); | |
452 | desc = card->rxbd_ring[i]; | |
453 | desc->paddr = buf_pa; | |
454 | desc->len = (u16)skb->len; | |
455 | desc->flags = 0; | |
456 | } | |
0732484b AP |
457 | } |
458 | ||
459 | return 0; | |
460 | } | |
461 | ||
462 | /* This function initializes event buffer ring descriptors. Each SKB is | |
463 | * allocated here and after mapping PCI memory, its physical address is assigned | |
464 | * to PCIE Rx buffer descriptor's physical address | |
465 | */ | |
466 | static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter) | |
467 | { | |
468 | struct pcie_service_card *card = adapter->card; | |
e05dc3e9 | 469 | struct mwifiex_evt_buf_desc *desc; |
0732484b AP |
470 | struct sk_buff *skb; |
471 | dma_addr_t buf_pa; | |
472 | int i; | |
473 | ||
474 | for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { | |
475 | /* Allocate skb here so that firmware can DMA data from it */ | |
476 | skb = dev_alloc_skb(MAX_EVENT_SIZE); | |
477 | if (!skb) { | |
478 | dev_err(adapter->dev, | |
479 | "Unable to allocate skb for EVENT buf.\n"); | |
480 | kfree(card->evtbd_ring_vbase); | |
481 | return -ENOMEM; | |
482 | } | |
483 | skb_put(skb, MAX_EVENT_SIZE); | |
484 | ||
485 | if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE, | |
486 | PCI_DMA_FROMDEVICE)) | |
487 | return -1; | |
488 | ||
489 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
490 | ||
491 | dev_dbg(adapter->dev, | |
492 | "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n", | |
493 | skb, skb->len, skb->data, (u32)buf_pa, | |
494 | (u32)((u64)buf_pa >> 32)); | |
495 | ||
496 | card->evt_buf_list[i] = skb; | |
497 | card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase + | |
498 | (sizeof(*desc) * i)); | |
0732484b AP |
499 | desc = card->evtbd_ring[i]; |
500 | desc->paddr = buf_pa; | |
501 | desc->len = (u16)skb->len; | |
502 | desc->flags = 0; | |
503 | } | |
504 | ||
505 | return 0; | |
506 | } | |
507 | ||
508 | /* This function cleans up TX buffer rings. If any of the buffer list has valid | |
509 | * SKB address, associated SKB is freed. | |
510 | */ | |
511 | static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter) | |
512 | { | |
513 | struct pcie_service_card *card = adapter->card; | |
ca8f2112 | 514 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
0732484b AP |
515 | struct sk_buff *skb; |
516 | struct mwifiex_pcie_buf_desc *desc; | |
ca8f2112 | 517 | struct mwifiex_pfu_buf_desc *desc2; |
0732484b AP |
518 | int i; |
519 | ||
520 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
ca8f2112 AP |
521 | if (reg->pfu_enabled) { |
522 | desc2 = card->txbd_ring[i]; | |
523 | if (card->tx_buf_list[i]) { | |
524 | skb = card->tx_buf_list[i]; | |
525 | pci_unmap_single(card->dev, desc2->paddr, | |
526 | skb->len, PCI_DMA_TODEVICE); | |
527 | dev_kfree_skb_any(skb); | |
528 | } | |
529 | memset(desc2, 0, sizeof(*desc2)); | |
530 | } else { | |
531 | desc = card->txbd_ring[i]; | |
532 | if (card->tx_buf_list[i]) { | |
533 | skb = card->tx_buf_list[i]; | |
534 | pci_unmap_single(card->dev, desc->paddr, | |
535 | skb->len, PCI_DMA_TODEVICE); | |
536 | dev_kfree_skb_any(skb); | |
537 | } | |
538 | memset(desc, 0, sizeof(*desc)); | |
0732484b AP |
539 | } |
540 | card->tx_buf_list[i] = NULL; | |
0732484b AP |
541 | } |
542 | ||
543 | return; | |
544 | } | |
545 | ||
546 | /* This function cleans up RX buffer rings. If any of the buffer list has valid | |
547 | * SKB address, associated SKB is freed. | |
548 | */ | |
549 | static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter) | |
550 | { | |
551 | struct pcie_service_card *card = adapter->card; | |
ca8f2112 | 552 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
0732484b | 553 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 554 | struct mwifiex_pfu_buf_desc *desc2; |
0732484b AP |
555 | struct sk_buff *skb; |
556 | int i; | |
557 | ||
558 | for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) { | |
ca8f2112 AP |
559 | if (reg->pfu_enabled) { |
560 | desc2 = card->rxbd_ring[i]; | |
561 | if (card->rx_buf_list[i]) { | |
562 | skb = card->rx_buf_list[i]; | |
563 | pci_unmap_single(card->dev, desc2->paddr, | |
564 | skb->len, PCI_DMA_TODEVICE); | |
565 | dev_kfree_skb_any(skb); | |
566 | } | |
567 | memset(desc2, 0, sizeof(*desc2)); | |
568 | } else { | |
569 | desc = card->rxbd_ring[i]; | |
570 | if (card->rx_buf_list[i]) { | |
571 | skb = card->rx_buf_list[i]; | |
572 | pci_unmap_single(card->dev, desc->paddr, | |
573 | skb->len, PCI_DMA_TODEVICE); | |
574 | dev_kfree_skb_any(skb); | |
575 | } | |
576 | memset(desc, 0, sizeof(*desc)); | |
0732484b | 577 | } |
ca8f2112 | 578 | card->rx_buf_list[i] = NULL; |
0732484b AP |
579 | } |
580 | ||
581 | return; | |
582 | } | |
583 | ||
584 | /* This function cleans up event buffer rings. If any of the buffer list has | |
585 | * valid SKB address, associated SKB is freed. | |
586 | */ | |
587 | static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter) | |
588 | { | |
589 | struct pcie_service_card *card = adapter->card; | |
e05dc3e9 | 590 | struct mwifiex_evt_buf_desc *desc; |
0732484b AP |
591 | struct sk_buff *skb; |
592 | int i; | |
593 | ||
594 | for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) { | |
595 | desc = card->evtbd_ring[i]; | |
596 | if (card->evt_buf_list[i]) { | |
597 | skb = card->evt_buf_list[i]; | |
598 | pci_unmap_single(card->dev, desc->paddr, MAX_EVENT_SIZE, | |
599 | PCI_DMA_FROMDEVICE); | |
600 | dev_kfree_skb_any(skb); | |
601 | } | |
602 | card->evt_buf_list[i] = NULL; | |
603 | memset(desc, 0, sizeof(*desc)); | |
604 | } | |
605 | ||
606 | return; | |
607 | } | |
608 | ||
609 | /* This function creates buffer descriptor ring for TX | |
d930faee AK |
610 | */ |
611 | static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter) | |
612 | { | |
613 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 614 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
615 | |
616 | /* | |
617 | * driver maintaines the write pointer and firmware maintaines the read | |
618 | * pointer. The write pointer starts at 0 (zero) while the read pointer | |
619 | * starts at zero with rollover bit set | |
620 | */ | |
621 | card->txbd_wrptr = 0; | |
ca8f2112 AP |
622 | |
623 | if (reg->pfu_enabled) | |
624 | card->txbd_rdptr = 0; | |
625 | else | |
626 | card->txbd_rdptr |= reg->tx_rollover_ind; | |
d930faee AK |
627 | |
628 | /* allocate shared memory for the BD ring and divide the same in to | |
629 | several descriptors */ | |
ca8f2112 AP |
630 | if (reg->pfu_enabled) |
631 | card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * | |
632 | MWIFIEX_MAX_TXRX_BD; | |
633 | else | |
634 | card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | |
635 | MWIFIEX_MAX_TXRX_BD; | |
636 | ||
d930faee | 637 | dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n", |
f57c1edc | 638 | card->txbd_ring_size); |
fc331460 AP |
639 | card->txbd_ring_vbase = pci_alloc_consistent(card->dev, |
640 | card->txbd_ring_size, | |
641 | &card->txbd_ring_pbase); | |
d930faee | 642 | if (!card->txbd_ring_vbase) { |
fc331460 AP |
643 | dev_err(adapter->dev, |
644 | "allocate consistent memory (%d bytes) failed!\n", | |
645 | card->txbd_ring_size); | |
8c53e42d | 646 | return -ENOMEM; |
d930faee | 647 | } |
f57c1edc YAP |
648 | dev_dbg(adapter->dev, |
649 | "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n", | |
fc331460 | 650 | card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase, |
f57c1edc | 651 | (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size); |
d930faee | 652 | |
0732484b | 653 | return mwifiex_init_txq_ring(adapter); |
d930faee AK |
654 | } |
655 | ||
656 | static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter) | |
657 | { | |
658 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 659 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 660 | |
0732484b | 661 | mwifiex_cleanup_txq_ring(adapter); |
d930faee | 662 | |
fc331460 AP |
663 | if (card->txbd_ring_vbase) |
664 | pci_free_consistent(card->dev, card->txbd_ring_size, | |
665 | card->txbd_ring_vbase, | |
666 | card->txbd_ring_pbase); | |
d930faee AK |
667 | card->txbd_ring_size = 0; |
668 | card->txbd_wrptr = 0; | |
dd04e6ac | 669 | card->txbd_rdptr = 0 | reg->tx_rollover_ind; |
d930faee | 670 | card->txbd_ring_vbase = NULL; |
fc331460 | 671 | card->txbd_ring_pbase = 0; |
d930faee AK |
672 | |
673 | return 0; | |
674 | } | |
675 | ||
676 | /* | |
677 | * This function creates buffer descriptor ring for RX | |
678 | */ | |
679 | static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter) | |
680 | { | |
681 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 682 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
683 | |
684 | /* | |
685 | * driver maintaines the read pointer and firmware maintaines the write | |
686 | * pointer. The write pointer starts at 0 (zero) while the read pointer | |
687 | * starts at zero with rollover bit set | |
688 | */ | |
689 | card->rxbd_wrptr = 0; | |
dd04e6ac | 690 | card->rxbd_rdptr = reg->rx_rollover_ind; |
d930faee | 691 | |
ca8f2112 AP |
692 | if (reg->pfu_enabled) |
693 | card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) * | |
694 | MWIFIEX_MAX_TXRX_BD; | |
695 | else | |
696 | card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) * | |
697 | MWIFIEX_MAX_TXRX_BD; | |
698 | ||
d930faee | 699 | dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n", |
f57c1edc | 700 | card->rxbd_ring_size); |
fc331460 AP |
701 | card->rxbd_ring_vbase = pci_alloc_consistent(card->dev, |
702 | card->rxbd_ring_size, | |
703 | &card->rxbd_ring_pbase); | |
d930faee | 704 | if (!card->rxbd_ring_vbase) { |
fc331460 AP |
705 | dev_err(adapter->dev, |
706 | "allocate consistent memory (%d bytes) failed!\n", | |
707 | card->rxbd_ring_size); | |
8c53e42d | 708 | return -ENOMEM; |
d930faee | 709 | } |
d930faee | 710 | |
f57c1edc YAP |
711 | dev_dbg(adapter->dev, |
712 | "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n", | |
713 | card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase, | |
714 | (u32)((u64)card->rxbd_ring_pbase >> 32), | |
715 | card->rxbd_ring_size); | |
d930faee | 716 | |
0732484b | 717 | return mwifiex_init_rxq_ring(adapter); |
d930faee AK |
718 | } |
719 | ||
720 | /* | |
721 | * This function deletes Buffer descriptor ring for RX | |
722 | */ | |
723 | static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter) | |
724 | { | |
725 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 726 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 727 | |
0732484b | 728 | mwifiex_cleanup_rxq_ring(adapter); |
d930faee | 729 | |
fc331460 AP |
730 | if (card->rxbd_ring_vbase) |
731 | pci_free_consistent(card->dev, card->rxbd_ring_size, | |
732 | card->rxbd_ring_vbase, | |
733 | card->rxbd_ring_pbase); | |
d930faee AK |
734 | card->rxbd_ring_size = 0; |
735 | card->rxbd_wrptr = 0; | |
dd04e6ac | 736 | card->rxbd_rdptr = 0 | reg->rx_rollover_ind; |
d930faee | 737 | card->rxbd_ring_vbase = NULL; |
fc331460 | 738 | card->rxbd_ring_pbase = 0; |
d930faee AK |
739 | |
740 | return 0; | |
741 | } | |
742 | ||
743 | /* | |
744 | * This function creates buffer descriptor ring for Events | |
745 | */ | |
746 | static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter) | |
747 | { | |
748 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 749 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
750 | |
751 | /* | |
752 | * driver maintaines the read pointer and firmware maintaines the write | |
753 | * pointer. The write pointer starts at 0 (zero) while the read pointer | |
754 | * starts at zero with rollover bit set | |
755 | */ | |
756 | card->evtbd_wrptr = 0; | |
dd04e6ac | 757 | card->evtbd_rdptr = reg->evt_rollover_ind; |
d930faee | 758 | |
e05dc3e9 | 759 | card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) * |
ca8f2112 AP |
760 | MWIFIEX_MAX_EVT_BD; |
761 | ||
d930faee | 762 | dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n", |
f57c1edc | 763 | card->evtbd_ring_size); |
fc331460 AP |
764 | card->evtbd_ring_vbase = pci_alloc_consistent(card->dev, |
765 | card->evtbd_ring_size, | |
766 | &card->evtbd_ring_pbase); | |
d930faee | 767 | if (!card->evtbd_ring_vbase) { |
f57c1edc | 768 | dev_err(adapter->dev, |
fc331460 AP |
769 | "allocate consistent memory (%d bytes) failed!\n", |
770 | card->evtbd_ring_size); | |
8c53e42d | 771 | return -ENOMEM; |
d930faee | 772 | } |
d930faee | 773 | |
f57c1edc YAP |
774 | dev_dbg(adapter->dev, |
775 | "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n", | |
776 | card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase, | |
777 | (u32)((u64)card->evtbd_ring_pbase >> 32), | |
778 | card->evtbd_ring_size); | |
d930faee | 779 | |
0732484b | 780 | return mwifiex_pcie_init_evt_ring(adapter); |
d930faee AK |
781 | } |
782 | ||
783 | /* | |
784 | * This function deletes Buffer descriptor ring for Events | |
785 | */ | |
786 | static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter) | |
787 | { | |
788 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 789 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 790 | |
0732484b | 791 | mwifiex_cleanup_evt_ring(adapter); |
d930faee | 792 | |
fc331460 AP |
793 | if (card->evtbd_ring_vbase) |
794 | pci_free_consistent(card->dev, card->evtbd_ring_size, | |
795 | card->evtbd_ring_vbase, | |
796 | card->evtbd_ring_pbase); | |
d930faee | 797 | card->evtbd_wrptr = 0; |
dd04e6ac | 798 | card->evtbd_rdptr = 0 | reg->evt_rollover_ind; |
d930faee AK |
799 | card->evtbd_ring_size = 0; |
800 | card->evtbd_ring_vbase = NULL; | |
fc331460 | 801 | card->evtbd_ring_pbase = 0; |
d930faee AK |
802 | |
803 | return 0; | |
804 | } | |
805 | ||
806 | /* | |
807 | * This function allocates a buffer for CMDRSP | |
808 | */ | |
809 | static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter) | |
810 | { | |
811 | struct pcie_service_card *card = adapter->card; | |
812 | struct sk_buff *skb; | |
813 | ||
814 | /* Allocate memory for receiving command response data */ | |
815 | skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); | |
816 | if (!skb) { | |
f57c1edc YAP |
817 | dev_err(adapter->dev, |
818 | "Unable to allocate skb for command response data.\n"); | |
d930faee AK |
819 | return -ENOMEM; |
820 | } | |
d930faee | 821 | skb_put(skb, MWIFIEX_UPLD_SIZE); |
fc331460 AP |
822 | if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, |
823 | PCI_DMA_FROMDEVICE)) | |
824 | return -1; | |
d930faee | 825 | |
fc331460 | 826 | card->cmdrsp_buf = skb; |
d930faee AK |
827 | |
828 | return 0; | |
829 | } | |
830 | ||
831 | /* | |
832 | * This function deletes a buffer for CMDRSP | |
833 | */ | |
834 | static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter) | |
835 | { | |
836 | struct pcie_service_card *card; | |
fc331460 | 837 | dma_addr_t buf_pa; |
d930faee AK |
838 | |
839 | if (!adapter) | |
840 | return 0; | |
841 | ||
842 | card = adapter->card; | |
843 | ||
fc331460 AP |
844 | if (card && card->cmdrsp_buf) { |
845 | MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa); | |
846 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, | |
847 | PCI_DMA_FROMDEVICE); | |
d930faee | 848 | dev_kfree_skb_any(card->cmdrsp_buf); |
fc331460 | 849 | } |
d930faee | 850 | |
fc331460 AP |
851 | if (card && card->cmd_buf) { |
852 | MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa); | |
853 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_SIZE_OF_CMD_BUFFER, | |
854 | PCI_DMA_TODEVICE); | |
d930faee | 855 | dev_kfree_skb_any(card->cmd_buf); |
fc331460 | 856 | } |
d930faee AK |
857 | return 0; |
858 | } | |
859 | ||
860 | /* | |
861 | * This function allocates a buffer for sleep cookie | |
862 | */ | |
863 | static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter) | |
864 | { | |
d930faee AK |
865 | struct pcie_service_card *card = adapter->card; |
866 | ||
fc331460 AP |
867 | card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32), |
868 | &card->sleep_cookie_pbase); | |
869 | if (!card->sleep_cookie_vbase) { | |
870 | dev_err(adapter->dev, "pci_alloc_consistent failed!\n"); | |
d930faee AK |
871 | return -ENOMEM; |
872 | } | |
d930faee | 873 | /* Init val of Sleep Cookie */ |
fc331460 | 874 | *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE; |
d930faee AK |
875 | |
876 | dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n", | |
fc331460 | 877 | *((u32 *)card->sleep_cookie_vbase)); |
d930faee AK |
878 | |
879 | return 0; | |
880 | } | |
881 | ||
882 | /* | |
883 | * This function deletes buffer for sleep cookie | |
884 | */ | |
885 | static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter) | |
886 | { | |
887 | struct pcie_service_card *card; | |
888 | ||
889 | if (!adapter) | |
890 | return 0; | |
891 | ||
892 | card = adapter->card; | |
893 | ||
fc331460 AP |
894 | if (card && card->sleep_cookie_vbase) { |
895 | pci_free_consistent(card->dev, sizeof(u32), | |
896 | card->sleep_cookie_vbase, | |
897 | card->sleep_cookie_pbase); | |
898 | card->sleep_cookie_vbase = NULL; | |
d930faee AK |
899 | } |
900 | ||
901 | return 0; | |
902 | } | |
903 | ||
fbd7e7ac AP |
904 | /* This function flushes the TX buffer descriptor ring |
905 | * This function defined as handler is also called while cleaning TXRX | |
906 | * during disconnect/ bss stop. | |
907 | */ | |
908 | static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter) | |
909 | { | |
910 | struct pcie_service_card *card = adapter->card; | |
fbd7e7ac | 911 | |
48f4d916 | 912 | if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) { |
fbd7e7ac AP |
913 | card->txbd_flush = 1; |
914 | /* write pointer already set at last send | |
915 | * send dnld-rdy intr again, wait for completion. | |
916 | */ | |
917 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
918 | CPU_INTR_DNLD_RDY)) { | |
919 | dev_err(adapter->dev, | |
920 | "failed to assert dnld-rdy interrupt.\n"); | |
921 | return -1; | |
922 | } | |
923 | } | |
924 | return 0; | |
925 | } | |
926 | ||
d930faee | 927 | /* |
e7f767a7 | 928 | * This function unmaps and frees downloaded data buffer |
d930faee | 929 | */ |
e7f767a7 | 930 | static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter) |
d930faee | 931 | { |
e7f767a7 AP |
932 | struct sk_buff *skb; |
933 | dma_addr_t buf_pa; | |
ca8f2112 | 934 | u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0; |
e05dc3e9 | 935 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 936 | struct mwifiex_pfu_buf_desc *desc2; |
d930faee | 937 | struct pcie_service_card *card = adapter->card; |
dd04e6ac | 938 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
939 | |
940 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
941 | mwifiex_pm_wakeup_card(adapter); | |
942 | ||
943 | /* Read the TX ring read pointer set by firmware */ | |
dd04e6ac | 944 | if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) { |
f57c1edc | 945 | dev_err(adapter->dev, |
dd04e6ac | 946 | "SEND COMP: failed to read reg->tx_rdptr\n"); |
d930faee AK |
947 | return -1; |
948 | } | |
949 | ||
e7f767a7 AP |
950 | dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n", |
951 | card->txbd_rdptr, rdptr); | |
d930faee | 952 | |
ca8f2112 | 953 | num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; |
e7f767a7 | 954 | /* free from previous txbd_rdptr to current txbd_rdptr */ |
dd04e6ac AP |
955 | while (((card->txbd_rdptr & reg->tx_mask) != |
956 | (rdptr & reg->tx_mask)) || | |
957 | ((card->txbd_rdptr & reg->tx_rollover_ind) != | |
958 | (rdptr & reg->tx_rollover_ind))) { | |
ca8f2112 AP |
959 | wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >> |
960 | reg->tx_start_ptr; | |
e7f767a7 AP |
961 | |
962 | skb = card->tx_buf_list[wrdoneidx]; | |
963 | if (skb) { | |
964 | dev_dbg(adapter->dev, | |
965 | "SEND COMP: Detach skb %p at txbd_rdidx=%d\n", | |
966 | skb, wrdoneidx); | |
967 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
968 | pci_unmap_single(card->dev, buf_pa, skb->len, | |
969 | PCI_DMA_TODEVICE); | |
970 | ||
971 | unmap_count++; | |
972 | ||
973 | if (card->txbd_flush) | |
974 | mwifiex_write_data_complete(adapter, skb, 0, | |
975 | -1); | |
976 | else | |
977 | mwifiex_write_data_complete(adapter, skb, 0, 0); | |
978 | } | |
979 | ||
980 | card->tx_buf_list[wrdoneidx] = NULL; | |
ca8f2112 AP |
981 | |
982 | if (reg->pfu_enabled) { | |
983 | desc2 = (void *)card->txbd_ring[wrdoneidx]; | |
984 | memset(desc2, 0, sizeof(*desc2)); | |
985 | } else { | |
986 | desc = card->txbd_ring[wrdoneidx]; | |
987 | memset(desc, 0, sizeof(*desc)); | |
988 | } | |
989 | switch (card->dev->device) { | |
990 | case PCIE_DEVICE_ID_MARVELL_88W8766P: | |
991 | card->txbd_rdptr++; | |
992 | break; | |
993 | case PCIE_DEVICE_ID_MARVELL_88W8897: | |
994 | card->txbd_rdptr += reg->ring_tx_start_ptr; | |
995 | break; | |
996 | } | |
997 | ||
e7f767a7 | 998 | |
dd04e6ac | 999 | if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs) |
e7f767a7 | 1000 | card->txbd_rdptr = ((card->txbd_rdptr & |
dd04e6ac AP |
1001 | reg->tx_rollover_ind) ^ |
1002 | reg->tx_rollover_ind); | |
e7f767a7 AP |
1003 | } |
1004 | ||
1005 | if (unmap_count) | |
1006 | adapter->data_sent = false; | |
1007 | ||
1008 | if (card->txbd_flush) { | |
3d482038 | 1009 | if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) |
e7f767a7 AP |
1010 | card->txbd_flush = 0; |
1011 | else | |
1012 | mwifiex_clean_pcie_ring_buf(adapter); | |
1013 | } | |
1014 | ||
1015 | return 0; | |
1016 | } | |
1017 | ||
1018 | /* This function sends data buffer to device. First 4 bytes of payload | |
1019 | * are filled with payload length and payload type. Then this payload | |
1020 | * is mapped to PCI device memory. Tx ring pointers are advanced accordingly. | |
1021 | * Download ready interrupt to FW is deffered if Tx ring is not full and | |
1022 | * additional payload can be accomodated. | |
1023 | */ | |
1024 | static int | |
1025 | mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb, | |
1026 | struct mwifiex_tx_param *tx_param) | |
1027 | { | |
1028 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1029 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
ca8f2112 | 1030 | u32 wrindx, num_tx_buffs, rx_val; |
e7f767a7 AP |
1031 | int ret; |
1032 | dma_addr_t buf_pa; | |
e05dc3e9 | 1033 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 1034 | struct mwifiex_pfu_buf_desc *desc2; |
e7f767a7 AP |
1035 | __le16 *tmp; |
1036 | ||
1037 | if (!(skb->data && skb->len)) { | |
1038 | dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n", | |
1039 | __func__, skb->data, skb->len); | |
1040 | return -1; | |
1041 | } | |
1042 | ||
1043 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
1044 | mwifiex_pm_wakeup_card(adapter); | |
1045 | ||
ca8f2112 | 1046 | num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr; |
e7f767a7 AP |
1047 | dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n", |
1048 | card->txbd_rdptr, card->txbd_wrptr); | |
1049 | if (mwifiex_pcie_txbd_not_full(card)) { | |
d930faee AK |
1050 | u8 *payload; |
1051 | ||
1052 | adapter->data_sent = true; | |
e7f767a7 | 1053 | payload = skb->data; |
d930faee AK |
1054 | tmp = (__le16 *)&payload[0]; |
1055 | *tmp = cpu_to_le16((u16)skb->len); | |
1056 | tmp = (__le16 *)&payload[2]; | |
1057 | *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA); | |
e7f767a7 AP |
1058 | |
1059 | if (mwifiex_map_pci_memory(adapter, skb, skb->len , | |
1060 | PCI_DMA_TODEVICE)) | |
1061 | return -1; | |
1062 | ||
ca8f2112 | 1063 | wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr; |
e7f767a7 AP |
1064 | MWIFIEX_SKB_PACB(skb, &buf_pa); |
1065 | card->tx_buf_list[wrindx] = skb; | |
d930faee | 1066 | |
ca8f2112 AP |
1067 | if (reg->pfu_enabled) { |
1068 | desc2 = (void *)card->txbd_ring[wrindx]; | |
1069 | desc2->paddr = buf_pa; | |
1070 | desc2->len = (u16)skb->len; | |
1071 | desc2->frag_len = (u16)skb->len; | |
1072 | desc2->offset = 0; | |
1073 | desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC | | |
1074 | MWIFIEX_BD_FLAG_LAST_DESC; | |
1075 | } else { | |
1076 | desc = card->txbd_ring[wrindx]; | |
1077 | desc->paddr = buf_pa; | |
1078 | desc->len = (u16)skb->len; | |
1079 | desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC | | |
1080 | MWIFIEX_BD_FLAG_LAST_DESC; | |
1081 | } | |
1082 | ||
1083 | switch (card->dev->device) { | |
1084 | case PCIE_DEVICE_ID_MARVELL_88W8766P: | |
1085 | card->txbd_wrptr++; | |
1086 | break; | |
1087 | case PCIE_DEVICE_ID_MARVELL_88W8897: | |
1088 | card->txbd_wrptr += reg->ring_tx_start_ptr; | |
1089 | break; | |
1090 | } | |
1091 | ||
1092 | if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs) | |
d930faee | 1093 | card->txbd_wrptr = ((card->txbd_wrptr & |
dd04e6ac AP |
1094 | reg->tx_rollover_ind) ^ |
1095 | reg->tx_rollover_ind); | |
d930faee | 1096 | |
ca8f2112 | 1097 | rx_val = card->rxbd_rdptr & reg->rx_wrap_mask; |
dd04e6ac AP |
1098 | /* Write the TX ring write pointer in to reg->tx_wrptr */ |
1099 | if (mwifiex_write_reg(adapter, reg->tx_wrptr, | |
ca8f2112 | 1100 | card->txbd_wrptr | rx_val)) { |
f57c1edc | 1101 | dev_err(adapter->dev, |
dd04e6ac | 1102 | "SEND DATA: failed to write reg->tx_wrptr\n"); |
e7f767a7 AP |
1103 | ret = -1; |
1104 | goto done_unmap; | |
d930faee | 1105 | } |
e7f767a7 AP |
1106 | if ((mwifiex_pcie_txbd_not_full(card)) && |
1107 | tx_param->next_pkt_len) { | |
1108 | /* have more packets and TxBD still can hold more */ | |
1109 | dev_dbg(adapter->dev, | |
1110 | "SEND DATA: delay dnld-rdy interrupt.\n"); | |
1111 | adapter->data_sent = false; | |
1112 | } else { | |
1113 | /* Send the TX ready interrupt */ | |
1114 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
1115 | CPU_INTR_DNLD_RDY)) { | |
1116 | dev_err(adapter->dev, | |
1117 | "SEND DATA: failed to assert dnld-rdy interrupt.\n"); | |
1118 | ret = -1; | |
1119 | goto done_unmap; | |
1120 | } | |
d930faee AK |
1121 | } |
1122 | dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: " | |
f57c1edc | 1123 | "%#x> and sent packet to firmware successfully\n", |
e7f767a7 | 1124 | card->txbd_rdptr, card->txbd_wrptr); |
d930faee | 1125 | } else { |
f57c1edc YAP |
1126 | dev_dbg(adapter->dev, |
1127 | "info: TX Ring full, can't send packets to fw\n"); | |
d930faee AK |
1128 | adapter->data_sent = true; |
1129 | /* Send the TX ready interrupt */ | |
1130 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
1131 | CPU_INTR_DNLD_RDY)) | |
f57c1edc YAP |
1132 | dev_err(adapter->dev, |
1133 | "SEND DATA: failed to assert door-bell intr\n"); | |
d930faee AK |
1134 | return -EBUSY; |
1135 | } | |
1136 | ||
e7f767a7 AP |
1137 | return -EINPROGRESS; |
1138 | done_unmap: | |
1139 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
1140 | pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE); | |
1141 | card->tx_buf_list[wrindx] = NULL; | |
ca8f2112 AP |
1142 | if (reg->pfu_enabled) |
1143 | memset(desc2, 0, sizeof(*desc2)); | |
1144 | else | |
1145 | memset(desc, 0, sizeof(*desc)); | |
1146 | ||
e7f767a7 | 1147 | return ret; |
d930faee AK |
1148 | } |
1149 | ||
1150 | /* | |
1151 | * This function handles received buffer ring and | |
1152 | * dispatches packets to upper | |
1153 | */ | |
1154 | static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter) | |
1155 | { | |
1156 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1157 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
ca8f2112 | 1158 | u32 wrptr, rd_index, tx_val; |
e7f767a7 | 1159 | dma_addr_t buf_pa; |
d930faee AK |
1160 | int ret = 0; |
1161 | struct sk_buff *skb_tmp = NULL; | |
e05dc3e9 | 1162 | struct mwifiex_pcie_buf_desc *desc; |
ca8f2112 | 1163 | struct mwifiex_pfu_buf_desc *desc2; |
d930faee | 1164 | |
e7f767a7 AP |
1165 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) |
1166 | mwifiex_pm_wakeup_card(adapter); | |
1167 | ||
d930faee | 1168 | /* Read the RX ring Write pointer set by firmware */ |
dd04e6ac | 1169 | if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { |
f57c1edc | 1170 | dev_err(adapter->dev, |
dd04e6ac | 1171 | "RECV DATA: failed to read reg->rx_wrptr\n"); |
d930faee AK |
1172 | ret = -1; |
1173 | goto done; | |
1174 | } | |
e7f767a7 | 1175 | card->rxbd_wrptr = wrptr; |
d930faee | 1176 | |
dd04e6ac AP |
1177 | while (((wrptr & reg->rx_mask) != |
1178 | (card->rxbd_rdptr & reg->rx_mask)) || | |
1179 | ((wrptr & reg->rx_rollover_ind) == | |
1180 | (card->rxbd_rdptr & reg->rx_rollover_ind))) { | |
d930faee AK |
1181 | struct sk_buff *skb_data; |
1182 | u16 rx_len; | |
e7f767a7 | 1183 | __le16 pkt_len; |
d930faee | 1184 | |
dd04e6ac | 1185 | rd_index = card->rxbd_rdptr & reg->rx_mask; |
d930faee AK |
1186 | skb_data = card->rx_buf_list[rd_index]; |
1187 | ||
e7f767a7 AP |
1188 | MWIFIEX_SKB_PACB(skb_data, &buf_pa); |
1189 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE, | |
1190 | PCI_DMA_FROMDEVICE); | |
1191 | card->rx_buf_list[rd_index] = NULL; | |
1192 | ||
d930faee | 1193 | /* Get data length from interface header - |
e7f767a7 AP |
1194 | * first 2 bytes for len, next 2 bytes is for type |
1195 | */ | |
1196 | pkt_len = *((__le16 *)skb_data->data); | |
1197 | rx_len = le16_to_cpu(pkt_len); | |
1198 | skb_put(skb_data, rx_len); | |
f57c1edc YAP |
1199 | dev_dbg(adapter->dev, |
1200 | "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n", | |
1201 | card->rxbd_rdptr, wrptr, rx_len); | |
e7f767a7 AP |
1202 | skb_pull(skb_data, INTF_HEADER_LEN); |
1203 | mwifiex_handle_rx_packet(adapter, skb_data); | |
1204 | ||
1205 | skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE); | |
d930faee | 1206 | if (!skb_tmp) { |
e7f767a7 AP |
1207 | dev_err(adapter->dev, |
1208 | "Unable to allocate skb.\n"); | |
1209 | return -ENOMEM; | |
d930faee AK |
1210 | } |
1211 | ||
e7f767a7 AP |
1212 | if (mwifiex_map_pci_memory(adapter, skb_tmp, |
1213 | MWIFIEX_RX_DATA_BUF_SIZE, | |
1214 | PCI_DMA_FROMDEVICE)) | |
1215 | return -1; | |
1216 | ||
1217 | MWIFIEX_SKB_PACB(skb_tmp, &buf_pa); | |
1218 | ||
1219 | dev_dbg(adapter->dev, | |
1220 | "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n", | |
1221 | skb_tmp, rd_index); | |
1222 | card->rx_buf_list[rd_index] = skb_tmp; | |
ca8f2112 AP |
1223 | |
1224 | if (reg->pfu_enabled) { | |
1225 | desc2 = (void *)card->rxbd_ring[rd_index]; | |
1226 | desc2->paddr = buf_pa; | |
1227 | desc2->len = skb_tmp->len; | |
1228 | desc2->frag_len = skb_tmp->len; | |
1229 | desc2->offset = 0; | |
1230 | desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop; | |
1231 | } else { | |
1232 | desc = card->rxbd_ring[rd_index]; | |
1233 | desc->paddr = buf_pa; | |
1234 | desc->len = skb_tmp->len; | |
1235 | desc->flags = 0; | |
1236 | } | |
d930faee | 1237 | |
dd04e6ac | 1238 | if ((++card->rxbd_rdptr & reg->rx_mask) == |
d930faee AK |
1239 | MWIFIEX_MAX_TXRX_BD) { |
1240 | card->rxbd_rdptr = ((card->rxbd_rdptr & | |
dd04e6ac AP |
1241 | reg->rx_rollover_ind) ^ |
1242 | reg->rx_rollover_ind); | |
d930faee AK |
1243 | } |
1244 | dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n", | |
f57c1edc | 1245 | card->rxbd_rdptr, wrptr); |
d930faee | 1246 | |
ca8f2112 | 1247 | tx_val = card->txbd_wrptr & reg->tx_wrap_mask; |
dd04e6ac AP |
1248 | /* Write the RX ring read pointer in to reg->rx_rdptr */ |
1249 | if (mwifiex_write_reg(adapter, reg->rx_rdptr, | |
ca8f2112 | 1250 | card->rxbd_rdptr | tx_val)) { |
f57c1edc | 1251 | dev_err(adapter->dev, |
dd04e6ac | 1252 | "RECV DATA: failed to write reg->rx_rdptr\n"); |
d930faee AK |
1253 | ret = -1; |
1254 | goto done; | |
1255 | } | |
1256 | ||
1257 | /* Read the RX ring Write pointer set by firmware */ | |
dd04e6ac | 1258 | if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) { |
f57c1edc | 1259 | dev_err(adapter->dev, |
dd04e6ac | 1260 | "RECV DATA: failed to read reg->rx_wrptr\n"); |
d930faee AK |
1261 | ret = -1; |
1262 | goto done; | |
1263 | } | |
f57c1edc YAP |
1264 | dev_dbg(adapter->dev, |
1265 | "info: RECV DATA: Rcvd packet from fw successfully\n"); | |
e7f767a7 | 1266 | card->rxbd_wrptr = wrptr; |
d930faee AK |
1267 | } |
1268 | ||
1269 | done: | |
d930faee AK |
1270 | return ret; |
1271 | } | |
1272 | ||
1273 | /* | |
1274 | * This function downloads the boot command to device | |
1275 | */ | |
1276 | static int | |
1277 | mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) | |
1278 | { | |
fc331460 AP |
1279 | dma_addr_t buf_pa; |
1280 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1281 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 1282 | |
fc331460 | 1283 | if (!(skb->data && skb->len)) { |
f57c1edc | 1284 | dev_err(adapter->dev, |
fc331460 AP |
1285 | "Invalid parameter in %s <%p. len %d>\n", |
1286 | __func__, skb->data, skb->len); | |
d930faee AK |
1287 | return -1; |
1288 | } | |
1289 | ||
fc331460 AP |
1290 | if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE)) |
1291 | return -1; | |
1292 | ||
1293 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
1294 | ||
dd04e6ac AP |
1295 | /* Write the lower 32bits of the physical address to low command |
1296 | * address scratch register | |
1297 | */ | |
1298 | if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) { | |
f57c1edc YAP |
1299 | dev_err(adapter->dev, |
1300 | "%s: failed to write download command to boot code.\n", | |
1301 | __func__); | |
fc331460 AP |
1302 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, |
1303 | PCI_DMA_TODEVICE); | |
d930faee AK |
1304 | return -1; |
1305 | } | |
1306 | ||
dd04e6ac AP |
1307 | /* Write the upper 32bits of the physical address to high command |
1308 | * address scratch register | |
1309 | */ | |
1310 | if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, | |
fc331460 | 1311 | (u32)((u64)buf_pa >> 32))) { |
f57c1edc YAP |
1312 | dev_err(adapter->dev, |
1313 | "%s: failed to write download command to boot code.\n", | |
1314 | __func__); | |
fc331460 AP |
1315 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, |
1316 | PCI_DMA_TODEVICE); | |
d930faee AK |
1317 | return -1; |
1318 | } | |
1319 | ||
dd04e6ac AP |
1320 | /* Write the command length to cmd_size scratch register */ |
1321 | if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) { | |
f57c1edc | 1322 | dev_err(adapter->dev, |
dd04e6ac | 1323 | "%s: failed to write command len to cmd_size scratch reg\n", |
f57c1edc | 1324 | __func__); |
fc331460 AP |
1325 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, |
1326 | PCI_DMA_TODEVICE); | |
d930faee AK |
1327 | return -1; |
1328 | } | |
1329 | ||
1330 | /* Ring the door bell */ | |
1331 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
1332 | CPU_INTR_DOOR_BELL)) { | |
f57c1edc YAP |
1333 | dev_err(adapter->dev, |
1334 | "%s: failed to assert door-bell intr\n", __func__); | |
fc331460 AP |
1335 | pci_unmap_single(card->dev, buf_pa, |
1336 | MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE); | |
d930faee AK |
1337 | return -1; |
1338 | } | |
1339 | ||
1340 | return 0; | |
1341 | } | |
1342 | ||
c6d1d87a AP |
1343 | /* This function init rx port in firmware which in turn enables to receive data |
1344 | * from device before transmitting any packet. | |
1345 | */ | |
1346 | static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter) | |
1347 | { | |
1348 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1349 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
ca8f2112 | 1350 | int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask; |
c6d1d87a | 1351 | |
dd04e6ac | 1352 | /* Write the RX ring read pointer in to reg->rx_rdptr */ |
ca8f2112 AP |
1353 | if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr | |
1354 | tx_wrap)) { | |
c6d1d87a | 1355 | dev_err(adapter->dev, |
dd04e6ac | 1356 | "RECV DATA: failed to write reg->rx_rdptr\n"); |
c6d1d87a AP |
1357 | return -1; |
1358 | } | |
1359 | return 0; | |
1360 | } | |
1361 | ||
1362 | /* This function downloads commands to the device | |
d930faee AK |
1363 | */ |
1364 | static int | |
1365 | mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb) | |
1366 | { | |
1367 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1368 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 1369 | int ret = 0; |
fc331460 AP |
1370 | dma_addr_t cmd_buf_pa, cmdrsp_buf_pa; |
1371 | u8 *payload = (u8 *)skb->data; | |
d930faee AK |
1372 | |
1373 | if (!(skb->data && skb->len)) { | |
1374 | dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n", | |
f57c1edc | 1375 | __func__, skb->data, skb->len); |
d930faee AK |
1376 | return -1; |
1377 | } | |
1378 | ||
1379 | /* Make sure a command response buffer is available */ | |
1380 | if (!card->cmdrsp_buf) { | |
f57c1edc YAP |
1381 | dev_err(adapter->dev, |
1382 | "No response buffer available, send command failed\n"); | |
d930faee AK |
1383 | return -EBUSY; |
1384 | } | |
1385 | ||
fc331460 AP |
1386 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) |
1387 | mwifiex_pm_wakeup_card(adapter); | |
d930faee AK |
1388 | |
1389 | adapter->cmd_sent = true; | |
fc331460 AP |
1390 | |
1391 | *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len); | |
1392 | *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD); | |
1393 | ||
1394 | if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE)) | |
1395 | return -1; | |
1396 | ||
1397 | card->cmd_buf = skb; | |
d930faee AK |
1398 | |
1399 | /* To send a command, the driver will: | |
1400 | 1. Write the 64bit physical address of the data buffer to | |
dd04e6ac | 1401 | cmd response address low + cmd response address high |
d930faee AK |
1402 | 2. Ring the door bell (i.e. set the door bell interrupt) |
1403 | ||
1404 | In response to door bell interrupt, the firmware will perform | |
1405 | the DMA of the command packet (first header to obtain the total | |
1406 | length and then rest of the command). | |
1407 | */ | |
1408 | ||
1409 | if (card->cmdrsp_buf) { | |
fc331460 | 1410 | MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa); |
d930faee AK |
1411 | /* Write the lower 32bits of the cmdrsp buffer physical |
1412 | address */ | |
dd04e6ac | 1413 | if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, |
fc331460 | 1414 | (u32)cmdrsp_buf_pa)) { |
f57c1edc YAP |
1415 | dev_err(adapter->dev, |
1416 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1417 | ret = -1; |
1418 | goto done; | |
1419 | } | |
1420 | /* Write the upper 32bits of the cmdrsp buffer physical | |
1421 | address */ | |
dd04e6ac | 1422 | if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, |
fc331460 | 1423 | (u32)((u64)cmdrsp_buf_pa >> 32))) { |
f57c1edc YAP |
1424 | dev_err(adapter->dev, |
1425 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1426 | ret = -1; |
1427 | goto done; | |
1428 | } | |
1429 | } | |
1430 | ||
fc331460 | 1431 | MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa); |
dd04e6ac AP |
1432 | /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */ |
1433 | if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, | |
1434 | (u32)cmd_buf_pa)) { | |
f57c1edc YAP |
1435 | dev_err(adapter->dev, |
1436 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1437 | ret = -1; |
1438 | goto done; | |
1439 | } | |
dd04e6ac AP |
1440 | /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */ |
1441 | if (mwifiex_write_reg(adapter, reg->cmd_addr_hi, | |
fc331460 | 1442 | (u32)((u64)cmd_buf_pa >> 32))) { |
f57c1edc YAP |
1443 | dev_err(adapter->dev, |
1444 | "Failed to write download cmd to boot code.\n"); | |
d930faee AK |
1445 | ret = -1; |
1446 | goto done; | |
1447 | } | |
1448 | ||
dd04e6ac AP |
1449 | /* Write the command length to reg->cmd_size */ |
1450 | if (mwifiex_write_reg(adapter, reg->cmd_size, | |
1451 | card->cmd_buf->len)) { | |
f57c1edc | 1452 | dev_err(adapter->dev, |
dd04e6ac | 1453 | "Failed to write cmd len to reg->cmd_size\n"); |
d930faee AK |
1454 | ret = -1; |
1455 | goto done; | |
1456 | } | |
1457 | ||
1458 | /* Ring the door bell */ | |
1459 | if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT, | |
1460 | CPU_INTR_DOOR_BELL)) { | |
f57c1edc YAP |
1461 | dev_err(adapter->dev, |
1462 | "Failed to assert door-bell intr\n"); | |
d930faee AK |
1463 | ret = -1; |
1464 | goto done; | |
1465 | } | |
1466 | ||
1467 | done: | |
1468 | if (ret) | |
1469 | adapter->cmd_sent = false; | |
1470 | ||
1471 | return 0; | |
1472 | } | |
1473 | ||
1474 | /* | |
1475 | * This function handles command complete interrupt | |
1476 | */ | |
1477 | static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter) | |
1478 | { | |
1479 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1480 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
f57c1edc | 1481 | struct sk_buff *skb = card->cmdrsp_buf; |
d930faee | 1482 | int count = 0; |
fc331460 AP |
1483 | u16 rx_len; |
1484 | __le16 pkt_len; | |
1485 | dma_addr_t buf_pa; | |
d930faee AK |
1486 | |
1487 | dev_dbg(adapter->dev, "info: Rx CMD Response\n"); | |
1488 | ||
fc331460 AP |
1489 | MWIFIEX_SKB_PACB(skb, &buf_pa); |
1490 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, | |
1491 | PCI_DMA_FROMDEVICE); | |
1492 | ||
1493 | pkt_len = *((__le16 *)skb->data); | |
1494 | rx_len = le16_to_cpu(pkt_len); | |
1495 | skb_trim(skb, rx_len); | |
1496 | skb_pull(skb, INTF_HEADER_LEN); | |
1497 | ||
d930faee | 1498 | if (!adapter->curr_cmd) { |
d930faee | 1499 | if (adapter->ps_state == PS_STATE_SLEEP_CFM) { |
f57c1edc YAP |
1500 | mwifiex_process_sleep_confirm_resp(adapter, skb->data, |
1501 | skb->len); | |
52301a81 AP |
1502 | while (reg->sleep_cookie && (count++ < 10) && |
1503 | mwifiex_pcie_ok_to_access_hw(adapter)) | |
e7891ba2 | 1504 | usleep_range(50, 60); |
d930faee | 1505 | } else { |
f57c1edc YAP |
1506 | dev_err(adapter->dev, |
1507 | "There is no command but got cmdrsp\n"); | |
d930faee | 1508 | } |
f57c1edc YAP |
1509 | memcpy(adapter->upld_buf, skb->data, |
1510 | min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len)); | |
fc331460 AP |
1511 | if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, |
1512 | PCI_DMA_FROMDEVICE)) | |
1513 | return -1; | |
1514 | ||
1515 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
d930faee | 1516 | } else if (mwifiex_pcie_ok_to_access_hw(adapter)) { |
f57c1edc | 1517 | adapter->curr_cmd->resp_skb = skb; |
d930faee AK |
1518 | adapter->cmd_resp_received = true; |
1519 | /* Take the pointer and set it to CMD node and will | |
1520 | return in the response complete callback */ | |
1521 | card->cmdrsp_buf = NULL; | |
1522 | ||
1523 | /* Clear the cmd-rsp buffer address in scratch registers. This | |
1524 | will prevent firmware from writing to the same response | |
1525 | buffer again. */ | |
dd04e6ac | 1526 | if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) { |
f57c1edc YAP |
1527 | dev_err(adapter->dev, |
1528 | "cmd_done: failed to clear cmd_rsp_addr_lo\n"); | |
d930faee AK |
1529 | return -1; |
1530 | } | |
1531 | /* Write the upper 32bits of the cmdrsp buffer physical | |
1532 | address */ | |
dd04e6ac | 1533 | if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) { |
f57c1edc YAP |
1534 | dev_err(adapter->dev, |
1535 | "cmd_done: failed to clear cmd_rsp_addr_hi\n"); | |
d930faee AK |
1536 | return -1; |
1537 | } | |
1538 | } | |
1539 | ||
1540 | return 0; | |
1541 | } | |
1542 | ||
1543 | /* | |
1544 | * Command Response processing complete handler | |
1545 | */ | |
1546 | static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter, | |
1547 | struct sk_buff *skb) | |
1548 | { | |
1549 | struct pcie_service_card *card = adapter->card; | |
fc331460 AP |
1550 | dma_addr_t buf_pa; |
1551 | struct sk_buff *skb_tmp; | |
d930faee AK |
1552 | |
1553 | if (skb) { | |
1554 | card->cmdrsp_buf = skb; | |
1555 | skb_push(card->cmdrsp_buf, INTF_HEADER_LEN); | |
fc331460 AP |
1556 | if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE, |
1557 | PCI_DMA_FROMDEVICE)) | |
1558 | return -1; | |
1559 | } | |
1560 | ||
1561 | skb_tmp = card->cmd_buf; | |
1562 | if (skb_tmp) { | |
1563 | MWIFIEX_SKB_PACB(skb_tmp, &buf_pa); | |
1564 | pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE, | |
1565 | PCI_DMA_FROMDEVICE); | |
1566 | card->cmd_buf = NULL; | |
d930faee AK |
1567 | } |
1568 | ||
1569 | return 0; | |
1570 | } | |
1571 | ||
1572 | /* | |
1573 | * This function handles firmware event ready interrupt | |
1574 | */ | |
1575 | static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter) | |
1576 | { | |
1577 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1578 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
1579 | u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; |
1580 | u32 wrptr, event; | |
fc331460 | 1581 | dma_addr_t buf_pa; |
e05dc3e9 | 1582 | struct mwifiex_evt_buf_desc *desc; |
fc331460 AP |
1583 | |
1584 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
1585 | mwifiex_pm_wakeup_card(adapter); | |
d930faee AK |
1586 | |
1587 | if (adapter->event_received) { | |
f57c1edc YAP |
1588 | dev_dbg(adapter->dev, "info: Event being processed, " |
1589 | "do not process this interrupt just yet\n"); | |
d930faee AK |
1590 | return 0; |
1591 | } | |
1592 | ||
1593 | if (rdptr >= MWIFIEX_MAX_EVT_BD) { | |
1594 | dev_dbg(adapter->dev, "info: Invalid read pointer...\n"); | |
1595 | return -1; | |
1596 | } | |
1597 | ||
1598 | /* Read the event ring write pointer set by firmware */ | |
dd04e6ac | 1599 | if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { |
f57c1edc | 1600 | dev_err(adapter->dev, |
dd04e6ac | 1601 | "EventReady: failed to read reg->evt_wrptr\n"); |
d930faee AK |
1602 | return -1; |
1603 | } | |
1604 | ||
1605 | dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>", | |
f57c1edc YAP |
1606 | card->evtbd_rdptr, wrptr); |
1607 | if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr | |
1608 | & MWIFIEX_EVTBD_MASK)) || | |
dd04e6ac AP |
1609 | ((wrptr & reg->evt_rollover_ind) == |
1610 | (card->evtbd_rdptr & reg->evt_rollover_ind))) { | |
d930faee AK |
1611 | struct sk_buff *skb_cmd; |
1612 | __le16 data_len = 0; | |
1613 | u16 evt_len; | |
1614 | ||
1615 | dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr); | |
1616 | skb_cmd = card->evt_buf_list[rdptr]; | |
fc331460 AP |
1617 | MWIFIEX_SKB_PACB(skb_cmd, &buf_pa); |
1618 | pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE, | |
1619 | PCI_DMA_FROMDEVICE); | |
1620 | ||
d930faee AK |
1621 | /* Take the pointer and set it to event pointer in adapter |
1622 | and will return back after event handling callback */ | |
1623 | card->evt_buf_list[rdptr] = NULL; | |
e05dc3e9 AP |
1624 | desc = card->evtbd_ring[rdptr]; |
1625 | memset(desc, 0, sizeof(*desc)); | |
d930faee AK |
1626 | |
1627 | event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN]; | |
1628 | adapter->event_cause = event; | |
1629 | /* The first 4bytes will be the event transfer header | |
1630 | len is 2 bytes followed by type which is 2 bytes */ | |
1631 | memcpy(&data_len, skb_cmd->data, sizeof(__le16)); | |
1632 | evt_len = le16_to_cpu(data_len); | |
1633 | ||
1634 | skb_pull(skb_cmd, INTF_HEADER_LEN); | |
1635 | dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len); | |
1636 | ||
1637 | if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE)) | |
1638 | memcpy(adapter->event_body, skb_cmd->data + | |
1639 | MWIFIEX_EVENT_HEADER_LEN, evt_len - | |
1640 | MWIFIEX_EVENT_HEADER_LEN); | |
1641 | ||
1642 | adapter->event_received = true; | |
1643 | adapter->event_skb = skb_cmd; | |
1644 | ||
1645 | /* Do not update the event read pointer here, wait till the | |
1646 | buffer is released. This is just to make things simpler, | |
1647 | we need to find a better method of managing these buffers. | |
1648 | */ | |
1649 | } | |
1650 | ||
1651 | return 0; | |
1652 | } | |
1653 | ||
1654 | /* | |
1655 | * Event processing complete handler | |
1656 | */ | |
1657 | static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter, | |
1658 | struct sk_buff *skb) | |
1659 | { | |
1660 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1661 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
1662 | int ret = 0; |
1663 | u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK; | |
1664 | u32 wrptr; | |
fc331460 | 1665 | dma_addr_t buf_pa; |
e05dc3e9 | 1666 | struct mwifiex_evt_buf_desc *desc; |
d930faee AK |
1667 | |
1668 | if (!skb) | |
1669 | return 0; | |
1670 | ||
1eb54c8a | 1671 | if (rdptr >= MWIFIEX_MAX_EVT_BD) { |
d930faee | 1672 | dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n", |
f57c1edc | 1673 | rdptr); |
8c53e42d | 1674 | return -EINVAL; |
1eb54c8a | 1675 | } |
d930faee AK |
1676 | |
1677 | /* Read the event ring write pointer set by firmware */ | |
dd04e6ac | 1678 | if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) { |
f57c1edc | 1679 | dev_err(adapter->dev, |
dd04e6ac | 1680 | "event_complete: failed to read reg->evt_wrptr\n"); |
8c53e42d | 1681 | return -1; |
d930faee AK |
1682 | } |
1683 | ||
1684 | if (!card->evt_buf_list[rdptr]) { | |
1685 | skb_push(skb, INTF_HEADER_LEN); | |
fc331460 AP |
1686 | if (mwifiex_map_pci_memory(adapter, skb, |
1687 | MAX_EVENT_SIZE, | |
1688 | PCI_DMA_FROMDEVICE)) | |
1689 | return -1; | |
1690 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
d930faee | 1691 | card->evt_buf_list[rdptr] = skb; |
fc331460 | 1692 | MWIFIEX_SKB_PACB(skb, &buf_pa); |
e05dc3e9 AP |
1693 | desc = card->evtbd_ring[rdptr]; |
1694 | desc->paddr = buf_pa; | |
1695 | desc->len = (u16)skb->len; | |
1696 | desc->flags = 0; | |
d930faee AK |
1697 | skb = NULL; |
1698 | } else { | |
f57c1edc YAP |
1699 | dev_dbg(adapter->dev, |
1700 | "info: ERROR: buf still valid at index %d, <%p, %p>\n", | |
1701 | rdptr, card->evt_buf_list[rdptr], skb); | |
d930faee AK |
1702 | } |
1703 | ||
1704 | if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) { | |
1705 | card->evtbd_rdptr = ((card->evtbd_rdptr & | |
dd04e6ac AP |
1706 | reg->evt_rollover_ind) ^ |
1707 | reg->evt_rollover_ind); | |
d930faee AK |
1708 | } |
1709 | ||
1710 | dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>", | |
f57c1edc | 1711 | card->evtbd_rdptr, wrptr); |
d930faee | 1712 | |
dd04e6ac AP |
1713 | /* Write the event ring read pointer in to reg->evt_rdptr */ |
1714 | if (mwifiex_write_reg(adapter, reg->evt_rdptr, | |
1715 | card->evtbd_rdptr)) { | |
f57c1edc | 1716 | dev_err(adapter->dev, |
dd04e6ac | 1717 | "event_complete: failed to read reg->evt_rdptr\n"); |
8c53e42d | 1718 | return -1; |
d930faee AK |
1719 | } |
1720 | ||
d930faee AK |
1721 | dev_dbg(adapter->dev, "info: Check Events Again\n"); |
1722 | ret = mwifiex_pcie_process_event_ready(adapter); | |
1723 | ||
1724 | return ret; | |
1725 | } | |
1726 | ||
1727 | /* | |
1728 | * This function downloads the firmware to the card. | |
1729 | * | |
1730 | * Firmware is downloaded to the card in blocks. Every block download | |
1731 | * is tested for CRC errors, and retried a number of times before | |
1732 | * returning failure. | |
1733 | */ | |
1734 | static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter, | |
1735 | struct mwifiex_fw_image *fw) | |
1736 | { | |
1737 | int ret; | |
1738 | u8 *firmware = fw->fw_buf; | |
1739 | u32 firmware_len = fw->fw_len; | |
1740 | u32 offset = 0; | |
1741 | struct sk_buff *skb; | |
1742 | u32 txlen, tx_blocks = 0, tries, len; | |
1743 | u32 block_retry_cnt = 0; | |
fc331460 AP |
1744 | dma_addr_t buf_pa; |
1745 | struct pcie_service_card *card = adapter->card; | |
dd04e6ac | 1746 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
1747 | |
1748 | if (!firmware || !firmware_len) { | |
f57c1edc YAP |
1749 | dev_err(adapter->dev, |
1750 | "No firmware image found! Terminating download\n"); | |
d930faee AK |
1751 | return -1; |
1752 | } | |
1753 | ||
1754 | dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n", | |
f57c1edc | 1755 | firmware_len); |
d930faee AK |
1756 | |
1757 | if (mwifiex_pcie_disable_host_int(adapter)) { | |
f57c1edc YAP |
1758 | dev_err(adapter->dev, |
1759 | "%s: Disabling interrupts failed.\n", __func__); | |
d930faee AK |
1760 | return -1; |
1761 | } | |
1762 | ||
1763 | skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE); | |
1764 | if (!skb) { | |
1765 | ret = -ENOMEM; | |
1766 | goto done; | |
1767 | } | |
d930faee AK |
1768 | |
1769 | /* Perform firmware data transfer */ | |
1770 | do { | |
1771 | u32 ireg_intr = 0; | |
1772 | ||
1773 | /* More data? */ | |
1774 | if (offset >= firmware_len) | |
1775 | break; | |
1776 | ||
1777 | for (tries = 0; tries < MAX_POLL_TRIES; tries++) { | |
dd04e6ac | 1778 | ret = mwifiex_read_reg(adapter, reg->cmd_size, |
d930faee AK |
1779 | &len); |
1780 | if (ret) { | |
f57c1edc YAP |
1781 | dev_warn(adapter->dev, |
1782 | "Failed reading len from boot code\n"); | |
d930faee AK |
1783 | goto done; |
1784 | } | |
1785 | if (len) | |
1786 | break; | |
e7891ba2 | 1787 | usleep_range(10, 20); |
d930faee AK |
1788 | } |
1789 | ||
1790 | if (!len) { | |
1791 | break; | |
1792 | } else if (len > MWIFIEX_UPLD_SIZE) { | |
1793 | pr_err("FW download failure @ %d, invalid length %d\n", | |
f57c1edc | 1794 | offset, len); |
d930faee AK |
1795 | ret = -1; |
1796 | goto done; | |
1797 | } | |
1798 | ||
1799 | txlen = len; | |
1800 | ||
1801 | if (len & BIT(0)) { | |
1802 | block_retry_cnt++; | |
1803 | if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) { | |
1804 | pr_err("FW download failure @ %d, over max " | |
1805 | "retry count\n", offset); | |
1806 | ret = -1; | |
1807 | goto done; | |
1808 | } | |
1809 | dev_err(adapter->dev, "FW CRC error indicated by the " | |
f57c1edc YAP |
1810 | "helper: len = 0x%04X, txlen = %d\n", |
1811 | len, txlen); | |
d930faee AK |
1812 | len &= ~BIT(0); |
1813 | /* Setting this to 0 to resend from same offset */ | |
1814 | txlen = 0; | |
1815 | } else { | |
1816 | block_retry_cnt = 0; | |
1817 | /* Set blocksize to transfer - checking for | |
1818 | last block */ | |
1819 | if (firmware_len - offset < txlen) | |
1820 | txlen = firmware_len - offset; | |
1821 | ||
1822 | dev_dbg(adapter->dev, "."); | |
1823 | ||
dd04e6ac AP |
1824 | tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) / |
1825 | card->pcie.blksz_fw_dl; | |
d930faee AK |
1826 | |
1827 | /* Copy payload to buffer */ | |
1828 | memmove(skb->data, &firmware[offset], txlen); | |
1829 | } | |
1830 | ||
1831 | skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len); | |
dd04e6ac | 1832 | skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl); |
d930faee AK |
1833 | |
1834 | /* Send the boot command to device */ | |
1835 | if (mwifiex_pcie_send_boot_cmd(adapter, skb)) { | |
f57c1edc YAP |
1836 | dev_err(adapter->dev, |
1837 | "Failed to send firmware download command\n"); | |
d930faee AK |
1838 | ret = -1; |
1839 | goto done; | |
1840 | } | |
fc331460 AP |
1841 | |
1842 | MWIFIEX_SKB_PACB(skb, &buf_pa); | |
1843 | ||
d930faee AK |
1844 | /* Wait for the command done interrupt */ |
1845 | do { | |
1846 | if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS, | |
1847 | &ireg_intr)) { | |
1848 | dev_err(adapter->dev, "%s: Failed to read " | |
f57c1edc YAP |
1849 | "interrupt status during fw dnld.\n", |
1850 | __func__); | |
fc331460 AP |
1851 | pci_unmap_single(card->dev, buf_pa, skb->len, |
1852 | PCI_DMA_TODEVICE); | |
d930faee AK |
1853 | ret = -1; |
1854 | goto done; | |
1855 | } | |
1856 | } while ((ireg_intr & CPU_INTR_DOOR_BELL) == | |
1857 | CPU_INTR_DOOR_BELL); | |
fc331460 AP |
1858 | |
1859 | pci_unmap_single(card->dev, buf_pa, skb->len, | |
1860 | PCI_DMA_TODEVICE); | |
1861 | ||
d930faee AK |
1862 | offset += txlen; |
1863 | } while (true); | |
1864 | ||
1865 | dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n", | |
f57c1edc | 1866 | offset); |
d930faee AK |
1867 | |
1868 | ret = 0; | |
1869 | ||
1870 | done: | |
1871 | dev_kfree_skb_any(skb); | |
1872 | return ret; | |
1873 | } | |
1874 | ||
1875 | /* | |
1876 | * This function checks the firmware status in card. | |
1877 | * | |
1878 | * The winner interface is also determined by this function. | |
1879 | */ | |
1880 | static int | |
1881 | mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num) | |
1882 | { | |
1883 | int ret = 0; | |
1884 | u32 firmware_stat, winner_status; | |
dd04e6ac AP |
1885 | struct pcie_service_card *card = adapter->card; |
1886 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | |
d930faee AK |
1887 | u32 tries; |
1888 | ||
1889 | /* Mask spurios interrupts */ | |
1890 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK, | |
f57c1edc | 1891 | HOST_INTR_MASK)) { |
d930faee AK |
1892 | dev_warn(adapter->dev, "Write register failed\n"); |
1893 | return -1; | |
1894 | } | |
1895 | ||
1896 | dev_dbg(adapter->dev, "Setting driver ready signature\n"); | |
dd04e6ac AP |
1897 | if (mwifiex_write_reg(adapter, reg->drv_rdy, |
1898 | FIRMWARE_READY_PCIE)) { | |
f57c1edc YAP |
1899 | dev_err(adapter->dev, |
1900 | "Failed to write driver ready signature\n"); | |
d930faee AK |
1901 | return -1; |
1902 | } | |
1903 | ||
1904 | /* Wait for firmware initialization event */ | |
1905 | for (tries = 0; tries < poll_num; tries++) { | |
dd04e6ac | 1906 | if (mwifiex_read_reg(adapter, reg->fw_status, |
d930faee AK |
1907 | &firmware_stat)) |
1908 | ret = -1; | |
1909 | else | |
1910 | ret = 0; | |
1911 | if (ret) | |
1912 | continue; | |
1913 | if (firmware_stat == FIRMWARE_READY_PCIE) { | |
1914 | ret = 0; | |
1915 | break; | |
1916 | } else { | |
1917 | mdelay(100); | |
1918 | ret = -1; | |
1919 | } | |
1920 | } | |
1921 | ||
1922 | if (ret) { | |
dd04e6ac | 1923 | if (mwifiex_read_reg(adapter, reg->fw_status, |
d930faee AK |
1924 | &winner_status)) |
1925 | ret = -1; | |
1926 | else if (!winner_status) { | |
1927 | dev_err(adapter->dev, "PCI-E is the winner\n"); | |
1928 | adapter->winner = 1; | |
1929 | ret = -1; | |
1930 | } else { | |
f57c1edc YAP |
1931 | dev_err(adapter->dev, |
1932 | "PCI-E is not the winner <%#x,%d>, exit dnld\n", | |
1933 | ret, adapter->winner); | |
d930faee AK |
1934 | ret = 0; |
1935 | } | |
1936 | } | |
1937 | ||
1938 | return ret; | |
1939 | } | |
1940 | ||
1941 | /* | |
1942 | * This function reads the interrupt status from card. | |
1943 | */ | |
1944 | static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter) | |
1945 | { | |
1946 | u32 pcie_ireg; | |
1947 | unsigned long flags; | |
1948 | ||
1949 | if (!mwifiex_pcie_ok_to_access_hw(adapter)) | |
1950 | return; | |
1951 | ||
1952 | if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) { | |
1953 | dev_warn(adapter->dev, "Read register failed\n"); | |
1954 | return; | |
1955 | } | |
1956 | ||
1957 | if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { | |
1958 | ||
1959 | mwifiex_pcie_disable_host_int(adapter); | |
1960 | ||
1961 | /* Clear the pending interrupts */ | |
1962 | if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS, | |
1963 | ~pcie_ireg)) { | |
1964 | dev_warn(adapter->dev, "Write register failed\n"); | |
1965 | return; | |
1966 | } | |
1967 | spin_lock_irqsave(&adapter->int_lock, flags); | |
1968 | adapter->int_status |= pcie_ireg; | |
1969 | spin_unlock_irqrestore(&adapter->int_lock, flags); | |
1970 | ||
1971 | if (pcie_ireg & HOST_INTR_CMD_DONE) { | |
1972 | if ((adapter->ps_state == PS_STATE_SLEEP_CFM) || | |
1973 | (adapter->ps_state == PS_STATE_SLEEP)) { | |
1974 | mwifiex_pcie_enable_host_int(adapter); | |
1975 | if (mwifiex_write_reg(adapter, | |
f57c1edc YAP |
1976 | PCIE_CPU_INT_EVENT, |
1977 | CPU_INTR_SLEEP_CFM_DONE) | |
1978 | ) { | |
1979 | dev_warn(adapter->dev, | |
1980 | "Write register failed\n"); | |
d930faee AK |
1981 | return; |
1982 | ||
1983 | } | |
1984 | } | |
1985 | } else if (!adapter->pps_uapsd_mode && | |
1986 | adapter->ps_state == PS_STATE_SLEEP) { | |
1987 | /* Potentially for PCIe we could get other | |
1988 | * interrupts like shared. Don't change power | |
1989 | * state until cookie is set */ | |
1990 | if (mwifiex_pcie_ok_to_access_hw(adapter)) | |
1991 | adapter->ps_state = PS_STATE_AWAKE; | |
1992 | } | |
1993 | } | |
1994 | } | |
1995 | ||
1996 | /* | |
1997 | * Interrupt handler for PCIe root port | |
1998 | * | |
1999 | * This function reads the interrupt status from firmware and assigns | |
2000 | * the main process in workqueue which will handle the interrupt. | |
2001 | */ | |
2002 | static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context) | |
2003 | { | |
2004 | struct pci_dev *pdev = (struct pci_dev *)context; | |
2005 | struct pcie_service_card *card; | |
2006 | struct mwifiex_adapter *adapter; | |
2007 | ||
2008 | if (!pdev) { | |
2009 | pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev); | |
2010 | goto exit; | |
2011 | } | |
2012 | ||
2013 | card = (struct pcie_service_card *) pci_get_drvdata(pdev); | |
2014 | if (!card || !card->adapter) { | |
2015 | pr_debug("info: %s: card=%p adapter=%p\n", __func__, card, | |
f57c1edc | 2016 | card ? card->adapter : NULL); |
d930faee AK |
2017 | goto exit; |
2018 | } | |
2019 | adapter = card->adapter; | |
2020 | ||
2021 | if (adapter->surprise_removed) | |
2022 | goto exit; | |
2023 | ||
2024 | mwifiex_interrupt_status(adapter); | |
2025 | queue_work(adapter->workqueue, &adapter->main_work); | |
2026 | ||
2027 | exit: | |
2028 | return IRQ_HANDLED; | |
2029 | } | |
2030 | ||
2031 | /* | |
2032 | * This function checks the current interrupt status. | |
2033 | * | |
2034 | * The following interrupts are checked and handled by this function - | |
2035 | * - Data sent | |
2036 | * - Command sent | |
2037 | * - Command received | |
2038 | * - Packets received | |
2039 | * - Events received | |
2040 | * | |
2041 | * In case of Rx packets received, the packets are uploaded from card to | |
2042 | * host and processed accordingly. | |
2043 | */ | |
2044 | static int mwifiex_process_int_status(struct mwifiex_adapter *adapter) | |
2045 | { | |
2046 | int ret; | |
659c4788 | 2047 | u32 pcie_ireg; |
d930faee AK |
2048 | unsigned long flags; |
2049 | ||
2050 | spin_lock_irqsave(&adapter->int_lock, flags); | |
2051 | /* Clear out unused interrupts */ | |
659c4788 AP |
2052 | pcie_ireg = adapter->int_status; |
2053 | adapter->int_status = 0; | |
d930faee AK |
2054 | spin_unlock_irqrestore(&adapter->int_lock, flags); |
2055 | ||
659c4788 AP |
2056 | while (pcie_ireg & HOST_INTR_MASK) { |
2057 | if (pcie_ireg & HOST_INTR_DNLD_DONE) { | |
2058 | pcie_ireg &= ~HOST_INTR_DNLD_DONE; | |
e7f767a7 AP |
2059 | dev_dbg(adapter->dev, "info: TX DNLD Done\n"); |
2060 | ret = mwifiex_pcie_send_data_complete(adapter); | |
2061 | if (ret) | |
2062 | return ret; | |
d930faee | 2063 | } |
659c4788 AP |
2064 | if (pcie_ireg & HOST_INTR_UPLD_RDY) { |
2065 | pcie_ireg &= ~HOST_INTR_UPLD_RDY; | |
d930faee AK |
2066 | dev_dbg(adapter->dev, "info: Rx DATA\n"); |
2067 | ret = mwifiex_pcie_process_recv_data(adapter); | |
2068 | if (ret) | |
2069 | return ret; | |
2070 | } | |
659c4788 AP |
2071 | if (pcie_ireg & HOST_INTR_EVENT_RDY) { |
2072 | pcie_ireg &= ~HOST_INTR_EVENT_RDY; | |
d930faee AK |
2073 | dev_dbg(adapter->dev, "info: Rx EVENT\n"); |
2074 | ret = mwifiex_pcie_process_event_ready(adapter); | |
2075 | if (ret) | |
2076 | return ret; | |
2077 | } | |
2078 | ||
659c4788 AP |
2079 | if (pcie_ireg & HOST_INTR_CMD_DONE) { |
2080 | pcie_ireg &= ~HOST_INTR_CMD_DONE; | |
d930faee | 2081 | if (adapter->cmd_sent) { |
f57c1edc YAP |
2082 | dev_dbg(adapter->dev, |
2083 | "info: CMD sent Interrupt\n"); | |
d930faee AK |
2084 | adapter->cmd_sent = false; |
2085 | } | |
2086 | /* Handle command response */ | |
2087 | ret = mwifiex_pcie_process_cmd_complete(adapter); | |
2088 | if (ret) | |
2089 | return ret; | |
2090 | } | |
2091 | ||
2092 | if (mwifiex_pcie_ok_to_access_hw(adapter)) { | |
2093 | if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, | |
2094 | &pcie_ireg)) { | |
f57c1edc YAP |
2095 | dev_warn(adapter->dev, |
2096 | "Read register failed\n"); | |
d930faee AK |
2097 | return -1; |
2098 | } | |
2099 | ||
2100 | if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) { | |
2101 | if (mwifiex_write_reg(adapter, | |
f57c1edc YAP |
2102 | PCIE_HOST_INT_STATUS, |
2103 | ~pcie_ireg)) { | |
2104 | dev_warn(adapter->dev, | |
2105 | "Write register failed\n"); | |
d930faee AK |
2106 | return -1; |
2107 | } | |
d930faee AK |
2108 | } |
2109 | ||
2110 | } | |
2111 | } | |
2112 | dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n", | |
f57c1edc | 2113 | adapter->cmd_sent, adapter->data_sent); |
d930faee AK |
2114 | mwifiex_pcie_enable_host_int(adapter); |
2115 | ||
2116 | return 0; | |
2117 | } | |
2118 | ||
2119 | /* | |
2120 | * This function downloads data from driver to card. | |
2121 | * | |
2122 | * Both commands and data packets are transferred to the card by this | |
2123 | * function. | |
2124 | * | |
2125 | * This function adds the PCIE specific header to the front of the buffer | |
2126 | * before transferring. The header contains the length of the packet and | |
2127 | * the type. The firmware handles the packets based upon this set type. | |
2128 | */ | |
2129 | static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type, | |
2130 | struct sk_buff *skb, | |
2131 | struct mwifiex_tx_param *tx_param) | |
2132 | { | |
fa161cb7 DC |
2133 | if (!skb) { |
2134 | dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__); | |
d930faee AK |
2135 | return -1; |
2136 | } | |
2137 | ||
2138 | if (type == MWIFIEX_TYPE_DATA) | |
e7f767a7 | 2139 | return mwifiex_pcie_send_data(adapter, skb, tx_param); |
d930faee AK |
2140 | else if (type == MWIFIEX_TYPE_CMD) |
2141 | return mwifiex_pcie_send_cmd(adapter, skb); | |
2142 | ||
2143 | return 0; | |
2144 | } | |
2145 | ||
2146 | /* | |
2147 | * This function initializes the PCI-E host memory space, WCB rings, etc. | |
2148 | * | |
2149 | * The following initializations steps are followed - | |
2150 | * - Allocate TXBD ring buffers | |
2151 | * - Allocate RXBD ring buffers | |
2152 | * - Allocate event BD ring buffers | |
2153 | * - Allocate command response ring buffer | |
2154 | * - Allocate sleep cookie buffer | |
2155 | */ | |
2156 | static int mwifiex_pcie_init(struct mwifiex_adapter *adapter) | |
2157 | { | |
2158 | struct pcie_service_card *card = adapter->card; | |
2159 | int ret; | |
2160 | struct pci_dev *pdev = card->dev; | |
52301a81 | 2161 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee AK |
2162 | |
2163 | pci_set_drvdata(pdev, card); | |
2164 | ||
2165 | ret = pci_enable_device(pdev); | |
2166 | if (ret) | |
2167 | goto err_enable_dev; | |
2168 | ||
2169 | pci_set_master(pdev); | |
2170 | ||
2171 | dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n"); | |
2172 | ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | |
2173 | if (ret) { | |
2174 | dev_err(adapter->dev, "set_dma_mask(32) failed\n"); | |
2175 | goto err_set_dma_mask; | |
2176 | } | |
2177 | ||
2178 | ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | |
2179 | if (ret) { | |
2180 | dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n"); | |
2181 | goto err_set_dma_mask; | |
2182 | } | |
2183 | ||
2184 | ret = pci_request_region(pdev, 0, DRV_NAME); | |
2185 | if (ret) { | |
2186 | dev_err(adapter->dev, "req_reg(0) error\n"); | |
2187 | goto err_req_region0; | |
2188 | } | |
2189 | card->pci_mmap = pci_iomap(pdev, 0, 0); | |
2190 | if (!card->pci_mmap) { | |
2191 | dev_err(adapter->dev, "iomap(0) error\n"); | |
3220712d | 2192 | ret = -EIO; |
d930faee AK |
2193 | goto err_iomap0; |
2194 | } | |
2195 | ret = pci_request_region(pdev, 2, DRV_NAME); | |
2196 | if (ret) { | |
2197 | dev_err(adapter->dev, "req_reg(2) error\n"); | |
2198 | goto err_req_region2; | |
2199 | } | |
2200 | card->pci_mmap1 = pci_iomap(pdev, 2, 0); | |
2201 | if (!card->pci_mmap1) { | |
2202 | dev_err(adapter->dev, "iomap(2) error\n"); | |
3220712d | 2203 | ret = -EIO; |
d930faee AK |
2204 | goto err_iomap2; |
2205 | } | |
2206 | ||
f57c1edc YAP |
2207 | dev_dbg(adapter->dev, |
2208 | "PCI memory map Virt0: %p PCI memory map Virt2: %p\n", | |
2209 | card->pci_mmap, card->pci_mmap1); | |
d930faee AK |
2210 | |
2211 | card->cmdrsp_buf = NULL; | |
2212 | ret = mwifiex_pcie_create_txbd_ring(adapter); | |
2213 | if (ret) | |
2214 | goto err_cre_txbd; | |
2215 | ret = mwifiex_pcie_create_rxbd_ring(adapter); | |
2216 | if (ret) | |
2217 | goto err_cre_rxbd; | |
2218 | ret = mwifiex_pcie_create_evtbd_ring(adapter); | |
2219 | if (ret) | |
2220 | goto err_cre_evtbd; | |
2221 | ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter); | |
2222 | if (ret) | |
2223 | goto err_alloc_cmdbuf; | |
52301a81 AP |
2224 | if (reg->sleep_cookie) { |
2225 | ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter); | |
2226 | if (ret) | |
2227 | goto err_alloc_cookie; | |
2228 | } else { | |
2229 | card->sleep_cookie_vbase = NULL; | |
2230 | } | |
d930faee AK |
2231 | return ret; |
2232 | ||
2233 | err_alloc_cookie: | |
2234 | mwifiex_pcie_delete_cmdrsp_buf(adapter); | |
2235 | err_alloc_cmdbuf: | |
2236 | mwifiex_pcie_delete_evtbd_ring(adapter); | |
2237 | err_cre_evtbd: | |
2238 | mwifiex_pcie_delete_rxbd_ring(adapter); | |
2239 | err_cre_rxbd: | |
2240 | mwifiex_pcie_delete_txbd_ring(adapter); | |
2241 | err_cre_txbd: | |
2242 | pci_iounmap(pdev, card->pci_mmap1); | |
2243 | err_iomap2: | |
2244 | pci_release_region(pdev, 2); | |
2245 | err_req_region2: | |
2246 | pci_iounmap(pdev, card->pci_mmap); | |
2247 | err_iomap0: | |
2248 | pci_release_region(pdev, 0); | |
2249 | err_req_region0: | |
2250 | err_set_dma_mask: | |
2251 | pci_disable_device(pdev); | |
2252 | err_enable_dev: | |
2253 | pci_set_drvdata(pdev, NULL); | |
2254 | return ret; | |
2255 | } | |
2256 | ||
2257 | /* | |
2258 | * This function cleans up the allocated card buffers. | |
2259 | * | |
2260 | * The following are freed by this function - | |
2261 | * - TXBD ring buffers | |
2262 | * - RXBD ring buffers | |
2263 | * - Event BD ring buffers | |
2264 | * - Command response ring buffer | |
2265 | * - Sleep cookie buffer | |
2266 | */ | |
2267 | static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter) | |
2268 | { | |
2269 | struct pcie_service_card *card = adapter->card; | |
2270 | struct pci_dev *pdev = card->dev; | |
dd04e6ac | 2271 | const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; |
d930faee | 2272 | |
d930faee | 2273 | if (user_rmmod) { |
fc331460 | 2274 | dev_dbg(adapter->dev, "Clearing driver ready signature\n"); |
dd04e6ac | 2275 | if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000)) |
f57c1edc YAP |
2276 | dev_err(adapter->dev, |
2277 | "Failed to write driver not-ready signature\n"); | |
d930faee AK |
2278 | } |
2279 | ||
2280 | if (pdev) { | |
2281 | pci_iounmap(pdev, card->pci_mmap); | |
2282 | pci_iounmap(pdev, card->pci_mmap1); | |
2283 | ||
2284 | pci_release_regions(pdev); | |
2285 | pci_disable_device(pdev); | |
2286 | pci_set_drvdata(pdev, NULL); | |
2287 | } | |
2288 | } | |
2289 | ||
2290 | /* | |
2291 | * This function registers the PCIE device. | |
2292 | * | |
2293 | * PCIE IRQ is claimed, block size is set and driver data is initialized. | |
2294 | */ | |
2295 | static int mwifiex_register_dev(struct mwifiex_adapter *adapter) | |
2296 | { | |
2297 | int ret; | |
2298 | struct pcie_service_card *card = adapter->card; | |
2299 | struct pci_dev *pdev = card->dev; | |
2300 | ||
2301 | /* save adapter pointer in card */ | |
2302 | card->adapter = adapter; | |
2303 | ||
2304 | ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED, | |
2305 | "MRVL_PCIE", pdev); | |
2306 | if (ret) { | |
2307 | pr_err("request_irq failed: ret=%d\n", ret); | |
2308 | adapter->card = NULL; | |
2309 | return -1; | |
2310 | } | |
2311 | ||
2312 | adapter->dev = &pdev->dev; | |
dd04e6ac | 2313 | strcpy(adapter->fw_name, card->pcie.firmware); |
d930faee AK |
2314 | |
2315 | return 0; | |
2316 | } | |
2317 | ||
2318 | /* | |
2319 | * This function unregisters the PCIE device. | |
2320 | * | |
2321 | * The PCIE IRQ is released, the function is disabled and driver | |
2322 | * data is set to null. | |
2323 | */ | |
2324 | static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter) | |
2325 | { | |
2326 | struct pcie_service_card *card = adapter->card; | |
52301a81 | 2327 | const struct mwifiex_pcie_card_reg *reg; |
d930faee AK |
2328 | |
2329 | if (card) { | |
2330 | dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__); | |
2331 | free_irq(card->dev->irq, card->dev); | |
fc331460 | 2332 | |
52301a81 AP |
2333 | reg = card->pcie.reg; |
2334 | if (reg->sleep_cookie) | |
2335 | mwifiex_pcie_delete_sleep_cookie_buf(adapter); | |
2336 | ||
fc331460 AP |
2337 | mwifiex_pcie_delete_cmdrsp_buf(adapter); |
2338 | mwifiex_pcie_delete_evtbd_ring(adapter); | |
2339 | mwifiex_pcie_delete_rxbd_ring(adapter); | |
2340 | mwifiex_pcie_delete_txbd_ring(adapter); | |
2341 | card->cmdrsp_buf = NULL; | |
d930faee AK |
2342 | } |
2343 | } | |
2344 | ||
2345 | static struct mwifiex_if_ops pcie_ops = { | |
2346 | .init_if = mwifiex_pcie_init, | |
2347 | .cleanup_if = mwifiex_pcie_cleanup, | |
2348 | .check_fw_status = mwifiex_check_fw_status, | |
2349 | .prog_fw = mwifiex_prog_fw_w_helper, | |
2350 | .register_dev = mwifiex_register_dev, | |
2351 | .unregister_dev = mwifiex_unregister_dev, | |
2352 | .enable_int = mwifiex_pcie_enable_host_int, | |
2353 | .process_int_status = mwifiex_process_int_status, | |
2354 | .host_to_card = mwifiex_pcie_host_to_card, | |
2355 | .wakeup = mwifiex_pm_wakeup_card, | |
2356 | .wakeup_complete = mwifiex_pm_wakeup_card_complete, | |
2357 | ||
2358 | /* PCIE specific */ | |
2359 | .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete, | |
2360 | .event_complete = mwifiex_pcie_event_complete, | |
2361 | .update_mp_end_port = NULL, | |
2362 | .cleanup_mpa_buf = NULL, | |
c6d1d87a | 2363 | .init_fw_port = mwifiex_pcie_init_fw_port, |
fbd7e7ac | 2364 | .clean_pcie_ring = mwifiex_clean_pcie_ring_buf, |
d930faee AK |
2365 | }; |
2366 | ||
2367 | /* | |
2368 | * This function initializes the PCIE driver module. | |
2369 | * | |
2370 | * This initiates the semaphore and registers the device with | |
2371 | * PCIE bus. | |
2372 | */ | |
2373 | static int mwifiex_pcie_init_module(void) | |
2374 | { | |
2375 | int ret; | |
2376 | ||
ca8f2112 | 2377 | pr_debug("Marvell PCIe Driver\n"); |
d930faee AK |
2378 | |
2379 | sema_init(&add_remove_card_sem, 1); | |
2380 | ||
2381 | /* Clear the flag in case user removes the card. */ | |
2382 | user_rmmod = 0; | |
2383 | ||
2384 | ret = pci_register_driver(&mwifiex_pcie); | |
2385 | if (ret) | |
2386 | pr_err("Driver register failed!\n"); | |
2387 | else | |
2388 | pr_debug("info: Driver registered successfully!\n"); | |
2389 | ||
2390 | return ret; | |
2391 | } | |
2392 | ||
2393 | /* | |
2394 | * This function cleans up the PCIE driver. | |
2395 | * | |
2396 | * The following major steps are followed for cleanup - | |
2397 | * - Resume the device if its suspended | |
2398 | * - Disconnect the device if connected | |
2399 | * - Shutdown the firmware | |
2400 | * - Unregister the device from PCIE bus. | |
2401 | */ | |
2402 | static void mwifiex_pcie_cleanup_module(void) | |
2403 | { | |
2404 | if (!down_interruptible(&add_remove_card_sem)) | |
2405 | up(&add_remove_card_sem); | |
2406 | ||
2407 | /* Set the flag as user is removing this module. */ | |
2408 | user_rmmod = 1; | |
2409 | ||
2410 | pci_unregister_driver(&mwifiex_pcie); | |
2411 | } | |
2412 | ||
2413 | module_init(mwifiex_pcie_init_module); | |
2414 | module_exit(mwifiex_pcie_cleanup_module); | |
2415 | ||
2416 | MODULE_AUTHOR("Marvell International Ltd."); | |
2417 | MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION); | |
2418 | MODULE_VERSION(PCIE_VERSION); | |
2419 | MODULE_LICENSE("GPL v2"); | |
ca8f2112 AP |
2420 | MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME); |
2421 | MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME); |