Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[linux-2.6-block.git] / drivers / net / wireless / mwifiex / 11n.c
CommitLineData
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1/*
2 * Marvell Wireless LAN device driver: 802.11n
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include "decl.h"
21#include "ioctl.h"
22#include "util.h"
23#include "fw.h"
24#include "main.h"
25#include "wmm.h"
26#include "11n.h"
27
28/*
29 * Fills HT capability information field, AMPDU Parameters field, HT extended
30 * capability field, and supported MCS set fields.
31 *
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32 * HT capability information field, AMPDU Parameters field, supported MCS set
33 * fields are retrieved from cfg80211 stack
5e6e3a92 34 *
a46b7b5c 35 * RD responder bit to set to clear in the extended capability header.
5e6e3a92 36 */
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37int mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type,
38 struct ieee80211_ht_cap *ht_cap)
5e6e3a92 39{
341b8800 40 uint16_t ht_ext_cap = le16_to_cpu(ht_cap->extended_ht_cap_info);
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41 struct ieee80211_supported_band *sband =
42 priv->wdev->wiphy->bands[radio_type];
5e6e3a92 43
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44 if (WARN_ON_ONCE(!sband)) {
45 dev_err(priv->adapter->dev, "Invalid radio type!\n");
46 return -EINVAL;
47 }
48
49 ht_cap->ampdu_params_info =
a46b7b5c 50 (sband->ht_cap.ampdu_factor &
84266841 51 IEEE80211_HT_AMPDU_PARM_FACTOR) |
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52 ((sband->ht_cap.ampdu_density <<
53 IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) &
54 IEEE80211_HT_AMPDU_PARM_DENSITY);
5e6e3a92 55
341b8800 56 memcpy((u8 *)&ht_cap->mcs, &sband->ht_cap.mcs,
84266841 57 sizeof(sband->ht_cap.mcs));
5e6e3a92 58
eecd8250 59 if (priv->bss_mode == NL80211_IFTYPE_STATION ||
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60 (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
61 (priv->adapter->sec_chan_offset !=
62 IEEE80211_HT_PARAM_CHA_SEC_NONE)))
5e6e3a92 63 /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */
341b8800 64 SETHT_MCS32(ht_cap->mcs.rx_mask);
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65
66 /* Clear RD responder bit */
a3731658 67 ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER;
5e6e3a92 68
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69 ht_cap->cap_info = cpu_to_le16(sband->ht_cap.cap);
70 ht_cap->extended_ht_cap_info = cpu_to_le16(ht_ext_cap);
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71
72 if (ISSUPP_BEAMFORMING(priv->adapter->hw_dot_11n_dev_cap))
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73 ht_cap->tx_BF_cap_info = cpu_to_le32(MWIFIEX_DEF_11N_TX_BF_CAP);
74
75 return 0;
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76}
77
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78/*
79 * This function returns the pointer to an entry in BA Stream
80 * table which matches the requested BA status.
81 */
82static struct mwifiex_tx_ba_stream_tbl *
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83mwifiex_get_ba_status(struct mwifiex_private *priv,
84 enum mwifiex_ba_status ba_status)
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85{
86 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
87 unsigned long flags;
88
89 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
90 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
91 if (tx_ba_tsr_tbl->ba_status == ba_status) {
92 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
93 flags);
94 return tx_ba_tsr_tbl;
95 }
96 }
97 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
98 return NULL;
99}
100
101/*
102 * This function handles the command response of delete a block
103 * ack request.
104 *
105 * The function checks the response success status and takes action
106 * accordingly (send an add BA request in case of success, or recreate
107 * the deleted stream in case of failure, if the add BA was also
108 * initiated by us).
109 */
110int mwifiex_ret_11n_delba(struct mwifiex_private *priv,
111 struct host_cmd_ds_command *resp)
112{
113 int tid;
114 struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
2c208890 115 struct host_cmd_ds_11n_delba *del_ba = &resp->params.del_ba;
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116 uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set);
117
118 tid = del_ba_param_set >> DELBA_TID_POS;
119 if (del_ba->del_result == BA_RESULT_SUCCESS) {
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120 mwifiex_del_ba_tbl(priv, tid, del_ba->peer_mac_addr,
121 TYPE_DELBA_SENT,
122 INITIATOR_BIT(del_ba_param_set));
5e6e3a92 123
3e822635 124 tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
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125 if (tx_ba_tbl)
126 mwifiex_send_addba(priv, tx_ba_tbl->tid,
127 tx_ba_tbl->ra);
128 } else { /*
129 * In case of failure, recreate the deleted stream in case
130 * we initiated the ADDBA
131 */
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132 if (!INITIATOR_BIT(del_ba_param_set))
133 return 0;
134
135 mwifiex_create_ba_tbl(priv, del_ba->peer_mac_addr, tid,
136 BA_SETUP_INPROGRESS);
137
138 tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
139
140 if (tx_ba_tbl)
141 mwifiex_del_ba_tbl(priv, tx_ba_tbl->tid, tx_ba_tbl->ra,
142 TYPE_DELBA_SENT, true);
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143 }
144
145 return 0;
146}
147
148/*
149 * This function handles the command response of add a block
150 * ack request.
151 *
152 * Handling includes changing the header fields to CPU formats, checking
153 * the response success status and taking actions accordingly (delete the
154 * BA stream table in case of failure).
155 */
156int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv,
157 struct host_cmd_ds_command *resp)
158{
159 int tid;
2c208890 160 struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &resp->params.add_ba_rsp;
5e6e3a92 161 struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
4c9f9fb2 162 u16 block_ack_param_set = le16_to_cpu(add_ba_rsp->block_ack_param_set);
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163
164 add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn))
165 & SSN_MASK);
166
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167 tid = (block_ack_param_set & IEEE80211_ADDBA_PARAM_TID_MASK)
168 >> BLOCKACKPARAM_TID_POS;
63410c37 169 if (le16_to_cpu(add_ba_rsp->status_code) != BA_RESULT_SUCCESS) {
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170 mwifiex_del_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr,
171 TYPE_DELBA_SENT, true);
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172 if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT)
173 priv->aggr_prio_tbl[tid].ampdu_ap =
174 BA_STREAM_NOT_ALLOWED;
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175 return 0;
176 }
177
178 tx_ba_tbl = mwifiex_get_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr);
179 if (tx_ba_tbl) {
180 dev_dbg(priv->adapter->dev, "info: BA stream complete\n");
181 tx_ba_tbl->ba_status = BA_SETUP_COMPLETE;
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182 if ((block_ack_param_set & BLOCKACKPARAM_AMSDU_SUPP_MASK) &&
183 priv->add_ba_param.tx_amsdu &&
184 (priv->aggr_prio_tbl[tid].amsdu != BA_STREAM_NOT_ALLOWED))
185 tx_ba_tbl->amsdu = true;
186 else
187 tx_ba_tbl->amsdu = false;
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188 } else {
189 dev_err(priv->adapter->dev, "BA stream not created\n");
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190 }
191
192 return 0;
193}
194
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195/*
196 * This function prepares command of reconfigure Tx buffer.
197 *
198 * Preparation includes -
199 * - Setting command ID, action and proper size
200 * - Setting Tx buffer size (for SET only)
201 * - Ensuring correct endian-ness
202 */
203int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv,
204 struct host_cmd_ds_command *cmd, int cmd_action,
a5ffddb7 205 u16 *buf_size)
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206{
207 struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf;
208 u16 action = (u16) cmd_action;
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209
210 cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
211 cmd->size =
212 cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN);
213 tx_buf->action = cpu_to_le16(action);
214 switch (action) {
215 case HostCmd_ACT_GEN_SET:
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216 dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", *buf_size);
217 tx_buf->buff_size = cpu_to_le16(*buf_size);
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218 break;
219 case HostCmd_ACT_GEN_GET:
220 default:
221 tx_buf->buff_size = 0;
222 break;
223 }
224 return 0;
225}
226
227/*
228 * This function prepares command of AMSDU aggregation control.
229 *
230 * Preparation includes -
231 * - Setting command ID, action and proper size
232 * - Setting AMSDU control parameters (for SET only)
233 * - Ensuring correct endian-ness
234 */
572e8f3e 235int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd,
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236 int cmd_action,
237 struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl)
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238{
239 struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
240 &cmd->params.amsdu_aggr_ctrl;
241 u16 action = (u16) cmd_action;
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242
243 cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
244 cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl)
245 + S_DS_GEN);
246 amsdu_ctrl->action = cpu_to_le16(action);
247 switch (action) {
248 case HostCmd_ACT_GEN_SET:
249 amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable);
250 amsdu_ctrl->curr_buf_size = 0;
251 break;
252 case HostCmd_ACT_GEN_GET:
253 default:
254 amsdu_ctrl->curr_buf_size = 0;
255 break;
256 }
257 return 0;
258}
259
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260/*
261 * This function prepares 11n configuration command.
262 *
263 * Preparation includes -
264 * - Setting command ID, action and proper size
265 * - Setting HT Tx capability and HT Tx information fields
266 * - Ensuring correct endian-ness
267 */
a5f39056
YAP
268int mwifiex_cmd_11n_cfg(struct mwifiex_private *priv,
269 struct host_cmd_ds_command *cmd, u16 cmd_action,
a5ffddb7 270 struct mwifiex_ds_11n_tx_cfg *txcfg)
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271{
272 struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg;
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273
274 cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG);
275 cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN);
276 htcfg->action = cpu_to_le16(cmd_action);
277 htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap);
278 htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo);
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279
280 if (priv->adapter->is_hw_11ac_capable)
281 htcfg->misc_config = cpu_to_le16(txcfg->misc_config);
282
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283 return 0;
284}
285
286/*
287 * This function appends an 11n TLV to a buffer.
288 *
289 * Buffer allocation is responsibility of the calling
290 * function. No size validation is made here.
291 *
292 * The function fills up the following sections, if applicable -
293 * - HT capability IE
294 * - HT information IE (with channel list)
295 * - 20/40 BSS Coexistence IE
296 * - HT Extended Capabilities IE
297 */
298int
299mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,
300 struct mwifiex_bssdescriptor *bss_desc,
301 u8 **buffer)
302{
303 struct mwifiex_ie_types_htcap *ht_cap;
304 struct mwifiex_ie_types_htinfo *ht_info;
305 struct mwifiex_ie_types_chan_list_param_set *chan_list;
306 struct mwifiex_ie_types_2040bssco *bss_co_2040;
307 struct mwifiex_ie_types_extcap *ext_cap;
308 int ret_len = 0;
a46b7b5c 309 struct ieee80211_supported_band *sband;
68f95b09 310 struct ieee_types_header *hdr;
a46b7b5c 311 u8 radio_type;
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312
313 if (!buffer || !*buffer)
314 return ret_len;
315
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316 radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
317 sband = priv->wdev->wiphy->bands[radio_type];
318
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319 if (bss_desc->bcn_ht_cap) {
320 ht_cap = (struct mwifiex_ie_types_htcap *) *buffer;
321 memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap));
322 ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY);
323 ht_cap->header.len =
324 cpu_to_le16(sizeof(struct ieee80211_ht_cap));
325 memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header),
c99b1861 326 (u8 *)bss_desc->bcn_ht_cap,
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327 le16_to_cpu(ht_cap->header.len));
328
341b8800 329 mwifiex_fill_cap_info(priv, radio_type, &ht_cap->ht_cap);
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330
331 *buffer += sizeof(struct mwifiex_ie_types_htcap);
332 ret_len += sizeof(struct mwifiex_ie_types_htcap);
333 }
334
074d46d1 335 if (bss_desc->bcn_ht_oper) {
eecd8250 336 if (priv->bss_mode == NL80211_IFTYPE_ADHOC) {
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337 ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;
338 memset(ht_info, 0,
339 sizeof(struct mwifiex_ie_types_htinfo));
340 ht_info->header.type =
074d46d1 341 cpu_to_le16(WLAN_EID_HT_OPERATION);
5e6e3a92 342 ht_info->header.len =
074d46d1
JB
343 cpu_to_le16(
344 sizeof(struct ieee80211_ht_operation));
5e6e3a92
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345
346 memcpy((u8 *) ht_info +
347 sizeof(struct mwifiex_ie_types_header),
074d46d1 348 (u8 *) bss_desc->bcn_ht_oper +
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349 sizeof(struct ieee_types_header),
350 le16_to_cpu(ht_info->header.len));
351
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352 if (!(sband->ht_cap.cap &
353 IEEE80211_HT_CAP_SUP_WIDTH_20_40))
074d46d1 354 ht_info->ht_oper.ht_param &=
6d2bd916
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355 ~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |
356 IEEE80211_HT_PARAM_CHA_SEC_OFFSET);
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357
358 *buffer += sizeof(struct mwifiex_ie_types_htinfo);
359 ret_len += sizeof(struct mwifiex_ie_types_htinfo);
360 }
361
362 chan_list =
363 (struct mwifiex_ie_types_chan_list_param_set *) *buffer;
364 memset(chan_list, 0,
365 sizeof(struct mwifiex_ie_types_chan_list_param_set));
366 chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST);
367 chan_list->header.len = cpu_to_le16(
368 sizeof(struct mwifiex_ie_types_chan_list_param_set) -
369 sizeof(struct mwifiex_ie_types_header));
370 chan_list->chan_scan_param[0].chan_number =
074d46d1 371 bss_desc->bcn_ht_oper->primary_chan;
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372 chan_list->chan_scan_param[0].radio_type =
373 mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
374
84266841 375 if (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
074d46d1 376 bss_desc->bcn_ht_oper->ht_param &
84266841 377 IEEE80211_HT_PARAM_CHAN_WIDTH_ANY)
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378 SET_SECONDARYCHAN(chan_list->chan_scan_param[0].
379 radio_type,
074d46d1 380 (bss_desc->bcn_ht_oper->ht_param &
6d2bd916 381 IEEE80211_HT_PARAM_CHA_SEC_OFFSET));
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382
383 *buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);
384 ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set);
385 }
386
387 if (bss_desc->bcn_bss_co_2040) {
388 bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer;
389 memset(bss_co_2040, 0,
390 sizeof(struct mwifiex_ie_types_2040bssco));
391 bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040);
392 bss_co_2040->header.len =
393 cpu_to_le16(sizeof(bss_co_2040->bss_co_2040));
394
395 memcpy((u8 *) bss_co_2040 +
396 sizeof(struct mwifiex_ie_types_header),
2c208890 397 bss_desc->bcn_bss_co_2040 +
5e6e3a92
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398 sizeof(struct ieee_types_header),
399 le16_to_cpu(bss_co_2040->header.len));
400
401 *buffer += sizeof(struct mwifiex_ie_types_2040bssco);
402 ret_len += sizeof(struct mwifiex_ie_types_2040bssco);
403 }
404
405 if (bss_desc->bcn_ext_cap) {
68f95b09 406 hdr = (void *)bss_desc->bcn_ext_cap;
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407 ext_cap = (struct mwifiex_ie_types_extcap *) *buffer;
408 memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap));
409 ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY);
68f95b09 410 ext_cap->header.len = cpu_to_le16(hdr->len);
5e6e3a92 411
68f95b09 412 memcpy((u8 *)ext_cap->ext_capab,
2c208890 413 bss_desc->bcn_ext_cap + sizeof(struct ieee_types_header),
5e6e3a92
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414 le16_to_cpu(ext_cap->header.len));
415
587b36d3
AP
416 if (hdr->len > 3 &&
417 ext_cap->ext_capab[3] & WLAN_EXT_CAPA4_INTERWORKING_ENABLED)
418 priv->hs2_enabled = true;
419 else
420 priv->hs2_enabled = false;
421
68f95b09
AP
422 *buffer += sizeof(struct mwifiex_ie_types_extcap) + hdr->len;
423 ret_len += sizeof(struct mwifiex_ie_types_extcap) + hdr->len;
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424 }
425
426 return ret_len;
427}
428
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429/*
430 * This function checks if the given pointer is valid entry of
431 * Tx BA Stream table.
432 */
433static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv,
434 struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr)
435{
436 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
437
438 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
439 if (tx_ba_tsr_tbl == tx_tbl_ptr)
440 return true;
441 }
442
443 return false;
444}
445
446/*
447 * This function deletes the given entry in Tx BA Stream table.
448 *
449 * The function also performs a validity check on the supplied
450 * pointer before trying to delete.
451 */
452void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv,
453 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl)
454{
455 if (!tx_ba_tsr_tbl &&
84266841 456 mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl))
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457 return;
458
459 dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl);
460
461 list_del(&tx_ba_tsr_tbl->list);
462
463 kfree(tx_ba_tsr_tbl);
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464}
465
466/*
467 * This function deletes all the entries in Tx BA Stream table.
468 */
469void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv)
470{
471 int i;
472 struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node;
473 unsigned long flags;
474
475 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
476 list_for_each_entry_safe(del_tbl_ptr, tmp_node,
477 &priv->tx_ba_stream_tbl_ptr, list)
478 mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr);
479 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
480
481 INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
482
483 for (i = 0; i < MAX_NUM_TID; ++i)
484 priv->aggr_prio_tbl[i].ampdu_ap =
485 priv->aggr_prio_tbl[i].ampdu_user;
486}
487
488/*
489 * This function returns the pointer to an entry in BA Stream
490 * table which matches the given RA/TID pair.
491 */
492struct mwifiex_tx_ba_stream_tbl *
3e822635 493mwifiex_get_ba_tbl(struct mwifiex_private *priv, int tid, u8 *ra)
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494{
495 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
496 unsigned long flags;
497
498 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
499 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
fcad7668 500 if (ether_addr_equal_unaligned(tx_ba_tsr_tbl->ra, ra) &&
84266841 501 tx_ba_tsr_tbl->tid == tid) {
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502 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
503 flags);
504 return tx_ba_tsr_tbl;
505 }
506 }
507 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
508 return NULL;
509}
510
511/*
512 * This function creates an entry in Tx BA stream table for the
513 * given RA/TID pair.
514 */
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YAP
515void mwifiex_create_ba_tbl(struct mwifiex_private *priv, u8 *ra, int tid,
516 enum mwifiex_ba_status ba_status)
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517{
518 struct mwifiex_tx_ba_stream_tbl *new_node;
519 unsigned long flags;
520
3e822635 521 if (!mwifiex_get_ba_tbl(priv, tid, ra)) {
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522 new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl),
523 GFP_ATOMIC);
0d2e7a5c 524 if (!new_node)
5e6e3a92 525 return;
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526
527 INIT_LIST_HEAD(&new_node->list);
528
529 new_node->tid = tid;
530 new_node->ba_status = ba_status;
531 memcpy(new_node->ra, ra, ETH_ALEN);
532
533 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
534 list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr);
535 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
536 }
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537}
538
539/*
540 * This function sends an add BA request to the given TID/RA pair.
541 */
542int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac)
543{
544 struct host_cmd_ds_11n_addba_req add_ba_req;
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AP
545 struct mwifiex_sta_node *sta_ptr;
546 u32 tx_win_size = priv->add_ba_param.tx_win_size;
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547 static u8 dialog_tok;
548 int ret;
4c9f9fb2 549 u16 block_ack_param_set;
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550
551 dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid);
552
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AP
553 if ((GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA) &&
554 ISSUPP_TDLS_ENABLED(priv->adapter->fw_cap_info) &&
555 priv->adapter->is_hw_11ac_capable &&
556 memcmp(priv->cfg_bssid, peer_mac, ETH_ALEN)) {
557 sta_ptr = mwifiex_get_sta_entry(priv, peer_mac);
558 if (!sta_ptr) {
559 dev_warn(priv->adapter->dev,
560 "BA setup with unknown TDLS peer %pM!\n",
561 peer_mac);
562 return -1;
563 }
564 if (sta_ptr->is_11ac_enabled)
565 tx_win_size = MWIFIEX_11AC_STA_AMPDU_DEF_TXWINSIZE;
566 }
567
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568 block_ack_param_set = (u16)((tid << BLOCKACKPARAM_TID_POS) |
569 tx_win_size << BLOCKACKPARAM_WINSIZE_POS |
570 IMMEDIATE_BLOCK_ACK);
571
572 /* enable AMSDU inside AMPDU */
573 if (priv->add_ba_param.tx_amsdu &&
574 (priv->aggr_prio_tbl[tid].amsdu != BA_STREAM_NOT_ALLOWED))
575 block_ack_param_set |= BLOCKACKPARAM_AMSDU_SUPP_MASK;
576
577 add_ba_req.block_ack_param_set = cpu_to_le16(block_ack_param_set);
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578 add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout);
579
580 ++dialog_tok;
581
582 if (dialog_tok == 0)
583 dialog_tok = 1;
584
585 add_ba_req.dialog_token = dialog_tok;
586 memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN);
587
588 /* We don't wait for the response of this command */
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BZ
589 ret = mwifiex_send_cmd(priv, HostCmd_CMD_11N_ADDBA_REQ,
590 0, 0, &add_ba_req, false);
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591
592 return ret;
593}
594
595/*
596 * This function sends a delete BA request to the given TID/RA pair.
597 */
598int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac,
599 int initiator)
600{
601 struct host_cmd_ds_11n_delba delba;
602 int ret;
603 uint16_t del_ba_param_set;
604
605 memset(&delba, 0, sizeof(delba));
606 delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS);
607
608 del_ba_param_set = le16_to_cpu(delba.del_ba_param_set);
609 if (initiator)
610 del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK;
611 else
612 del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK;
613
614 memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN);
615
616 /* We don't wait for the response of this command */
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617 ret = mwifiex_send_cmd(priv, HostCmd_CMD_11N_DELBA,
618 HostCmd_ACT_GEN_SET, 0, &delba, false);
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619
620 return ret;
621}
622
623/*
624 * This function handles the command response of a delete BA request.
625 */
626void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba)
627{
628 struct host_cmd_ds_11n_delba *cmd_del_ba =
629 (struct host_cmd_ds_11n_delba *) del_ba;
630 uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set);
631 int tid;
632
633 tid = del_ba_param_set >> DELBA_TID_POS;
634
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YAP
635 mwifiex_del_ba_tbl(priv, tid, cmd_del_ba->peer_mac_addr,
636 TYPE_DELBA_RECEIVE, INITIATOR_BIT(del_ba_param_set));
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BZ
637}
638
639/*
640 * This function retrieves the Rx reordering table.
641 */
642int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv,
643 struct mwifiex_ds_rx_reorder_tbl *buf)
644{
645 int i;
646 struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf;
647 struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr;
648 int count = 0;
649 unsigned long flags;
650
651 spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags);
652 list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr,
653 list) {
654 rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid;
655 memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN);
656 rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win;
657 rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size;
658 for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) {
659 if (rx_reorder_tbl_ptr->rx_reorder_ptr[i])
660 rx_reo_tbl->buffer[i] = true;
661 else
662 rx_reo_tbl->buffer[i] = false;
663 }
664 rx_reo_tbl++;
665 count++;
666
667 if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED)
668 break;
669 }
670 spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags);
671
672 return count;
673}
674
675/*
676 * This function retrieves the Tx BA stream table.
677 */
678int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
679 struct mwifiex_ds_tx_ba_stream_tbl *buf)
680{
681 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
682 struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf;
683 int count = 0;
684 unsigned long flags;
685
686 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
687 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
688 rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid;
689 dev_dbg(priv->adapter->dev, "data: %s tid=%d\n",
84266841 690 __func__, rx_reo_tbl->tid);
5e6e3a92 691 memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN);
4c9f9fb2 692 rx_reo_tbl->amsdu = tx_ba_tsr_tbl->amsdu;
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693 rx_reo_tbl++;
694 count++;
695 if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED)
696 break;
697 }
698 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
699
700 return count;
701}
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AP
702
703/*
704 * This function retrieves the entry for specific tx BA stream table by RA and
705 * deletes it.
706 */
707void mwifiex_del_tx_ba_stream_tbl_by_ra(struct mwifiex_private *priv, u8 *ra)
708{
709 struct mwifiex_tx_ba_stream_tbl *tbl, *tmp;
710 unsigned long flags;
711
712 if (!ra)
713 return;
714
715 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
716 list_for_each_entry_safe(tbl, tmp, &priv->tx_ba_stream_tbl_ptr, list) {
717 if (!memcmp(tbl->ra, ra, ETH_ALEN)) {
718 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
719 flags);
720 mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, tbl);
721 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
722 }
723 }
724 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
725
726 return;
727}
04abc0a3
AP
728
729/* This function initializes the BlockACK setup information for given
730 * mwifiex_private structure.
731 */
732void mwifiex_set_ba_params(struct mwifiex_private *priv)
733{
734 priv->add_ba_param.timeout = MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT;
735
736 if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_UAP) {
737 priv->add_ba_param.tx_win_size =
738 MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE;
739 priv->add_ba_param.rx_win_size =
740 MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE;
741 } else {
742 priv->add_ba_param.tx_win_size =
743 MWIFIEX_STA_AMPDU_DEF_TXWINSIZE;
744 priv->add_ba_param.rx_win_size =
745 MWIFIEX_STA_AMPDU_DEF_RXWINSIZE;
746 }
747
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AK
748 priv->add_ba_param.tx_amsdu = true;
749 priv->add_ba_param.rx_amsdu = true;
750
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AP
751 return;
752}