[linux-2.6-block.git] / drivers / net / wireless / mediatek / mt76 / mt792x_usb.c

// SPDX-License-Identifier: ISC
/* Copyright (C) 2023 MediaTek Inc.
 *
 * Author: Lorenzo Bianconi <lorenzo@kernel.org>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/usb.h>

#include "mt792x.h"
#include "mt76_connac2_mac.h"

u32 mt792xu_rr(struct mt76_dev *dev, u32 addr)
{
	u32 ret;

	mutex_lock(&dev->usb.usb_ctrl_mtx);
	ret = ___mt76u_rr(dev, MT_VEND_READ_EXT,
			  USB_DIR_IN | MT_USB_TYPE_VENDOR, addr);
	mutex_unlock(&dev->usb.usb_ctrl_mtx);

	return ret;
}
EXPORT_SYMBOL_GPL(mt792xu_rr);

void mt792xu_wr(struct mt76_dev *dev, u32 addr, u32 val)
{
	mutex_lock(&dev->usb.usb_ctrl_mtx);
	___mt76u_wr(dev, MT_VEND_WRITE_EXT,
		    USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
	mutex_unlock(&dev->usb.usb_ctrl_mtx);
}
EXPORT_SYMBOL_GPL(mt792xu_wr);

u32 mt792xu_rmw(struct mt76_dev *dev, u32 addr, u32 mask, u32 val)
{
	mutex_lock(&dev->usb.usb_ctrl_mtx);
	val |= ___mt76u_rr(dev, MT_VEND_READ_EXT,
			   USB_DIR_IN | MT_USB_TYPE_VENDOR, addr) & ~mask;
	___mt76u_wr(dev, MT_VEND_WRITE_EXT,
		    USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
	mutex_unlock(&dev->usb.usb_ctrl_mtx);

	return val;
}
EXPORT_SYMBOL_GPL(mt792xu_rmw);

void mt792xu_copy(struct mt76_dev *dev, u32 offset, const void *data, int len)
{
	struct mt76_usb *usb = &dev->usb;
	int ret, i = 0, batch_len;
	const u8 *val = data;

	len = round_up(len, 4);

	mutex_lock(&usb->usb_ctrl_mtx);
	while (i < len) {
		batch_len = min_t(int, usb->data_len, len - i);
		memcpy(usb->data, val + i, batch_len);
		ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT,
					     USB_DIR_OUT | MT_USB_TYPE_VENDOR,
					     (offset + i) >> 16, offset + i,
					     usb->data, batch_len);
		if (ret < 0)
			break;

		i += batch_len;
	}
	mutex_unlock(&usb->usb_ctrl_mtx);
}
EXPORT_SYMBOL_GPL(mt792xu_copy);

int mt792xu_mcu_power_on(struct mt792x_dev *dev)
{
	int ret;

	ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON,
				   USB_DIR_OUT | MT_USB_TYPE_VENDOR,
				   0x0, 0x1, NULL, 0);
	if (ret)
		return ret;

	if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON,
			    MT_TOP_MISC2_FW_PWR_ON, 500)) {
		dev_err(dev->mt76.dev, "Timeout for power on\n");
		ret = -EIO;
	}

	return ret;
}
EXPORT_SYMBOL_GPL(mt792xu_mcu_power_on);

static void mt792xu_cleanup(struct mt792x_dev *dev)
{
	clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
	mt792xu_wfsys_reset(dev);
	skb_queue_purge(&dev->mt76.mcu.res_q);
	mt76u_queues_deinit(&dev->mt76);
}

static u32 mt792xu_uhw_rr(struct mt76_dev *dev, u32 addr)
{
	u32 ret;

	mutex_lock(&dev->usb.usb_ctrl_mtx);
	ret = ___mt76u_rr(dev, MT_VEND_DEV_MODE,
			  USB_DIR_IN | MT_USB_TYPE_UHW_VENDOR, addr);
	mutex_unlock(&dev->usb.usb_ctrl_mtx);

	return ret;
}

static void mt792xu_uhw_wr(struct mt76_dev *dev, u32 addr, u32 val)
{
	mutex_lock(&dev->usb.usb_ctrl_mtx);
	___mt76u_wr(dev, MT_VEND_WRITE,
		    USB_DIR_OUT | MT_USB_TYPE_UHW_VENDOR, addr, val);
	mutex_unlock(&dev->usb.usb_ctrl_mtx);
}

static void mt792xu_dma_prefetch(struct mt792x_dev *dev)
{
	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
		 MT_WPDMA0_MAX_CNT_MASK, 4);
	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
		 MT_WPDMA0_BASE_PTR_MASK, 0x80);

	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
		 MT_WPDMA0_MAX_CNT_MASK, 4);
	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
		 MT_WPDMA0_BASE_PTR_MASK, 0xc0);

	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
		 MT_WPDMA0_MAX_CNT_MASK, 4);
	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
		 MT_WPDMA0_BASE_PTR_MASK, 0x100);

	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
		 MT_WPDMA0_MAX_CNT_MASK, 4);
	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
		 MT_WPDMA0_BASE_PTR_MASK, 0x140);

	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
		 MT_WPDMA0_MAX_CNT_MASK, 4);
	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
		 MT_WPDMA0_BASE_PTR_MASK, 0x180);

	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
		 MT_WPDMA0_MAX_CNT_MASK, 4);
	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
		 MT_WPDMA0_BASE_PTR_MASK, 0x280);

	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
		 MT_WPDMA0_MAX_CNT_MASK, 4);
	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
		 MT_WPDMA0_BASE_PTR_MASK,  0x2c0);
}

static void mt792xu_wfdma_init(struct mt792x_dev *dev)
{
	mt792xu_dma_prefetch(dev);

	mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO);
	mt76_set(dev, MT_UWFDMA0_GLO_CFG,
		 MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
		 MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 |
		 MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL |
		 MT_WFDMA0_GLO_CFG_TX_DMA_EN |
		 MT_WFDMA0_GLO_CFG_RX_DMA_EN);

	/* disable dmashdl */
	mt76_clear(dev, MT_UWFDMA0_GLO_CFG_EXT0,
		   MT_WFDMA0_CSR_TX_DMASHDL_ENABLE);
	mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS);

	mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
}

static int mt792xu_dma_rx_evt_ep4(struct mt792x_dev *dev)
{
	if (!mt76_poll(dev, MT_UWFDMA0_GLO_CFG,
		       MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000))
		return -ETIMEDOUT;

	mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
	mt76_set(dev, MT_WFDMA_HOST_CONFIG,
		 MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN);
	mt76_set(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);

	return 0;
}

static void mt792xu_epctl_rst_opt(struct mt792x_dev *dev, bool reset)
{
	u32 val;

	/* usb endpoint reset opt
	 * bits[4,9]: out blk ep 4-9
	 * bits[20,21]: in blk ep 4-5
	 * bits[22]: in int ep 6
	 */
	val = mt792xu_uhw_rr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT);
	if (reset)
		val |= GENMASK(9, 4) | GENMASK(22, 20);
	else
		val &= ~(GENMASK(9, 4) | GENMASK(22, 20));
	mt792xu_uhw_wr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT, val);
}

int mt792xu_dma_init(struct mt792x_dev *dev, bool resume)
{
	int err;

	mt792xu_wfdma_init(dev);

	mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH);

	mt76_set(dev, MT_UDMA_WLCFG_0,
		 MT_WL_RX_EN | MT_WL_TX_EN |
		 MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN);
	mt76_clear(dev, MT_UDMA_WLCFG_0,
		   MT_WL_RX_AGG_TO | MT_WL_RX_AGG_LMT);
	mt76_clear(dev, MT_UDMA_WLCFG_1, MT_WL_RX_AGG_PKT_LMT);

	if (resume)
		return 0;

	err = mt792xu_dma_rx_evt_ep4(dev);
	if (err)
		return err;

	mt792xu_epctl_rst_opt(dev, false);

	return 0;
}
EXPORT_SYMBOL_GPL(mt792xu_dma_init);

int mt792xu_wfsys_reset(struct mt792x_dev *dev)
{
	u32 val;
	int i;

	mt792xu_epctl_rst_opt(dev, false);

	val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
	val |= MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
	mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);

	usleep_range(10, 20);

	val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
	val &= ~MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
	mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);

	mt792xu_uhw_wr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS_SEL, 0);
	for (i = 0; i < MT792x_WFSYS_INIT_RETRY_COUNT; i++) {
		val = mt792xu_uhw_rr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS);
		if (val & MT_UDMA_CONN_WFSYS_INIT_DONE)
			break;

		msleep(100);
	}

	if (i == MT792x_WFSYS_INIT_RETRY_COUNT)
		return -ETIMEDOUT;

	return 0;
}
EXPORT_SYMBOL_GPL(mt792xu_wfsys_reset);

int mt792xu_init_reset(struct mt792x_dev *dev)
{
	set_bit(MT76_RESET, &dev->mphy.state);

	wake_up(&dev->mt76.mcu.wait);
	skb_queue_purge(&dev->mt76.mcu.res_q);

	mt76u_stop_rx(&dev->mt76);
	mt76u_stop_tx(&dev->mt76);

	mt792xu_wfsys_reset(dev);

	clear_bit(MT76_RESET, &dev->mphy.state);

	return mt76u_resume_rx(&dev->mt76);
}
EXPORT_SYMBOL_GPL(mt792xu_init_reset);

void mt792xu_stop(struct ieee80211_hw *hw)
{
	struct mt792x_dev *dev = mt792x_hw_dev(hw);

	mt76u_stop_tx(&dev->mt76);
	mt792x_stop(hw);
}
EXPORT_SYMBOL_GPL(mt792xu_stop);

void mt792xu_disconnect(struct usb_interface *usb_intf)
{
	struct mt792x_dev *dev = usb_get_intfdata(usb_intf);

	cancel_work_sync(&dev->init_work);
	if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
		return;

	mt76_unregister_device(&dev->mt76);
	mt792xu_cleanup(dev);

	usb_set_intfdata(usb_intf, NULL);
	usb_put_dev(interface_to_usbdev(usb_intf));

	mt76_free_device(&dev->mt76);
}
EXPORT_SYMBOL_GPL(mt792xu_disconnect);

MODULE_DESCRIPTION("MediaTek MT792x USB helpers");
MODULE_LICENSE("Dual BSD/GPL");
MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
Commit	Line	Data
0d2afe09	1	// SPDX-License-Identifier: ISC
d28e1a48	2	/* Copyright (C) 2023 MediaTek Inc.
0d2afe09 LB	3	*
	4	* Author: Lorenzo Bianconi <lorenzo@kernel.org>
	5	*/
	6
	7	#include <linux/kernel.h>
	8	#include <linux/module.h>
	9	#include <linux/usb.h>
	10
d28e1a48 LB	11	#include "mt792x.h"
d28e1a48 LB	12	#include "mt76_connac2_mac.h"
0d2afe09	13
d28e1a48 LB	14	u32 mt792xu_rr(struct mt76_dev *dev, u32 addr)
	15	{
	16	u32 ret;
	17
	18	mutex_lock(&dev->usb.usb_ctrl_mtx);
	19	ret = ___mt76u_rr(dev, MT_VEND_READ_EXT,
	20	USB_DIR_IN \| MT_USB_TYPE_VENDOR, addr);
	21	mutex_unlock(&dev->usb.usb_ctrl_mtx);
	22
	23	return ret;
	24	}
	25	EXPORT_SYMBOL_GPL(mt792xu_rr);
	26
	27	void mt792xu_wr(struct mt76_dev *dev, u32 addr, u32 val)
	28	{
	29	mutex_lock(&dev->usb.usb_ctrl_mtx);
	30	___mt76u_wr(dev, MT_VEND_WRITE_EXT,
	31	USB_DIR_OUT \| MT_USB_TYPE_VENDOR, addr, val);
	32	mutex_unlock(&dev->usb.usb_ctrl_mtx);
	33	}
	34	EXPORT_SYMBOL_GPL(mt792xu_wr);
	35
	36	u32 mt792xu_rmw(struct mt76_dev *dev, u32 addr, u32 mask, u32 val)
	37	{
	38	mutex_lock(&dev->usb.usb_ctrl_mtx);
	39	val \|= ___mt76u_rr(dev, MT_VEND_READ_EXT,
	40	USB_DIR_IN \| MT_USB_TYPE_VENDOR, addr) & ~mask;
	41	___mt76u_wr(dev, MT_VEND_WRITE_EXT,
	42	USB_DIR_OUT \| MT_USB_TYPE_VENDOR, addr, val);
	43	mutex_unlock(&dev->usb.usb_ctrl_mtx);
	44
	45	return val;
	46	}
	47	EXPORT_SYMBOL_GPL(mt792xu_rmw);
	48
	49	void mt792xu_copy(struct mt76_dev dev, u32 offset, const void data, int len)
	50	{
	51	struct mt76_usb *usb = &dev->usb;
	52	int ret, i = 0, batch_len;
	53	const u8 *val = data;
	54
	55	len = round_up(len, 4);
	56
	57	mutex_lock(&usb->usb_ctrl_mtx);
	58	while (i < len) {
	59	batch_len = min_t(int, usb->data_len, len - i);
	60	memcpy(usb->data, val + i, batch_len);
	61	ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT,
	62	USB_DIR_OUT \| MT_USB_TYPE_VENDOR,
	63	(offset + i) >> 16, offset + i,
	64	usb->data, batch_len);
	65	if (ret < 0)
	66	break;
	67
	68	i += batch_len;
	69	}
	70	mutex_unlock(&usb->usb_ctrl_mtx);
	71	}
	72	EXPORT_SYMBOL_GPL(mt792xu_copy);
	73
	74	int mt792xu_mcu_power_on(struct mt792x_dev *dev)
	75	{
	76	int ret;
	77
78	ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON,
79	USB_DIR_OUT \| MT_USB_TYPE_VENDOR,
80	0x0, 0x1, NULL, 0);
81	if (ret)
82	return ret;
83
84	if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON,
85	MT_TOP_MISC2_FW_PWR_ON, 500)) {
86	dev_err(dev->mt76.dev, "Timeout for power on\n");
87	ret = -EIO;
88	}
89
90	return ret;
91	}
92	EXPORT_SYMBOL_GPL(mt792xu_mcu_power_on);
93
fc80731b	94	static void mt792xu_cleanup(struct mt792x_dev *dev)
d28e1a48 LB	95	{
	96	clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
	97	mt792xu_wfsys_reset(dev);
	98	skb_queue_purge(&dev->mt76.mcu.res_q);
	99	mt76u_queues_deinit(&dev->mt76);
	100	}
d28e1a48 LB	101
d28e1a48 LB	102	static u32 mt792xu_uhw_rr(struct mt76_dev *dev, u32 addr)
0d2afe09 LB	103	{
	104	u32 ret;
	105
	106	mutex_lock(&dev->usb.usb_ctrl_mtx);
	107	ret = ___mt76u_rr(dev, MT_VEND_DEV_MODE,
	108	USB_DIR_IN \| MT_USB_TYPE_UHW_VENDOR, addr);
	109	mutex_unlock(&dev->usb.usb_ctrl_mtx);
	110
	111	return ret;
	112	}
	113
d28e1a48	114	static void mt792xu_uhw_wr(struct mt76_dev *dev, u32 addr, u32 val)
0d2afe09 LB	115	{
	116	mutex_lock(&dev->usb.usb_ctrl_mtx);
	117	___mt76u_wr(dev, MT_VEND_WRITE,
	118	USB_DIR_OUT \| MT_USB_TYPE_UHW_VENDOR, addr, val);
	119	mutex_unlock(&dev->usb.usb_ctrl_mtx);
	120	}
	121
d28e1a48	122	static void mt792xu_dma_prefetch(struct mt792x_dev *dev)
0d2afe09 LB	123	{
	124	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
	125	MT_WPDMA0_MAX_CNT_MASK, 4);
	126	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
	127	MT_WPDMA0_BASE_PTR_MASK, 0x80);
	128
	129	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
	130	MT_WPDMA0_MAX_CNT_MASK, 4);
	131	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
	132	MT_WPDMA0_BASE_PTR_MASK, 0xc0);
	133
	134	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
	135	MT_WPDMA0_MAX_CNT_MASK, 4);
	136	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
	137	MT_WPDMA0_BASE_PTR_MASK, 0x100);
	138
	139	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
	140	MT_WPDMA0_MAX_CNT_MASK, 4);
	141	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
	142	MT_WPDMA0_BASE_PTR_MASK, 0x140);
	143
	144	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
	145	MT_WPDMA0_MAX_CNT_MASK, 4);
	146	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
	147	MT_WPDMA0_BASE_PTR_MASK, 0x180);
	148
	149	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
	150	MT_WPDMA0_MAX_CNT_MASK, 4);
	151	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
	152	MT_WPDMA0_BASE_PTR_MASK, 0x280);
	153
	154	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
	155	MT_WPDMA0_MAX_CNT_MASK, 4);
	156	mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
	157	MT_WPDMA0_BASE_PTR_MASK, 0x2c0);
	158	}
	159
d28e1a48	160	static void mt792xu_wfdma_init(struct mt792x_dev *dev)
0d2afe09	161	{
d28e1a48	162	mt792xu_dma_prefetch(dev);
0d2afe09 LB	163
	164	mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO);
	165	mt76_set(dev, MT_UWFDMA0_GLO_CFG,
	166	MT_WFDMA0_GLO_CFG_OMIT_TX_INFO \|
	167	MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 \|
	168	MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL \|
	169	MT_WFDMA0_GLO_CFG_TX_DMA_EN \|
	170	MT_WFDMA0_GLO_CFG_RX_DMA_EN);
	171
	172	/* disable dmashdl */
	173	mt76_clear(dev, MT_UWFDMA0_GLO_CFG_EXT0,
	174	MT_WFDMA0_CSR_TX_DMASHDL_ENABLE);
	175	mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS);
	176
	177	mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
	178	}
	179
d28e1a48	180	static int mt792xu_dma_rx_evt_ep4(struct mt792x_dev *dev)
0d2afe09 LB	181	{
	182	if (!mt76_poll(dev, MT_UWFDMA0_GLO_CFG,
	183	MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000))
	184	return -ETIMEDOUT;
	185
	186	mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
	187	mt76_set(dev, MT_WFDMA_HOST_CONFIG,
	188	MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN);
	189	mt76_set(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
	190
	191	return 0;
	192	}
	193
d28e1a48	194	static void mt792xu_epctl_rst_opt(struct mt792x_dev *dev, bool reset)
0d2afe09 LB	195	{
	196	u32 val;
	197
	198	/* usb endpoint reset opt
	199	* bits[4,9]: out blk ep 4-9
	200	* bits[20,21]: in blk ep 4-5
	201	* bits[22]: in int ep 6
	202	*/
d28e1a48	203	val = mt792xu_uhw_rr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT);
0d2afe09 LB	204	if (reset)
	205	val \|= GENMASK(9, 4) \| GENMASK(22, 20);
	206	else
	207	val &= ~(GENMASK(9, 4) \| GENMASK(22, 20));
d28e1a48	208	mt792xu_uhw_wr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT, val);
0d2afe09 LB	209	}
0d2afe09 LB	210
d28e1a48	211	int mt792xu_dma_init(struct mt792x_dev *dev, bool resume)
0d2afe09 LB	212	{
	213	int err;
	214
d28e1a48	215	mt792xu_wfdma_init(dev);
0d2afe09 LB	216
	217	mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH);
	218
	219	mt76_set(dev, MT_UDMA_WLCFG_0,
	220	MT_WL_RX_EN \| MT_WL_TX_EN \|
	221	MT_WL_RX_MPSZ_PAD0 \| MT_TICK_1US_EN);
	222	mt76_clear(dev, MT_UDMA_WLCFG_0,
	223	MT_WL_RX_AGG_TO \| MT_WL_RX_AGG_LMT);
	224	mt76_clear(dev, MT_UDMA_WLCFG_1, MT_WL_RX_AGG_PKT_LMT);
	225
df3e4143 LB	226	if (resume)
	227	return 0;
	228
d28e1a48	229	err = mt792xu_dma_rx_evt_ep4(dev);
0d2afe09 LB	230	if (err)
	231	return err;
	232
d28e1a48	233	mt792xu_epctl_rst_opt(dev, false);
0d2afe09 LB	234
	235	return 0;
	236	}
d28e1a48	237	EXPORT_SYMBOL_GPL(mt792xu_dma_init);
0d2afe09	238
d28e1a48	239	int mt792xu_wfsys_reset(struct mt792x_dev *dev)
0d2afe09 LB	240	{
	241	u32 val;
	242	int i;
	243
d28e1a48	244	mt792xu_epctl_rst_opt(dev, false);
0d2afe09	245
d28e1a48	246	val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
0d2afe09	247	val \|= MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
d28e1a48	248	mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
0d2afe09 LB	249
	250	usleep_range(10, 20);
	251
d28e1a48	252	val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
0d2afe09	253	val &= ~MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
d28e1a48	254	mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
0d2afe09	255
d28e1a48	256	mt792xu_uhw_wr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS_SEL, 0);
1c025496	257	for (i = 0; i < MT792x_WFSYS_INIT_RETRY_COUNT; i++) {
d28e1a48	258	val = mt792xu_uhw_rr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS);
0d2afe09 LB	259	if (val & MT_UDMA_CONN_WFSYS_INIT_DONE)
	260	break;
	261
	262	msleep(100);
	263	}
	264
1c025496	265	if (i == MT792x_WFSYS_INIT_RETRY_COUNT)
0d2afe09 LB	266	return -ETIMEDOUT;
	267
	268	return 0;
	269	}
d28e1a48	270	EXPORT_SYMBOL_GPL(mt792xu_wfsys_reset);
0d2afe09	271
d28e1a48	272	int mt792xu_init_reset(struct mt792x_dev *dev)
0d2afe09 LB	273	{
	274	set_bit(MT76_RESET, &dev->mphy.state);
	275
	276	wake_up(&dev->mt76.mcu.wait);
56054087	277	skb_queue_purge(&dev->mt76.mcu.res_q);
0d2afe09 LB	278
	279	mt76u_stop_rx(&dev->mt76);
	280	mt76u_stop_tx(&dev->mt76);
	281
d28e1a48	282	mt792xu_wfsys_reset(dev);
0d2afe09 LB	283
	284	clear_bit(MT76_RESET, &dev->mphy.state);
	285
	286	return mt76u_resume_rx(&dev->mt76);
	287	}
d28e1a48	288	EXPORT_SYMBOL_GPL(mt792xu_init_reset);
0d2afe09	289
5ab7d466 LB	290	void mt792xu_stop(struct ieee80211_hw *hw)
	291	{
	292	struct mt792x_dev *dev = mt792x_hw_dev(hw);
	293
	294	mt76u_stop_tx(&dev->mt76);
	295	mt792x_stop(hw);
	296	}
	297	EXPORT_SYMBOL_GPL(mt792xu_stop);
	298
fc80731b LB	299	void mt792xu_disconnect(struct usb_interface *usb_intf)
	300	{
	301	struct mt792x_dev *dev = usb_get_intfdata(usb_intf);
	302
	303	cancel_work_sync(&dev->init_work);
	304	if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
	305	return;
	306
	307	mt76_unregister_device(&dev->mt76);
	308	mt792xu_cleanup(dev);
	309
	310	usb_set_intfdata(usb_intf, NULL);
	311	usb_put_dev(interface_to_usbdev(usb_intf));
	312
	313	mt76_free_device(&dev->mt76);
	314	}
	315	EXPORT_SYMBOL_GPL(mt792xu_disconnect);
	316
f3f8f050	317	MODULE_DESCRIPTION("MediaTek MT792x USB helpers");
d28e1a48 LB	318	MODULE_LICENSE("Dual BSD/GPL");
d28e1a48 LB	319	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");