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6181bf2a LB |
1 | /* |
2 | * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #ifndef __MT76x02_DMA_H | |
18 | #define __MT76x02_DMA_H | |
19 | ||
a23fde09 | 20 | #include "mt76x02.h" |
6181bf2a LB |
21 | #include "dma.h" |
22 | ||
23 | #define MT_TXD_INFO_LEN GENMASK(15, 0) | |
24 | #define MT_TXD_INFO_NEXT_VLD BIT(16) | |
25 | #define MT_TXD_INFO_TX_BURST BIT(17) | |
26 | #define MT_TXD_INFO_80211 BIT(19) | |
27 | #define MT_TXD_INFO_TSO BIT(20) | |
28 | #define MT_TXD_INFO_CSO BIT(21) | |
29 | #define MT_TXD_INFO_WIV BIT(24) | |
30 | #define MT_TXD_INFO_QSEL GENMASK(26, 25) | |
31 | #define MT_TXD_INFO_DPORT GENMASK(29, 27) | |
32 | #define MT_TXD_INFO_TYPE GENMASK(31, 30) | |
33 | ||
34 | #define MT_RX_FCE_INFO_LEN GENMASK(13, 0) | |
35 | #define MT_RX_FCE_INFO_SELF_GEN BIT(15) | |
36 | #define MT_RX_FCE_INFO_CMD_SEQ GENMASK(19, 16) | |
37 | #define MT_RX_FCE_INFO_EVT_TYPE GENMASK(23, 20) | |
38 | #define MT_RX_FCE_INFO_PCIE_INTR BIT(24) | |
39 | #define MT_RX_FCE_INFO_QSEL GENMASK(26, 25) | |
40 | #define MT_RX_FCE_INFO_D_PORT GENMASK(29, 27) | |
41 | #define MT_RX_FCE_INFO_TYPE GENMASK(31, 30) | |
42 | ||
43 | /* MCU request message header */ | |
44 | #define MT_MCU_MSG_LEN GENMASK(15, 0) | |
45 | #define MT_MCU_MSG_CMD_SEQ GENMASK(19, 16) | |
46 | #define MT_MCU_MSG_CMD_TYPE GENMASK(26, 20) | |
47 | #define MT_MCU_MSG_PORT GENMASK(29, 27) | |
48 | #define MT_MCU_MSG_TYPE GENMASK(31, 30) | |
49 | #define MT_MCU_MSG_TYPE_CMD BIT(30) | |
50 | ||
b2eabd4c LB |
51 | #define MT_RX_HEADROOM 32 |
52 | #define MT76X02_RX_RING_SIZE 256 | |
53 | ||
6181bf2a LB |
54 | enum dma_msg_port { |
55 | WLAN_PORT, | |
56 | CPU_RX_PORT, | |
57 | CPU_TX_PORT, | |
58 | HOST_PORT, | |
59 | VIRTUAL_CPU_RX_PORT, | |
60 | VIRTUAL_CPU_TX_PORT, | |
61 | DISCARD, | |
62 | }; | |
63 | ||
5f1fa4cd LB |
64 | static inline bool |
65 | mt76x02_wait_for_wpdma(struct mt76_dev *dev, int timeout) | |
66 | { | |
67 | return __mt76_poll(dev, MT_WPDMA_GLO_CFG, | |
68 | MT_WPDMA_GLO_CFG_TX_DMA_BUSY | | |
69 | MT_WPDMA_GLO_CFG_RX_DMA_BUSY, | |
70 | 0, timeout); | |
71 | } | |
72 | ||
a23fde09 LB |
73 | int mt76x02_dma_init(struct mt76x02_dev *dev); |
74 | void mt76x02_dma_disable(struct mt76x02_dev *dev); | |
53d20fdb | 75 | void mt76x02_dma_cleanup(struct mt76x02_dev *dev); |
20885649 | 76 | |
6181bf2a | 77 | #endif /* __MT76x02_DMA_H */ |