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mt76: mt7615: rearrange locking in mt7615_config
[linux-2.6-block.git] / drivers / net / wireless / mediatek / mt76 / mt7615 / mac.c
CommitLineData
04b8e659
RL		 1// SPDX-License-Identifier: ISC
2/* Copyright (C) 2019 MediaTek Inc.
3 *
4 * Author: Ryder Lee <ryder.lee@mediatek.com>
5 * Roy Luo <royluo@google.com>
6 * Felix Fietkau <nbd@nbd.name>
7 * Lorenzo Bianconi <lorenzo@kernel.org>
8 */
9
10#include <linux/etherdevice.h>
11#include <linux/timekeeping.h>
12#include "mt7615.h"
13#include "../dma.h"
14#include "mac.h"
15
16static struct mt76_wcid *mt7615_rx_get_wcid(struct mt7615_dev *dev,
17 u8 idx, bool unicast)
18{
19 struct mt7615_sta *sta;
20 struct mt76_wcid *wcid;
21
22 if (idx >= ARRAY_SIZE(dev->mt76.wcid))
23 return NULL;
24
25 wcid = rcu_dereference(dev->mt76.wcid[idx]);
26 if (unicast || !wcid)
27 return wcid;
28
29 if (!wcid->sta)
30 return NULL;
31
32 sta = container_of(wcid, struct mt7615_sta, wcid);
33 if (!sta->vif)
34 return NULL;
35
36 return &sta->vif->sta.wcid;
37}
38
39static int mt7615_get_rate(struct mt7615_dev *dev,
40 struct ieee80211_supported_band *sband,
41 int idx, bool cck)
42{
43 int offset = 0;
44 int len = sband->n_bitrates;
45 int i;
46
47 if (cck) {
48 if (sband == &dev->mt76.sband_5g.sband)
49 return 0;
50
51 idx &= ~BIT(2); /* short preamble */
52 } else if (sband == &dev->mt76.sband_2g.sband) {
53 offset = 4;
54 }
55
56 for (i = offset; i < len; i++) {
57 if ((sband->bitrates[i].hw_value & GENMASK(7, 0)) == idx)
58 return i;
59 }
60
61 return 0;
62}
63
04b8e659
RL		 64int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb)
65{
66 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
67 struct ieee80211_supported_band *sband;
68 struct ieee80211_hdr *hdr;
69 __le32 *rxd = (__le32 *)skb->data;
70 u32 rxd0 = le32_to_cpu(rxd[0]);
71 u32 rxd1 = le32_to_cpu(rxd[1]);
72 u32 rxd2 = le32_to_cpu(rxd[2]);
73 bool unicast, remove_pad, insert_ccmp_hdr = false;
74 int i, idx;
75
2dcb79cd
LB		 76 if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state))
77 return -EINVAL;
78
04b8e659
RL		 79 memset(status, 0, sizeof(*status));
80
81 unicast = (rxd1 & MT_RXD1_NORMAL_ADDR_TYPE) == MT_RXD1_NORMAL_U2M;
82 idx = FIELD_GET(MT_RXD2_NORMAL_WLAN_IDX, rxd2);
83 status->wcid = mt7615_rx_get_wcid(dev, idx, unicast);
84
85 /* TODO: properly support DBDC */
86 status->freq = dev->mt76.chandef.chan->center_freq;
87 status->band = dev->mt76.chandef.chan->band;
88 if (status->band == NL80211_BAND_5GHZ)
89 sband = &dev->mt76.sband_5g.sband;
90 else
91 sband = &dev->mt76.sband_2g.sband;
92
93 if (rxd2 & MT_RXD2_NORMAL_FCS_ERR)
94 status->flag |= RX_FLAG_FAILED_FCS_CRC;
95
96 if (rxd2 & MT_RXD2_NORMAL_TKIP_MIC_ERR)
97 status->flag |= RX_FLAG_MMIC_ERROR;
98
99 if (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2) != 0 &&
100 !(rxd2 & (MT_RXD2_NORMAL_CLM | MT_RXD2_NORMAL_CM))) {
101 status->flag |= RX_FLAG_DECRYPTED;
102 status->flag |= RX_FLAG_IV_STRIPPED;
103 status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED;
104 }
105
106 remove_pad = rxd1 & MT_RXD1_NORMAL_HDR_OFFSET;
107
108 if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR)
109 return -EINVAL;
110
111 if (!sband->channels)
112 return -EINVAL;
113
114 rxd += 4;
115 if (rxd0 & MT_RXD0_NORMAL_GROUP_4) {
116 rxd += 4;
117 if ((u8 *)rxd - skb->data >= skb->len)
118 return -EINVAL;
119 }
120
121 if (rxd0 & MT_RXD0_NORMAL_GROUP_1) {
122 u8 *data = (u8 *)rxd;
123
124 if (status->flag & RX_FLAG_DECRYPTED) {
125 status->iv[0] = data[5];
126 status->iv[1] = data[4];
127 status->iv[2] = data[3];
128 status->iv[3] = data[2];
129 status->iv[4] = data[1];
130 status->iv[5] = data[0];
131
132 insert_ccmp_hdr = FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2);
133 }
134 rxd += 4;
135 if ((u8 *)rxd - skb->data >= skb->len)
136 return -EINVAL;
137 }
138
139 if (rxd0 & MT_RXD0_NORMAL_GROUP_2) {
140 rxd += 2;
141 if ((u8 *)rxd - skb->data >= skb->len)
142 return -EINVAL;
143 }
144
145 if (rxd0 & MT_RXD0_NORMAL_GROUP_3) {
146 u32 rxdg0 = le32_to_cpu(rxd[0]);
147 u32 rxdg1 = le32_to_cpu(rxd[1]);
148 u8 stbc = FIELD_GET(MT_RXV1_HT_STBC, rxdg0);
149 bool cck = false;
150
151 i = FIELD_GET(MT_RXV1_TX_RATE, rxdg0);
152 switch (FIELD_GET(MT_RXV1_TX_MODE, rxdg0)) {
153 case MT_PHY_TYPE_CCK:
154 cck = true;
155 /* fall through */
156 case MT_PHY_TYPE_OFDM:
157 i = mt7615_get_rate(dev, sband, i, cck);
158 break;
159 case MT_PHY_TYPE_HT_GF:
160 case MT_PHY_TYPE_HT:
161 status->encoding = RX_ENC_HT;
162 if (i > 31)
163 return -EINVAL;
164 break;
165 case MT_PHY_TYPE_VHT:
166 status->nss = FIELD_GET(MT_RXV2_NSTS, rxdg1) + 1;
167 status->encoding = RX_ENC_VHT;
168 break;
169 default:
170 return -EINVAL;
171 }
172 status->rate_idx = i;
173
174 switch (FIELD_GET(MT_RXV1_FRAME_MODE, rxdg0)) {
175 case MT_PHY_BW_20:
176 break;
177 case MT_PHY_BW_40:
178 status->bw = RATE_INFO_BW_40;
179 break;
180 case MT_PHY_BW_80:
181 status->bw = RATE_INFO_BW_80;
182 break;
183 case MT_PHY_BW_160:
184 status->bw = RATE_INFO_BW_160;
185 break;
186 default:
187 return -EINVAL;
188 }
189
190 if (rxdg0 & MT_RXV1_HT_SHORT_GI)
191 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
192 if (rxdg0 & MT_RXV1_HT_AD_CODE)
193 status->enc_flags |= RX_ENC_FLAG_LDPC;
194
195 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
196
197 /* TODO: RSSI */
198 rxd += 6;
199 if ((u8 *)rxd - skb->data >= skb->len)
200 return -EINVAL;
201 }
202
203 skb_pull(skb, (u8 *)rxd - skb->data + 2 * remove_pad);
204
205 if (insert_ccmp_hdr) {
206 u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1);
207
eadfd98f 208 mt76_insert_ccmp_hdr(skb, key_id);
04b8e659
RL		 209 }
210
211 hdr = (struct ieee80211_hdr *)skb->data;
212 if (!status->wcid || !ieee80211_is_data_qos(hdr->frame_control))
213 return 0;
214
215 status->aggr = unicast &&
216 !ieee80211_is_qos_nullfunc(hdr->frame_control);
217 status->tid = *ieee80211_get_qos_ctl(hdr) & IEEE80211_QOS_CTL_TID_MASK;
e8027946 218 status->seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl));
04b8e659
RL		 219
220 return 0;
221}
222
223void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps)
224{
225}
226
227void mt7615_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid,
228 struct mt76_queue_entry *e)
229{
230 if (!e->txwi) {
231 dev_kfree_skb_any(e->skb);
232 return;
233 }
234
235 /* error path */
236 if (e->skb == DMA_DUMMY_DATA) {
237 struct mt76_txwi_cache *t;
238 struct mt7615_dev *dev;
239 struct mt7615_txp *txp;
240 u8 *txwi_ptr;
241
242 txwi_ptr = mt76_get_txwi_ptr(mdev, e->txwi);
243 txp = (struct mt7615_txp *)(txwi_ptr + MT_TXD_SIZE);
244 dev = container_of(mdev, struct mt7615_dev, mt76);
245
246 spin_lock_bh(&dev->token_lock);
247 t = idr_remove(&dev->token, le16_to_cpu(txp->token));
248 spin_unlock_bh(&dev->token_lock);
249 e->skb = t ? t->skb : NULL;
250 }
251
252 if (e->skb)
253 mt76_tx_complete_skb(mdev, e->skb);
254}
255
256u16 mt7615_mac_tx_rate_val(struct mt7615_dev *dev,
257 const struct ieee80211_tx_rate *rate,
258 bool stbc, u8 *bw)
259{
260 u8 phy, nss, rate_idx;
261 u16 rateval;
262
263 *bw = 0;
264
265 if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
266 rate_idx = ieee80211_rate_get_vht_mcs(rate);
267 nss = ieee80211_rate_get_vht_nss(rate);
268 phy = MT_PHY_TYPE_VHT;
269 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
270 *bw = 1;
271 else if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH)
272 *bw = 2;
273 else if (rate->flags & IEEE80211_TX_RC_160_MHZ_WIDTH)
274 *bw = 3;
275 } else if (rate->flags & IEEE80211_TX_RC_MCS) {
276 rate_idx = rate->idx;
277 nss = 1 + (rate->idx >> 3);
278 phy = MT_PHY_TYPE_HT;
279 if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)
280 phy = MT_PHY_TYPE_HT_GF;
281 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
282 *bw = 1;
283 } else {
284 const struct ieee80211_rate *r;
285 int band = dev->mt76.chandef.chan->band;
286 u16 val;
287
288 nss = 1;
289 r = &mt76_hw(dev)->wiphy->bands[band]->bitrates[rate->idx];
290 if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
291 val = r->hw_value_short;
292 else
293 val = r->hw_value;
294
295 phy = val >> 8;
296 rate_idx = val & 0xff;
297 }
298
299 rateval = (FIELD_PREP(MT_TX_RATE_IDX, rate_idx) |
300 FIELD_PREP(MT_TX_RATE_MODE, phy) |
301 FIELD_PREP(MT_TX_RATE_NSS, nss - 1));
302
303 if (stbc && nss == 1)
304 rateval |= MT_TX_RATE_STBC;
305
306 return rateval;
307}
308
309int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
310 struct sk_buff *skb, struct mt76_wcid *wcid,
311 struct ieee80211_sta *sta, int pid,
312 struct ieee80211_key_conf *key)
313{
314 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
315 struct ieee80211_tx_rate *rate = &info->control.rates[0];
316 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
317 struct ieee80211_vif *vif = info->control.vif;
318 int tx_count = 8;
319 u8 fc_type, fc_stype, p_fmt, q_idx, omac_idx = 0;
e8027946 320 __le16 fc = hdr->frame_control;
04b8e659
RL		 321 u16 seqno = 0;
322 u32 val;
323
324 if (vif) {
325 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
326
327 omac_idx = mvif->omac_idx;
328 }
329
330 if (sta) {
331 struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
332
333 tx_count = msta->rate_count;
334 }
335
e8027946
RL		 336 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
337 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
04b8e659
RL		 338
339 if (ieee80211_is_data(fc)) {
340 q_idx = skb_get_queue_mapping(skb);
341 p_fmt = MT_TX_TYPE_CT;
342 } else if (ieee80211_is_beacon(fc)) {
343 q_idx = MT_LMAC_BCN0;
344 p_fmt = MT_TX_TYPE_FW;
345 } else {
346 q_idx = MT_LMAC_ALTX0;
347 p_fmt = MT_TX_TYPE_CT;
348 }
349
350 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + MT_TXD_SIZE) |
351 FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_LMAC) |
352 FIELD_PREP(MT_TXD0_Q_IDX, q_idx);
353 txwi[0] = cpu_to_le32(val);
354
355 val = MT_TXD1_LONG_FORMAT |
356 FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |
357 FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |
358 FIELD_PREP(MT_TXD1_HDR_INFO,
359 ieee80211_get_hdrlen_from_skb(skb) / 2) |
360 FIELD_PREP(MT_TXD1_TID,
361 skb->priority & IEEE80211_QOS_CTL_TID_MASK) |
362 FIELD_PREP(MT_TXD1_PKT_FMT, p_fmt) |
363 FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);
364 txwi[1] = cpu_to_le32(val);
365
366 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
367 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) |
368 FIELD_PREP(MT_TXD2_MULTICAST,
369 is_multicast_ether_addr(hdr->addr1));
370 txwi[2] = cpu_to_le32(val);
371
372 if (!(info->flags & IEEE80211_TX_CTL_AMPDU))
373 txwi[2] |= cpu_to_le32(MT_TXD2_BA_DISABLE);
374
375 txwi[4] = 0;
376 txwi[6] = 0;
377
378 if (rate->idx >= 0 && rate->count &&
379 !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
380 bool stbc = info->flags & IEEE80211_TX_CTL_STBC;
381 u8 bw;
382 u16 rateval = mt7615_mac_tx_rate_val(dev, rate, stbc, &bw);
383
384 txwi[2] |= cpu_to_le32(MT_TXD2_FIX_RATE);
385
386 val = MT_TXD6_FIXED_BW |
387 FIELD_PREP(MT_TXD6_BW, bw) |
388 FIELD_PREP(MT_TXD6_TX_RATE, rateval);
389 txwi[6] |= cpu_to_le32(val);
390
391 if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
392 txwi[6] |= cpu_to_le32(MT_TXD6_SGI);
393
394 if (info->flags & IEEE80211_TX_CTL_LDPC)
395 txwi[6] |= cpu_to_le32(MT_TXD6_LDPC);
396
397 if (!(rate->flags & (IEEE80211_TX_RC_MCS |
398 IEEE80211_TX_RC_VHT_MCS)))
399 txwi[2] |= cpu_to_le32(MT_TXD2_BA_DISABLE);
400
401 tx_count = rate->count;
402 }
403
404 if (!ieee80211_is_beacon(fc)) {
405 val = MT_TXD5_TX_STATUS_HOST | MT_TXD5_SW_POWER_MGMT |
406 FIELD_PREP(MT_TXD5_PID, pid);
407 txwi[5] = cpu_to_le32(val);
408 } else {
409 txwi[5] = 0;
410 /* use maximum tx count for beacons */
411 tx_count = 0x1f;
412 }
413
414 val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, tx_count);
415 if (ieee80211_is_data_qos(hdr->frame_control)) {
416 seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl));
417 val |= MT_TXD3_SN_VALID;
418 } else if (ieee80211_is_back_req(hdr->frame_control)) {
419 struct ieee80211_bar *bar = (struct ieee80211_bar *)skb->data;
420
421 seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(bar->start_seq_num));
422 val |= MT_TXD3_SN_VALID;
423 }
424 val |= FIELD_PREP(MT_TXD3_SEQ, seqno);
425
426 txwi[3] = cpu_to_le32(val);
427
428 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
429 txwi[3] |= cpu_to_le32(MT_TXD3_NO_ACK);
430
431 if (key)
432 txwi[3] |= cpu_to_le32(MT_TXD3_PROTECT_FRAME);
433
434 txwi[7] = FIELD_PREP(MT_TXD7_TYPE, fc_type) |
435 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);
436
437 return 0;
438}
439
440void mt7615_txp_skb_unmap(struct mt76_dev *dev,
441 struct mt76_txwi_cache *t)
442{
443 struct mt7615_txp *txp;
444 u8 *txwi;
445 int i;
446
447 txwi = mt76_get_txwi_ptr(dev, t);
448 txp = (struct mt7615_txp *)(txwi + MT_TXD_SIZE);
449 for (i = 1; i < txp->nbuf; i++)
450 dma_unmap_single(dev->dev, le32_to_cpu(txp->buf[i]),
e8027946 451 le16_to_cpu(txp->len[i]), DMA_TO_DEVICE);
04b8e659
RL		 452}
453
454int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
455 enum mt76_txq_id qid, struct mt76_wcid *wcid,
456 struct ieee80211_sta *sta,
457 struct mt76_tx_info *tx_info)
458{
459 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data;
460 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
461 struct mt7615_sta *msta = container_of(wcid, struct mt7615_sta, wcid);
462 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
463 struct ieee80211_key_conf *key = info->control.hw_key;
464 struct ieee80211_vif *vif = info->control.vif;
465 int i, pid, id, nbuf = tx_info->nbuf - 1;
466 u8 *txwi = (u8 *)txwi_ptr;
467 struct mt76_txwi_cache *t;
468 struct mt7615_txp *txp;
469
470 if (!wcid)
471 wcid = &dev->mt76.global_wcid;
472
473 pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb);
474
475 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) {
476 spin_lock_bh(&dev->mt76.lock);
477 msta->rate_probe = true;
478 mt7615_mcu_set_rates(dev, msta, &info->control.rates[0],
479 msta->rates);
480 spin_unlock_bh(&dev->mt76.lock);
481 }
482
483 mt7615_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, sta,
484 pid, key);
485
486 txp = (struct mt7615_txp *)(txwi + MT_TXD_SIZE);
487 for (i = 0; i < nbuf; i++) {
488 txp->buf[i] = cpu_to_le32(tx_info->buf[i + 1].addr);
e8027946 489 txp->len[i] = cpu_to_le16(tx_info->buf[i + 1].len);
04b8e659
RL		 490 }
491 txp->nbuf = nbuf;
492
493 /* pass partial skb header to fw */
494 tx_info->buf[1].len = MT_CT_PARSE_LEN;
495 tx_info->nbuf = MT_CT_DMA_BUF_NUM;
496
497 txp->flags = cpu_to_le16(MT_CT_INFO_APPLY_TXD);
498
499 if (!key)
500 txp->flags |= cpu_to_le16(MT_CT_INFO_NONE_CIPHER_FRAME);
501
502 if (ieee80211_is_mgmt(hdr->frame_control))
503 txp->flags |= cpu_to_le16(MT_CT_INFO_MGMT_FRAME);
504
505 if (vif) {
506 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
507
508 txp->bss_idx = mvif->idx;
509 }
510
511 t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size);
512 t->skb = tx_info->skb;
513
514 spin_lock_bh(&dev->token_lock);
515 id = idr_alloc(&dev->token, t, 0, MT7615_TOKEN_SIZE, GFP_ATOMIC);
516 spin_unlock_bh(&dev->token_lock);
517 if (id < 0)
518 return id;
519
520 txp->token = cpu_to_le16(id);
521 txp->rept_wds_wcid = 0xff;
522 tx_info->skb = DMA_DUMMY_DATA;
523
524 return 0;
525}
526
527static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta,
528 struct ieee80211_tx_info *info, __le32 *txs_data)
529{
530 struct ieee80211_supported_band *sband;
531 int i, idx, count, final_idx = 0;
532 bool fixed_rate, final_mpdu, ack_timeout;
533 bool probe, ampdu, cck = false;
534 u32 final_rate, final_rate_flags, final_nss, txs;
535 u8 pid;
536
537 fixed_rate = info->status.rates[0].count;
538 probe = !!(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
539
540 txs = le32_to_cpu(txs_data[1]);
541 final_mpdu = txs & MT_TXS1_ACKED_MPDU;
542 ampdu = !fixed_rate && (txs & MT_TXS1_AMPDU);
543
544 txs = le32_to_cpu(txs_data[3]);
545 count = FIELD_GET(MT_TXS3_TX_COUNT, txs);
546
547 txs = le32_to_cpu(txs_data[0]);
548 pid = FIELD_GET(MT_TXS0_PID, txs);
549 final_rate = FIELD_GET(MT_TXS0_TX_RATE, txs);
550 ack_timeout = txs & MT_TXS0_ACK_TIMEOUT;
551
552 if (!ampdu && (txs & MT_TXS0_RTS_TIMEOUT))
553 return false;
554
555 if (txs & MT_TXS0_QUEUE_TIMEOUT)
556 return false;
557
558 if (!ack_timeout)
559 info->flags |= IEEE80211_TX_STAT_ACK;
560
561 info->status.ampdu_len = 1;
562 info->status.ampdu_ack_len = !!(info->flags &
563 IEEE80211_TX_STAT_ACK);
564
565 if (ampdu || (info->flags & IEEE80211_TX_CTL_AMPDU))
566 info->flags |= IEEE80211_TX_STAT_AMPDU | IEEE80211_TX_CTL_AMPDU;
567
568 if (fixed_rate && !probe) {
569 info->status.rates[0].count = count;
570 goto out;
571 }
572
573 for (i = 0, idx = 0; i < ARRAY_SIZE(info->status.rates); i++) {
574 int cur_count = min_t(int, count, 2 * MT7615_RATE_RETRY);
575
576 if (!i && probe) {
577 cur_count = 1;
578 } else {
579 info->status.rates[i] = sta->rates[idx];
580 idx++;
581 }
582
583 if (i && info->status.rates[i].idx < 0) {
584 info->status.rates[i - 1].count += count;
585 break;
586 }
587
588 if (!count) {
589 info->status.rates[i].idx = -1;
590 break;
591 }
592
593 info->status.rates[i].count = cur_count;
594 final_idx = i;
595 count -= cur_count;
596 }
597
598out:
599 final_rate_flags = info->status.rates[final_idx].flags;
600
601 switch (FIELD_GET(MT_TX_RATE_MODE, final_rate)) {
602 case MT_PHY_TYPE_CCK:
603 cck = true;
604 /* fall through */
605 case MT_PHY_TYPE_OFDM:
606 if (dev->mt76.chandef.chan->band == NL80211_BAND_5GHZ)
607 sband = &dev->mt76.sband_5g.sband;
608 else
609 sband = &dev->mt76.sband_2g.sband;
610 final_rate &= MT_TX_RATE_IDX;
611 final_rate = mt7615_get_rate(dev, sband, final_rate, cck);
612 final_rate_flags = 0;
613 break;
614 case MT_PHY_TYPE_HT_GF:
615 case MT_PHY_TYPE_HT:
616 final_rate_flags |= IEEE80211_TX_RC_MCS;
617 final_rate &= MT_TX_RATE_IDX;
618 if (final_rate > 31)
619 return false;
620 break;
621 case MT_PHY_TYPE_VHT:
622 final_nss = FIELD_GET(MT_TX_RATE_NSS, final_rate);
623 final_rate_flags |= IEEE80211_TX_RC_VHT_MCS;
624 final_rate = (final_rate & MT_TX_RATE_IDX) | (final_nss << 4);
625 break;
626 default:
627 return false;
628 }
629
630 info->status.rates[final_idx].idx = final_rate;
631 info->status.rates[final_idx].flags = final_rate_flags;
632
633 return true;
634}
635
636static bool mt7615_mac_add_txs_skb(struct mt7615_dev *dev,
637 struct mt7615_sta *sta, int pid,
638 __le32 *txs_data)
639{
640 struct mt76_dev *mdev = &dev->mt76;
641 struct sk_buff_head list;
642 struct sk_buff *skb;
643
644 if (pid < MT_PACKET_ID_FIRST)
645 return false;
646
647 mt76_tx_status_lock(mdev, &list);
648 skb = mt76_tx_status_skb_get(mdev, &sta->wcid, pid, &list);
649 if (skb) {
650 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
651
652 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) {
653 spin_lock_bh(&dev->mt76.lock);
654 if (sta->rate_probe) {
655 mt7615_mcu_set_rates(dev, sta, NULL,
656 sta->rates);
657 sta->rate_probe = false;
658 }
659 spin_unlock_bh(&dev->mt76.lock);
660 }
661
662 if (!mt7615_fill_txs(dev, sta, info, txs_data)) {
663 ieee80211_tx_info_clear_status(info);
664 info->status.rates[0].idx = -1;
665 }
666
667 mt76_tx_status_skb_done(mdev, skb, &list);
668 }
669 mt76_tx_status_unlock(mdev, &list);
670
671 return !!skb;
672}
673
674void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data)
675{
676 struct ieee80211_tx_info info = {};
677 struct ieee80211_sta *sta = NULL;
678 struct mt7615_sta *msta = NULL;
679 struct mt76_wcid *wcid;
680 __le32 *txs_data = data;
681 u32 txs;
682 u8 wcidx;
683 u8 pid;
684
685 txs = le32_to_cpu(txs_data[0]);
686 pid = FIELD_GET(MT_TXS0_PID, txs);
687 txs = le32_to_cpu(txs_data[2]);
688 wcidx = FIELD_GET(MT_TXS2_WCID, txs);
689
690 if (pid == MT_PACKET_ID_NO_ACK)
691 return;
692
693 if (wcidx >= ARRAY_SIZE(dev->mt76.wcid))
694 return;
695
696 rcu_read_lock();
697
698 wcid = rcu_dereference(dev->mt76.wcid[wcidx]);
699 if (!wcid)
700 goto out;
701
702 msta = container_of(wcid, struct mt7615_sta, wcid);
703 sta = wcid_to_sta(wcid);
704
705 if (mt7615_mac_add_txs_skb(dev, msta, pid, txs_data))
706 goto out;
707
708 if (wcidx >= MT7615_WTBL_STA || !sta)
709 goto out;
710
711 if (mt7615_fill_txs(dev, msta, &info, txs_data))
712 ieee80211_tx_status_noskb(mt76_hw(dev), sta, &info);
713
714out:
715 rcu_read_unlock();
716}
717
718void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb)
719{
720 struct mt7615_tx_free *free = (struct mt7615_tx_free *)skb->data;
721 struct mt76_dev *mdev = &dev->mt76;
722 struct mt76_txwi_cache *txwi;
723 u8 i, count;
724
725 count = FIELD_GET(MT_TX_FREE_MSDU_ID_CNT, le16_to_cpu(free->ctrl));
726 for (i = 0; i < count; i++) {
727 spin_lock_bh(&dev->token_lock);
728 txwi = idr_remove(&dev->token, le16_to_cpu(free->token[i]));
729 spin_unlock_bh(&dev->token_lock);
730
731 if (!txwi)
732 continue;
733
734 mt7615_txp_skb_unmap(mdev, txwi);
735 if (txwi->skb) {
736 mt76_tx_complete_skb(mdev, txwi->skb);
737 txwi->skb = NULL;
738 }
739
740 mt76_put_txwi(mdev, txwi);
741 }
742 dev_kfree_skb(skb);
743}
744
745void mt7615_mac_work(struct work_struct *work)
746{
747 struct mt7615_dev *dev;
748
749 dev = (struct mt7615_dev *)container_of(work, struct mt76_dev,
750 mac_work.work);
751
752 mt76_tx_status_check(&dev->mt76, NULL, false);
753 ieee80211_queue_delayed_work(mt76_hw(dev), &dev->mt76.mac_work,
754 MT7615_WATCHDOG_TIME);
755}
Linux 6.x block layer and io_uring tree(s)