Commit | Line | Data |
---|---|---|
457c8996 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
8973a6e7 RD |
2 | /* |
3 | * This file contains the handling of command. | |
4 | * It prepares command and sends it to firmware when it is ready. | |
5 | */ | |
876c9d3a | 6 | |
a6b7a407 | 7 | #include <linux/hardirq.h> |
7919b89c | 8 | #include <linux/kfifo.h> |
e93156e7 | 9 | #include <linux/sched.h> |
5a0e3ad6 | 10 | #include <linux/slab.h> |
a45b6f4f | 11 | #include <linux/if_arp.h> |
ee40fa06 | 12 | #include <linux/export.h> |
e93156e7 | 13 | |
876c9d3a | 14 | #include "decl.h" |
e86dc1ca | 15 | #include "cfg.h" |
6e66f03f | 16 | #include "cmd.h" |
876c9d3a | 17 | |
9fb7663d DW |
18 | #define CAL_NF(nf) ((s32)(-(s32)(nf))) |
19 | #define CAL_RSSI(snr, nf) ((s32)((s32)(snr) + CAL_NF(nf))) | |
e93156e7 | 20 | |
8db4a2b9 | 21 | /** |
8973a6e7 | 22 | * lbs_cmd_copyback - Simple callback that copies response back into command |
8db4a2b9 | 23 | * |
8973a6e7 RD |
24 | * @priv: A pointer to &struct lbs_private structure |
25 | * @extra: A pointer to the original command structure for which | |
26 | * 'resp' is a response | |
27 | * @resp: A pointer to the command response | |
8db4a2b9 | 28 | * |
8973a6e7 | 29 | * returns: 0 on success, error on failure |
8db4a2b9 HS |
30 | */ |
31 | int lbs_cmd_copyback(struct lbs_private *priv, unsigned long extra, | |
32 | struct cmd_header *resp) | |
33 | { | |
34 | struct cmd_header *buf = (void *)extra; | |
35 | uint16_t copy_len; | |
36 | ||
37 | copy_len = min(le16_to_cpu(buf->size), le16_to_cpu(resp->size)); | |
38 | memcpy(buf, resp, copy_len); | |
39 | return 0; | |
40 | } | |
41 | EXPORT_SYMBOL_GPL(lbs_cmd_copyback); | |
42 | ||
43 | /** | |
8973a6e7 RD |
44 | * lbs_cmd_async_callback - Simple callback that ignores the result. |
45 | * Use this if you just want to send a command to the hardware, but don't | |
8db4a2b9 HS |
46 | * care for the result. |
47 | * | |
8973a6e7 RD |
48 | * @priv: ignored |
49 | * @extra: ignored | |
50 | * @resp: ignored | |
8db4a2b9 | 51 | * |
8973a6e7 | 52 | * returns: 0 for success |
8db4a2b9 HS |
53 | */ |
54 | static int lbs_cmd_async_callback(struct lbs_private *priv, unsigned long extra, | |
55 | struct cmd_header *resp) | |
56 | { | |
57 | return 0; | |
58 | } | |
59 | ||
60 | ||
876c9d3a | 61 | /** |
8973a6e7 RD |
62 | * is_command_allowed_in_ps - tests if a command is allowed in Power Save mode |
63 | * | |
64 | * @cmd: the command ID | |
876c9d3a | 65 | * |
8973a6e7 | 66 | * returns: 1 if allowed, 0 if not allowed |
876c9d3a | 67 | */ |
852e1f2a | 68 | static u8 is_command_allowed_in_ps(u16 cmd) |
876c9d3a | 69 | { |
852e1f2a DW |
70 | switch (cmd) { |
71 | case CMD_802_11_RSSI: | |
72 | return 1; | |
66fceb69 AK |
73 | case CMD_802_11_HOST_SLEEP_CFG: |
74 | return 1; | |
852e1f2a DW |
75 | default: |
76 | break; | |
876c9d3a | 77 | } |
876c9d3a MT |
78 | return 0; |
79 | } | |
80 | ||
6e66f03f | 81 | /** |
8973a6e7 RD |
82 | * lbs_update_hw_spec - Updates the hardware details like MAC address |
83 | * and regulatory region | |
6e66f03f | 84 | * |
8973a6e7 | 85 | * @priv: A pointer to &struct lbs_private structure |
6e66f03f | 86 | * |
8973a6e7 | 87 | * returns: 0 on success, error on failure |
6e66f03f DW |
88 | */ |
89 | int lbs_update_hw_spec(struct lbs_private *priv) | |
876c9d3a | 90 | { |
6e66f03f DW |
91 | struct cmd_ds_get_hw_spec cmd; |
92 | int ret = -1; | |
93 | u32 i; | |
876c9d3a | 94 | |
6e66f03f DW |
95 | memset(&cmd, 0, sizeof(cmd)); |
96 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
97 | memcpy(cmd.permanentaddr, priv->current_addr, ETH_ALEN); | |
689442dc | 98 | ret = lbs_cmd_with_response(priv, CMD_GET_HW_SPEC, &cmd); |
6e66f03f DW |
99 | if (ret) |
100 | goto out; | |
101 | ||
102 | priv->fwcapinfo = le32_to_cpu(cmd.fwcapinfo); | |
6e66f03f | 103 | |
dac10a9f HS |
104 | /* The firmware release is in an interesting format: the patch |
105 | * level is in the most significant nibble ... so fix that: */ | |
106 | priv->fwrelease = le32_to_cpu(cmd.fwrelease); | |
107 | priv->fwrelease = (priv->fwrelease << 8) | | |
108 | (priv->fwrelease >> 24 & 0xff); | |
109 | ||
110 | /* Some firmware capabilities: | |
111 | * CF card firmware 5.0.16p0: cap 0x00000303 | |
112 | * USB dongle firmware 5.110.17p2: cap 0x00000303 | |
113 | */ | |
f3a57fd1 | 114 | netdev_info(priv->dev, "%pM, fw %u.%u.%up%u, cap 0x%08x\n", |
e174961c | 115 | cmd.permanentaddr, |
dac10a9f HS |
116 | priv->fwrelease >> 24 & 0xff, |
117 | priv->fwrelease >> 16 & 0xff, | |
118 | priv->fwrelease >> 8 & 0xff, | |
119 | priv->fwrelease & 0xff, | |
120 | priv->fwcapinfo); | |
6e66f03f DW |
121 | lbs_deb_cmd("GET_HW_SPEC: hardware interface 0x%x, hardware spec 0x%04x\n", |
122 | cmd.hwifversion, cmd.version); | |
123 | ||
124 | /* Clamp region code to 8-bit since FW spec indicates that it should | |
125 | * only ever be 8-bit, even though the field size is 16-bit. Some firmware | |
126 | * returns non-zero high 8 bits here. | |
15483996 MV |
127 | * |
128 | * Firmware version 4.0.102 used in CF8381 has region code shifted. We | |
129 | * need to check for this problem and handle it properly. | |
6e66f03f | 130 | */ |
15483996 MV |
131 | if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V4) |
132 | priv->regioncode = (le16_to_cpu(cmd.regioncode) >> 8) & 0xFF; | |
133 | else | |
134 | priv->regioncode = le16_to_cpu(cmd.regioncode) & 0xFF; | |
6e66f03f DW |
135 | |
136 | for (i = 0; i < MRVDRV_MAX_REGION_CODE; i++) { | |
137 | /* use the region code to search for the index */ | |
138 | if (priv->regioncode == lbs_region_code_to_index[i]) | |
139 | break; | |
140 | } | |
141 | ||
142 | /* if it's unidentified region code, use the default (USA) */ | |
143 | if (i >= MRVDRV_MAX_REGION_CODE) { | |
144 | priv->regioncode = 0x10; | |
f3a57fd1 JP |
145 | netdev_info(priv->dev, |
146 | "unidentified region code; using the default (USA)\n"); | |
6e66f03f DW |
147 | } |
148 | ||
149 | if (priv->current_addr[0] == 0xff) | |
150 | memmove(priv->current_addr, cmd.permanentaddr, ETH_ALEN); | |
876c9d3a | 151 | |
75abde4d VK |
152 | if (!priv->copied_hwaddr) { |
153 | memcpy(priv->dev->dev_addr, priv->current_addr, ETH_ALEN); | |
154 | if (priv->mesh_dev) | |
155 | memcpy(priv->mesh_dev->dev_addr, | |
156 | priv->current_addr, ETH_ALEN); | |
157 | priv->copied_hwaddr = 1; | |
158 | } | |
6e66f03f | 159 | |
6e66f03f | 160 | out: |
6e66f03f | 161 | return ret; |
876c9d3a MT |
162 | } |
163 | ||
66fceb69 AK |
164 | static int lbs_ret_host_sleep_cfg(struct lbs_private *priv, unsigned long dummy, |
165 | struct cmd_header *resp) | |
166 | { | |
1311843c | 167 | if (priv->is_host_sleep_activated) { |
66fceb69 AK |
168 | priv->is_host_sleep_configured = 0; |
169 | if (priv->psstate == PS_STATE_FULL_POWER) { | |
170 | priv->is_host_sleep_activated = 0; | |
171 | wake_up_interruptible(&priv->host_sleep_q); | |
172 | } | |
173 | } else { | |
174 | priv->is_host_sleep_configured = 1; | |
175 | } | |
4bc606af | 176 | |
66fceb69 AK |
177 | return 0; |
178 | } | |
179 | ||
582c1b53 AN |
180 | int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria, |
181 | struct wol_config *p_wol_config) | |
6ce4fd2a DW |
182 | { |
183 | struct cmd_ds_host_sleep cmd_config; | |
184 | int ret; | |
185 | ||
ae63a33e DS |
186 | /* |
187 | * Certain firmware versions do not support EHS_REMOVE_WAKEUP command | |
188 | * and the card will return a failure. Since we need to be | |
189 | * able to reset the mask, in those cases we set a 0 mask instead. | |
190 | */ | |
191 | if (criteria == EHS_REMOVE_WAKEUP && !priv->ehs_remove_supported) | |
192 | criteria = 0; | |
193 | ||
9fae899c | 194 | cmd_config.hdr.size = cpu_to_le16(sizeof(cmd_config)); |
6ce4fd2a | 195 | cmd_config.criteria = cpu_to_le32(criteria); |
506e9025 DW |
196 | cmd_config.gpio = priv->wol_gpio; |
197 | cmd_config.gap = priv->wol_gap; | |
6ce4fd2a | 198 | |
582c1b53 AN |
199 | if (p_wol_config != NULL) |
200 | memcpy((uint8_t *)&cmd_config.wol_conf, (uint8_t *)p_wol_config, | |
201 | sizeof(struct wol_config)); | |
202 | else | |
203 | cmd_config.wol_conf.action = CMD_ACT_ACTION_NONE; | |
204 | ||
66fceb69 AK |
205 | ret = __lbs_cmd(priv, CMD_802_11_HOST_SLEEP_CFG, &cmd_config.hdr, |
206 | le16_to_cpu(cmd_config.hdr.size), | |
207 | lbs_ret_host_sleep_cfg, 0); | |
506e9025 | 208 | if (!ret) { |
66fceb69 | 209 | if (p_wol_config) |
582c1b53 AN |
210 | memcpy((uint8_t *) p_wol_config, |
211 | (uint8_t *)&cmd_config.wol_conf, | |
212 | sizeof(struct wol_config)); | |
506e9025 | 213 | } else { |
f3a57fd1 | 214 | netdev_info(priv->dev, "HOST_SLEEP_CFG failed %d\n", ret); |
6ce4fd2a | 215 | } |
506e9025 | 216 | |
6ce4fd2a DW |
217 | return ret; |
218 | } | |
219 | EXPORT_SYMBOL_GPL(lbs_host_sleep_cfg); | |
220 | ||
0bb64087 | 221 | /** |
8973a6e7 | 222 | * lbs_set_ps_mode - Sets the Power Save mode |
0bb64087 | 223 | * |
8973a6e7 RD |
224 | * @priv: A pointer to &struct lbs_private structure |
225 | * @cmd_action: The Power Save operation (PS_MODE_ACTION_ENTER_PS or | |
0bb64087 | 226 | * PS_MODE_ACTION_EXIT_PS) |
8973a6e7 | 227 | * @block: Whether to block on a response or not |
0bb64087 | 228 | * |
8973a6e7 | 229 | * returns: 0 on success, error on failure |
0bb64087 DW |
230 | */ |
231 | int lbs_set_ps_mode(struct lbs_private *priv, u16 cmd_action, bool block) | |
876c9d3a | 232 | { |
0bb64087 DW |
233 | struct cmd_ds_802_11_ps_mode cmd; |
234 | int ret = 0; | |
876c9d3a | 235 | |
0bb64087 DW |
236 | memset(&cmd, 0, sizeof(cmd)); |
237 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
238 | cmd.action = cpu_to_le16(cmd_action); | |
876c9d3a | 239 | |
0bb64087 DW |
240 | if (cmd_action == PS_MODE_ACTION_ENTER_PS) { |
241 | lbs_deb_cmd("PS_MODE: action ENTER_PS\n"); | |
242 | cmd.multipledtim = cpu_to_le16(1); /* Default DTIM multiple */ | |
243 | } else if (cmd_action == PS_MODE_ACTION_EXIT_PS) { | |
244 | lbs_deb_cmd("PS_MODE: action EXIT_PS\n"); | |
245 | } else { | |
246 | /* We don't handle CONFIRM_SLEEP here because it needs to | |
247 | * be fastpathed to the firmware. | |
248 | */ | |
249 | lbs_deb_cmd("PS_MODE: unknown action 0x%X\n", cmd_action); | |
250 | ret = -EOPNOTSUPP; | |
251 | goto out; | |
876c9d3a MT |
252 | } |
253 | ||
0bb64087 DW |
254 | if (block) |
255 | ret = lbs_cmd_with_response(priv, CMD_802_11_PS_MODE, &cmd); | |
256 | else | |
257 | lbs_cmd_async(priv, CMD_802_11_PS_MODE, &cmd.hdr, sizeof (cmd)); | |
258 | ||
259 | out: | |
0bb64087 | 260 | return ret; |
876c9d3a MT |
261 | } |
262 | ||
3fbe104c DW |
263 | int lbs_cmd_802_11_sleep_params(struct lbs_private *priv, uint16_t cmd_action, |
264 | struct sleep_params *sp) | |
876c9d3a | 265 | { |
3fbe104c DW |
266 | struct cmd_ds_802_11_sleep_params cmd; |
267 | int ret; | |
876c9d3a | 268 | |
0aef64d7 | 269 | if (cmd_action == CMD_ACT_GET) { |
3fbe104c DW |
270 | memset(&cmd, 0, sizeof(cmd)); |
271 | } else { | |
272 | cmd.error = cpu_to_le16(sp->sp_error); | |
273 | cmd.offset = cpu_to_le16(sp->sp_offset); | |
274 | cmd.stabletime = cpu_to_le16(sp->sp_stabletime); | |
275 | cmd.calcontrol = sp->sp_calcontrol; | |
276 | cmd.externalsleepclk = sp->sp_extsleepclk; | |
277 | cmd.reserved = cpu_to_le16(sp->sp_reserved); | |
876c9d3a | 278 | } |
3fbe104c DW |
279 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
280 | cmd.action = cpu_to_le16(cmd_action); | |
876c9d3a | 281 | |
3fbe104c DW |
282 | ret = lbs_cmd_with_response(priv, CMD_802_11_SLEEP_PARAMS, &cmd); |
283 | ||
284 | if (!ret) { | |
285 | lbs_deb_cmd("error 0x%x, offset 0x%x, stabletime 0x%x, " | |
286 | "calcontrol 0x%x extsleepclk 0x%x\n", | |
287 | le16_to_cpu(cmd.error), le16_to_cpu(cmd.offset), | |
288 | le16_to_cpu(cmd.stabletime), cmd.calcontrol, | |
289 | cmd.externalsleepclk); | |
290 | ||
291 | sp->sp_error = le16_to_cpu(cmd.error); | |
292 | sp->sp_offset = le16_to_cpu(cmd.offset); | |
293 | sp->sp_stabletime = le16_to_cpu(cmd.stabletime); | |
294 | sp->sp_calcontrol = cmd.calcontrol; | |
295 | sp->sp_extsleepclk = cmd.externalsleepclk; | |
296 | sp->sp_reserved = le16_to_cpu(cmd.reserved); | |
297 | } | |
298 | ||
259010c5 | 299 | return ret; |
876c9d3a MT |
300 | } |
301 | ||
49125454 AK |
302 | static int lbs_wait_for_ds_awake(struct lbs_private *priv) |
303 | { | |
304 | int ret = 0; | |
305 | ||
49125454 AK |
306 | if (priv->is_deep_sleep) { |
307 | if (!wait_event_interruptible_timeout(priv->ds_awake_q, | |
308 | !priv->is_deep_sleep, (10 * HZ))) { | |
f3a57fd1 | 309 | netdev_err(priv->dev, "ds_awake_q: timer expired\n"); |
49125454 AK |
310 | ret = -1; |
311 | } | |
312 | } | |
313 | ||
49125454 AK |
314 | return ret; |
315 | } | |
316 | ||
317 | int lbs_set_deep_sleep(struct lbs_private *priv, int deep_sleep) | |
318 | { | |
319 | int ret = 0; | |
320 | ||
49125454 AK |
321 | if (deep_sleep) { |
322 | if (priv->is_deep_sleep != 1) { | |
323 | lbs_deb_cmd("deep sleep: sleep\n"); | |
324 | BUG_ON(!priv->enter_deep_sleep); | |
325 | ret = priv->enter_deep_sleep(priv); | |
326 | if (!ret) { | |
327 | netif_stop_queue(priv->dev); | |
328 | netif_carrier_off(priv->dev); | |
329 | } | |
330 | } else { | |
f3a57fd1 | 331 | netdev_err(priv->dev, "deep sleep: already enabled\n"); |
49125454 AK |
332 | } |
333 | } else { | |
334 | if (priv->is_deep_sleep) { | |
335 | lbs_deb_cmd("deep sleep: wakeup\n"); | |
336 | BUG_ON(!priv->exit_deep_sleep); | |
337 | ret = priv->exit_deep_sleep(priv); | |
338 | if (!ret) { | |
339 | ret = lbs_wait_for_ds_awake(priv); | |
340 | if (ret) | |
f3a57fd1 JP |
341 | netdev_err(priv->dev, |
342 | "deep sleep: wakeup failed\n"); | |
49125454 AK |
343 | } |
344 | } | |
345 | } | |
346 | ||
49125454 AK |
347 | return ret; |
348 | } | |
349 | ||
1311843c AK |
350 | static int lbs_ret_host_sleep_activate(struct lbs_private *priv, |
351 | unsigned long dummy, | |
352 | struct cmd_header *cmd) | |
353 | { | |
1311843c AK |
354 | priv->is_host_sleep_activated = 1; |
355 | wake_up_interruptible(&priv->host_sleep_q); | |
4bc606af | 356 | |
1311843c AK |
357 | return 0; |
358 | } | |
359 | ||
360 | int lbs_set_host_sleep(struct lbs_private *priv, int host_sleep) | |
361 | { | |
362 | struct cmd_header cmd; | |
363 | int ret = 0; | |
364 | uint32_t criteria = EHS_REMOVE_WAKEUP; | |
365 | ||
1311843c AK |
366 | if (host_sleep) { |
367 | if (priv->is_host_sleep_activated != 1) { | |
368 | memset(&cmd, 0, sizeof(cmd)); | |
369 | ret = lbs_host_sleep_cfg(priv, priv->wol_criteria, | |
370 | (struct wol_config *)NULL); | |
371 | if (ret) { | |
f3a57fd1 JP |
372 | netdev_info(priv->dev, |
373 | "Host sleep configuration failed: %d\n", | |
374 | ret); | |
1311843c AK |
375 | return ret; |
376 | } | |
377 | if (priv->psstate == PS_STATE_FULL_POWER) { | |
378 | ret = __lbs_cmd(priv, | |
379 | CMD_802_11_HOST_SLEEP_ACTIVATE, | |
380 | &cmd, | |
381 | sizeof(cmd), | |
382 | lbs_ret_host_sleep_activate, 0); | |
383 | if (ret) | |
f3a57fd1 JP |
384 | netdev_info(priv->dev, |
385 | "HOST_SLEEP_ACTIVATE failed: %d\n", | |
386 | ret); | |
1311843c AK |
387 | } |
388 | ||
389 | if (!wait_event_interruptible_timeout( | |
390 | priv->host_sleep_q, | |
391 | priv->is_host_sleep_activated, | |
392 | (10 * HZ))) { | |
f3a57fd1 JP |
393 | netdev_err(priv->dev, |
394 | "host_sleep_q: timer expired\n"); | |
1311843c AK |
395 | ret = -1; |
396 | } | |
397 | } else { | |
f3a57fd1 | 398 | netdev_err(priv->dev, "host sleep: already enabled\n"); |
1311843c AK |
399 | } |
400 | } else { | |
401 | if (priv->is_host_sleep_activated) | |
402 | ret = lbs_host_sleep_cfg(priv, criteria, | |
403 | (struct wol_config *)NULL); | |
404 | } | |
405 | ||
406 | return ret; | |
407 | } | |
408 | ||
39fcf7a3 | 409 | /** |
8973a6e7 | 410 | * lbs_set_snmp_mib - Set an SNMP MIB value |
39fcf7a3 | 411 | * |
8973a6e7 RD |
412 | * @priv: A pointer to &struct lbs_private structure |
413 | * @oid: The OID to set in the firmware | |
414 | * @val: Value to set the OID to | |
39fcf7a3 | 415 | * |
8973a6e7 | 416 | * returns: 0 on success, error on failure |
39fcf7a3 DW |
417 | */ |
418 | int lbs_set_snmp_mib(struct lbs_private *priv, u32 oid, u16 val) | |
876c9d3a | 419 | { |
39fcf7a3 DW |
420 | struct cmd_ds_802_11_snmp_mib cmd; |
421 | int ret; | |
876c9d3a | 422 | |
39fcf7a3 DW |
423 | memset(&cmd, 0, sizeof (cmd)); |
424 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
425 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
426 | cmd.oid = cpu_to_le16((u16) oid); | |
876c9d3a | 427 | |
39fcf7a3 DW |
428 | switch (oid) { |
429 | case SNMP_MIB_OID_BSS_TYPE: | |
430 | cmd.bufsize = cpu_to_le16(sizeof(u8)); | |
fef0640e | 431 | cmd.value[0] = val; |
39fcf7a3 DW |
432 | break; |
433 | case SNMP_MIB_OID_11D_ENABLE: | |
434 | case SNMP_MIB_OID_FRAG_THRESHOLD: | |
435 | case SNMP_MIB_OID_RTS_THRESHOLD: | |
436 | case SNMP_MIB_OID_SHORT_RETRY_LIMIT: | |
437 | case SNMP_MIB_OID_LONG_RETRY_LIMIT: | |
438 | cmd.bufsize = cpu_to_le16(sizeof(u16)); | |
439 | *((__le16 *)(&cmd.value)) = cpu_to_le16(val); | |
876c9d3a | 440 | break; |
39fcf7a3 DW |
441 | default: |
442 | lbs_deb_cmd("SNMP_CMD: (set) unhandled OID 0x%x\n", oid); | |
443 | ret = -EINVAL; | |
444 | goto out; | |
876c9d3a MT |
445 | } |
446 | ||
39fcf7a3 DW |
447 | lbs_deb_cmd("SNMP_CMD: (set) oid 0x%x, oid size 0x%x, value 0x%x\n", |
448 | le16_to_cpu(cmd.oid), le16_to_cpu(cmd.bufsize), val); | |
876c9d3a | 449 | |
39fcf7a3 | 450 | ret = lbs_cmd_with_response(priv, CMD_802_11_SNMP_MIB, &cmd); |
876c9d3a | 451 | |
39fcf7a3 | 452 | out: |
39fcf7a3 DW |
453 | return ret; |
454 | } | |
876c9d3a | 455 | |
39fcf7a3 | 456 | /** |
8973a6e7 | 457 | * lbs_get_snmp_mib - Get an SNMP MIB value |
39fcf7a3 | 458 | * |
8973a6e7 RD |
459 | * @priv: A pointer to &struct lbs_private structure |
460 | * @oid: The OID to retrieve from the firmware | |
461 | * @out_val: Location for the returned value | |
39fcf7a3 | 462 | * |
8973a6e7 | 463 | * returns: 0 on success, error on failure |
39fcf7a3 DW |
464 | */ |
465 | int lbs_get_snmp_mib(struct lbs_private *priv, u32 oid, u16 *out_val) | |
466 | { | |
467 | struct cmd_ds_802_11_snmp_mib cmd; | |
468 | int ret; | |
876c9d3a | 469 | |
39fcf7a3 DW |
470 | memset(&cmd, 0, sizeof (cmd)); |
471 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
472 | cmd.action = cpu_to_le16(CMD_ACT_GET); | |
473 | cmd.oid = cpu_to_le16(oid); | |
876c9d3a | 474 | |
39fcf7a3 DW |
475 | ret = lbs_cmd_with_response(priv, CMD_802_11_SNMP_MIB, &cmd); |
476 | if (ret) | |
477 | goto out; | |
876c9d3a | 478 | |
39fcf7a3 DW |
479 | switch (le16_to_cpu(cmd.bufsize)) { |
480 | case sizeof(u8): | |
fef0640e | 481 | *out_val = cmd.value[0]; |
39fcf7a3 DW |
482 | break; |
483 | case sizeof(u16): | |
484 | *out_val = le16_to_cpu(*((__le16 *)(&cmd.value))); | |
876c9d3a MT |
485 | break; |
486 | default: | |
39fcf7a3 DW |
487 | lbs_deb_cmd("SNMP_CMD: (get) unhandled OID 0x%x size %d\n", |
488 | oid, le16_to_cpu(cmd.bufsize)); | |
876c9d3a MT |
489 | break; |
490 | } | |
491 | ||
39fcf7a3 | 492 | out: |
39fcf7a3 | 493 | return ret; |
876c9d3a MT |
494 | } |
495 | ||
87c8c72d | 496 | /** |
8973a6e7 | 497 | * lbs_get_tx_power - Get the min, max, and current TX power |
87c8c72d | 498 | * |
8973a6e7 RD |
499 | * @priv: A pointer to &struct lbs_private structure |
500 | * @curlevel: Current power level in dBm | |
501 | * @minlevel: Minimum supported power level in dBm (optional) | |
502 | * @maxlevel: Maximum supported power level in dBm (optional) | |
87c8c72d | 503 | * |
8973a6e7 | 504 | * returns: 0 on success, error on failure |
87c8c72d DW |
505 | */ |
506 | int lbs_get_tx_power(struct lbs_private *priv, s16 *curlevel, s16 *minlevel, | |
507 | s16 *maxlevel) | |
876c9d3a | 508 | { |
87c8c72d DW |
509 | struct cmd_ds_802_11_rf_tx_power cmd; |
510 | int ret; | |
876c9d3a | 511 | |
87c8c72d DW |
512 | memset(&cmd, 0, sizeof(cmd)); |
513 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
514 | cmd.action = cpu_to_le16(CMD_ACT_GET); | |
515 | ||
516 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_TX_POWER, &cmd); | |
517 | if (ret == 0) { | |
518 | *curlevel = le16_to_cpu(cmd.curlevel); | |
519 | if (minlevel) | |
87bf24f3 | 520 | *minlevel = cmd.minlevel; |
87c8c72d | 521 | if (maxlevel) |
87bf24f3 | 522 | *maxlevel = cmd.maxlevel; |
87c8c72d | 523 | } |
876c9d3a | 524 | |
87c8c72d DW |
525 | return ret; |
526 | } | |
876c9d3a | 527 | |
87c8c72d | 528 | /** |
8973a6e7 | 529 | * lbs_set_tx_power - Set the TX power |
87c8c72d | 530 | * |
8973a6e7 RD |
531 | * @priv: A pointer to &struct lbs_private structure |
532 | * @dbm: The desired power level in dBm | |
87c8c72d | 533 | * |
8973a6e7 | 534 | * returns: 0 on success, error on failure |
87c8c72d DW |
535 | */ |
536 | int lbs_set_tx_power(struct lbs_private *priv, s16 dbm) | |
537 | { | |
538 | struct cmd_ds_802_11_rf_tx_power cmd; | |
539 | int ret; | |
876c9d3a | 540 | |
87c8c72d DW |
541 | memset(&cmd, 0, sizeof(cmd)); |
542 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
543 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
544 | cmd.curlevel = cpu_to_le16(dbm); | |
876c9d3a | 545 | |
87c8c72d DW |
546 | lbs_deb_cmd("SET_RF_TX_POWER: %d dBm\n", dbm); |
547 | ||
548 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_TX_POWER, &cmd); | |
9012b28a | 549 | |
87c8c72d | 550 | return ret; |
876c9d3a MT |
551 | } |
552 | ||
a45b6f4f | 553 | /** |
8973a6e7 RD |
554 | * lbs_set_monitor_mode - Enable or disable monitor mode |
555 | * (only implemented on OLPC usb8388 FW) | |
a45b6f4f | 556 | * |
8973a6e7 RD |
557 | * @priv: A pointer to &struct lbs_private structure |
558 | * @enable: 1 to enable monitor mode, 0 to disable | |
a45b6f4f | 559 | * |
8973a6e7 | 560 | * returns: 0 on success, error on failure |
a45b6f4f DW |
561 | */ |
562 | int lbs_set_monitor_mode(struct lbs_private *priv, int enable) | |
965f8bbc | 563 | { |
a45b6f4f DW |
564 | struct cmd_ds_802_11_monitor_mode cmd; |
565 | int ret; | |
965f8bbc | 566 | |
a45b6f4f DW |
567 | memset(&cmd, 0, sizeof(cmd)); |
568 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
569 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
570 | if (enable) | |
571 | cmd.mode = cpu_to_le16(0x1); | |
965f8bbc | 572 | |
a45b6f4f DW |
573 | lbs_deb_cmd("SET_MONITOR_MODE: %d\n", enable); |
574 | ||
575 | ret = lbs_cmd_with_response(priv, CMD_802_11_MONITOR_MODE, &cmd); | |
576 | if (ret == 0) { | |
577 | priv->dev->type = enable ? ARPHRD_IEEE80211_RADIOTAP : | |
578 | ARPHRD_ETHER; | |
965f8bbc LCC |
579 | } |
580 | ||
a45b6f4f | 581 | return ret; |
965f8bbc LCC |
582 | } |
583 | ||
2dd4b262 | 584 | /** |
8973a6e7 | 585 | * lbs_get_channel - Get the radio channel |
2dd4b262 | 586 | * |
8973a6e7 | 587 | * @priv: A pointer to &struct lbs_private structure |
2dd4b262 | 588 | * |
8973a6e7 | 589 | * returns: The channel on success, error on failure |
2dd4b262 | 590 | */ |
a3cbfb08 | 591 | static int lbs_get_channel(struct lbs_private *priv) |
876c9d3a | 592 | { |
2dd4b262 DW |
593 | struct cmd_ds_802_11_rf_channel cmd; |
594 | int ret = 0; | |
876c9d3a | 595 | |
8d0c7fad | 596 | memset(&cmd, 0, sizeof(cmd)); |
2dd4b262 DW |
597 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
598 | cmd.action = cpu_to_le16(CMD_OPT_802_11_RF_CHANNEL_GET); | |
876c9d3a | 599 | |
689442dc | 600 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_CHANNEL, &cmd); |
2dd4b262 DW |
601 | if (ret) |
602 | goto out; | |
876c9d3a | 603 | |
cb182a60 DW |
604 | ret = le16_to_cpu(cmd.channel); |
605 | lbs_deb_cmd("current radio channel is %d\n", ret); | |
2dd4b262 DW |
606 | |
607 | out: | |
2dd4b262 DW |
608 | return ret; |
609 | } | |
610 | ||
73ab1f25 HS |
611 | int lbs_update_channel(struct lbs_private *priv) |
612 | { | |
613 | int ret; | |
614 | ||
615 | /* the channel in f/w could be out of sync; get the current channel */ | |
73ab1f25 HS |
616 | ret = lbs_get_channel(priv); |
617 | if (ret > 0) { | |
c14951fe | 618 | priv->channel = ret; |
73ab1f25 HS |
619 | ret = 0; |
620 | } | |
4bc606af | 621 | |
73ab1f25 HS |
622 | return ret; |
623 | } | |
624 | ||
2dd4b262 | 625 | /** |
8973a6e7 | 626 | * lbs_set_channel - Set the radio channel |
2dd4b262 | 627 | * |
8973a6e7 RD |
628 | * @priv: A pointer to &struct lbs_private structure |
629 | * @channel: The desired channel, or 0 to clear a locked channel | |
2dd4b262 | 630 | * |
8973a6e7 | 631 | * returns: 0 on success, error on failure |
2dd4b262 DW |
632 | */ |
633 | int lbs_set_channel(struct lbs_private *priv, u8 channel) | |
634 | { | |
635 | struct cmd_ds_802_11_rf_channel cmd; | |
96d46d5d | 636 | #ifdef DEBUG |
c14951fe | 637 | u8 old_channel = priv->channel; |
96d46d5d | 638 | #endif |
2dd4b262 DW |
639 | int ret = 0; |
640 | ||
8d0c7fad | 641 | memset(&cmd, 0, sizeof(cmd)); |
2dd4b262 DW |
642 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
643 | cmd.action = cpu_to_le16(CMD_OPT_802_11_RF_CHANNEL_SET); | |
644 | cmd.channel = cpu_to_le16(channel); | |
645 | ||
689442dc | 646 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_CHANNEL, &cmd); |
2dd4b262 DW |
647 | if (ret) |
648 | goto out; | |
649 | ||
c14951fe | 650 | priv->channel = (uint8_t) le16_to_cpu(cmd.channel); |
cb182a60 | 651 | lbs_deb_cmd("channel switch from %d to %d\n", old_channel, |
c14951fe | 652 | priv->channel); |
2dd4b262 DW |
653 | |
654 | out: | |
2dd4b262 | 655 | return ret; |
876c9d3a MT |
656 | } |
657 | ||
9fb7663d | 658 | /** |
8973a6e7 | 659 | * lbs_get_rssi - Get current RSSI and noise floor |
9fb7663d | 660 | * |
8973a6e7 RD |
661 | * @priv: A pointer to &struct lbs_private structure |
662 | * @rssi: On successful return, signal level in mBm | |
663 | * @nf: On successful return, Noise floor | |
9fb7663d | 664 | * |
8973a6e7 | 665 | * returns: The channel on success, error on failure |
9fb7663d DW |
666 | */ |
667 | int lbs_get_rssi(struct lbs_private *priv, s8 *rssi, s8 *nf) | |
668 | { | |
669 | struct cmd_ds_802_11_rssi cmd; | |
670 | int ret = 0; | |
671 | ||
9fb7663d DW |
672 | BUG_ON(rssi == NULL); |
673 | BUG_ON(nf == NULL); | |
674 | ||
675 | memset(&cmd, 0, sizeof(cmd)); | |
676 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
677 | /* Average SNR over last 8 beacons */ | |
678 | cmd.n_or_snr = cpu_to_le16(8); | |
679 | ||
680 | ret = lbs_cmd_with_response(priv, CMD_802_11_RSSI, &cmd); | |
681 | if (ret == 0) { | |
682 | *nf = CAL_NF(le16_to_cpu(cmd.nf)); | |
683 | *rssi = CAL_RSSI(le16_to_cpu(cmd.n_or_snr), le16_to_cpu(cmd.nf)); | |
684 | } | |
685 | ||
9fb7663d DW |
686 | return ret; |
687 | } | |
688 | ||
cc4b9d39 | 689 | /** |
8973a6e7 RD |
690 | * lbs_set_11d_domain_info - Send regulatory and 802.11d domain information |
691 | * to the firmware | |
cc4b9d39 | 692 | * |
8973a6e7 | 693 | * @priv: pointer to &struct lbs_private |
cc4b9d39 | 694 | * |
8973a6e7 | 695 | * returns: 0 on success, error code on failure |
cc4b9d39 | 696 | */ |
20d2ebe5 | 697 | int lbs_set_11d_domain_info(struct lbs_private *priv) |
cc4b9d39 | 698 | { |
20d2ebe5 DD |
699 | struct wiphy *wiphy = priv->wdev->wiphy; |
700 | struct ieee80211_supported_band **bands = wiphy->bands; | |
cc4b9d39 DW |
701 | struct cmd_ds_802_11d_domain_info cmd; |
702 | struct mrvl_ie_domain_param_set *domain = &cmd.domain; | |
703 | struct ieee80211_country_ie_triplet *t; | |
57fbcce3 | 704 | enum nl80211_band band; |
cc4b9d39 DW |
705 | struct ieee80211_channel *ch; |
706 | u8 num_triplet = 0; | |
707 | u8 num_parsed_chan = 0; | |
708 | u8 first_channel = 0, next_chan = 0, max_pwr = 0; | |
709 | u8 i, flag = 0; | |
710 | size_t triplet_size; | |
20d2ebe5 | 711 | int ret = 0; |
cc4b9d39 | 712 | |
20d2ebe5 DD |
713 | if (!priv->country_code[0]) |
714 | goto out; | |
cc4b9d39 DW |
715 | |
716 | memset(&cmd, 0, sizeof(cmd)); | |
717 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
718 | ||
719 | lbs_deb_11d("Setting country code '%c%c'\n", | |
20d2ebe5 | 720 | priv->country_code[0], priv->country_code[1]); |
cc4b9d39 DW |
721 | |
722 | domain->header.type = cpu_to_le16(TLV_TYPE_DOMAIN); | |
723 | ||
724 | /* Set country code */ | |
20d2ebe5 DD |
725 | domain->country_code[0] = priv->country_code[0]; |
726 | domain->country_code[1] = priv->country_code[1]; | |
cc4b9d39 DW |
727 | domain->country_code[2] = ' '; |
728 | ||
729 | /* Now set up the channel triplets; firmware is somewhat picky here | |
730 | * and doesn't validate channel numbers and spans; hence it would | |
731 | * interpret a triplet of (36, 4, 20) as channels 36, 37, 38, 39. Since | |
732 | * the last 3 aren't valid channels, the driver is responsible for | |
733 | * splitting that up into 4 triplet pairs of (36, 1, 20) + (40, 1, 20) | |
734 | * etc. | |
735 | */ | |
736 | for (band = 0; | |
57fbcce3 | 737 | (band < NUM_NL80211_BANDS) && (num_triplet < MAX_11D_TRIPLETS); |
cc4b9d39 DW |
738 | band++) { |
739 | ||
740 | if (!bands[band]) | |
741 | continue; | |
742 | ||
743 | for (i = 0; | |
744 | (i < bands[band]->n_channels) && (num_triplet < MAX_11D_TRIPLETS); | |
745 | i++) { | |
746 | ch = &bands[band]->channels[i]; | |
747 | if (ch->flags & IEEE80211_CHAN_DISABLED) | |
748 | continue; | |
749 | ||
750 | if (!flag) { | |
751 | flag = 1; | |
752 | next_chan = first_channel = (u32) ch->hw_value; | |
753 | max_pwr = ch->max_power; | |
754 | num_parsed_chan = 1; | |
755 | continue; | |
756 | } | |
757 | ||
758 | if ((ch->hw_value == next_chan + 1) && | |
759 | (ch->max_power == max_pwr)) { | |
760 | /* Consolidate adjacent channels */ | |
761 | next_chan++; | |
762 | num_parsed_chan++; | |
763 | } else { | |
764 | /* Add this triplet */ | |
765 | lbs_deb_11d("11D triplet (%d, %d, %d)\n", | |
766 | first_channel, num_parsed_chan, | |
767 | max_pwr); | |
768 | t = &domain->triplet[num_triplet]; | |
769 | t->chans.first_channel = first_channel; | |
770 | t->chans.num_channels = num_parsed_chan; | |
771 | t->chans.max_power = max_pwr; | |
772 | num_triplet++; | |
773 | flag = 0; | |
774 | } | |
775 | } | |
776 | ||
777 | if (flag) { | |
778 | /* Add last triplet */ | |
779 | lbs_deb_11d("11D triplet (%d, %d, %d)\n", first_channel, | |
780 | num_parsed_chan, max_pwr); | |
781 | t = &domain->triplet[num_triplet]; | |
782 | t->chans.first_channel = first_channel; | |
783 | t->chans.num_channels = num_parsed_chan; | |
784 | t->chans.max_power = max_pwr; | |
785 | num_triplet++; | |
786 | } | |
787 | } | |
788 | ||
789 | lbs_deb_11d("# triplets %d\n", num_triplet); | |
790 | ||
791 | /* Set command header sizes */ | |
792 | triplet_size = num_triplet * sizeof(struct ieee80211_country_ie_triplet); | |
793 | domain->header.len = cpu_to_le16(sizeof(domain->country_code) + | |
794 | triplet_size); | |
795 | ||
796 | lbs_deb_hex(LBS_DEB_11D, "802.11D domain param set", | |
797 | (u8 *) &cmd.domain.country_code, | |
798 | le16_to_cpu(domain->header.len)); | |
799 | ||
800 | cmd.hdr.size = cpu_to_le16(sizeof(cmd.hdr) + | |
801 | sizeof(cmd.action) + | |
802 | sizeof(cmd.domain.header) + | |
803 | sizeof(cmd.domain.country_code) + | |
804 | triplet_size); | |
805 | ||
806 | ret = lbs_cmd_with_response(priv, CMD_802_11D_DOMAIN_INFO, &cmd); | |
807 | ||
20d2ebe5 | 808 | out: |
cc4b9d39 DW |
809 | return ret; |
810 | } | |
811 | ||
4c7c6e00 | 812 | /** |
8973a6e7 | 813 | * lbs_get_reg - Read a MAC, Baseband, or RF register |
4c7c6e00 | 814 | * |
8973a6e7 RD |
815 | * @priv: pointer to &struct lbs_private |
816 | * @reg: register command, one of CMD_MAC_REG_ACCESS, | |
817 | * CMD_BBP_REG_ACCESS, or CMD_RF_REG_ACCESS | |
818 | * @offset: byte offset of the register to get | |
819 | * @value: on success, the value of the register at 'offset' | |
4c7c6e00 | 820 | * |
8973a6e7 | 821 | * returns: 0 on success, error code on failure |
4c7c6e00 DW |
822 | */ |
823 | int lbs_get_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 *value) | |
876c9d3a | 824 | { |
4c7c6e00 DW |
825 | struct cmd_ds_reg_access cmd; |
826 | int ret = 0; | |
876c9d3a | 827 | |
4c7c6e00 | 828 | BUG_ON(value == NULL); |
876c9d3a | 829 | |
4c7c6e00 DW |
830 | memset(&cmd, 0, sizeof(cmd)); |
831 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
832 | cmd.action = cpu_to_le16(CMD_ACT_GET); | |
edcc3604 | 833 | cmd.offset = cpu_to_le16(offset); |
876c9d3a | 834 | |
4c7c6e00 DW |
835 | if (reg != CMD_MAC_REG_ACCESS && |
836 | reg != CMD_BBP_REG_ACCESS && | |
837 | reg != CMD_RF_REG_ACCESS) { | |
838 | ret = -EINVAL; | |
839 | goto out; | |
840 | } | |
876c9d3a | 841 | |
4c7c6e00 | 842 | ret = lbs_cmd_with_response(priv, reg, &cmd); |
edcc3604 | 843 | if (!ret) { |
4c7c6e00 DW |
844 | if (reg == CMD_BBP_REG_ACCESS || reg == CMD_RF_REG_ACCESS) |
845 | *value = cmd.value.bbp_rf; | |
846 | else if (reg == CMD_MAC_REG_ACCESS) | |
847 | *value = le32_to_cpu(cmd.value.mac); | |
848 | } | |
876c9d3a | 849 | |
4c7c6e00 | 850 | out: |
4c7c6e00 DW |
851 | return ret; |
852 | } | |
876c9d3a | 853 | |
4c7c6e00 | 854 | /** |
8973a6e7 | 855 | * lbs_set_reg - Write a MAC, Baseband, or RF register |
4c7c6e00 | 856 | * |
8973a6e7 RD |
857 | * @priv: pointer to &struct lbs_private |
858 | * @reg: register command, one of CMD_MAC_REG_ACCESS, | |
859 | * CMD_BBP_REG_ACCESS, or CMD_RF_REG_ACCESS | |
860 | * @offset: byte offset of the register to set | |
861 | * @value: the value to write to the register at 'offset' | |
4c7c6e00 | 862 | * |
8973a6e7 | 863 | * returns: 0 on success, error code on failure |
4c7c6e00 DW |
864 | */ |
865 | int lbs_set_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 value) | |
866 | { | |
867 | struct cmd_ds_reg_access cmd; | |
868 | int ret = 0; | |
876c9d3a | 869 | |
4c7c6e00 DW |
870 | memset(&cmd, 0, sizeof(cmd)); |
871 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
872 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
edcc3604 | 873 | cmd.offset = cpu_to_le16(offset); |
876c9d3a | 874 | |
4c7c6e00 DW |
875 | if (reg == CMD_BBP_REG_ACCESS || reg == CMD_RF_REG_ACCESS) |
876 | cmd.value.bbp_rf = (u8) (value & 0xFF); | |
877 | else if (reg == CMD_MAC_REG_ACCESS) | |
878 | cmd.value.mac = cpu_to_le32(value); | |
879 | else { | |
880 | ret = -EINVAL; | |
881 | goto out; | |
876c9d3a MT |
882 | } |
883 | ||
4c7c6e00 DW |
884 | ret = lbs_cmd_with_response(priv, reg, &cmd); |
885 | ||
886 | out: | |
4c7c6e00 | 887 | return ret; |
876c9d3a MT |
888 | } |
889 | ||
681ffbb7 DW |
890 | static void lbs_queue_cmd(struct lbs_private *priv, |
891 | struct cmd_ctrl_node *cmdnode) | |
876c9d3a MT |
892 | { |
893 | unsigned long flags; | |
681ffbb7 | 894 | int addtail = 1; |
876c9d3a | 895 | |
c4ab4127 DW |
896 | if (!cmdnode) { |
897 | lbs_deb_host("QUEUE_CMD: cmdnode is NULL\n"); | |
4bc606af | 898 | return; |
876c9d3a | 899 | } |
d9896ee1 DW |
900 | if (!cmdnode->cmdbuf->size) { |
901 | lbs_deb_host("DNLD_CMD: cmd size is zero\n"); | |
4bc606af | 902 | return; |
d9896ee1 | 903 | } |
ae125bf8 | 904 | cmdnode->result = 0; |
876c9d3a MT |
905 | |
906 | /* Exit_PS command needs to be queued in the header always. */ | |
ddac4526 | 907 | if (le16_to_cpu(cmdnode->cmdbuf->command) == CMD_802_11_PS_MODE) { |
0a7701b4 | 908 | struct cmd_ds_802_11_ps_mode *psm = (void *)cmdnode->cmdbuf; |
ddac4526 | 909 | |
0bb64087 | 910 | if (psm->action == cpu_to_le16(PS_MODE_ACTION_EXIT_PS)) { |
aa21c004 | 911 | if (priv->psstate != PS_STATE_FULL_POWER) |
876c9d3a MT |
912 | addtail = 0; |
913 | } | |
914 | } | |
915 | ||
0bb64087 | 916 | if (le16_to_cpu(cmdnode->cmdbuf->command) == CMD_802_11_WAKEUP_CONFIRM) |
66fceb69 AK |
917 | addtail = 0; |
918 | ||
aa21c004 | 919 | spin_lock_irqsave(&priv->driver_lock, flags); |
876c9d3a | 920 | |
ac47246e | 921 | if (addtail) |
aa21c004 | 922 | list_add_tail(&cmdnode->list, &priv->cmdpendingq); |
ac47246e | 923 | else |
aa21c004 | 924 | list_add(&cmdnode->list, &priv->cmdpendingq); |
876c9d3a | 925 | |
aa21c004 | 926 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 927 | |
8ff12da1 | 928 | lbs_deb_host("QUEUE_CMD: inserted command 0x%04x into cmdpendingq\n", |
c4ab4127 | 929 | le16_to_cpu(cmdnode->cmdbuf->command)); |
876c9d3a MT |
930 | } |
931 | ||
18c52e7c DW |
932 | static void lbs_submit_command(struct lbs_private *priv, |
933 | struct cmd_ctrl_node *cmdnode) | |
876c9d3a MT |
934 | { |
935 | unsigned long flags; | |
ddac4526 | 936 | struct cmd_header *cmd; |
18c52e7c DW |
937 | uint16_t cmdsize; |
938 | uint16_t command; | |
57962f0b | 939 | int timeo = 3 * HZ; |
18c52e7c | 940 | int ret; |
876c9d3a | 941 | |
ddac4526 | 942 | cmd = cmdnode->cmdbuf; |
876c9d3a | 943 | |
aa21c004 | 944 | spin_lock_irqsave(&priv->driver_lock, flags); |
71005be4 DD |
945 | priv->seqnum++; |
946 | cmd->seqnum = cpu_to_le16(priv->seqnum); | |
aa21c004 | 947 | priv->cur_cmd = cmdnode; |
aa21c004 | 948 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 949 | |
ddac4526 DW |
950 | cmdsize = le16_to_cpu(cmd->size); |
951 | command = le16_to_cpu(cmd->command); | |
876c9d3a | 952 | |
18c52e7c | 953 | /* These commands take longer */ |
be0d76e4 | 954 | if (command == CMD_802_11_SCAN || command == CMD_802_11_ASSOCIATE) |
57962f0b | 955 | timeo = 5 * HZ; |
18c52e7c | 956 | |
e5225b39 HS |
957 | lbs_deb_cmd("DNLD_CMD: command 0x%04x, seq %d, size %d\n", |
958 | command, le16_to_cpu(cmd->seqnum), cmdsize); | |
1afc09ab | 959 | lbs_deb_hex(LBS_DEB_CMD, "DNLD_CMD", (void *) cmdnode->cmdbuf, cmdsize); |
8ff12da1 | 960 | |
ddac4526 | 961 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) cmd, cmdsize); |
18c52e7c | 962 | |
d9896ee1 | 963 | if (ret) { |
f3a57fd1 JP |
964 | netdev_info(priv->dev, "DNLD_CMD: hw_host_to_card failed: %d\n", |
965 | ret); | |
9c3099f7 DD |
966 | /* Reset dnld state machine, report failure */ |
967 | priv->dnld_sent = DNLD_RES_RECEIVED; | |
968 | lbs_complete_command(priv, cmdnode, ret); | |
1afc09ab | 969 | } |
876c9d3a | 970 | |
49125454 AK |
971 | if (command == CMD_802_11_DEEP_SLEEP) { |
972 | if (priv->is_auto_deep_sleep_enabled) { | |
973 | priv->wakeup_dev_required = 1; | |
974 | priv->dnld_sent = 0; | |
975 | } | |
976 | priv->is_deep_sleep = 1; | |
977 | lbs_complete_command(priv, cmdnode, 0); | |
978 | } else { | |
979 | /* Setup the timer after transmit command */ | |
980 | mod_timer(&priv->command_timer, jiffies + timeo); | |
981 | } | |
876c9d3a MT |
982 | } |
983 | ||
8973a6e7 | 984 | /* |
876c9d3a | 985 | * This function inserts command node to cmdfreeq |
aa21c004 | 986 | * after cleans it. Requires priv->driver_lock held. |
876c9d3a | 987 | */ |
183aeac1 | 988 | static void __lbs_cleanup_and_insert_cmd(struct lbs_private *priv, |
5ba2f8a0 | 989 | struct cmd_ctrl_node *cmdnode) |
876c9d3a | 990 | { |
5ba2f8a0 | 991 | if (!cmdnode) |
4bc606af | 992 | return; |
5ba2f8a0 | 993 | |
5ba2f8a0 DW |
994 | cmdnode->callback = NULL; |
995 | cmdnode->callback_arg = 0; | |
876c9d3a | 996 | |
5ba2f8a0 | 997 | memset(cmdnode->cmdbuf, 0, LBS_CMD_BUFFER_SIZE); |
876c9d3a | 998 | |
5ba2f8a0 | 999 | list_add_tail(&cmdnode->list, &priv->cmdfreeq); |
876c9d3a MT |
1000 | } |
1001 | ||
69f9032d HS |
1002 | static void lbs_cleanup_and_insert_cmd(struct lbs_private *priv, |
1003 | struct cmd_ctrl_node *ptempcmd) | |
876c9d3a MT |
1004 | { |
1005 | unsigned long flags; | |
1006 | ||
aa21c004 | 1007 | spin_lock_irqsave(&priv->driver_lock, flags); |
10078321 | 1008 | __lbs_cleanup_and_insert_cmd(priv, ptempcmd); |
aa21c004 | 1009 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1010 | } |
1011 | ||
df90d843 DD |
1012 | void __lbs_complete_command(struct lbs_private *priv, struct cmd_ctrl_node *cmd, |
1013 | int result) | |
183aeac1 | 1014 | { |
df90d843 DD |
1015 | /* |
1016 | * Normally, commands are removed from cmdpendingq before being | |
1017 | * submitted. However, we can arrive here on alternative codepaths | |
1018 | * where the command is still pending. Make sure the command really | |
1019 | * isn't part of a list at this point. | |
1020 | */ | |
1021 | list_del_init(&cmd->list); | |
1022 | ||
ae125bf8 | 1023 | cmd->result = result; |
5ba2f8a0 | 1024 | cmd->cmdwaitqwoken = 1; |
df90d843 | 1025 | wake_up(&cmd->cmdwait_q); |
5ba2f8a0 | 1026 | |
8db4a2b9 | 1027 | if (!cmd->callback || cmd->callback == lbs_cmd_async_callback) |
ad12d0f4 | 1028 | __lbs_cleanup_and_insert_cmd(priv, cmd); |
183aeac1 | 1029 | priv->cur_cmd = NULL; |
d2e7b342 | 1030 | wake_up(&priv->waitq); |
df90d843 DD |
1031 | } |
1032 | ||
1033 | void lbs_complete_command(struct lbs_private *priv, struct cmd_ctrl_node *cmd, | |
1034 | int result) | |
1035 | { | |
1036 | unsigned long flags; | |
1037 | spin_lock_irqsave(&priv->driver_lock, flags); | |
1038 | __lbs_complete_command(priv, cmd, result); | |
1039 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
183aeac1 DW |
1040 | } |
1041 | ||
d5db2dfa | 1042 | int lbs_set_radio(struct lbs_private *priv, u8 preamble, u8 radio_on) |
876c9d3a | 1043 | { |
a7c45890 | 1044 | struct cmd_ds_802_11_radio_control cmd; |
d5db2dfa | 1045 | int ret = -EINVAL; |
876c9d3a | 1046 | |
a7c45890 DW |
1047 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
1048 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
c0f36ebf | 1049 | cmd.control = 0; |
a7c45890 | 1050 | |
d5db2dfa DW |
1051 | /* Only v8 and below support setting the preamble */ |
1052 | if (priv->fwrelease < 0x09000000) { | |
1053 | switch (preamble) { | |
1054 | case RADIO_PREAMBLE_SHORT: | |
d5db2dfa DW |
1055 | case RADIO_PREAMBLE_AUTO: |
1056 | case RADIO_PREAMBLE_LONG: | |
1057 | cmd.control = cpu_to_le16(preamble); | |
1058 | break; | |
1059 | default: | |
1060 | goto out; | |
1061 | } | |
1062 | } | |
a7c45890 | 1063 | |
d5db2dfa DW |
1064 | if (radio_on) |
1065 | cmd.control |= cpu_to_le16(0x1); | |
1066 | else { | |
1067 | cmd.control &= cpu_to_le16(~0x1); | |
1068 | priv->txpower_cur = 0; | |
a7c45890 | 1069 | } |
876c9d3a | 1070 | |
d5db2dfa DW |
1071 | lbs_deb_cmd("RADIO_CONTROL: radio %s, preamble %d\n", |
1072 | radio_on ? "ON" : "OFF", preamble); | |
a7c45890 | 1073 | |
d5db2dfa | 1074 | priv->radio_on = radio_on; |
a7c45890 DW |
1075 | |
1076 | ret = lbs_cmd_with_response(priv, CMD_802_11_RADIO_CONTROL, &cmd); | |
876c9d3a | 1077 | |
d5db2dfa | 1078 | out: |
876c9d3a MT |
1079 | return ret; |
1080 | } | |
1081 | ||
c97329e2 | 1082 | void lbs_set_mac_control(struct lbs_private *priv) |
876c9d3a | 1083 | { |
835d3ac5 | 1084 | struct cmd_ds_mac_control cmd; |
876c9d3a | 1085 | |
835d3ac5 | 1086 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
d9e9778c | 1087 | cmd.action = cpu_to_le16(priv->mac_control); |
835d3ac5 HS |
1088 | cmd.reserved = 0; |
1089 | ||
75bf45a7 | 1090 | lbs_cmd_async(priv, CMD_MAC_CONTROL, &cmd.hdr, sizeof(cmd)); |
876c9d3a MT |
1091 | } |
1092 | ||
871fc09f DD |
1093 | int lbs_set_mac_control_sync(struct lbs_private *priv) |
1094 | { | |
1095 | struct cmd_ds_mac_control cmd; | |
1096 | int ret = 0; | |
1097 | ||
871fc09f DD |
1098 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
1099 | cmd.action = cpu_to_le16(priv->mac_control); | |
1100 | cmd.reserved = 0; | |
1101 | ret = lbs_cmd_with_response(priv, CMD_MAC_CONTROL, &cmd); | |
1102 | ||
871fc09f DD |
1103 | return ret; |
1104 | } | |
1105 | ||
876c9d3a | 1106 | /** |
8973a6e7 RD |
1107 | * lbs_allocate_cmd_buffer - allocates the command buffer and links |
1108 | * it to command free queue | |
1109 | * | |
1110 | * @priv: A pointer to &struct lbs_private structure | |
876c9d3a | 1111 | * |
8973a6e7 | 1112 | * returns: 0 for success or -1 on error |
876c9d3a | 1113 | */ |
69f9032d | 1114 | int lbs_allocate_cmd_buffer(struct lbs_private *priv) |
876c9d3a MT |
1115 | { |
1116 | int ret = 0; | |
ddac4526 | 1117 | u32 bufsize; |
876c9d3a | 1118 | u32 i; |
ddac4526 | 1119 | struct cmd_ctrl_node *cmdarray; |
876c9d3a | 1120 | |
ddac4526 DW |
1121 | /* Allocate and initialize the command array */ |
1122 | bufsize = sizeof(struct cmd_ctrl_node) * LBS_NUM_CMD_BUFFERS; | |
1123 | if (!(cmdarray = kzalloc(bufsize, GFP_KERNEL))) { | |
8ff12da1 | 1124 | lbs_deb_host("ALLOC_CMD_BUF: tempcmd_array is NULL\n"); |
876c9d3a MT |
1125 | ret = -1; |
1126 | goto done; | |
1127 | } | |
ddac4526 | 1128 | priv->cmd_array = cmdarray; |
876c9d3a | 1129 | |
ddac4526 DW |
1130 | /* Allocate and initialize each command buffer in the command array */ |
1131 | for (i = 0; i < LBS_NUM_CMD_BUFFERS; i++) { | |
1132 | cmdarray[i].cmdbuf = kzalloc(LBS_CMD_BUFFER_SIZE, GFP_KERNEL); | |
1133 | if (!cmdarray[i].cmdbuf) { | |
8ff12da1 | 1134 | lbs_deb_host("ALLOC_CMD_BUF: ptempvirtualaddr is NULL\n"); |
876c9d3a MT |
1135 | ret = -1; |
1136 | goto done; | |
1137 | } | |
876c9d3a MT |
1138 | } |
1139 | ||
ddac4526 DW |
1140 | for (i = 0; i < LBS_NUM_CMD_BUFFERS; i++) { |
1141 | init_waitqueue_head(&cmdarray[i].cmdwait_q); | |
1142 | lbs_cleanup_and_insert_cmd(priv, &cmdarray[i]); | |
876c9d3a | 1143 | } |
876c9d3a | 1144 | ret = 0; |
9012b28a HS |
1145 | |
1146 | done: | |
876c9d3a MT |
1147 | return ret; |
1148 | } | |
1149 | ||
1150 | /** | |
8973a6e7 | 1151 | * lbs_free_cmd_buffer - free the command buffer |
876c9d3a | 1152 | * |
8973a6e7 RD |
1153 | * @priv: A pointer to &struct lbs_private structure |
1154 | * | |
1155 | * returns: 0 for success | |
876c9d3a | 1156 | */ |
69f9032d | 1157 | int lbs_free_cmd_buffer(struct lbs_private *priv) |
876c9d3a | 1158 | { |
ddac4526 | 1159 | struct cmd_ctrl_node *cmdarray; |
876c9d3a | 1160 | unsigned int i; |
876c9d3a | 1161 | |
876c9d3a | 1162 | /* need to check if cmd array is allocated or not */ |
aa21c004 | 1163 | if (priv->cmd_array == NULL) { |
8ff12da1 | 1164 | lbs_deb_host("FREE_CMD_BUF: cmd_array is NULL\n"); |
876c9d3a MT |
1165 | goto done; |
1166 | } | |
1167 | ||
ddac4526 | 1168 | cmdarray = priv->cmd_array; |
876c9d3a MT |
1169 | |
1170 | /* Release shared memory buffers */ | |
ddac4526 DW |
1171 | for (i = 0; i < LBS_NUM_CMD_BUFFERS; i++) { |
1172 | if (cmdarray[i].cmdbuf) { | |
1173 | kfree(cmdarray[i].cmdbuf); | |
1174 | cmdarray[i].cmdbuf = NULL; | |
876c9d3a MT |
1175 | } |
1176 | } | |
1177 | ||
1178 | /* Release cmd_ctrl_node */ | |
aa21c004 DW |
1179 | if (priv->cmd_array) { |
1180 | kfree(priv->cmd_array); | |
1181 | priv->cmd_array = NULL; | |
876c9d3a MT |
1182 | } |
1183 | ||
1184 | done: | |
876c9d3a MT |
1185 | return 0; |
1186 | } | |
1187 | ||
1188 | /** | |
8973a6e7 RD |
1189 | * lbs_get_free_cmd_node - gets a free command node if available in |
1190 | * command free queue | |
1191 | * | |
1192 | * @priv: A pointer to &struct lbs_private structure | |
876c9d3a | 1193 | * |
8973a6e7 RD |
1194 | * returns: A pointer to &cmd_ctrl_node structure on success |
1195 | * or %NULL on error | |
876c9d3a | 1196 | */ |
d06956b5 | 1197 | static struct cmd_ctrl_node *lbs_get_free_cmd_node(struct lbs_private *priv) |
876c9d3a MT |
1198 | { |
1199 | struct cmd_ctrl_node *tempnode; | |
876c9d3a MT |
1200 | unsigned long flags; |
1201 | ||
aa21c004 | 1202 | if (!priv) |
876c9d3a MT |
1203 | return NULL; |
1204 | ||
aa21c004 | 1205 | spin_lock_irqsave(&priv->driver_lock, flags); |
876c9d3a | 1206 | |
aa21c004 DW |
1207 | if (!list_empty(&priv->cmdfreeq)) { |
1208 | tempnode = list_first_entry(&priv->cmdfreeq, | |
abe3ed14 | 1209 | struct cmd_ctrl_node, list); |
df90d843 | 1210 | list_del_init(&tempnode->list); |
876c9d3a | 1211 | } else { |
8ff12da1 | 1212 | lbs_deb_host("GET_CMD_NODE: cmd_ctrl_node is not available\n"); |
876c9d3a MT |
1213 | tempnode = NULL; |
1214 | } | |
1215 | ||
aa21c004 | 1216 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 1217 | |
876c9d3a MT |
1218 | return tempnode; |
1219 | } | |
1220 | ||
876c9d3a | 1221 | /** |
8973a6e7 RD |
1222 | * lbs_execute_next_command - execute next command in command |
1223 | * pending queue. Will put firmware back to PS mode if applicable. | |
876c9d3a | 1224 | * |
8973a6e7 RD |
1225 | * @priv: A pointer to &struct lbs_private structure |
1226 | * | |
1227 | * returns: 0 on success or -1 on error | |
876c9d3a | 1228 | */ |
69f9032d | 1229 | int lbs_execute_next_command(struct lbs_private *priv) |
876c9d3a | 1230 | { |
876c9d3a | 1231 | struct cmd_ctrl_node *cmdnode = NULL; |
ddac4526 | 1232 | struct cmd_header *cmd; |
876c9d3a MT |
1233 | unsigned long flags; |
1234 | int ret = 0; | |
1235 | ||
1afc09ab HS |
1236 | /* Debug group is LBS_DEB_THREAD and not LBS_DEB_HOST, because the |
1237 | * only caller to us is lbs_thread() and we get even when a | |
1238 | * data packet is received */ | |
aa21c004 | 1239 | spin_lock_irqsave(&priv->driver_lock, flags); |
876c9d3a | 1240 | |
aa21c004 | 1241 | if (priv->cur_cmd) { |
f3a57fd1 JP |
1242 | netdev_alert(priv->dev, |
1243 | "EXEC_NEXT_CMD: already processing command!\n"); | |
aa21c004 | 1244 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1245 | ret = -1; |
1246 | goto done; | |
1247 | } | |
1248 | ||
aa21c004 DW |
1249 | if (!list_empty(&priv->cmdpendingq)) { |
1250 | cmdnode = list_first_entry(&priv->cmdpendingq, | |
abe3ed14 | 1251 | struct cmd_ctrl_node, list); |
876c9d3a MT |
1252 | } |
1253 | ||
aa21c004 | 1254 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1255 | |
1256 | if (cmdnode) { | |
ddac4526 | 1257 | cmd = cmdnode->cmdbuf; |
876c9d3a | 1258 | |
ddac4526 | 1259 | if (is_command_allowed_in_ps(le16_to_cpu(cmd->command))) { |
aa21c004 DW |
1260 | if ((priv->psstate == PS_STATE_SLEEP) || |
1261 | (priv->psstate == PS_STATE_PRE_SLEEP)) { | |
8ff12da1 HS |
1262 | lbs_deb_host( |
1263 | "EXEC_NEXT_CMD: cannot send cmd 0x%04x in psstate %d\n", | |
ddac4526 | 1264 | le16_to_cpu(cmd->command), |
aa21c004 | 1265 | priv->psstate); |
876c9d3a MT |
1266 | ret = -1; |
1267 | goto done; | |
1268 | } | |
8ff12da1 | 1269 | lbs_deb_host("EXEC_NEXT_CMD: OK to send command " |
ddac4526 DW |
1270 | "0x%04x in psstate %d\n", |
1271 | le16_to_cpu(cmd->command), priv->psstate); | |
aa21c004 | 1272 | } else if (priv->psstate != PS_STATE_FULL_POWER) { |
876c9d3a MT |
1273 | /* |
1274 | * 1. Non-PS command: | |
1275 | * Queue it. set needtowakeup to TRUE if current state | |
0bb64087 DW |
1276 | * is SLEEP, otherwise call send EXIT_PS. |
1277 | * 2. PS command but not EXIT_PS: | |
876c9d3a | 1278 | * Ignore it. |
0bb64087 | 1279 | * 3. PS command EXIT_PS: |
876c9d3a MT |
1280 | * Set needtowakeup to TRUE if current state is SLEEP, |
1281 | * otherwise send this command down to firmware | |
1282 | * immediately. | |
1283 | */ | |
ddac4526 | 1284 | if (cmd->command != cpu_to_le16(CMD_802_11_PS_MODE)) { |
876c9d3a MT |
1285 | /* Prepare to send Exit PS, |
1286 | * this non PS command will be sent later */ | |
aa21c004 DW |
1287 | if ((priv->psstate == PS_STATE_SLEEP) |
1288 | || (priv->psstate == PS_STATE_PRE_SLEEP) | |
876c9d3a MT |
1289 | ) { |
1290 | /* w/ new scheme, it will not reach here. | |
1291 | since it is blocked in main_thread. */ | |
aa21c004 | 1292 | priv->needtowakeup = 1; |
0bb64087 DW |
1293 | } else { |
1294 | lbs_set_ps_mode(priv, | |
1295 | PS_MODE_ACTION_EXIT_PS, | |
1296 | false); | |
1297 | } | |
876c9d3a MT |
1298 | |
1299 | ret = 0; | |
1300 | goto done; | |
1301 | } else { | |
1302 | /* | |
1303 | * PS command. Ignore it if it is not Exit_PS. | |
1304 | * otherwise send it down immediately. | |
1305 | */ | |
0a7701b4 | 1306 | struct cmd_ds_802_11_ps_mode *psm = (void *)cmd; |
876c9d3a | 1307 | |
8ff12da1 HS |
1308 | lbs_deb_host( |
1309 | "EXEC_NEXT_CMD: PS cmd, action 0x%02x\n", | |
876c9d3a MT |
1310 | psm->action); |
1311 | if (psm->action != | |
0bb64087 | 1312 | cpu_to_le16(PS_MODE_ACTION_EXIT_PS)) { |
8ff12da1 HS |
1313 | lbs_deb_host( |
1314 | "EXEC_NEXT_CMD: ignore ENTER_PS cmd\n"); | |
183aeac1 | 1315 | lbs_complete_command(priv, cmdnode, 0); |
876c9d3a MT |
1316 | |
1317 | ret = 0; | |
1318 | goto done; | |
1319 | } | |
1320 | ||
aa21c004 DW |
1321 | if ((priv->psstate == PS_STATE_SLEEP) || |
1322 | (priv->psstate == PS_STATE_PRE_SLEEP)) { | |
8ff12da1 HS |
1323 | lbs_deb_host( |
1324 | "EXEC_NEXT_CMD: ignore EXIT_PS cmd in sleep\n"); | |
183aeac1 | 1325 | lbs_complete_command(priv, cmdnode, 0); |
aa21c004 | 1326 | priv->needtowakeup = 1; |
876c9d3a MT |
1327 | |
1328 | ret = 0; | |
1329 | goto done; | |
1330 | } | |
1331 | ||
8ff12da1 HS |
1332 | lbs_deb_host( |
1333 | "EXEC_NEXT_CMD: sending EXIT_PS\n"); | |
876c9d3a MT |
1334 | } |
1335 | } | |
2ae1b8b3 | 1336 | spin_lock_irqsave(&priv->driver_lock, flags); |
df90d843 | 1337 | list_del_init(&cmdnode->list); |
2ae1b8b3 | 1338 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
8ff12da1 | 1339 | lbs_deb_host("EXEC_NEXT_CMD: sending command 0x%04x\n", |
ddac4526 | 1340 | le16_to_cpu(cmd->command)); |
d9896ee1 | 1341 | lbs_submit_command(priv, cmdnode); |
876c9d3a MT |
1342 | } else { |
1343 | /* | |
1344 | * check if in power save mode, if yes, put the device back | |
1345 | * to PS mode | |
1346 | */ | |
aa21c004 DW |
1347 | if ((priv->psmode != LBS802_11POWERMODECAM) && |
1348 | (priv->psstate == PS_STATE_FULL_POWER) && | |
fada24a5 AK |
1349 | (priv->connect_status == LBS_CONNECTED)) { |
1350 | lbs_deb_host( | |
1351 | "EXEC_NEXT_CMD: cmdpendingq empty, go back to PS_SLEEP"); | |
1352 | lbs_set_ps_mode(priv, PS_MODE_ACTION_ENTER_PS, | |
1353 | false); | |
876c9d3a MT |
1354 | } |
1355 | } | |
1356 | ||
1357 | ret = 0; | |
1358 | done: | |
1359 | return ret; | |
1360 | } | |
1361 | ||
f539f2ef | 1362 | static void lbs_send_confirmsleep(struct lbs_private *priv) |
876c9d3a MT |
1363 | { |
1364 | unsigned long flags; | |
f539f2ef | 1365 | int ret; |
876c9d3a | 1366 | |
f539f2ef HS |
1367 | lbs_deb_hex(LBS_DEB_HOST, "sleep confirm", (u8 *) &confirm_sleep, |
1368 | sizeof(confirm_sleep)); | |
876c9d3a | 1369 | |
f539f2ef HS |
1370 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) &confirm_sleep, |
1371 | sizeof(confirm_sleep)); | |
876c9d3a | 1372 | if (ret) { |
f3a57fd1 | 1373 | netdev_alert(priv->dev, "confirm_sleep failed\n"); |
4bc606af | 1374 | return; |
876c9d3a | 1375 | } |
7919b89c HS |
1376 | |
1377 | spin_lock_irqsave(&priv->driver_lock, flags); | |
1378 | ||
a01f5450 HS |
1379 | /* We don't get a response on the sleep-confirmation */ |
1380 | priv->dnld_sent = DNLD_RES_RECEIVED; | |
1381 | ||
66fceb69 AK |
1382 | if (priv->is_host_sleep_configured) { |
1383 | priv->is_host_sleep_activated = 1; | |
1384 | wake_up_interruptible(&priv->host_sleep_q); | |
1385 | } | |
1386 | ||
7919b89c | 1387 | /* If nothing to do, go back to sleep (?) */ |
e64c026d | 1388 | if (!kfifo_len(&priv->event_fifo) && !priv->resp_len[priv->resp_idx]) |
7919b89c HS |
1389 | priv->psstate = PS_STATE_SLEEP; |
1390 | ||
1391 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
876c9d3a MT |
1392 | } |
1393 | ||
876c9d3a | 1394 | /** |
8973a6e7 RD |
1395 | * lbs_ps_confirm_sleep - checks condition and prepares to |
1396 | * send sleep confirm command to firmware if ok | |
1397 | * | |
1398 | * @priv: A pointer to &struct lbs_private structure | |
876c9d3a | 1399 | * |
8973a6e7 | 1400 | * returns: n/a |
876c9d3a | 1401 | */ |
d4ff0ef6 | 1402 | void lbs_ps_confirm_sleep(struct lbs_private *priv) |
876c9d3a MT |
1403 | { |
1404 | unsigned long flags =0; | |
d4ff0ef6 | 1405 | int allowed = 1; |
876c9d3a | 1406 | |
a01f5450 | 1407 | spin_lock_irqsave(&priv->driver_lock, flags); |
634b8f49 | 1408 | if (priv->dnld_sent) { |
876c9d3a | 1409 | allowed = 0; |
23d36eec | 1410 | lbs_deb_host("dnld_sent was set\n"); |
876c9d3a MT |
1411 | } |
1412 | ||
7919b89c | 1413 | /* In-progress command? */ |
aa21c004 | 1414 | if (priv->cur_cmd) { |
876c9d3a | 1415 | allowed = 0; |
23d36eec | 1416 | lbs_deb_host("cur_cmd was set\n"); |
876c9d3a | 1417 | } |
7919b89c HS |
1418 | |
1419 | /* Pending events or command responses? */ | |
e64c026d | 1420 | if (kfifo_len(&priv->event_fifo) || priv->resp_len[priv->resp_idx]) { |
876c9d3a | 1421 | allowed = 0; |
7919b89c | 1422 | lbs_deb_host("pending events or command responses\n"); |
876c9d3a | 1423 | } |
aa21c004 | 1424 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1425 | |
1426 | if (allowed) { | |
10078321 | 1427 | lbs_deb_host("sending lbs_ps_confirm_sleep\n"); |
f539f2ef | 1428 | lbs_send_confirmsleep(priv); |
876c9d3a | 1429 | } else { |
8ff12da1 | 1430 | lbs_deb_host("sleep confirm has been delayed\n"); |
876c9d3a | 1431 | } |
876c9d3a | 1432 | } |
675787e2 HS |
1433 | |
1434 | ||
0112c9e9 | 1435 | /** |
8973a6e7 | 1436 | * lbs_set_tpc_cfg - Configures the transmission power control functionality |
0112c9e9 | 1437 | * |
8973a6e7 RD |
1438 | * @priv: A pointer to &struct lbs_private structure |
1439 | * @enable: Transmission power control enable | |
1440 | * @p0: Power level when link quality is good (dBm). | |
1441 | * @p1: Power level when link quality is fair (dBm). | |
1442 | * @p2: Power level when link quality is poor (dBm). | |
1443 | * @usesnr: Use Signal to Noise Ratio in TPC | |
0112c9e9 | 1444 | * |
8973a6e7 | 1445 | * returns: 0 on success |
0112c9e9 AN |
1446 | */ |
1447 | int lbs_set_tpc_cfg(struct lbs_private *priv, int enable, int8_t p0, int8_t p1, | |
1448 | int8_t p2, int usesnr) | |
1449 | { | |
1450 | struct cmd_ds_802_11_tpc_cfg cmd; | |
1451 | int ret; | |
1452 | ||
1453 | memset(&cmd, 0, sizeof(cmd)); | |
1454 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
1455 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
1456 | cmd.enable = !!enable; | |
3ed6e080 | 1457 | cmd.usesnr = !!usesnr; |
0112c9e9 AN |
1458 | cmd.P0 = p0; |
1459 | cmd.P1 = p1; | |
1460 | cmd.P2 = p2; | |
1461 | ||
1462 | ret = lbs_cmd_with_response(priv, CMD_802_11_TPC_CFG, &cmd); | |
1463 | ||
1464 | return ret; | |
1465 | } | |
1466 | ||
1467 | /** | |
8973a6e7 | 1468 | * lbs_set_power_adapt_cfg - Configures the power adaptation settings |
0112c9e9 | 1469 | * |
8973a6e7 RD |
1470 | * @priv: A pointer to &struct lbs_private structure |
1471 | * @enable: Power adaptation enable | |
1472 | * @p0: Power level for 1, 2, 5.5 and 11 Mbps (dBm). | |
1473 | * @p1: Power level for 6, 9, 12, 18, 22, 24 and 36 Mbps (dBm). | |
1474 | * @p2: Power level for 48 and 54 Mbps (dBm). | |
0112c9e9 | 1475 | * |
8973a6e7 | 1476 | * returns: 0 on Success |
0112c9e9 AN |
1477 | */ |
1478 | ||
1479 | int lbs_set_power_adapt_cfg(struct lbs_private *priv, int enable, int8_t p0, | |
1480 | int8_t p1, int8_t p2) | |
1481 | { | |
1482 | struct cmd_ds_802_11_pa_cfg cmd; | |
1483 | int ret; | |
1484 | ||
1485 | memset(&cmd, 0, sizeof(cmd)); | |
1486 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
1487 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
1488 | cmd.enable = !!enable; | |
1489 | cmd.P0 = p0; | |
1490 | cmd.P1 = p1; | |
1491 | cmd.P2 = p2; | |
1492 | ||
1493 | ret = lbs_cmd_with_response(priv, CMD_802_11_PA_CFG , &cmd); | |
1494 | ||
1495 | return ret; | |
1496 | } | |
1497 | ||
1498 | ||
6d898b19 | 1499 | struct cmd_ctrl_node *__lbs_cmd_async(struct lbs_private *priv, |
8db4a2b9 HS |
1500 | uint16_t command, struct cmd_header *in_cmd, int in_cmd_size, |
1501 | int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *), | |
1502 | unsigned long callback_arg) | |
675787e2 | 1503 | { |
675787e2 | 1504 | struct cmd_ctrl_node *cmdnode; |
675787e2 | 1505 | |
aa21c004 | 1506 | if (priv->surpriseremoved) { |
675787e2 | 1507 | lbs_deb_host("PREP_CMD: card removed\n"); |
3399ea5f | 1508 | cmdnode = ERR_PTR(-ENOENT); |
675787e2 HS |
1509 | goto done; |
1510 | } | |
1511 | ||
77ccdcf2 DW |
1512 | /* No commands are allowed in Deep Sleep until we toggle the GPIO |
1513 | * to wake up the card and it has signaled that it's ready. | |
1514 | */ | |
1515 | if (!priv->is_auto_deep_sleep_enabled) { | |
1516 | if (priv->is_deep_sleep) { | |
1517 | lbs_deb_cmd("command not allowed in deep sleep\n"); | |
1518 | cmdnode = ERR_PTR(-EBUSY); | |
1519 | goto done; | |
1520 | } | |
63f275df AK |
1521 | } |
1522 | ||
d06956b5 | 1523 | cmdnode = lbs_get_free_cmd_node(priv); |
675787e2 HS |
1524 | if (cmdnode == NULL) { |
1525 | lbs_deb_host("PREP_CMD: cmdnode is NULL\n"); | |
1526 | ||
1527 | /* Wake up main thread to execute next command */ | |
d2e7b342 | 1528 | wake_up(&priv->waitq); |
3399ea5f | 1529 | cmdnode = ERR_PTR(-ENOBUFS); |
675787e2 HS |
1530 | goto done; |
1531 | } | |
1532 | ||
448a51ae | 1533 | cmdnode->callback = callback; |
1309b55b | 1534 | cmdnode->callback_arg = callback_arg; |
675787e2 | 1535 | |
7ad994de | 1536 | /* Copy the incoming command to the buffer */ |
ddac4526 | 1537 | memcpy(cmdnode->cmdbuf, in_cmd, in_cmd_size); |
7ad994de | 1538 | |
71005be4 | 1539 | /* Set command, clean result, move to buffer */ |
ddac4526 DW |
1540 | cmdnode->cmdbuf->command = cpu_to_le16(command); |
1541 | cmdnode->cmdbuf->size = cpu_to_le16(in_cmd_size); | |
ddac4526 | 1542 | cmdnode->cmdbuf->result = 0; |
675787e2 HS |
1543 | |
1544 | lbs_deb_host("PREP_CMD: command 0x%04x\n", command); | |
1545 | ||
675787e2 | 1546 | cmdnode->cmdwaitqwoken = 0; |
681ffbb7 | 1547 | lbs_queue_cmd(priv, cmdnode); |
d2e7b342 | 1548 | wake_up(&priv->waitq); |
675787e2 | 1549 | |
3399ea5f | 1550 | done: |
3399ea5f DW |
1551 | return cmdnode; |
1552 | } | |
1553 | ||
8db4a2b9 HS |
1554 | void lbs_cmd_async(struct lbs_private *priv, uint16_t command, |
1555 | struct cmd_header *in_cmd, int in_cmd_size) | |
1556 | { | |
8db4a2b9 HS |
1557 | __lbs_cmd_async(priv, command, in_cmd, in_cmd_size, |
1558 | lbs_cmd_async_callback, 0); | |
8db4a2b9 HS |
1559 | } |
1560 | ||
3399ea5f DW |
1561 | int __lbs_cmd(struct lbs_private *priv, uint16_t command, |
1562 | struct cmd_header *in_cmd, int in_cmd_size, | |
1563 | int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *), | |
1564 | unsigned long callback_arg) | |
1565 | { | |
1566 | struct cmd_ctrl_node *cmdnode; | |
1567 | unsigned long flags; | |
1568 | int ret = 0; | |
1569 | ||
3399ea5f DW |
1570 | cmdnode = __lbs_cmd_async(priv, command, in_cmd, in_cmd_size, |
1571 | callback, callback_arg); | |
1572 | if (IS_ERR(cmdnode)) { | |
1573 | ret = PTR_ERR(cmdnode); | |
1574 | goto done; | |
1575 | } | |
1576 | ||
675787e2 | 1577 | might_sleep(); |
df90d843 DD |
1578 | |
1579 | /* | |
1580 | * Be careful with signals here. A signal may be received as the system | |
1581 | * goes into suspend or resume. We do not want this to interrupt the | |
1582 | * command, so we perform an uninterruptible sleep. | |
1583 | */ | |
1584 | wait_event(cmdnode->cmdwait_q, cmdnode->cmdwaitqwoken); | |
675787e2 | 1585 | |
aa21c004 | 1586 | spin_lock_irqsave(&priv->driver_lock, flags); |
ae125bf8 DW |
1587 | ret = cmdnode->result; |
1588 | if (ret) | |
f3a57fd1 JP |
1589 | netdev_info(priv->dev, "PREP_CMD: command 0x%04x failed: %d\n", |
1590 | command, ret); | |
3399ea5f | 1591 | |
ad12d0f4 | 1592 | __lbs_cleanup_and_insert_cmd(priv, cmdnode); |
aa21c004 | 1593 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
675787e2 HS |
1594 | |
1595 | done: | |
675787e2 HS |
1596 | return ret; |
1597 | } | |
14e865ba | 1598 | EXPORT_SYMBOL_GPL(__lbs_cmd); |