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8ca151b5 JB |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
8b4139dc | 9 | * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH |
8ca151b5 JB |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of version 2 of the GNU General Public License as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but | |
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
23 | * USA | |
24 | * | |
25 | * The full GNU General Public License is included in this distribution | |
410dc5aa | 26 | * in the file called COPYING. |
8ca151b5 JB |
27 | * |
28 | * Contact Information: | |
29 | * Intel Linux Wireless <ilw@linux.intel.com> | |
30 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
31 | * | |
32 | * BSD LICENSE | |
33 | * | |
51368bf7 | 34 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
8b4139dc | 35 | * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH |
8ca151b5 JB |
36 | * All rights reserved. |
37 | * | |
38 | * Redistribution and use in source and binary forms, with or without | |
39 | * modification, are permitted provided that the following conditions | |
40 | * are met: | |
41 | * | |
42 | * * Redistributions of source code must retain the above copyright | |
43 | * notice, this list of conditions and the following disclaimer. | |
44 | * * Redistributions in binary form must reproduce the above copyright | |
45 | * notice, this list of conditions and the following disclaimer in | |
46 | * the documentation and/or other materials provided with the | |
47 | * distribution. | |
48 | * * Neither the name Intel Corporation nor the names of its | |
49 | * contributors may be used to endorse or promote products derived | |
50 | * from this software without specific prior written permission. | |
51 | * | |
52 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
53 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
54 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
55 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
56 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
57 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
58 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
59 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
60 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
61 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
62 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
63 | * | |
64 | *****************************************************************************/ | |
65 | #include <net/mac80211.h> | |
66 | ||
67 | #include "iwl-debug.h" | |
68 | #include "iwl-io.h" | |
7b445f35 | 69 | #include "iwl-prph.h" |
8ca151b5 JB |
70 | |
71 | #include "mvm.h" | |
72 | #include "fw-api-rs.h" | |
73 | ||
74 | /* | |
75 | * Will return 0 even if the cmd failed when RFKILL is asserted unless | |
76 | * CMD_WANT_SKB is set in cmd->flags. | |
77 | */ | |
78 | int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd) | |
79 | { | |
80 | int ret; | |
81 | ||
debff618 JB |
82 | #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP) |
83 | if (WARN_ON(mvm->d3_test_active)) | |
84 | return -EIO; | |
85 | #endif | |
86 | ||
8ca151b5 JB |
87 | /* |
88 | * Synchronous commands from this op-mode must hold | |
89 | * the mutex, this ensures we don't try to send two | |
90 | * (or more) synchronous commands at a time. | |
91 | */ | |
92 | if (!(cmd->flags & CMD_ASYNC)) | |
93 | lockdep_assert_held(&mvm->mutex); | |
94 | ||
95 | ret = iwl_trans_send_cmd(mvm->trans, cmd); | |
96 | ||
97 | /* | |
98 | * If the caller wants the SKB, then don't hide any problems, the | |
99 | * caller might access the response buffer which will be NULL if | |
100 | * the command failed. | |
101 | */ | |
102 | if (cmd->flags & CMD_WANT_SKB) | |
103 | return ret; | |
104 | ||
105 | /* Silently ignore failures if RFKILL is asserted */ | |
106 | if (!ret || ret == -ERFKILL) | |
107 | return 0; | |
108 | return ret; | |
109 | } | |
110 | ||
111 | int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u8 id, | |
112 | u32 flags, u16 len, const void *data) | |
113 | { | |
114 | struct iwl_host_cmd cmd = { | |
115 | .id = id, | |
116 | .len = { len, }, | |
117 | .data = { data, }, | |
118 | .flags = flags, | |
119 | }; | |
120 | ||
121 | return iwl_mvm_send_cmd(mvm, &cmd); | |
122 | } | |
123 | ||
124 | /* | |
0d365ae5 | 125 | * We assume that the caller set the status to the success value |
8ca151b5 JB |
126 | */ |
127 | int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd, | |
128 | u32 *status) | |
129 | { | |
130 | struct iwl_rx_packet *pkt; | |
131 | struct iwl_cmd_response *resp; | |
132 | int ret, resp_len; | |
133 | ||
134 | lockdep_assert_held(&mvm->mutex); | |
135 | ||
debff618 JB |
136 | #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP) |
137 | if (WARN_ON(mvm->d3_test_active)) | |
138 | return -EIO; | |
139 | #endif | |
140 | ||
8ca151b5 JB |
141 | /* |
142 | * Only synchronous commands can wait for status, | |
143 | * we use WANT_SKB so the caller can't. | |
144 | */ | |
145 | if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB), | |
146 | "cmd flags %x", cmd->flags)) | |
147 | return -EINVAL; | |
148 | ||
a1022927 | 149 | cmd->flags |= CMD_WANT_SKB; |
8ca151b5 JB |
150 | |
151 | ret = iwl_trans_send_cmd(mvm->trans, cmd); | |
152 | if (ret == -ERFKILL) { | |
153 | /* | |
154 | * The command failed because of RFKILL, don't update | |
155 | * the status, leave it as success and return 0. | |
156 | */ | |
157 | return 0; | |
158 | } else if (ret) { | |
159 | return ret; | |
160 | } | |
161 | ||
162 | pkt = cmd->resp_pkt; | |
163 | /* Can happen if RFKILL is asserted */ | |
164 | if (!pkt) { | |
165 | ret = 0; | |
166 | goto out_free_resp; | |
167 | } | |
168 | ||
169 | if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) { | |
170 | ret = -EIO; | |
171 | goto out_free_resp; | |
172 | } | |
173 | ||
65b30348 JB |
174 | resp_len = iwl_rx_packet_payload_len(pkt); |
175 | if (WARN_ON_ONCE(resp_len != sizeof(*resp))) { | |
8ca151b5 JB |
176 | ret = -EIO; |
177 | goto out_free_resp; | |
178 | } | |
179 | ||
180 | resp = (void *)pkt->data; | |
181 | *status = le32_to_cpu(resp->status); | |
182 | out_free_resp: | |
183 | iwl_free_resp(cmd); | |
184 | return ret; | |
185 | } | |
186 | ||
187 | /* | |
188 | * We assume that the caller set the status to the sucess value | |
189 | */ | |
190 | int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u8 id, u16 len, | |
191 | const void *data, u32 *status) | |
192 | { | |
193 | struct iwl_host_cmd cmd = { | |
194 | .id = id, | |
195 | .len = { len, }, | |
196 | .data = { data, }, | |
197 | }; | |
198 | ||
199 | return iwl_mvm_send_cmd_status(mvm, &cmd, status); | |
200 | } | |
201 | ||
202 | #define IWL_DECLARE_RATE_INFO(r) \ | |
203 | [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP | |
204 | ||
205 | /* | |
206 | * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP | |
207 | */ | |
208 | static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = { | |
209 | IWL_DECLARE_RATE_INFO(1), | |
210 | IWL_DECLARE_RATE_INFO(2), | |
211 | IWL_DECLARE_RATE_INFO(5), | |
212 | IWL_DECLARE_RATE_INFO(11), | |
213 | IWL_DECLARE_RATE_INFO(6), | |
214 | IWL_DECLARE_RATE_INFO(9), | |
215 | IWL_DECLARE_RATE_INFO(12), | |
216 | IWL_DECLARE_RATE_INFO(18), | |
217 | IWL_DECLARE_RATE_INFO(24), | |
218 | IWL_DECLARE_RATE_INFO(36), | |
219 | IWL_DECLARE_RATE_INFO(48), | |
220 | IWL_DECLARE_RATE_INFO(54), | |
221 | }; | |
222 | ||
223 | int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags, | |
224 | enum ieee80211_band band) | |
225 | { | |
226 | int rate = rate_n_flags & RATE_LEGACY_RATE_MSK; | |
227 | int idx; | |
228 | int band_offset = 0; | |
229 | ||
230 | /* Legacy rate format, search for match in table */ | |
231 | if (band == IEEE80211_BAND_5GHZ) | |
232 | band_offset = IWL_FIRST_OFDM_RATE; | |
233 | for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++) | |
234 | if (fw_rate_idx_to_plcp[idx] == rate) | |
235 | return idx - band_offset; | |
236 | ||
237 | return -1; | |
238 | } | |
239 | ||
240 | u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx) | |
241 | { | |
242 | /* Get PLCP rate for tx_cmd->rate_n_flags */ | |
243 | return fw_rate_idx_to_plcp[rate_idx]; | |
244 | } | |
245 | ||
246 | int iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb, | |
247 | struct iwl_device_cmd *cmd) | |
248 | { | |
249 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
250 | struct iwl_error_resp *err_resp = (void *)pkt->data; | |
251 | ||
252 | IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n", | |
253 | le32_to_cpu(err_resp->error_type), err_resp->cmd_id); | |
254 | IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n", | |
255 | le16_to_cpu(err_resp->bad_cmd_seq_num), | |
256 | le32_to_cpu(err_resp->error_service)); | |
257 | IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n", | |
258 | le64_to_cpu(err_resp->timestamp)); | |
259 | return 0; | |
260 | } | |
261 | ||
262 | /* | |
263 | * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h. | |
264 | * The parameter should also be a combination of ANT_[ABC]. | |
265 | */ | |
266 | u8 first_antenna(u8 mask) | |
267 | { | |
268 | BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */ | |
d7dad550 EG |
269 | if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */ |
270 | return BIT(0); | |
271 | return BIT(ffs(mask) - 1); | |
8ca151b5 JB |
272 | } |
273 | ||
274 | /* | |
275 | * Toggles between TX antennas to send the probe request on. | |
276 | * Receives the bitmask of valid TX antennas and the *index* used | |
277 | * for the last TX, and returns the next valid *index* to use. | |
278 | * In order to set it in the tx_cmd, must do BIT(idx). | |
279 | */ | |
280 | u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx) | |
281 | { | |
282 | u8 ind = last_idx; | |
283 | int i; | |
284 | ||
285 | for (i = 0; i < RATE_MCS_ANT_NUM; i++) { | |
286 | ind = (ind + 1) % RATE_MCS_ANT_NUM; | |
287 | if (valid & BIT(ind)) | |
288 | return ind; | |
289 | } | |
290 | ||
291 | WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid); | |
292 | return last_idx; | |
293 | } | |
294 | ||
e5209263 JB |
295 | static const struct { |
296 | const char *name; | |
8ca151b5 JB |
297 | u8 num; |
298 | } advanced_lookup[] = { | |
299 | { "NMI_INTERRUPT_WDG", 0x34 }, | |
300 | { "SYSASSERT", 0x35 }, | |
301 | { "UCODE_VERSION_MISMATCH", 0x37 }, | |
302 | { "BAD_COMMAND", 0x38 }, | |
303 | { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C }, | |
304 | { "FATAL_ERROR", 0x3D }, | |
305 | { "NMI_TRM_HW_ERR", 0x46 }, | |
306 | { "NMI_INTERRUPT_TRM", 0x4C }, | |
307 | { "NMI_INTERRUPT_BREAK_POINT", 0x54 }, | |
308 | { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C }, | |
309 | { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 }, | |
310 | { "NMI_INTERRUPT_HOST", 0x66 }, | |
311 | { "NMI_INTERRUPT_ACTION_PT", 0x7C }, | |
312 | { "NMI_INTERRUPT_UNKNOWN", 0x84 }, | |
313 | { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 }, | |
314 | { "ADVANCED_SYSASSERT", 0 }, | |
315 | }; | |
316 | ||
317 | static const char *desc_lookup(u32 num) | |
318 | { | |
319 | int i; | |
320 | ||
321 | for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++) | |
322 | if (advanced_lookup[i].num == num) | |
323 | return advanced_lookup[i].name; | |
324 | ||
325 | /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */ | |
326 | return advanced_lookup[i].name; | |
327 | } | |
328 | ||
329 | /* | |
330 | * Note: This structure is read from the device with IO accesses, | |
331 | * and the reading already does the endian conversion. As it is | |
332 | * read with u32-sized accesses, any members with a different size | |
333 | * need to be ordered correctly though! | |
334 | */ | |
7e1223b5 | 335 | struct iwl_error_event_table_v1 { |
8ca151b5 JB |
336 | u32 valid; /* (nonzero) valid, (0) log is empty */ |
337 | u32 error_id; /* type of error */ | |
338 | u32 pc; /* program counter */ | |
339 | u32 blink1; /* branch link */ | |
340 | u32 blink2; /* branch link */ | |
341 | u32 ilink1; /* interrupt link */ | |
342 | u32 ilink2; /* interrupt link */ | |
343 | u32 data1; /* error-specific data */ | |
344 | u32 data2; /* error-specific data */ | |
345 | u32 data3; /* error-specific data */ | |
346 | u32 bcon_time; /* beacon timer */ | |
347 | u32 tsf_low; /* network timestamp function timer */ | |
348 | u32 tsf_hi; /* network timestamp function timer */ | |
349 | u32 gp1; /* GP1 timer register */ | |
350 | u32 gp2; /* GP2 timer register */ | |
351 | u32 gp3; /* GP3 timer register */ | |
352 | u32 ucode_ver; /* uCode version */ | |
353 | u32 hw_ver; /* HW Silicon version */ | |
354 | u32 brd_ver; /* HW board version */ | |
355 | u32 log_pc; /* log program counter */ | |
356 | u32 frame_ptr; /* frame pointer */ | |
357 | u32 stack_ptr; /* stack pointer */ | |
358 | u32 hcmd; /* last host command header */ | |
359 | u32 isr0; /* isr status register LMPM_NIC_ISR0: | |
360 | * rxtx_flag */ | |
361 | u32 isr1; /* isr status register LMPM_NIC_ISR1: | |
362 | * host_flag */ | |
363 | u32 isr2; /* isr status register LMPM_NIC_ISR2: | |
364 | * enc_flag */ | |
365 | u32 isr3; /* isr status register LMPM_NIC_ISR3: | |
366 | * time_flag */ | |
367 | u32 isr4; /* isr status register LMPM_NIC_ISR4: | |
368 | * wico interrupt */ | |
369 | u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ | |
370 | u32 wait_event; /* wait event() caller address */ | |
371 | u32 l2p_control; /* L2pControlField */ | |
372 | u32 l2p_duration; /* L2pDurationField */ | |
373 | u32 l2p_mhvalid; /* L2pMhValidBits */ | |
374 | u32 l2p_addr_match; /* L2pAddrMatchStat */ | |
375 | u32 lmpm_pmg_sel; /* indicate which clocks are turned on | |
376 | * (LMPM_PMG_SEL) */ | |
377 | u32 u_timestamp; /* indicate when the date and time of the | |
378 | * compilation */ | |
379 | u32 flow_handler; /* FH read/write pointers, RX credit */ | |
7e1223b5 EG |
380 | } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */; |
381 | ||
382 | struct iwl_error_event_table { | |
383 | u32 valid; /* (nonzero) valid, (0) log is empty */ | |
384 | u32 error_id; /* type of error */ | |
385 | u32 pc; /* program counter */ | |
386 | u32 blink1; /* branch link */ | |
387 | u32 blink2; /* branch link */ | |
388 | u32 ilink1; /* interrupt link */ | |
389 | u32 ilink2; /* interrupt link */ | |
390 | u32 data1; /* error-specific data */ | |
391 | u32 data2; /* error-specific data */ | |
392 | u32 data3; /* error-specific data */ | |
393 | u32 bcon_time; /* beacon timer */ | |
394 | u32 tsf_low; /* network timestamp function timer */ | |
395 | u32 tsf_hi; /* network timestamp function timer */ | |
396 | u32 gp1; /* GP1 timer register */ | |
397 | u32 gp2; /* GP2 timer register */ | |
398 | u32 gp3; /* GP3 timer register */ | |
399 | u32 major; /* uCode version major */ | |
400 | u32 minor; /* uCode version minor */ | |
401 | u32 hw_ver; /* HW Silicon version */ | |
402 | u32 brd_ver; /* HW board version */ | |
403 | u32 log_pc; /* log program counter */ | |
404 | u32 frame_ptr; /* frame pointer */ | |
405 | u32 stack_ptr; /* stack pointer */ | |
406 | u32 hcmd; /* last host command header */ | |
407 | u32 isr0; /* isr status register LMPM_NIC_ISR0: | |
408 | * rxtx_flag */ | |
409 | u32 isr1; /* isr status register LMPM_NIC_ISR1: | |
410 | * host_flag */ | |
411 | u32 isr2; /* isr status register LMPM_NIC_ISR2: | |
412 | * enc_flag */ | |
413 | u32 isr3; /* isr status register LMPM_NIC_ISR3: | |
414 | * time_flag */ | |
415 | u32 isr4; /* isr status register LMPM_NIC_ISR4: | |
416 | * wico interrupt */ | |
417 | u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */ | |
418 | u32 wait_event; /* wait event() caller address */ | |
419 | u32 l2p_control; /* L2pControlField */ | |
420 | u32 l2p_duration; /* L2pDurationField */ | |
421 | u32 l2p_mhvalid; /* L2pMhValidBits */ | |
422 | u32 l2p_addr_match; /* L2pAddrMatchStat */ | |
423 | u32 lmpm_pmg_sel; /* indicate which clocks are turned on | |
424 | * (LMPM_PMG_SEL) */ | |
425 | u32 u_timestamp; /* indicate when the date and time of the | |
426 | * compilation */ | |
427 | u32 flow_handler; /* FH read/write pointers, RX credit */ | |
428 | } __packed /* LOG_ERROR_TABLE_API_S_VER_2 */; | |
8ca151b5 | 429 | |
01a9ca51 EH |
430 | /* |
431 | * UMAC error struct - relevant starting from family 8000 chip. | |
432 | * Note: This structure is read from the device with IO accesses, | |
433 | * and the reading already does the endian conversion. As it is | |
434 | * read with u32-sized accesses, any members with a different size | |
435 | * need to be ordered correctly though! | |
436 | */ | |
437 | struct iwl_umac_error_event_table { | |
438 | u32 valid; /* (nonzero) valid, (0) log is empty */ | |
439 | u32 error_id; /* type of error */ | |
01a9ca51 EH |
440 | u32 blink1; /* branch link */ |
441 | u32 blink2; /* branch link */ | |
442 | u32 ilink1; /* interrupt link */ | |
443 | u32 ilink2; /* interrupt link */ | |
444 | u32 data1; /* error-specific data */ | |
445 | u32 data2; /* error-specific data */ | |
32be1a83 | 446 | u32 data3; /* error-specific data */ |
7e1223b5 EG |
447 | u32 umac_major; |
448 | u32 umac_minor; | |
32be1a83 EH |
449 | u32 frame_pointer; /* core register 27*/ |
450 | u32 stack_pointer; /* core register 28 */ | |
7e1223b5 | 451 | u32 cmd_header; /* latest host cmd sent to UMAC */ |
32be1a83 | 452 | u32 nic_isr_pref; /* ISR status register */ |
01a9ca51 EH |
453 | } __packed; |
454 | ||
8ca151b5 JB |
455 | #define ERROR_START_OFFSET (1 * sizeof(u32)) |
456 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | |
457 | ||
01a9ca51 EH |
458 | static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm) |
459 | { | |
460 | struct iwl_trans *trans = mvm->trans; | |
461 | struct iwl_umac_error_event_table table; | |
462 | u32 base; | |
463 | ||
464 | base = mvm->umac_error_event_table; | |
465 | ||
32be1a83 | 466 | if (base < 0x800000) { |
01a9ca51 EH |
467 | IWL_ERR(mvm, |
468 | "Not valid error log pointer 0x%08X for %s uCode\n", | |
469 | base, | |
470 | (mvm->cur_ucode == IWL_UCODE_INIT) | |
471 | ? "Init" : "RT"); | |
472 | return; | |
473 | } | |
474 | ||
475 | iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table)); | |
476 | ||
477 | if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) { | |
478 | IWL_ERR(trans, "Start IWL Error Log Dump:\n"); | |
479 | IWL_ERR(trans, "Status: 0x%08lX, count: %d\n", | |
480 | mvm->status, table.valid); | |
481 | } | |
482 | ||
edbad051 | 483 | IWL_ERR(mvm, "0x%08X | %s\n", table.error_id, |
01a9ca51 | 484 | desc_lookup(table.error_id)); |
01a9ca51 EH |
485 | IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1); |
486 | IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2); | |
487 | IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1); | |
488 | IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2); | |
489 | IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1); | |
490 | IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2); | |
32be1a83 | 491 | IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3); |
7e1223b5 EG |
492 | IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major); |
493 | IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor); | |
32be1a83 EH |
494 | IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer); |
495 | IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer); | |
496 | IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header); | |
497 | IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref); | |
01a9ca51 EH |
498 | } |
499 | ||
7e1223b5 | 500 | static void iwl_mvm_dump_nic_error_log_old(struct iwl_mvm *mvm) |
8ca151b5 JB |
501 | { |
502 | struct iwl_trans *trans = mvm->trans; | |
7e1223b5 | 503 | struct iwl_error_event_table_v1 table; |
8ca151b5 JB |
504 | u32 base; |
505 | ||
506 | base = mvm->error_event_table; | |
507 | if (mvm->cur_ucode == IWL_UCODE_INIT) { | |
508 | if (!base) | |
509 | base = mvm->fw->init_errlog_ptr; | |
510 | } else { | |
511 | if (!base) | |
512 | base = mvm->fw->inst_errlog_ptr; | |
513 | } | |
514 | ||
15ef4137 | 515 | if (base < 0x800000) { |
8ca151b5 JB |
516 | IWL_ERR(mvm, |
517 | "Not valid error log pointer 0x%08X for %s uCode\n", | |
518 | base, | |
519 | (mvm->cur_ucode == IWL_UCODE_INIT) | |
520 | ? "Init" : "RT"); | |
521 | return; | |
522 | } | |
523 | ||
524 | iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table)); | |
525 | ||
526 | if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) { | |
527 | IWL_ERR(trans, "Start IWL Error Log Dump:\n"); | |
528 | IWL_ERR(trans, "Status: 0x%08lX, count: %d\n", | |
529 | mvm->status, table.valid); | |
530 | } | |
531 | ||
7b445f35 EG |
532 | /* Do not change this output - scripts rely on it */ |
533 | ||
b900a87b EG |
534 | IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version); |
535 | ||
8ca151b5 JB |
536 | trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low, |
537 | table.data1, table.data2, table.data3, | |
538 | table.blink1, table.blink2, table.ilink1, | |
539 | table.ilink2, table.bcon_time, table.gp1, | |
7e1223b5 | 540 | table.gp2, table.gp3, table.ucode_ver, 0, |
8ca151b5 JB |
541 | table.hw_ver, table.brd_ver); |
542 | IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id, | |
543 | desc_lookup(table.error_id)); | |
544 | IWL_ERR(mvm, "0x%08X | uPc\n", table.pc); | |
545 | IWL_ERR(mvm, "0x%08X | branchlink1\n", table.blink1); | |
546 | IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2); | |
547 | IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1); | |
548 | IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2); | |
549 | IWL_ERR(mvm, "0x%08X | data1\n", table.data1); | |
550 | IWL_ERR(mvm, "0x%08X | data2\n", table.data2); | |
551 | IWL_ERR(mvm, "0x%08X | data3\n", table.data3); | |
552 | IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time); | |
553 | IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low); | |
554 | IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi); | |
555 | IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1); | |
556 | IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2); | |
557 | IWL_ERR(mvm, "0x%08X | time gp3\n", table.gp3); | |
558 | IWL_ERR(mvm, "0x%08X | uCode version\n", table.ucode_ver); | |
559 | IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver); | |
560 | IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver); | |
561 | IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd); | |
562 | IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0); | |
563 | IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1); | |
564 | IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2); | |
565 | IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3); | |
566 | IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4); | |
567 | IWL_ERR(mvm, "0x%08X | isr_pref\n", table.isr_pref); | |
568 | IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event); | |
569 | IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control); | |
570 | IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration); | |
571 | IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid); | |
572 | IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match); | |
573 | IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel); | |
574 | IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp); | |
575 | IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler); | |
01a9ca51 EH |
576 | |
577 | if (mvm->support_umac_log) | |
578 | iwl_mvm_dump_umac_error_log(mvm); | |
8ca151b5 JB |
579 | } |
580 | ||
7e1223b5 EG |
581 | void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm) |
582 | { | |
583 | struct iwl_trans *trans = mvm->trans; | |
584 | struct iwl_error_event_table table; | |
585 | u32 base; | |
586 | ||
859d914c | 587 | if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_NEW_VERSION)) { |
7e1223b5 EG |
588 | iwl_mvm_dump_nic_error_log_old(mvm); |
589 | return; | |
590 | } | |
591 | ||
592 | base = mvm->error_event_table; | |
593 | if (mvm->cur_ucode == IWL_UCODE_INIT) { | |
594 | if (!base) | |
595 | base = mvm->fw->init_errlog_ptr; | |
596 | } else { | |
597 | if (!base) | |
598 | base = mvm->fw->inst_errlog_ptr; | |
599 | } | |
600 | ||
601 | if (base < 0x800000) { | |
602 | IWL_ERR(mvm, | |
603 | "Not valid error log pointer 0x%08X for %s uCode\n", | |
604 | base, | |
605 | (mvm->cur_ucode == IWL_UCODE_INIT) | |
606 | ? "Init" : "RT"); | |
607 | return; | |
608 | } | |
609 | ||
610 | iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table)); | |
611 | ||
612 | if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) { | |
613 | IWL_ERR(trans, "Start IWL Error Log Dump:\n"); | |
614 | IWL_ERR(trans, "Status: 0x%08lX, count: %d\n", | |
615 | mvm->status, table.valid); | |
616 | } | |
617 | ||
618 | /* Do not change this output - scripts rely on it */ | |
619 | ||
620 | IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version); | |
621 | ||
622 | trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low, | |
623 | table.data1, table.data2, table.data3, | |
624 | table.blink1, table.blink2, table.ilink1, | |
625 | table.ilink2, table.bcon_time, table.gp1, | |
626 | table.gp2, table.gp3, table.major, | |
627 | table.minor, table.hw_ver, table.brd_ver); | |
628 | IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id, | |
629 | desc_lookup(table.error_id)); | |
630 | IWL_ERR(mvm, "0x%08X | uPc\n", table.pc); | |
631 | IWL_ERR(mvm, "0x%08X | branchlink1\n", table.blink1); | |
632 | IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2); | |
633 | IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1); | |
634 | IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2); | |
635 | IWL_ERR(mvm, "0x%08X | data1\n", table.data1); | |
636 | IWL_ERR(mvm, "0x%08X | data2\n", table.data2); | |
637 | IWL_ERR(mvm, "0x%08X | data3\n", table.data3); | |
638 | IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time); | |
639 | IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low); | |
640 | IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi); | |
641 | IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1); | |
642 | IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2); | |
643 | IWL_ERR(mvm, "0x%08X | time gp3\n", table.gp3); | |
644 | IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major); | |
645 | IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor); | |
646 | IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver); | |
647 | IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver); | |
648 | IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd); | |
649 | IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0); | |
650 | IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1); | |
651 | IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2); | |
652 | IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3); | |
653 | IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4); | |
654 | IWL_ERR(mvm, "0x%08X | isr_pref\n", table.isr_pref); | |
655 | IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event); | |
656 | IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control); | |
657 | IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration); | |
658 | IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid); | |
659 | IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match); | |
660 | IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel); | |
661 | IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp); | |
662 | IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler); | |
663 | ||
664 | if (mvm->support_umac_log) | |
665 | iwl_mvm_dump_umac_error_log(mvm); | |
666 | } | |
3edf8ff6 | 667 | void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, u16 ssn, |
4cf677fd EG |
668 | const struct iwl_trans_txq_scd_cfg *cfg, |
669 | unsigned int wdg_timeout) | |
3edf8ff6 | 670 | { |
0294d9ee EG |
671 | struct iwl_scd_txq_cfg_cmd cmd = { |
672 | .scd_queue = queue, | |
673 | .enable = 1, | |
674 | .window = cfg->frame_limit, | |
675 | .sta_id = cfg->sta_id, | |
676 | .ssn = cpu_to_le16(ssn), | |
677 | .tx_fifo = cfg->fifo, | |
678 | .aggregate = cfg->aggregate, | |
679 | .tid = cfg->tid, | |
680 | }; | |
681 | ||
682 | if (!iwl_mvm_is_scd_cfg_supported(mvm)) { | |
4cf677fd EG |
683 | iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, cfg, |
684 | wdg_timeout); | |
0294d9ee | 685 | return; |
3edf8ff6 AA |
686 | } |
687 | ||
4cf677fd | 688 | iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL, wdg_timeout); |
0294d9ee EG |
689 | WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd), |
690 | "Failed to configure queue %d on FIFO %d\n", queue, cfg->fifo); | |
3edf8ff6 AA |
691 | } |
692 | ||
0294d9ee | 693 | void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, u8 flags) |
3edf8ff6 | 694 | { |
0294d9ee EG |
695 | struct iwl_scd_txq_cfg_cmd cmd = { |
696 | .scd_queue = queue, | |
697 | .enable = 0, | |
698 | }; | |
699 | int ret; | |
700 | ||
701 | if (!iwl_mvm_is_scd_cfg_supported(mvm)) { | |
702 | iwl_trans_txq_disable(mvm->trans, queue, true); | |
703 | return; | |
3edf8ff6 | 704 | } |
0294d9ee EG |
705 | |
706 | iwl_trans_txq_disable(mvm->trans, queue, false); | |
707 | ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags, | |
708 | sizeof(cmd), &cmd); | |
709 | if (ret) | |
710 | IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n", | |
711 | queue, ret); | |
3edf8ff6 AA |
712 | } |
713 | ||
8ca151b5 JB |
714 | /** |
715 | * iwl_mvm_send_lq_cmd() - Send link quality command | |
716 | * @init: This command is sent as part of station initialization right | |
717 | * after station has been added. | |
718 | * | |
719 | * The link quality command is sent as the last step of station creation. | |
720 | * This is the special case in which init is set and we call a callback in | |
721 | * this case to clear the state indicating that station creation is in | |
722 | * progress. | |
723 | */ | |
9e680946 | 724 | int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init) |
8ca151b5 JB |
725 | { |
726 | struct iwl_host_cmd cmd = { | |
727 | .id = LQ_CMD, | |
728 | .len = { sizeof(struct iwl_lq_cmd), }, | |
a1022927 | 729 | .flags = init ? 0 : CMD_ASYNC, |
8ca151b5 JB |
730 | .data = { lq, }, |
731 | }; | |
732 | ||
881acd89 | 733 | if (WARN_ON(lq->sta_id == IWL_MVM_STATION_COUNT)) |
8ca151b5 JB |
734 | return -EINVAL; |
735 | ||
8ca151b5 JB |
736 | return iwl_mvm_send_cmd(mvm, &cmd); |
737 | } | |
9ee718aa EL |
738 | |
739 | /** | |
0d365ae5 | 740 | * iwl_mvm_update_smps - Get a request to change the SMPS mode |
9ee718aa EL |
741 | * @req_type: The part of the driver who call for a change. |
742 | * @smps_requests: The request to change the SMPS mode. | |
743 | * | |
744 | * Get a requst to change the SMPS mode, | |
745 | * and change it according to all other requests in the driver. | |
746 | */ | |
747 | void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif, | |
748 | enum iwl_mvm_smps_type_request req_type, | |
749 | enum ieee80211_smps_mode smps_request) | |
750 | { | |
751 | struct iwl_mvm_vif *mvmvif; | |
f6415f6b | 752 | enum ieee80211_smps_mode smps_mode; |
9ee718aa EL |
753 | int i; |
754 | ||
755 | lockdep_assert_held(&mvm->mutex); | |
710e4d08 EG |
756 | |
757 | /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */ | |
a0544272 | 758 | if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1) |
710e4d08 EG |
759 | return; |
760 | ||
f6415f6b EG |
761 | if (vif->type == NL80211_IFTYPE_AP) |
762 | smps_mode = IEEE80211_SMPS_OFF; | |
763 | else | |
764 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
765 | ||
9ee718aa EL |
766 | mvmvif = iwl_mvm_vif_from_mac80211(vif); |
767 | mvmvif->smps_requests[req_type] = smps_request; | |
768 | for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) { | |
769 | if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) { | |
770 | smps_mode = IEEE80211_SMPS_STATIC; | |
771 | break; | |
772 | } | |
773 | if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC) | |
774 | smps_mode = IEEE80211_SMPS_DYNAMIC; | |
775 | } | |
776 | ||
777 | ieee80211_request_smps(vif, smps_mode); | |
778 | } | |
a21d7bcb | 779 | |
33cef925 | 780 | int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear) |
91a8bcde | 781 | { |
33cef925 JB |
782 | struct iwl_statistics_cmd scmd = { |
783 | .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0, | |
784 | }; | |
91a8bcde JB |
785 | struct iwl_host_cmd cmd = { |
786 | .id = STATISTICS_CMD, | |
787 | .len[0] = sizeof(scmd), | |
788 | .data[0] = &scmd, | |
789 | .flags = CMD_WANT_SKB, | |
790 | }; | |
791 | int ret; | |
792 | ||
793 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
794 | if (ret) | |
795 | return ret; | |
796 | ||
797 | iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt); | |
798 | iwl_free_resp(&cmd); | |
799 | ||
33cef925 JB |
800 | if (clear) |
801 | iwl_mvm_accu_radio_stats(mvm); | |
802 | ||
91a8bcde JB |
803 | return 0; |
804 | } | |
805 | ||
806 | void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm) | |
807 | { | |
808 | mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time; | |
809 | mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time; | |
810 | mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf; | |
811 | mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan; | |
812 | } | |
813 | ||
5c904224 EG |
814 | static void iwl_mvm_diversity_iter(void *_data, u8 *mac, |
815 | struct ieee80211_vif *vif) | |
816 | { | |
817 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
818 | bool *result = _data; | |
819 | int i; | |
820 | ||
821 | for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) { | |
822 | if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC || | |
823 | mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC) | |
824 | *result = false; | |
825 | } | |
826 | } | |
827 | ||
828 | bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm) | |
829 | { | |
830 | bool result = true; | |
831 | ||
832 | lockdep_assert_held(&mvm->mutex); | |
833 | ||
a0544272 | 834 | if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1) |
5c904224 EG |
835 | return false; |
836 | ||
c93edc63 | 837 | if (mvm->cfg->rx_with_siso_diversity) |
5c904224 EG |
838 | return false; |
839 | ||
840 | ieee80211_iterate_active_interfaces_atomic( | |
841 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
842 | iwl_mvm_diversity_iter, &result); | |
843 | ||
844 | return result; | |
845 | } | |
846 | ||
a21d7bcb JB |
847 | int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif, |
848 | bool value) | |
849 | { | |
850 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
e03f9bef | 851 | int res; |
a21d7bcb JB |
852 | |
853 | lockdep_assert_held(&mvm->mutex); | |
854 | ||
3510aea4 JB |
855 | if (mvmvif->low_latency == value) |
856 | return 0; | |
857 | ||
a21d7bcb JB |
858 | mvmvif->low_latency = value; |
859 | ||
7754ae79 | 860 | res = iwl_mvm_update_quotas(mvm, false, NULL); |
e03f9bef JB |
861 | if (res) |
862 | return res; | |
0ee5bcdd EG |
863 | |
864 | iwl_mvm_bt_coex_vif_change(mvm); | |
865 | ||
999609f1 | 866 | return iwl_mvm_power_update_mac(mvm); |
a21d7bcb | 867 | } |
50df8a30 AB |
868 | |
869 | static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif) | |
870 | { | |
871 | bool *result = _data; | |
872 | ||
873 | if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif))) | |
874 | *result = true; | |
875 | } | |
876 | ||
877 | bool iwl_mvm_low_latency(struct iwl_mvm *mvm) | |
878 | { | |
879 | bool result = false; | |
880 | ||
881 | ieee80211_iterate_active_interfaces_atomic( | |
882 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
883 | iwl_mvm_ll_iter, &result); | |
884 | ||
885 | return result; | |
886 | } | |
bd5e4744 | 887 | |
7f549e2c LC |
888 | struct iwl_bss_iter_data { |
889 | struct ieee80211_vif *vif; | |
890 | bool error; | |
891 | }; | |
892 | ||
893 | static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac, | |
894 | struct ieee80211_vif *vif) | |
895 | { | |
896 | struct iwl_bss_iter_data *data = _data; | |
897 | ||
898 | if (vif->type != NL80211_IFTYPE_STATION || vif->p2p) | |
899 | return; | |
900 | ||
901 | if (data->vif) { | |
902 | data->error = true; | |
903 | return; | |
904 | } | |
905 | ||
906 | data->vif = vif; | |
907 | } | |
908 | ||
909 | struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm) | |
910 | { | |
911 | struct iwl_bss_iter_data bss_iter_data = {}; | |
912 | ||
913 | ieee80211_iterate_active_interfaces_atomic( | |
914 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
915 | iwl_mvm_bss_iface_iterator, &bss_iter_data); | |
916 | ||
917 | if (bss_iter_data.error) { | |
918 | IWL_ERR(mvm, "More than one managed interface active!\n"); | |
919 | return ERR_PTR(-EINVAL); | |
920 | } | |
921 | ||
922 | return bss_iter_data.vif; | |
923 | } | |
5d42e7b2 EG |
924 | |
925 | unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm, | |
926 | struct ieee80211_vif *vif, | |
927 | bool tdls, bool cmd_q) | |
928 | { | |
929 | struct iwl_fw_dbg_trigger_tlv *trigger; | |
930 | struct iwl_fw_dbg_trigger_txq_timer *txq_timer; | |
931 | unsigned int default_timeout = | |
932 | cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout; | |
933 | ||
934 | if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS)) | |
935 | return iwlmvm_mod_params.tfd_q_hang_detect ? | |
936 | default_timeout : IWL_WATCHDOG_DISABLED; | |
937 | ||
938 | trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS); | |
939 | txq_timer = (void *)trigger->data; | |
940 | ||
941 | if (tdls) | |
942 | return le32_to_cpu(txq_timer->tdls); | |
943 | ||
944 | if (cmd_q) | |
945 | return le32_to_cpu(txq_timer->command_queue); | |
946 | ||
947 | if (WARN_ON(!vif)) | |
948 | return default_timeout; | |
949 | ||
950 | switch (ieee80211_vif_type_p2p(vif)) { | |
951 | case NL80211_IFTYPE_ADHOC: | |
952 | return le32_to_cpu(txq_timer->ibss); | |
953 | case NL80211_IFTYPE_STATION: | |
954 | return le32_to_cpu(txq_timer->bss); | |
955 | case NL80211_IFTYPE_AP: | |
956 | return le32_to_cpu(txq_timer->softap); | |
957 | case NL80211_IFTYPE_P2P_CLIENT: | |
958 | return le32_to_cpu(txq_timer->p2p_client); | |
959 | case NL80211_IFTYPE_P2P_GO: | |
960 | return le32_to_cpu(txq_timer->p2p_go); | |
961 | case NL80211_IFTYPE_P2P_DEVICE: | |
962 | return le32_to_cpu(txq_timer->p2p_device); | |
963 | default: | |
964 | WARN_ON(1); | |
965 | return mvm->cfg->base_params->wd_timeout; | |
966 | } | |
967 | } | |
31755207 EG |
968 | |
969 | void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif, | |
970 | const char *errmsg) | |
971 | { | |
972 | struct iwl_fw_dbg_trigger_tlv *trig; | |
973 | struct iwl_fw_dbg_trigger_mlme *trig_mlme; | |
974 | ||
975 | if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME)) | |
976 | goto out; | |
977 | ||
978 | trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME); | |
979 | trig_mlme = (void *)trig->data; | |
980 | if (!iwl_fw_dbg_trigger_check_stop(mvm, vif, trig)) | |
981 | goto out; | |
982 | ||
983 | if (trig_mlme->stop_connection_loss && | |
984 | --trig_mlme->stop_connection_loss) | |
985 | goto out; | |
986 | ||
987 | iwl_mvm_fw_dbg_collect_trig(mvm, trig, "%s", errmsg); | |
988 | ||
989 | out: | |
990 | ieee80211_connection_loss(vif); | |
991 | } |