[linux-block.git] / drivers / net / wireless / iwlwifi / mvm / nvm.c

/******************************************************************************
 *
 * This file is provided under a dual BSD/GPLv2 license.  When using or
 * redistributing this file, you may do so under either license.
 *
 * GPL LICENSE SUMMARY
 *
 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
 * USA
 *
 * The full GNU General Public License is included in this distribution
 * in the file called COPYING.
 *
 * Contact Information:
 *  Intel Linux Wireless <ilw@linux.intel.com>
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 *
 * BSD LICENSE
 *
 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  * Neither the name Intel Corporation nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *****************************************************************************/
#include <linux/firmware.h>
#include "iwl-trans.h"
#include "iwl-csr.h"
#include "mvm.h"
#include "iwl-eeprom-parse.h"
#include "iwl-eeprom-read.h"
#include "iwl-nvm-parse.h"

/* Default NVM size to read */
#define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
#define IWL_MAX_NVM_SECTION_SIZE	0x1b58
#define IWL_MAX_NVM_8000A_SECTION_SIZE	0xffc
#define IWL_MAX_NVM_8000B_SECTION_SIZE	0x1ffc

#define NVM_WRITE_OPCODE 1
#define NVM_READ_OPCODE 0

/* load nvm chunk response */
enum {
	READ_NVM_CHUNK_SUCCEED = 0,
	READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
};

/*
 * prepare the NVM host command w/ the pointers to the nvm buffer
 * and send it to fw
 */
static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
			       u16 offset, u16 length, const u8 *data)
{
	struct iwl_nvm_access_cmd nvm_access_cmd = {
		.offset = cpu_to_le16(offset),
		.length = cpu_to_le16(length),
		.type = cpu_to_le16(section),
		.op_code = NVM_WRITE_OPCODE,
	};
	struct iwl_host_cmd cmd = {
		.id = NVM_ACCESS_CMD,
		.len = { sizeof(struct iwl_nvm_access_cmd), length },
		.flags = CMD_SEND_IN_RFKILL,
		.data = { &nvm_access_cmd, data },
		/* data may come from vmalloc, so use _DUP */
		.dataflags = { 0, IWL_HCMD_DFL_DUP },
	};

	return iwl_mvm_send_cmd(mvm, &cmd);
}

static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
			      u16 offset, u16 length, u8 *data)
{
	struct iwl_nvm_access_cmd nvm_access_cmd = {
		.offset = cpu_to_le16(offset),
		.length = cpu_to_le16(length),
		.type = cpu_to_le16(section),
		.op_code = NVM_READ_OPCODE,
	};
	struct iwl_nvm_access_resp *nvm_resp;
	struct iwl_rx_packet *pkt;
	struct iwl_host_cmd cmd = {
		.id = NVM_ACCESS_CMD,
		.flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
		.data = { &nvm_access_cmd, },
	};
	int ret, bytes_read, offset_read;
	u8 *resp_data;

	cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);

	ret = iwl_mvm_send_cmd(mvm, &cmd);
	if (ret)
		return ret;

	pkt = cmd.resp_pkt;
	if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
		IWL_ERR(mvm, "Bad return from NVM_ACCES_COMMAND (0x%08X)\n",
			pkt->hdr.flags);
		ret = -EIO;
		goto exit;
	}

	/* Extract NVM response */
	nvm_resp = (void *)pkt->data;
	ret = le16_to_cpu(nvm_resp->status);
	bytes_read = le16_to_cpu(nvm_resp->length);
	offset_read = le16_to_cpu(nvm_resp->offset);
	resp_data = nvm_resp->data;
	if (ret) {
		if ((offset != 0) &&
		    (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
			/*
			 * meaning of NOT_VALID_ADDRESS:
			 * driver try to read chunk from address that is
			 * multiple of 2K and got an error since addr is empty.
			 * meaning of (offset != 0): driver already
			 * read valid data from another chunk so this case
			 * is not an error.
			 */
			IWL_DEBUG_EEPROM(mvm->trans->dev,
					 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
					 offset);
			ret = 0;
		} else {
			IWL_DEBUG_EEPROM(mvm->trans->dev,
					 "NVM access command failed with status %d (device: %s)\n",
					 ret, mvm->cfg->name);
			ret = -EIO;
		}
		goto exit;
	}

	if (offset_read != offset) {
		IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
			offset_read);
		ret = -EINVAL;
		goto exit;
	}

	/* Write data to NVM */
	memcpy(data + offset, resp_data, bytes_read);
	ret = bytes_read;

exit:
	iwl_free_resp(&cmd);
	return ret;
}

static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
				 const u8 *data, u16 length)
{
	int offset = 0;

	/* copy data in chunks of 2k (and remainder if any) */

	while (offset < length) {
		int chunk_size, ret;

		chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
				 length - offset);

		ret = iwl_nvm_write_chunk(mvm, section, offset,
					  chunk_size, data + offset);
		if (ret < 0)
			return ret;

		offset += chunk_size;
	}

	return 0;
}

/*
 * Reads an NVM section completely.
 * NICs prior to 7000 family doesn't have a real NVM, but just read
 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
 * by uCode, we need to manually check in this case that we don't
 * overflow and try to read more than the EEPROM size.
 * For 7000 family NICs, we supply the maximal size we can read, and
 * the uCode fills the response with as much data as we can,
 * without overflowing, so no check is needed.
 */
static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
				u8 *data, u32 size_read)
{
	u16 length, offset = 0;
	int ret;

	/* Set nvm section read length */
	length = IWL_NVM_DEFAULT_CHUNK_SIZE;

	ret = length;

	/* Read the NVM until exhausted (reading less than requested) */
	while (ret == length) {
		/* Check no memory assumptions fail and cause an overflow */
		if ((size_read + offset + length) >
		    mvm->cfg->base_params->eeprom_size) {
			IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
			return -ENOBUFS;
		}

		ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
		if (ret < 0) {
			IWL_DEBUG_EEPROM(mvm->trans->dev,
					 "Cannot read NVM from section %d offset %d, length %d\n",
					 section, offset, length);
			return ret;
		}
		offset += ret;
	}

	IWL_DEBUG_EEPROM(mvm->trans->dev,
			 "NVM section %d read completed\n", section);
	return offset;
}

static struct iwl_nvm_data *
iwl_parse_nvm_sections(struct iwl_mvm *mvm)
{
	struct iwl_nvm_section *sections = mvm->nvm_sections;
	const __le16 *hw, *sw, *calib, *regulatory, *mac_override;

	/* Checking for required sections */
	if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
		if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
		    !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
			IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
			return NULL;
		}
	} else {
		/* SW and REGULATORY sections are mandatory */
		if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
		    !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
			IWL_ERR(mvm,
				"Can't parse empty family 8000 OTP/NVM sections\n");
			return NULL;
		}
		/* MAC_OVERRIDE or at least HW section must exist */
		if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
		    !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
			IWL_ERR(mvm,
				"Can't parse mac_address, empty sections\n");
			return NULL;
		}
	}

	if (WARN_ON(!mvm->cfg))
		return NULL;

	hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data;
	sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
	calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
	regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
	mac_override =
		(const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;

	return iwl_parse_nvm_data(mvm->trans->dev, mvm->cfg, hw, sw, calib,
				  regulatory, mac_override,
				  mvm->fw->valid_tx_ant,
				  mvm->fw->valid_rx_ant);
}

#define MAX_NVM_FILE_LEN	16384

/*
 * Reads external NVM from a file into mvm->nvm_sections
 *
 * HOW TO CREATE THE NVM FILE FORMAT:
 * ------------------------------
 * 1. create hex file, format:
 *      3800 -> header
 *      0000 -> header
 *      5a40 -> data
 *
 *   rev - 6 bit (word1)
 *   len - 10 bit (word1)
 *   id - 4 bit (word2)
 *   rsv - 12 bit (word2)
 *
 * 2. flip 8bits with 8 bits per line to get the right NVM file format
 *
 * 3. create binary file from the hex file
 *
 * 4. save as "iNVM_xxx.bin" under /lib/firmware
 */
static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
{
	int ret, section_size;
	u16 section_id;
	const struct firmware *fw_entry;
	const struct {
		__le16 word1;
		__le16 word2;
		u8 data[];
	} *file_sec;
	const u8 *eof, *temp;
	int max_section_size;
	const __le32 *dword_buff;

#define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
#define NVM_WORD2_ID(x) (x >> 12)
#define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8))
#define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4)
#define NVM_HEADER_0	(0x2A504C54)
#define NVM_HEADER_1	(0x4E564D2A)
#define NVM_HEADER_SIZE	(4 * sizeof(u32))

	IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");

	/* Maximal size depends on HW family and step */
	if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
		max_section_size = IWL_MAX_NVM_SECTION_SIZE;
	else if (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_A_STEP)
		max_section_size = IWL_MAX_NVM_8000A_SECTION_SIZE;
	else /* Family 8000 B-step or C-step */
		max_section_size = IWL_MAX_NVM_8000B_SECTION_SIZE;

	/*
	 * Obtain NVM image via request_firmware. Since we already used
	 * request_firmware_nowait() for the firmware binary load and only
	 * get here after that we assume the NVM request can be satisfied
	 * synchronously.
	 */
	ret = request_firmware(&fw_entry, mvm->nvm_file_name,
			       mvm->trans->dev);
	if (ret) {
		IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
			mvm->nvm_file_name, ret);
		return ret;
	}

	IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
		 mvm->nvm_file_name, fw_entry->size);

	if (fw_entry->size > MAX_NVM_FILE_LEN) {
		IWL_ERR(mvm, "NVM file too large\n");
		ret = -EINVAL;
		goto out;
	}

	eof = fw_entry->data + fw_entry->size;
	dword_buff = (__le32 *)fw_entry->data;

	/* some NVM file will contain a header.
	 * The header is identified by 2 dwords header as follow:
	 * dword[0] = 0x2A504C54
	 * dword[1] = 0x4E564D2A
	 *
	 * This header must be skipped when providing the NVM data to the FW.
	 */
	if (fw_entry->size > NVM_HEADER_SIZE &&
	    dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
	    dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
		file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
		IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
		IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
			 le32_to_cpu(dword_buff[3]));
	} else {
		file_sec = (void *)fw_entry->data;
	}

	while (true) {
		if (file_sec->data > eof) {
			IWL_ERR(mvm,
				"ERROR - NVM file too short for section header\n");
			ret = -EINVAL;
			break;
		}

		/* check for EOF marker */
		if (!file_sec->word1 && !file_sec->word2) {
			ret = 0;
			break;
		}

		if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
			section_size =
				2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
			section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
		} else {
			section_size = 2 * NVM_WORD2_LEN_FAMILY_8000(
						le16_to_cpu(file_sec->word2));
			section_id = NVM_WORD1_ID_FAMILY_8000(
						le16_to_cpu(file_sec->word1));
		}

		if (section_size > max_section_size) {
			IWL_ERR(mvm, "ERROR - section too large (%d)\n",
				section_size);
			ret = -EINVAL;
			break;
		}

		if (!section_size) {
			IWL_ERR(mvm, "ERROR - section empty\n");
			ret = -EINVAL;
			break;
		}

		if (file_sec->data + section_size > eof) {
			IWL_ERR(mvm,
				"ERROR - NVM file too short for section (%d bytes)\n",
				section_size);
			ret = -EINVAL;
			break;
		}

		if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
			 "Invalid NVM section ID %d\n", section_id)) {
			ret = -EINVAL;
			break;
		}

		temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
		if (!temp) {
			ret = -ENOMEM;
			break;
		}
		mvm->nvm_sections[section_id].data = temp;
		mvm->nvm_sections[section_id].length = section_size;

		/* advance to the next section */
		file_sec = (void *)(file_sec->data + section_size);
	}
out:
	release_firmware(fw_entry);
	return ret;
}

/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
{
	int i, ret = 0;
	struct iwl_nvm_section *sections = mvm->nvm_sections;

	IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");

	for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
		if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
			continue;
		ret = iwl_nvm_write_section(mvm, i, sections[i].data,
					    sections[i].length);
		if (ret < 0) {
			IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
			break;
		}
	}
	return ret;
}

int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic)
{
	int ret, section;
	u32 size_read = 0;
	u8 *nvm_buffer, *temp;

	if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
		return -EINVAL;

	/* load NVM values from nic */
	if (read_nvm_from_nic) {
		/* Read From FW NVM */
		IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");

		nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
				     GFP_KERNEL);
		if (!nvm_buffer)
			return -ENOMEM;
		for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
			/* we override the constness for initial read */
			ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
						   size_read);
			if (ret < 0)
				continue;
			size_read += ret;
			temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
			if (!temp) {
				ret = -ENOMEM;
				break;
			}
			mvm->nvm_sections[section].data = temp;
			mvm->nvm_sections[section].length = ret;

#ifdef CONFIG_IWLWIFI_DEBUGFS
			switch (section) {
			case NVM_SECTION_TYPE_SW:
				mvm->nvm_sw_blob.data = temp;
				mvm->nvm_sw_blob.size  = ret;
				break;
			case NVM_SECTION_TYPE_CALIBRATION:
				mvm->nvm_calib_blob.data = temp;
				mvm->nvm_calib_blob.size  = ret;
				break;
			case NVM_SECTION_TYPE_PRODUCTION:
				mvm->nvm_prod_blob.data = temp;
				mvm->nvm_prod_blob.size  = ret;
				break;
			default:
				if (section == mvm->cfg->nvm_hw_section_num) {
					mvm->nvm_hw_blob.data = temp;
					mvm->nvm_hw_blob.size = ret;
					break;
				}
			}
#endif
		}
		if (!size_read)
			IWL_ERR(mvm, "OTP is blank\n");
		kfree(nvm_buffer);
	}

	/* load external NVM if configured */
	if (mvm->nvm_file_name) {
		/* move to External NVM flow */
		ret = iwl_mvm_read_external_nvm(mvm);
		if (ret)
			return ret;
	}

	/* parse the relevant nvm sections */
	mvm->nvm_data = iwl_parse_nvm_sections(mvm);
	if (!mvm->nvm_data)
		return -ENODATA;
	IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
			 mvm->nvm_data->nvm_version);

	return 0;
}
Commit	Line	Data
8ca151b5 JB	1	/******************************************************************************
	2	*
	3	* This file is provided under a dual BSD/GPLv2 license. When using or
	4	* redistributing this file, you may do so under either license.
	5	*
	6	* GPL LICENSE SUMMARY
	7	*
51368bf7	8	* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc	9	* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
8ca151b5 JB	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of version 2 of the GNU General Public License as
	13	* published by the Free Software Foundation.
	14	*
	15	* This program is distributed in the hope that it will be useful, but
	16	* WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	18	* General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
	23	* USA
	24	*
	25	* The full GNU General Public License is included in this distribution
410dc5aa	26	* in the file called COPYING.
8ca151b5 JB	27	*
	28	* Contact Information:
	29	* Intel Linux Wireless <ilw@linux.intel.com>
	30	* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
	31	*
	32	* BSD LICENSE
	33	*
51368bf7	34	* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc	35	* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
8ca151b5 JB	36	* All rights reserved.
	37	*
	38	* Redistribution and use in source and binary forms, with or without
	39	* modification, are permitted provided that the following conditions
	40	* are met:
	41	*
	42	* * Redistributions of source code must retain the above copyright
	43	* notice, this list of conditions and the following disclaimer.
	44	* * Redistributions in binary form must reproduce the above copyright
	45	* notice, this list of conditions and the following disclaimer in
	46	* the documentation and/or other materials provided with the
	47	* distribution.
	48	* * Neither the name Intel Corporation nor the names of its
	49	* contributors may be used to endorse or promote products derived
	50	* from this software without specific prior written permission.
	51	*
	52	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	53	* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	54	* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	55	* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	56	* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	57	* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	58	* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	59	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	60	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	61	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	62	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	63	*
	64	*****************************************************************************/
1214755c	65	#include <linux/firmware.h>
8ca151b5	66	#include "iwl-trans.h"
c2a2b28b	67	#include "iwl-csr.h"
8ca151b5 JB	68	#include "mvm.h"
	69	#include "iwl-eeprom-parse.h"
	70	#include "iwl-eeprom-read.h"
	71	#include "iwl-nvm-parse.h"
	72
1fd4afe2	73	/* Default NVM size to read */
1214755c	74	#define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
f251c07c LK	75	#define IWL_MAX_NVM_SECTION_SIZE 0x1b58
	76	#define IWL_MAX_NVM_8000A_SECTION_SIZE 0xffc
	77	#define IWL_MAX_NVM_8000B_SECTION_SIZE 0x1ffc
1fd4afe2	78
1214755c EH	79	#define NVM_WRITE_OPCODE 1
	80	#define NVM_READ_OPCODE 0
	81
d6aeb354 EH	82	/* load nvm chunk response */
	83	enum {
	84	READ_NVM_CHUNK_SUCCEED = 0,
	85	READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
	86	};
	87
1214755c EH	88	/*
	89	* prepare the NVM host command w/ the pointers to the nvm buffer
	90	* and send it to fw
	91	*/
	92	static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
	93	u16 offset, u16 length, const u8 *data)
8ca151b5	94	{
1214755c EH	95	struct iwl_nvm_access_cmd nvm_access_cmd = {
	96	.offset = cpu_to_le16(offset),
	97	.length = cpu_to_le16(length),
	98	.type = cpu_to_le16(section),
	99	.op_code = NVM_WRITE_OPCODE,
	100	};
	101	struct iwl_host_cmd cmd = {
	102	.id = NVM_ACCESS_CMD,
	103	.len = { sizeof(struct iwl_nvm_access_cmd), length },
a1022927	104	.flags = CMD_SEND_IN_RFKILL,
1214755c EH	105	.data = { &nvm_access_cmd, data },
	106	/* data may come from vmalloc, so use _DUP */
	107	.dataflags = { 0, IWL_HCMD_DFL_DUP },
	108	};
	109
	110	return iwl_mvm_send_cmd(mvm, &cmd);
8ca151b5 JB	111	}
	112
	113	static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
	114	u16 offset, u16 length, u8 *data)
	115	{
1214755c EH	116	struct iwl_nvm_access_cmd nvm_access_cmd = {
	117	.offset = cpu_to_le16(offset),
	118	.length = cpu_to_le16(length),
	119	.type = cpu_to_le16(section),
	120	.op_code = NVM_READ_OPCODE,
	121	};
b9545b48	122	struct iwl_nvm_access_resp *nvm_resp;
8ca151b5 JB	123	struct iwl_rx_packet *pkt;
	124	struct iwl_host_cmd cmd = {
	125	.id = NVM_ACCESS_CMD,
a1022927	126	.flags = CMD_WANT_SKB \| CMD_SEND_IN_RFKILL,
8ca151b5 JB	127	.data = { &nvm_access_cmd, },
	128	};
	129	int ret, bytes_read, offset_read;
	130	u8 *resp_data;
	131
b9545b48	132	cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
8ca151b5 JB	133
	134	ret = iwl_mvm_send_cmd(mvm, &cmd);
	135	if (ret)
	136	return ret;
	137
	138	pkt = cmd.resp_pkt;
	139	if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
	140	IWL_ERR(mvm, "Bad return from NVM_ACCES_COMMAND (0x%08X)\n",
	141	pkt->hdr.flags);
	142	ret = -EIO;
	143	goto exit;
	144	}
	145
	146	/* Extract NVM response */
	147	nvm_resp = (void *)pkt->data;
b9545b48 EG	148	ret = le16_to_cpu(nvm_resp->status);
	149	bytes_read = le16_to_cpu(nvm_resp->length);
	150	offset_read = le16_to_cpu(nvm_resp->offset);
	151	resp_data = nvm_resp->data;
8ca151b5	152	if (ret) {
d6aeb354 EH	153	if ((offset != 0) &&
	154	(ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
	155	/*
	156	* meaning of NOT_VALID_ADDRESS:
	157	* driver try to read chunk from address that is
	158	* multiple of 2K and got an error since addr is empty.
	159	* meaning of (offset != 0): driver already
	160	* read valid data from another chunk so this case
	161	* is not an error.
	162	*/
	163	IWL_DEBUG_EEPROM(mvm->trans->dev,
	164	"NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
	165	offset);
	166	ret = 0;
	167	} else {
	168	IWL_DEBUG_EEPROM(mvm->trans->dev,
	169	"NVM access command failed with status %d (device: %s)\n",
	170	ret, mvm->cfg->name);
	171	ret = -EIO;
	172	}
8ca151b5 JB	173	goto exit;
	174	}
	175
	176	if (offset_read != offset) {
	177	IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
	178	offset_read);
	179	ret = -EINVAL;
	180	goto exit;
	181	}
	182
	183	/* Write data to NVM */
	184	memcpy(data + offset, resp_data, bytes_read);
	185	ret = bytes_read;
	186
	187	exit:
	188	iwl_free_resp(&cmd);
	189	return ret;
	190	}
	191
1214755c EH	192	static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
	193	const u8 *data, u16 length)
	194	{
	195	int offset = 0;
	196
	197	/* copy data in chunks of 2k (and remainder if any) */
	198
	199	while (offset < length) {
	200	int chunk_size, ret;
	201
	202	chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
	203	length - offset);
	204
	205	ret = iwl_nvm_write_chunk(mvm, section, offset,
	206	chunk_size, data + offset);
	207	if (ret < 0)
	208	return ret;
	209
	210	offset += chunk_size;
	211	}
	212
	213	return 0;
	214	}
	215
8ca151b5 JB	216	/*
	217	* Reads an NVM section completely.
	218	* NICs prior to 7000 family doesn't have a real NVM, but just read
	219	* section 0 which is the EEPROM. Because the EEPROM reading is unlimited
	220	* by uCode, we need to manually check in this case that we don't
	221	* overflow and try to read more than the EEPROM size.
	222	* For 7000 family NICs, we supply the maximal size we can read, and
	223	* the uCode fills the response with as much data as we can,
	224	* without overflowing, so no check is needed.
	225	*/
	226	static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
5daddc99	227	u8 *data, u32 size_read)
8ca151b5 JB	228	{
	229	u16 length, offset = 0;
	230	int ret;
8ca151b5	231
1fd4afe2 DS	232	/* Set nvm section read length */
	233	length = IWL_NVM_DEFAULT_CHUNK_SIZE;
	234
8ca151b5 JB	235	ret = length;
	236
	237	/* Read the NVM until exhausted (reading less than requested) */
	238	while (ret == length) {
5daddc99 LK	239	/* Check no memory assumptions fail and cause an overflow */
	240	if ((size_read + offset + length) >
	241	mvm->cfg->base_params->eeprom_size) {
	242	IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
	243	return -ENOBUFS;
	244	}
	245
8ca151b5 JB	246	ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
8ca151b5 JB	247	if (ret < 0) {
d6aeb354 EH	248	IWL_DEBUG_EEPROM(mvm->trans->dev,
	249	"Cannot read NVM from section %d offset %d, length %d\n",
	250	section, offset, length);
8ca151b5 JB	251	return ret;
	252	}
	253	offset += ret;
8ca151b5 JB	254	}
8ca151b5 JB	255
07fd7d28 JB	256	IWL_DEBUG_EEPROM(mvm->trans->dev,
07fd7d28 JB	257	"NVM section %d read completed\n", section);
8ca151b5 JB	258	return offset;
	259	}
	260
	261	static struct iwl_nvm_data *
	262	iwl_parse_nvm_sections(struct iwl_mvm *mvm)
	263	{
	264	struct iwl_nvm_section *sections = mvm->nvm_sections;
77db0a3c	265	const __le16 hw, sw, calib, regulatory, *mac_override;
8ca151b5 JB	266
8ca151b5 JB	267	/* Checking for required sections */
77db0a3c EH	268	if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
	269	if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data \|\|
	270	!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
abf09c56	271	IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
77db0a3c EH	272	return NULL;
	273	}
	274	} else {
9f32e017	275	/* SW and REGULATORY sections are mandatory */
77db0a3c	276	if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data \|\|
77db0a3c EH	277	!mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
77db0a3c EH	278	IWL_ERR(mvm,
abf09c56	279	"Can't parse empty family 8000 OTP/NVM sections\n");
77db0a3c EH	280	return NULL;
77db0a3c EH	281	}
9f32e017	282	/* MAC_OVERRIDE or at least HW section must exist */
bb926924	283	if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
9f32e017 EH	284	!mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
	285	IWL_ERR(mvm,
	286	"Can't parse mac_address, empty sections\n");
	287	return NULL;
	288	}
8ca151b5 JB	289	}
	290
	291	if (WARN_ON(!mvm->cfg))
	292	return NULL;
	293
ae2b21b0	294	hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data;
8ca151b5 JB	295	sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
8ca151b5 JB	296	calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
77db0a3c EH	297	regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
	298	mac_override =
	299	(const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
	300
9ce4fa72	301	return iwl_parse_nvm_data(mvm->trans->dev, mvm->cfg, hw, sw, calib,
77db0a3c	302	regulatory, mac_override,
4ed735e7 JB	303	mvm->fw->valid_tx_ant,
4ed735e7 JB	304	mvm->fw->valid_rx_ant);
8ca151b5 JB	305	}
8ca151b5 JB	306
1214755c EH	307	#define MAX_NVM_FILE_LEN 16384
	308
	309	/*
81a67e32 EL	310	* Reads external NVM from a file into mvm->nvm_sections
81a67e32 EL	311	*
1214755c EH	312	* HOW TO CREATE THE NVM FILE FORMAT:
	313	* ------------------------------
	314	* 1. create hex file, format:
	315	* 3800 -> header
	316	* 0000 -> header
	317	* 5a40 -> data
	318	*
	319	* rev - 6 bit (word1)
	320	* len - 10 bit (word1)
	321	* id - 4 bit (word2)
	322	* rsv - 12 bit (word2)
	323	*
	324	* 2. flip 8bits with 8 bits per line to get the right NVM file format
	325	*
	326	* 3. create binary file from the hex file
	327	*
	328	* 4. save as "iNVM_xxx.bin" under /lib/firmware
	329	*/
81a67e32	330	static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
1214755c	331	{
81a67e32 EL	332	int ret, section_size;
81a67e32 EL	333	u16 section_id;
1214755c EH	334	const struct firmware *fw_entry;
	335	const struct {
	336	__le16 word1;
	337	__le16 word2;
	338	u8 data[];
	339	} *file_sec;
81a67e32	340	const u8 eof, temp;
f251c07c	341	int max_section_size;
a4e5df28	342	const __le32 *dword_buff;
1214755c EH	343
	344	#define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
	345	#define NVM_WORD2_ID(x) (x >> 12)
77db0a3c EH	346	#define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 \| x >> 8))
77db0a3c EH	347	#define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4)
a4e5df28 IK	348	#define NVM_HEADER_0 (0x2A504C54)
	349	#define NVM_HEADER_1 (0x4E564D2A)
	350	#define NVM_HEADER_SIZE (4 * sizeof(u32))
1214755c	351
81a67e32 EL	352	IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
81a67e32 EL	353
f251c07c LK	354	/* Maximal size depends on HW family and step */
	355	if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
	356	max_section_size = IWL_MAX_NVM_SECTION_SIZE;
c2a2b28b	357	else if (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_A_STEP)
f251c07c	358	max_section_size = IWL_MAX_NVM_8000A_SECTION_SIZE;
716e48a6	359	else /* Family 8000 B-step or C-step */
f251c07c LK	360	max_section_size = IWL_MAX_NVM_8000B_SECTION_SIZE;
f251c07c LK	361
1214755c EH	362	/*
	363	* Obtain NVM image via request_firmware. Since we already used
	364	* request_firmware_nowait() for the firmware binary load and only
	365	* get here after that we assume the NVM request can be satisfied
	366	* synchronously.
	367	*/
e02a9d60	368	ret = request_firmware(&fw_entry, mvm->nvm_file_name,
1214755c EH	369	mvm->trans->dev);
	370	if (ret) {
	371	IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
e02a9d60	372	mvm->nvm_file_name, ret);
1214755c EH	373	return ret;
	374	}
	375
	376	IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
e02a9d60	377	mvm->nvm_file_name, fw_entry->size);
1214755c	378
1214755c EH	379	if (fw_entry->size > MAX_NVM_FILE_LEN) {
	380	IWL_ERR(mvm, "NVM file too large\n");
	381	ret = -EINVAL;
	382	goto out;
	383	}
	384
	385	eof = fw_entry->data + fw_entry->size;
a4e5df28 IK	386	dword_buff = (__le32 *)fw_entry->data;
	387
	388	/* some NVM file will contain a header.
	389	* The header is identified by 2 dwords header as follow:
	390	* dword[0] = 0x2A504C54
	391	* dword[1] = 0x4E564D2A
	392	*
	393	* This header must be skipped when providing the NVM data to the FW.
	394	*/
	395	if (fw_entry->size > NVM_HEADER_SIZE &&
	396	dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
	397	dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
	398	file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
	399	IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
	400	IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
	401	le32_to_cpu(dword_buff[3]));
	402	} else {
	403	file_sec = (void *)fw_entry->data;
	404	}
1214755c EH	405
	406	while (true) {
	407	if (file_sec->data > eof) {
	408	IWL_ERR(mvm,
	409	"ERROR - NVM file too short for section header\n");
	410	ret = -EINVAL;
	411	break;
	412	}
	413
	414	/* check for EOF marker */
	415	if (!file_sec->word1 && !file_sec->word2) {
	416	ret = 0;
	417	break;
	418	}
	419
77db0a3c EH	420	if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
	421	section_size =
	422	2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
	423	section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
	424	} else {
	425	section_size = 2 * NVM_WORD2_LEN_FAMILY_8000(
	426	le16_to_cpu(file_sec->word2));
	427	section_id = NVM_WORD1_ID_FAMILY_8000(
	428	le16_to_cpu(file_sec->word1));
	429	}
1214755c	430
f251c07c	431	if (section_size > max_section_size) {
1214755c EH	432	IWL_ERR(mvm, "ERROR - section too large (%d)\n",
	433	section_size);
	434	ret = -EINVAL;
	435	break;
	436	}
	437
	438	if (!section_size) {
	439	IWL_ERR(mvm, "ERROR - section empty\n");
	440	ret = -EINVAL;
	441	break;
	442	}
	443
	444	if (file_sec->data + section_size > eof) {
	445	IWL_ERR(mvm,
	446	"ERROR - NVM file too short for section (%d bytes)\n",
	447	section_size);
	448	ret = -EINVAL;
	449	break;
	450	}
	451
ae2b21b0	452	if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
a4a12478 EL	453	"Invalid NVM section ID %d\n", section_id)) {
	454	ret = -EINVAL;
	455	break;
	456	}
	457
81a67e32 EL	458	temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
	459	if (!temp) {
	460	ret = -ENOMEM;
	461	break;
	462	}
81a67e32 EL	463	mvm->nvm_sections[section_id].data = temp;
81a67e32 EL	464	mvm->nvm_sections[section_id].length = section_size;
1214755c EH	465
	466	/* advance to the next section */
	467	file_sec = (void *)(file_sec->data + section_size);
	468	}
	469	out:
	470	release_firmware(fw_entry);
	471	return ret;
	472	}
	473
81a67e32 EL	474	/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
	475	int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
	476	{
05159fcc	477	int i, ret = 0;
81a67e32 EL	478	struct iwl_nvm_section *sections = mvm->nvm_sections;
	479
	480	IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
	481
099d8f20 EG	482	for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
	483	if (!mvm->nvm_sections[i].data \|\| !mvm->nvm_sections[i].length)
	484	continue;
	485	ret = iwl_nvm_write_section(mvm, i, sections[i].data,
	486	sections[i].length);
81a67e32 EL	487	if (ret < 0) {
	488	IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
	489	break;
	490	}
	491	}
	492	return ret;
	493	}
	494
14b485f0	495	int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic)
8ca151b5	496	{
d6aeb354	497	int ret, section;
5daddc99	498	u32 size_read = 0;
8ca151b5 JB	499	u8 nvm_buffer, temp;
8ca151b5 JB	500
ae2b21b0 EH	501	if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
	502	return -EINVAL;
	503
26481bf4	504	/* load NVM values from nic */
14b485f0	505	if (read_nvm_from_nic) {
81a67e32 EL	506	/* Read From FW NVM */
	507	IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
	508
81a67e32 EL	509	nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
	510	GFP_KERNEL);
	511	if (!nvm_buffer)
	512	return -ENOMEM;
d6aeb354	513	for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
81a67e32	514	/* we override the constness for initial read */
5daddc99 LK	515	ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
5daddc99 LK	516	size_read);
81a67e32	517	if (ret < 0)
d6aeb354	518	continue;
5daddc99	519	size_read += ret;
81a67e32 EL	520	temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
	521	if (!temp) {
	522	ret = -ENOMEM;
	523	break;
	524	}
	525	mvm->nvm_sections[section].data = temp;
	526	mvm->nvm_sections[section].length = ret;
086f7368 EG	527
	528	#ifdef CONFIG_IWLWIFI_DEBUGFS
	529	switch (section) {
086f7368 EG	530	case NVM_SECTION_TYPE_SW:
	531	mvm->nvm_sw_blob.data = temp;
	532	mvm->nvm_sw_blob.size = ret;
	533	break;
	534	case NVM_SECTION_TYPE_CALIBRATION:
	535	mvm->nvm_calib_blob.data = temp;
	536	mvm->nvm_calib_blob.size = ret;
	537	break;
	538	case NVM_SECTION_TYPE_PRODUCTION:
	539	mvm->nvm_prod_blob.data = temp;
	540	mvm->nvm_prod_blob.size = ret;
	541	break;
	542	default:
ae2b21b0 EH	543	if (section == mvm->cfg->nvm_hw_section_num) {
	544	mvm->nvm_hw_blob.data = temp;
	545	mvm->nvm_hw_blob.size = ret;
	546	break;
	547	}
086f7368 EG	548	}
086f7368 EG	549	#endif
8ca151b5	550	}
bdce40f0 EH	551	if (!size_read)
bdce40f0 EH	552	IWL_ERR(mvm, "OTP is blank\n");
81a67e32	553	kfree(nvm_buffer);
8ca151b5 JB	554	}
8ca151b5 JB	555
26481bf4	556	/* load external NVM if configured */
e02a9d60	557	if (mvm->nvm_file_name) {
26481bf4 EH	558	/* move to External NVM flow */
	559	ret = iwl_mvm_read_external_nvm(mvm);
	560	if (ret)
	561	return ret;
	562	}
	563
	564	/* parse the relevant nvm sections */
b9545b48	565	mvm->nvm_data = iwl_parse_nvm_sections(mvm);
82598b4f JB	566	if (!mvm->nvm_data)
82598b4f JB	567	return -ENODATA;
2a831e08 EH	568	IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
2a831e08 EH	569	mvm->nvm_data->nvm_version);
8ca151b5	570
82598b4f	571	return 0;
8ca151b5	572	}