Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
[linux-block.git] / drivers / net / wireless / iwlwifi / mvm / nvm.c
CommitLineData
8ca151b5
JB
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
8ca151b5
JB
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
410dc5aa 26 * in the file called COPYING.
8ca151b5
JB
27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
8ca151b5
JB
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
1214755c 65#include <linux/firmware.h>
90d4f7db 66#include <linux/rtnetlink.h>
7f0344c2
JD
67#include <linux/pci.h>
68#include <linux/acpi.h>
8ca151b5 69#include "iwl-trans.h"
c2a2b28b 70#include "iwl-csr.h"
8ca151b5
JB
71#include "mvm.h"
72#include "iwl-eeprom-parse.h"
73#include "iwl-eeprom-read.h"
74#include "iwl-nvm-parse.h"
8ba2d7a1 75#include "iwl-prph.h"
8ca151b5 76
1fd4afe2 77/* Default NVM size to read */
1214755c 78#define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
f251c07c
LK
79#define IWL_MAX_NVM_SECTION_SIZE 0x1b58
80#define IWL_MAX_NVM_8000A_SECTION_SIZE 0xffc
81#define IWL_MAX_NVM_8000B_SECTION_SIZE 0x1ffc
1fd4afe2 82
1214755c
EH
83#define NVM_WRITE_OPCODE 1
84#define NVM_READ_OPCODE 0
85
d6aeb354
EH
86/* load nvm chunk response */
87enum {
88 READ_NVM_CHUNK_SUCCEED = 0,
89 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
90};
91
1214755c
EH
92/*
93 * prepare the NVM host command w/ the pointers to the nvm buffer
94 * and send it to fw
95 */
96static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
97 u16 offset, u16 length, const u8 *data)
8ca151b5 98{
1214755c
EH
99 struct iwl_nvm_access_cmd nvm_access_cmd = {
100 .offset = cpu_to_le16(offset),
101 .length = cpu_to_le16(length),
102 .type = cpu_to_le16(section),
103 .op_code = NVM_WRITE_OPCODE,
104 };
105 struct iwl_host_cmd cmd = {
106 .id = NVM_ACCESS_CMD,
107 .len = { sizeof(struct iwl_nvm_access_cmd), length },
a1022927 108 .flags = CMD_SEND_IN_RFKILL,
1214755c
EH
109 .data = { &nvm_access_cmd, data },
110 /* data may come from vmalloc, so use _DUP */
111 .dataflags = { 0, IWL_HCMD_DFL_DUP },
112 };
113
114 return iwl_mvm_send_cmd(mvm, &cmd);
8ca151b5
JB
115}
116
117static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
118 u16 offset, u16 length, u8 *data)
119{
1214755c
EH
120 struct iwl_nvm_access_cmd nvm_access_cmd = {
121 .offset = cpu_to_le16(offset),
122 .length = cpu_to_le16(length),
123 .type = cpu_to_le16(section),
124 .op_code = NVM_READ_OPCODE,
125 };
b9545b48 126 struct iwl_nvm_access_resp *nvm_resp;
8ca151b5
JB
127 struct iwl_rx_packet *pkt;
128 struct iwl_host_cmd cmd = {
129 .id = NVM_ACCESS_CMD,
a1022927 130 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
8ca151b5
JB
131 .data = { &nvm_access_cmd, },
132 };
133 int ret, bytes_read, offset_read;
134 u8 *resp_data;
135
b9545b48 136 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
8ca151b5
JB
137
138 ret = iwl_mvm_send_cmd(mvm, &cmd);
139 if (ret)
140 return ret;
141
142 pkt = cmd.resp_pkt;
143 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
144 IWL_ERR(mvm, "Bad return from NVM_ACCES_COMMAND (0x%08X)\n",
145 pkt->hdr.flags);
146 ret = -EIO;
147 goto exit;
148 }
149
150 /* Extract NVM response */
151 nvm_resp = (void *)pkt->data;
b9545b48
EG
152 ret = le16_to_cpu(nvm_resp->status);
153 bytes_read = le16_to_cpu(nvm_resp->length);
154 offset_read = le16_to_cpu(nvm_resp->offset);
155 resp_data = nvm_resp->data;
8ca151b5 156 if (ret) {
d6aeb354
EH
157 if ((offset != 0) &&
158 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
159 /*
160 * meaning of NOT_VALID_ADDRESS:
161 * driver try to read chunk from address that is
162 * multiple of 2K and got an error since addr is empty.
163 * meaning of (offset != 0): driver already
164 * read valid data from another chunk so this case
165 * is not an error.
166 */
167 IWL_DEBUG_EEPROM(mvm->trans->dev,
168 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
169 offset);
170 ret = 0;
171 } else {
172 IWL_DEBUG_EEPROM(mvm->trans->dev,
173 "NVM access command failed with status %d (device: %s)\n",
174 ret, mvm->cfg->name);
175 ret = -EIO;
176 }
8ca151b5
JB
177 goto exit;
178 }
179
180 if (offset_read != offset) {
181 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
182 offset_read);
183 ret = -EINVAL;
184 goto exit;
185 }
186
187 /* Write data to NVM */
188 memcpy(data + offset, resp_data, bytes_read);
189 ret = bytes_read;
190
191exit:
192 iwl_free_resp(&cmd);
193 return ret;
194}
195
1214755c
EH
196static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
197 const u8 *data, u16 length)
198{
199 int offset = 0;
200
201 /* copy data in chunks of 2k (and remainder if any) */
202
203 while (offset < length) {
204 int chunk_size, ret;
205
206 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
207 length - offset);
208
209 ret = iwl_nvm_write_chunk(mvm, section, offset,
210 chunk_size, data + offset);
211 if (ret < 0)
212 return ret;
213
214 offset += chunk_size;
215 }
216
217 return 0;
218}
219
8ca151b5
JB
220/*
221 * Reads an NVM section completely.
222 * NICs prior to 7000 family doesn't have a real NVM, but just read
223 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
224 * by uCode, we need to manually check in this case that we don't
225 * overflow and try to read more than the EEPROM size.
226 * For 7000 family NICs, we supply the maximal size we can read, and
227 * the uCode fills the response with as much data as we can,
228 * without overflowing, so no check is needed.
229 */
230static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
5daddc99 231 u8 *data, u32 size_read)
8ca151b5
JB
232{
233 u16 length, offset = 0;
234 int ret;
8ca151b5 235
1fd4afe2
DS
236 /* Set nvm section read length */
237 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
238
8ca151b5
JB
239 ret = length;
240
241 /* Read the NVM until exhausted (reading less than requested) */
242 while (ret == length) {
5daddc99
LK
243 /* Check no memory assumptions fail and cause an overflow */
244 if ((size_read + offset + length) >
245 mvm->cfg->base_params->eeprom_size) {
246 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
247 return -ENOBUFS;
248 }
249
8ca151b5
JB
250 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
251 if (ret < 0) {
d6aeb354
EH
252 IWL_DEBUG_EEPROM(mvm->trans->dev,
253 "Cannot read NVM from section %d offset %d, length %d\n",
254 section, offset, length);
8ca151b5
JB
255 return ret;
256 }
257 offset += ret;
8ca151b5
JB
258 }
259
07fd7d28
JB
260 IWL_DEBUG_EEPROM(mvm->trans->dev,
261 "NVM section %d read completed\n", section);
8ca151b5
JB
262 return offset;
263}
264
265static struct iwl_nvm_data *
266iwl_parse_nvm_sections(struct iwl_mvm *mvm)
267{
268 struct iwl_nvm_section *sections = mvm->nvm_sections;
ce500071 269 const __le16 *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku;
5711cac4 270 bool is_family_8000_a_step = false, lar_enabled;
8ba2d7a1 271 u32 mac_addr0, mac_addr1;
8ca151b5
JB
272
273 /* Checking for required sections */
77db0a3c
EH
274 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
275 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
276 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
abf09c56 277 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
77db0a3c
EH
278 return NULL;
279 }
280 } else {
9f32e017 281 /* SW and REGULATORY sections are mandatory */
77db0a3c 282 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
77db0a3c
EH
283 !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
284 IWL_ERR(mvm,
abf09c56 285 "Can't parse empty family 8000 OTP/NVM sections\n");
77db0a3c
EH
286 return NULL;
287 }
9f32e017 288 /* MAC_OVERRIDE or at least HW section must exist */
bb926924 289 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
9f32e017
EH
290 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
291 IWL_ERR(mvm,
292 "Can't parse mac_address, empty sections\n");
293 return NULL;
294 }
ce500071
EH
295
296 if (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_A_STEP)
297 is_family_8000_a_step = true;
298
299 /* PHY_SKU section is mandatory in B0 */
300 if (!is_family_8000_a_step &&
301 !mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
302 IWL_ERR(mvm,
303 "Can't parse phy_sku in B0, empty sections\n");
304 return NULL;
305 }
8ca151b5
JB
306 }
307
308 if (WARN_ON(!mvm->cfg))
309 return NULL;
310
8ba2d7a1
EH
311 /* read the mac address from WFMP registers */
312 mac_addr0 = iwl_trans_read_prph(mvm->trans, WFMP_MAC_ADDR_0);
313 mac_addr1 = iwl_trans_read_prph(mvm->trans, WFMP_MAC_ADDR_1);
314
ae2b21b0 315 hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data;
8ca151b5
JB
316 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
317 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
77db0a3c
EH
318 regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
319 mac_override =
320 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
ce500071 321 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
77db0a3c 322
5711cac4
AN
323 lar_enabled = !iwlwifi_mod_params.lar_disable &&
324 (mvm->fw->ucode_capa.capa[0] &
325 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
326
9ce4fa72 327 return iwl_parse_nvm_data(mvm->trans->dev, mvm->cfg, hw, sw, calib,
ce500071 328 regulatory, mac_override, phy_sku,
5711cac4 329 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
8ba2d7a1
EH
330 lar_enabled, is_family_8000_a_step,
331 mac_addr0, mac_addr1);
8ca151b5
JB
332}
333
1214755c
EH
334#define MAX_NVM_FILE_LEN 16384
335
336/*
81a67e32
EL
337 * Reads external NVM from a file into mvm->nvm_sections
338 *
1214755c
EH
339 * HOW TO CREATE THE NVM FILE FORMAT:
340 * ------------------------------
341 * 1. create hex file, format:
342 * 3800 -> header
343 * 0000 -> header
344 * 5a40 -> data
345 *
346 * rev - 6 bit (word1)
347 * len - 10 bit (word1)
348 * id - 4 bit (word2)
349 * rsv - 12 bit (word2)
350 *
351 * 2. flip 8bits with 8 bits per line to get the right NVM file format
352 *
353 * 3. create binary file from the hex file
354 *
355 * 4. save as "iNVM_xxx.bin" under /lib/firmware
356 */
81a67e32 357static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
1214755c 358{
81a67e32
EL
359 int ret, section_size;
360 u16 section_id;
1214755c
EH
361 const struct firmware *fw_entry;
362 const struct {
363 __le16 word1;
364 __le16 word2;
365 u8 data[];
366 } *file_sec;
81a67e32 367 const u8 *eof, *temp;
f251c07c 368 int max_section_size;
a4e5df28 369 const __le32 *dword_buff;
1214755c
EH
370
371#define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
372#define NVM_WORD2_ID(x) (x >> 12)
77db0a3c
EH
373#define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8))
374#define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4)
a4e5df28
IK
375#define NVM_HEADER_0 (0x2A504C54)
376#define NVM_HEADER_1 (0x4E564D2A)
377#define NVM_HEADER_SIZE (4 * sizeof(u32))
1214755c 378
81a67e32
EL
379 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
380
f251c07c
LK
381 /* Maximal size depends on HW family and step */
382 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
383 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
c2a2b28b 384 else if (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_A_STEP)
f251c07c 385 max_section_size = IWL_MAX_NVM_8000A_SECTION_SIZE;
716e48a6 386 else /* Family 8000 B-step or C-step */
f251c07c
LK
387 max_section_size = IWL_MAX_NVM_8000B_SECTION_SIZE;
388
1214755c
EH
389 /*
390 * Obtain NVM image via request_firmware. Since we already used
391 * request_firmware_nowait() for the firmware binary load and only
392 * get here after that we assume the NVM request can be satisfied
393 * synchronously.
394 */
e02a9d60 395 ret = request_firmware(&fw_entry, mvm->nvm_file_name,
1214755c
EH
396 mvm->trans->dev);
397 if (ret) {
398 IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
e02a9d60 399 mvm->nvm_file_name, ret);
1214755c
EH
400 return ret;
401 }
402
403 IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
e02a9d60 404 mvm->nvm_file_name, fw_entry->size);
1214755c 405
1214755c
EH
406 if (fw_entry->size > MAX_NVM_FILE_LEN) {
407 IWL_ERR(mvm, "NVM file too large\n");
408 ret = -EINVAL;
409 goto out;
410 }
411
412 eof = fw_entry->data + fw_entry->size;
a4e5df28
IK
413 dword_buff = (__le32 *)fw_entry->data;
414
415 /* some NVM file will contain a header.
416 * The header is identified by 2 dwords header as follow:
417 * dword[0] = 0x2A504C54
418 * dword[1] = 0x4E564D2A
419 *
420 * This header must be skipped when providing the NVM data to the FW.
421 */
422 if (fw_entry->size > NVM_HEADER_SIZE &&
423 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
424 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
425 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
426 IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
427 IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
428 le32_to_cpu(dword_buff[3]));
429 } else {
430 file_sec = (void *)fw_entry->data;
431 }
1214755c
EH
432
433 while (true) {
434 if (file_sec->data > eof) {
435 IWL_ERR(mvm,
436 "ERROR - NVM file too short for section header\n");
437 ret = -EINVAL;
438 break;
439 }
440
441 /* check for EOF marker */
442 if (!file_sec->word1 && !file_sec->word2) {
443 ret = 0;
444 break;
445 }
446
77db0a3c
EH
447 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
448 section_size =
449 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
450 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
451 } else {
452 section_size = 2 * NVM_WORD2_LEN_FAMILY_8000(
453 le16_to_cpu(file_sec->word2));
454 section_id = NVM_WORD1_ID_FAMILY_8000(
455 le16_to_cpu(file_sec->word1));
456 }
1214755c 457
f251c07c 458 if (section_size > max_section_size) {
1214755c
EH
459 IWL_ERR(mvm, "ERROR - section too large (%d)\n",
460 section_size);
461 ret = -EINVAL;
462 break;
463 }
464
465 if (!section_size) {
466 IWL_ERR(mvm, "ERROR - section empty\n");
467 ret = -EINVAL;
468 break;
469 }
470
471 if (file_sec->data + section_size > eof) {
472 IWL_ERR(mvm,
473 "ERROR - NVM file too short for section (%d bytes)\n",
474 section_size);
475 ret = -EINVAL;
476 break;
477 }
478
ae2b21b0 479 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
a4a12478
EL
480 "Invalid NVM section ID %d\n", section_id)) {
481 ret = -EINVAL;
482 break;
483 }
484
81a67e32
EL
485 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
486 if (!temp) {
487 ret = -ENOMEM;
488 break;
489 }
81a67e32
EL
490 mvm->nvm_sections[section_id].data = temp;
491 mvm->nvm_sections[section_id].length = section_size;
1214755c
EH
492
493 /* advance to the next section */
494 file_sec = (void *)(file_sec->data + section_size);
495 }
496out:
497 release_firmware(fw_entry);
498 return ret;
499}
500
81a67e32
EL
501/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
502int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
503{
05159fcc 504 int i, ret = 0;
81a67e32
EL
505 struct iwl_nvm_section *sections = mvm->nvm_sections;
506
507 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
508
099d8f20
EG
509 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
510 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
511 continue;
512 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
513 sections[i].length);
81a67e32
EL
514 if (ret < 0) {
515 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
516 break;
517 }
518 }
519 return ret;
520}
521
14b485f0 522int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic)
8ca151b5 523{
d6aeb354 524 int ret, section;
5daddc99 525 u32 size_read = 0;
8ca151b5
JB
526 u8 *nvm_buffer, *temp;
527
ae2b21b0
EH
528 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
529 return -EINVAL;
530
26481bf4 531 /* load NVM values from nic */
14b485f0 532 if (read_nvm_from_nic) {
81a67e32
EL
533 /* Read From FW NVM */
534 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
535
81a67e32
EL
536 nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
537 GFP_KERNEL);
538 if (!nvm_buffer)
539 return -ENOMEM;
d6aeb354 540 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
81a67e32 541 /* we override the constness for initial read */
5daddc99
LK
542 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
543 size_read);
81a67e32 544 if (ret < 0)
d6aeb354 545 continue;
5daddc99 546 size_read += ret;
81a67e32
EL
547 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
548 if (!temp) {
549 ret = -ENOMEM;
550 break;
551 }
552 mvm->nvm_sections[section].data = temp;
553 mvm->nvm_sections[section].length = ret;
086f7368
EG
554
555#ifdef CONFIG_IWLWIFI_DEBUGFS
556 switch (section) {
086f7368
EG
557 case NVM_SECTION_TYPE_SW:
558 mvm->nvm_sw_blob.data = temp;
559 mvm->nvm_sw_blob.size = ret;
560 break;
561 case NVM_SECTION_TYPE_CALIBRATION:
562 mvm->nvm_calib_blob.data = temp;
563 mvm->nvm_calib_blob.size = ret;
564 break;
565 case NVM_SECTION_TYPE_PRODUCTION:
566 mvm->nvm_prod_blob.data = temp;
567 mvm->nvm_prod_blob.size = ret;
568 break;
569 default:
ae2b21b0
EH
570 if (section == mvm->cfg->nvm_hw_section_num) {
571 mvm->nvm_hw_blob.data = temp;
572 mvm->nvm_hw_blob.size = ret;
573 break;
574 }
086f7368
EG
575 }
576#endif
8ca151b5 577 }
bdce40f0
EH
578 if (!size_read)
579 IWL_ERR(mvm, "OTP is blank\n");
81a67e32 580 kfree(nvm_buffer);
8ca151b5
JB
581 }
582
26481bf4 583 /* load external NVM if configured */
e02a9d60 584 if (mvm->nvm_file_name) {
26481bf4
EH
585 /* move to External NVM flow */
586 ret = iwl_mvm_read_external_nvm(mvm);
587 if (ret)
588 return ret;
589 }
590
591 /* parse the relevant nvm sections */
b9545b48 592 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
82598b4f
JB
593 if (!mvm->nvm_data)
594 return -ENODATA;
2a831e08
EH
595 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
596 mvm->nvm_data->nvm_version);
8ca151b5 597
82598b4f 598 return 0;
8ca151b5 599}
dcaf9f5e
AN
600
601struct iwl_mcc_update_resp *
8ba2d7a1
EH
602iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
603 enum iwl_mcc_source src_id)
dcaf9f5e
AN
604{
605 struct iwl_mcc_update_cmd mcc_update_cmd = {
606 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
8ba2d7a1 607 .source_id = (u8)src_id,
dcaf9f5e
AN
608 };
609 struct iwl_mcc_update_resp *mcc_resp, *resp_cp = NULL;
610 struct iwl_rx_packet *pkt;
611 struct iwl_host_cmd cmd = {
612 .id = MCC_UPDATE_CMD,
613 .flags = CMD_WANT_SKB,
614 .data = { &mcc_update_cmd },
615 };
616
617 int ret;
618 u32 status;
619 int resp_len, n_channels;
620 u16 mcc;
621
622 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
623 return ERR_PTR(-EOPNOTSUPP);
624
625 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
626
8ba2d7a1
EH
627 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
628 alpha2[0], alpha2[1], src_id);
dcaf9f5e
AN
629
630 ret = iwl_mvm_send_cmd(mvm, &cmd);
631 if (ret)
632 return ERR_PTR(ret);
633
634 pkt = cmd.resp_pkt;
635 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
636 IWL_ERR(mvm, "Bad return from MCC_UPDATE_COMMAND (0x%08X)\n",
637 pkt->hdr.flags);
638 ret = -EIO;
639 goto exit;
640 }
641
642 /* Extract MCC response */
643 mcc_resp = (void *)pkt->data;
644 status = le32_to_cpu(mcc_resp->status);
645
dcaf9f5e
AN
646 mcc = le16_to_cpu(mcc_resp->mcc);
647
648 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
649 if (mcc == 0) {
650 mcc = 0x3030; /* "00" - world */
651 mcc_resp->mcc = cpu_to_le16(mcc);
652 }
653
654 n_channels = __le32_to_cpu(mcc_resp->n_channels);
655 IWL_DEBUG_LAR(mvm,
656 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n",
657 status, mcc, mcc >> 8, mcc & 0xff,
47c8b154 658 !!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels);
dcaf9f5e
AN
659
660 resp_len = sizeof(*mcc_resp) + n_channels * sizeof(__le32);
661 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
662 if (!resp_cp) {
663 ret = -ENOMEM;
664 goto exit;
665 }
666
667 ret = 0;
668exit:
669 iwl_free_resp(&cmd);
670 if (ret)
671 return ERR_PTR(ret);
672 return resp_cp;
673}
90d4f7db 674
7f0344c2
JD
675#ifdef CONFIG_ACPI
676#define WRD_METHOD "WRDD"
677#define WRDD_WIFI (0x07)
678#define WRDD_WIGIG (0x10)
679
680static u32 iwl_mvm_wrdd_get_mcc(struct iwl_mvm *mvm, union acpi_object *wrdd)
681{
682 union acpi_object *mcc_pkg, *domain_type, *mcc_value;
683 u32 i;
684
685 if (wrdd->type != ACPI_TYPE_PACKAGE ||
686 wrdd->package.count < 2 ||
687 wrdd->package.elements[0].type != ACPI_TYPE_INTEGER ||
688 wrdd->package.elements[0].integer.value != 0) {
689 IWL_DEBUG_LAR(mvm, "Unsupported wrdd structure\n");
690 return 0;
691 }
692
693 for (i = 1 ; i < wrdd->package.count ; ++i) {
694 mcc_pkg = &wrdd->package.elements[i];
695
696 if (mcc_pkg->type != ACPI_TYPE_PACKAGE ||
697 mcc_pkg->package.count < 2 ||
698 mcc_pkg->package.elements[0].type != ACPI_TYPE_INTEGER ||
699 mcc_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
700 mcc_pkg = NULL;
701 continue;
702 }
703
704 domain_type = &mcc_pkg->package.elements[0];
705 if (domain_type->integer.value == WRDD_WIFI)
706 break;
707
708 mcc_pkg = NULL;
709 }
710
711 if (mcc_pkg) {
712 mcc_value = &mcc_pkg->package.elements[1];
713 return mcc_value->integer.value;
714 }
715
716 return 0;
717}
718
719static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc)
720{
721 acpi_handle root_handle;
722 acpi_handle handle;
723 struct acpi_buffer wrdd = {ACPI_ALLOCATE_BUFFER, NULL};
724 acpi_status status;
725 u32 mcc_val;
726 struct pci_dev *pdev = to_pci_dev(mvm->dev);
727
728 root_handle = ACPI_HANDLE(&pdev->dev);
729 if (!root_handle) {
730 IWL_DEBUG_LAR(mvm,
731 "Could not retrieve root port ACPI handle\n");
732 return -ENOENT;
733 }
734
735 /* Get the method's handle */
736 status = acpi_get_handle(root_handle, (acpi_string)WRD_METHOD, &handle);
737 if (ACPI_FAILURE(status)) {
738 IWL_DEBUG_LAR(mvm, "WRD method not found\n");
739 return -ENOENT;
740 }
741
742 /* Call WRDD with no arguments */
743 status = acpi_evaluate_object(handle, NULL, NULL, &wrdd);
744 if (ACPI_FAILURE(status)) {
745 IWL_DEBUG_LAR(mvm, "WRDC invocation failed (0x%x)\n", status);
746 return -ENOENT;
747 }
748
749 mcc_val = iwl_mvm_wrdd_get_mcc(mvm, wrdd.pointer);
750 kfree(wrdd.pointer);
751 if (!mcc_val)
752 return -ENOENT;
753
754 mcc[0] = (mcc_val >> 8) & 0xff;
755 mcc[1] = mcc_val & 0xff;
756 mcc[2] = '\0';
757 return 0;
758}
759#else /* CONFIG_ACPI */
760static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc)
761{
762 return -ENOENT;
763}
764#endif
765
90d4f7db
AN
766int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
767{
d0d15197
MG
768 bool tlv_lar;
769 bool nvm_lar;
8ba2d7a1
EH
770 int retval;
771 struct ieee80211_regdomain *regd;
7f0344c2 772 char mcc[3];
d0d15197
MG
773
774 if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
775 tlv_lar = mvm->fw->ucode_capa.capa[0] &
776 IWL_UCODE_TLV_CAPA_LAR_SUPPORT;
777 nvm_lar = mvm->nvm_data->lar_enabled;
778 if (tlv_lar != nvm_lar)
779 IWL_INFO(mvm,
780 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
781 tlv_lar ? "enabled" : "disabled",
782 nvm_lar ? "enabled" : "disabled");
783 }
784
90d4f7db
AN
785 if (!iwl_mvm_is_lar_supported(mvm))
786 return 0;
787
788 /*
789 * During HW restart, only replay the last set MCC to FW. Otherwise,
790 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
791 */
792 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
793 /* This should only be called during vif up and hold RTNL */
8ba2d7a1 794 return iwl_mvm_init_fw_regd(mvm);
90d4f7db
AN
795 }
796
797 /*
8ba2d7a1
EH
798 * Driver regulatory hint for initial update, this also informs the
799 * firmware we support wifi location updates.
88931cc9
AN
800 * Disallow scans that might crash the FW while the LAR regdomain
801 * is not set.
90d4f7db 802 */
88931cc9 803 mvm->lar_regdom_set = false;
8ba2d7a1 804
47c8b154 805 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
8ba2d7a1
EH
806 if (IS_ERR_OR_NULL(regd))
807 return -EIO;
808
7f0344c2
JD
809 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
810 !iwl_mvm_get_bios_mcc(mvm, mcc)) {
811 kfree(regd);
812 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
47c8b154 813 MCC_SOURCE_BIOS, NULL);
7f0344c2
JD
814 if (IS_ERR_OR_NULL(regd))
815 return -EIO;
816 }
817
8ba2d7a1
EH
818 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
819 kfree(regd);
820 return retval;
88931cc9
AN
821}
822
823int iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
824 struct iwl_rx_cmd_buffer *rxb,
825 struct iwl_device_cmd *cmd)
826{
827 struct iwl_rx_packet *pkt = rxb_addr(rxb);
828 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
8ba2d7a1 829 enum iwl_mcc_source src;
88931cc9 830 char mcc[3];
8ba2d7a1
EH
831 struct ieee80211_regdomain *regd;
832
833 lockdep_assert_held(&mvm->mutex);
88931cc9
AN
834
835 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
8ba2d7a1 836 return 0;
88931cc9
AN
837
838 mcc[0] = notif->mcc >> 8;
839 mcc[1] = notif->mcc & 0xff;
840 mcc[2] = '\0';
8ba2d7a1 841 src = notif->source_id;
88931cc9
AN
842
843 IWL_DEBUG_LAR(mvm,
8ba2d7a1
EH
844 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
845 mcc, src);
47c8b154 846 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
8ba2d7a1
EH
847 if (IS_ERR_OR_NULL(regd))
848 return 0;
849
850 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
851 kfree(regd);
852
88931cc9 853 return 0;
90d4f7db 854}