iwlwifi: mvm: use proper scan type for P2P
[linux-2.6-block.git] / drivers / net / wireless / iwlwifi / mvm / fw-api.h
CommitLineData
8ca151b5
JB
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
410dc5aa 25 * in the file called COPYING.
8ca151b5
JB
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63
64#ifndef __fw_api_h__
65#define __fw_api_h__
66
67#include "fw-api-rs.h"
68#include "fw-api-tx.h"
69#include "fw-api-sta.h"
70#include "fw-api-mac.h"
71#include "fw-api-power.h"
72#include "fw-api-d3.h"
fb3ceb81 73#include "fw-api-bt-coex.h"
8ca151b5
JB
74
75/* queue and FIFO numbers by usage */
76enum {
77 IWL_MVM_OFFCHANNEL_QUEUE = 8,
78 IWL_MVM_CMD_QUEUE = 9,
79 IWL_MVM_AUX_QUEUE = 15,
80 IWL_MVM_FIRST_AGG_QUEUE = 16,
81 IWL_MVM_NUM_QUEUES = 20,
82 IWL_MVM_LAST_AGG_QUEUE = IWL_MVM_NUM_QUEUES - 1,
83 IWL_MVM_CMD_FIFO = 7
84};
85
86#define IWL_MVM_STATION_COUNT 16
87
88/* commands */
89enum {
90 MVM_ALIVE = 0x1,
91 REPLY_ERROR = 0x2,
92
93 INIT_COMPLETE_NOTIF = 0x4,
94
95 /* PHY context commands */
96 PHY_CONTEXT_CMD = 0x8,
97 DBG_CFG = 0x9,
98
99 /* station table */
100 ADD_STA = 0x18,
101 REMOVE_STA = 0x19,
102
103 /* TX */
104 TX_CMD = 0x1c,
105 TXPATH_FLUSH = 0x1e,
106 MGMT_MCAST_KEY = 0x1f,
107
108 /* global key */
109 WEP_KEY = 0x20,
110
111 /* MAC and Binding commands */
112 MAC_CONTEXT_CMD = 0x28,
113 TIME_EVENT_CMD = 0x29, /* both CMD and response */
114 TIME_EVENT_NOTIFICATION = 0x2a,
115 BINDING_CONTEXT_CMD = 0x2b,
116 TIME_QUOTA_CMD = 0x2c,
117
118 LQ_CMD = 0x4e,
119
120 /* Calibration */
121 TEMPERATURE_NOTIFICATION = 0x62,
122 CALIBRATION_CFG_CMD = 0x65,
123 CALIBRATION_RES_NOTIFICATION = 0x66,
124 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
125 RADIO_VERSION_NOTIFICATION = 0x68,
126
127 /* Scan offload */
128 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
129 SCAN_OFFLOAD_ABORT_CMD = 0x52,
130 SCAN_OFFLOAD_COMPLETE = 0x6D,
131 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
132 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
133
134 /* Phy */
135 PHY_CONFIGURATION_CMD = 0x6a,
136 CALIB_RES_NOTIF_PHY_DB = 0x6b,
137 /* PHY_DB_CMD = 0x6c, */
138
139 /* Power */
140 POWER_TABLE_CMD = 0x77,
141
142 /* Scanning */
143 SCAN_REQUEST_CMD = 0x80,
144 SCAN_ABORT_CMD = 0x81,
145 SCAN_START_NOTIFICATION = 0x82,
146 SCAN_RESULTS_NOTIFICATION = 0x83,
147 SCAN_COMPLETE_NOTIFICATION = 0x84,
148
149 /* NVM */
150 NVM_ACCESS_CMD = 0x88,
151
152 SET_CALIB_DEFAULT_CMD = 0x8e,
153
571765c8 154 BEACON_NOTIFICATION = 0x90,
8ca151b5
JB
155 BEACON_TEMPLATE_CMD = 0x91,
156 TX_ANT_CONFIGURATION_CMD = 0x98,
fb3ceb81 157 BT_CONFIG = 0x9b,
8ca151b5
JB
158 STATISTICS_NOTIFICATION = 0x9d,
159
160 /* RF-KILL commands and notifications */
161 CARD_STATE_CMD = 0xa0,
162 CARD_STATE_NOTIFICATION = 0xa1,
163
164 REPLY_RX_PHY_CMD = 0xc0,
165 REPLY_RX_MPDU_CMD = 0xc1,
166 BA_NOTIF = 0xc5,
167
fb3ceb81
EG
168 /* BT Coex */
169 BT_COEX_PRIO_TABLE = 0xcc,
170 BT_COEX_PROT_ENV = 0xcd,
171 BT_PROFILE_NOTIFICATION = 0xce,
172
7df15b1e
HG
173 REPLY_BEACON_FILTERING_CMD = 0xd2,
174
8ca151b5
JB
175 REPLY_DEBUG_CMD = 0xf0,
176 DEBUG_LOG_MSG = 0xf7,
177
51b6b9e0
EG
178 MCAST_FILTER_CMD = 0xd0,
179
8ca151b5
JB
180 /* D3 commands/notifications */
181 D3_CONFIG_CMD = 0xd3,
182 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
183 OFFLOADS_QUERY_CMD = 0xd5,
184 REMOTE_WAKE_CONFIG_CMD = 0xd6,
185
186 /* for WoWLAN in particular */
187 WOWLAN_PATTERNS = 0xe0,
188 WOWLAN_CONFIGURATION = 0xe1,
189 WOWLAN_TSC_RSC_PARAM = 0xe2,
190 WOWLAN_TKIP_PARAM = 0xe3,
191 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
192 WOWLAN_GET_STATUSES = 0xe5,
193 WOWLAN_TX_POWER_PER_DB = 0xe6,
194
195 /* and for NetDetect */
196 NET_DETECT_CONFIG_CMD = 0x54,
197 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
198 NET_DETECT_PROFILES_CMD = 0x57,
199 NET_DETECT_HOTSPOTS_CMD = 0x58,
200 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
201
202 REPLY_MAX = 0xff,
203};
204
205/**
206 * struct iwl_cmd_response - generic response struct for most commands
207 * @status: status of the command asked, changes for each one
208 */
209struct iwl_cmd_response {
210 __le32 status;
211};
212
213/*
214 * struct iwl_tx_ant_cfg_cmd
215 * @valid: valid antenna configuration
216 */
217struct iwl_tx_ant_cfg_cmd {
218 __le32 valid;
219} __packed;
220
221/*
222 * Calibration control struct.
223 * Sent as part of the phy configuration command.
224 * @flow_trigger: bitmap for which calibrations to perform according to
225 * flow triggers.
226 * @event_trigger: bitmap for which calibrations to perform according to
227 * event triggers.
228 */
229struct iwl_calib_ctrl {
230 __le32 flow_trigger;
231 __le32 event_trigger;
232} __packed;
233
234/* This enum defines the bitmap of various calibrations to enable in both
235 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
236 */
237enum iwl_calib_cfg {
238 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
239 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
240 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
241 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
242 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
243 IWL_CALIB_CFG_DC_IDX = BIT(5),
244 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
245 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
246 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
247 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
248 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
249 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
250 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
251 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
252 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
253 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
254 IWL_CALIB_CFG_DAC_IDX = BIT(16),
255 IWL_CALIB_CFG_ABS_IDX = BIT(17),
256 IWL_CALIB_CFG_AGC_IDX = BIT(18),
257};
258
259/*
260 * Phy configuration command.
261 */
262struct iwl_phy_cfg_cmd {
263 __le32 phy_cfg;
264 struct iwl_calib_ctrl calib_control;
265} __packed;
266
267#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
268#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
269#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
270#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
271#define PHY_CFG_TX_CHAIN_A BIT(8)
272#define PHY_CFG_TX_CHAIN_B BIT(9)
273#define PHY_CFG_TX_CHAIN_C BIT(10)
274#define PHY_CFG_RX_CHAIN_A BIT(12)
275#define PHY_CFG_RX_CHAIN_B BIT(13)
276#define PHY_CFG_RX_CHAIN_C BIT(14)
277
278
279/* Target of the NVM_ACCESS_CMD */
280enum {
281 NVM_ACCESS_TARGET_CACHE = 0,
282 NVM_ACCESS_TARGET_OTP = 1,
283 NVM_ACCESS_TARGET_EEPROM = 2,
284};
285
b9545b48 286/* Section types for NVM_ACCESS_CMD */
8ca151b5
JB
287enum {
288 NVM_SECTION_TYPE_HW = 0,
289 NVM_SECTION_TYPE_SW,
290 NVM_SECTION_TYPE_PAPD,
291 NVM_SECTION_TYPE_BT,
292 NVM_SECTION_TYPE_CALIBRATION,
293 NVM_SECTION_TYPE_PRODUCTION,
294 NVM_SECTION_TYPE_POST_FCS_CALIB,
295 NVM_NUM_OF_SECTIONS,
296};
297
298/**
299 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
300 * @op_code: 0 - read, 1 - write
301 * @target: NVM_ACCESS_TARGET_*
302 * @type: NVM_SECTION_TYPE_*
303 * @offset: offset in bytes into the section
304 * @length: in bytes, to read/write
305 * @data: if write operation, the data to write. On read its empty
306 */
b9545b48 307struct iwl_nvm_access_cmd {
8ca151b5
JB
308 u8 op_code;
309 u8 target;
310 __le16 type;
311 __le16 offset;
312 __le16 length;
313 u8 data[];
314} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
315
316/**
317 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
318 * @offset: offset in bytes into the section
319 * @length: in bytes, either how much was written or read
320 * @type: NVM_SECTION_TYPE_*
321 * @status: 0 for success, fail otherwise
322 * @data: if read operation, the data returned. Empty on write.
323 */
b9545b48 324struct iwl_nvm_access_resp {
8ca151b5
JB
325 __le16 offset;
326 __le16 length;
327 __le16 type;
328 __le16 status;
329 u8 data[];
330} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
331
332/* MVM_ALIVE 0x1 */
333
334/* alive response is_valid values */
335#define ALIVE_RESP_UCODE_OK BIT(0)
336#define ALIVE_RESP_RFKILL BIT(1)
337
338/* alive response ver_type values */
339enum {
340 FW_TYPE_HW = 0,
341 FW_TYPE_PROT = 1,
342 FW_TYPE_AP = 2,
343 FW_TYPE_WOWLAN = 3,
344 FW_TYPE_TIMING = 4,
345 FW_TYPE_WIPAN = 5
346};
347
348/* alive response ver_subtype values */
349enum {
350 FW_SUBTYPE_FULL_FEATURE = 0,
351 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
352 FW_SUBTYPE_REDUCED = 2,
353 FW_SUBTYPE_ALIVE_ONLY = 3,
354 FW_SUBTYPE_WOWLAN = 4,
355 FW_SUBTYPE_AP_SUBTYPE = 5,
356 FW_SUBTYPE_WIPAN = 6,
357 FW_SUBTYPE_INITIALIZE = 9
358};
359
360#define IWL_ALIVE_STATUS_ERR 0xDEAD
361#define IWL_ALIVE_STATUS_OK 0xCAFE
362
363#define IWL_ALIVE_FLG_RFKILL BIT(0)
364
365struct mvm_alive_resp {
366 __le16 status;
367 __le16 flags;
368 u8 ucode_minor;
369 u8 ucode_major;
370 __le16 id;
371 u8 api_minor;
372 u8 api_major;
373 u8 ver_subtype;
374 u8 ver_type;
375 u8 mac;
376 u8 opt;
377 __le16 reserved2;
378 __le32 timestamp;
379 __le32 error_event_table_ptr; /* SRAM address for error log */
380 __le32 log_event_table_ptr; /* SRAM address for event log */
381 __le32 cpu_register_ptr;
382 __le32 dbgm_config_ptr;
383 __le32 alive_counter_ptr;
384 __le32 scd_base_ptr; /* SRAM address for SCD */
385} __packed; /* ALIVE_RES_API_S_VER_1 */
386
387/* Error response/notification */
388enum {
389 FW_ERR_UNKNOWN_CMD = 0x0,
390 FW_ERR_INVALID_CMD_PARAM = 0x1,
391 FW_ERR_SERVICE = 0x2,
392 FW_ERR_ARC_MEMORY = 0x3,
393 FW_ERR_ARC_CODE = 0x4,
394 FW_ERR_WATCH_DOG = 0x5,
395 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
396 FW_ERR_WEP_KEY_SIZE = 0x11,
397 FW_ERR_OBSOLETE_FUNC = 0x12,
398 FW_ERR_UNEXPECTED = 0xFE,
399 FW_ERR_FATAL = 0xFF
400};
401
402/**
403 * struct iwl_error_resp - FW error indication
404 * ( REPLY_ERROR = 0x2 )
405 * @error_type: one of FW_ERR_*
406 * @cmd_id: the command ID for which the error occured
407 * @bad_cmd_seq_num: sequence number of the erroneous command
408 * @error_service: which service created the error, applicable only if
409 * error_type = 2, otherwise 0
410 * @timestamp: TSF in usecs.
411 */
412struct iwl_error_resp {
413 __le32 error_type;
414 u8 cmd_id;
415 u8 reserved1;
416 __le16 bad_cmd_seq_num;
417 __le32 error_service;
418 __le64 timestamp;
419} __packed;
420
421
422/* Common PHY, MAC and Bindings definitions */
423
424#define MAX_MACS_IN_BINDING (3)
425#define MAX_BINDINGS (4)
426#define AUX_BINDING_INDEX (3)
427#define MAX_PHYS (4)
428
429/* Used to extract ID and color from the context dword */
430#define FW_CTXT_ID_POS (0)
431#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
432#define FW_CTXT_COLOR_POS (8)
433#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
434#define FW_CTXT_INVALID (0xffffffff)
435
436#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
437 (_color << FW_CTXT_COLOR_POS))
438
439/* Possible actions on PHYs, MACs and Bindings */
440enum {
441 FW_CTXT_ACTION_STUB = 0,
442 FW_CTXT_ACTION_ADD,
443 FW_CTXT_ACTION_MODIFY,
444 FW_CTXT_ACTION_REMOVE,
445 FW_CTXT_ACTION_NUM
446}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
447
448/* Time Events */
449
450/* Time Event types, according to MAC type */
451enum iwl_time_event_type {
452 /* BSS Station Events */
453 TE_BSS_STA_AGGRESSIVE_ASSOC,
454 TE_BSS_STA_ASSOC,
455 TE_BSS_EAP_DHCP_PROT,
456 TE_BSS_QUIET_PERIOD,
457
458 /* P2P Device Events */
459 TE_P2P_DEVICE_DISCOVERABLE,
460 TE_P2P_DEVICE_LISTEN,
461 TE_P2P_DEVICE_ACTION_SCAN,
462 TE_P2P_DEVICE_FULL_SCAN,
463
464 /* P2P Client Events */
465 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
466 TE_P2P_CLIENT_ASSOC,
467 TE_P2P_CLIENT_QUIET_PERIOD,
468
469 /* P2P GO Events */
470 TE_P2P_GO_ASSOC_PROT,
471 TE_P2P_GO_REPETITIVE_NOA,
472 TE_P2P_GO_CT_WINDOW,
473
474 /* WiDi Sync Events */
475 TE_WIDI_TX_SYNC,
476
477 TE_MAX
478}; /* MAC_EVENT_TYPE_API_E_VER_1 */
479
480/* Time Event dependencies: none, on another TE, or in a specific time */
481enum {
482 TE_INDEPENDENT = 0,
483 TE_DEP_OTHER = 1,
484 TE_DEP_TSF = 2,
485 TE_EVENT_SOCIOPATHIC = 4,
486}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
1da80e80
IP
487/*
488 * Supported Time event notifications configuration.
489 * A notification (both event and fragment) includes a status indicating weather
490 * the FW was able to schedule the event or not. For fragment start/end
491 * notification the status is always success. There is no start/end fragment
492 * notification for monolithic events.
493 *
494 * @TE_NOTIF_NONE: no notifications
495 * @TE_NOTIF_HOST_EVENT_START: request/receive notification on event start
496 * @TE_NOTIF_HOST_EVENT_END:request/receive notification on event end
497 * @TE_NOTIF_INTERNAL_EVENT_START: internal FW use
498 * @TE_NOTIF_INTERNAL_EVENT_END: internal FW use.
499 * @TE_NOTIF_HOST_FRAG_START: request/receive notification on frag start
500 * @TE_NOTIF_HOST_FRAG_END:request/receive notification on frag end
501 * @TE_NOTIF_INTERNAL_FRAG_START: internal FW use.
502 * @TE_NOTIF_INTERNAL_FRAG_END: internal FW use.
503 */
8ca151b5
JB
504enum {
505 TE_NOTIF_NONE = 0,
1da80e80
IP
506 TE_NOTIF_HOST_EVENT_START = 0x1,
507 TE_NOTIF_HOST_EVENT_END = 0x2,
508 TE_NOTIF_INTERNAL_EVENT_START = 0x4,
509 TE_NOTIF_INTERNAL_EVENT_END = 0x8,
510 TE_NOTIF_HOST_FRAG_START = 0x10,
511 TE_NOTIF_HOST_FRAG_END = 0x20,
512 TE_NOTIF_INTERNAL_FRAG_START = 0x40,
513 TE_NOTIF_INTERNAL_FRAG_END = 0x80
514}; /* MAC_EVENT_ACTION_API_E_VER_2 */
8ca151b5
JB
515
516/*
517 * @TE_FRAG_NONE: fragmentation of the time event is NOT allowed.
518 * @TE_FRAG_SINGLE: fragmentation of the time event is allowed, but only
519 * the first fragment is scheduled.
520 * @TE_FRAG_DUAL: fragmentation of the time event is allowed, but only
521 * the first 2 fragments are scheduled.
522 * @TE_FRAG_ENDLESS: fragmentation of the time event is allowed, and any number
523 * of fragments are valid.
524 *
525 * Other than the constant defined above, specifying a fragmentation value 'x'
526 * means that the event can be fragmented but only the first 'x' will be
527 * scheduled.
528 */
529enum {
530 TE_FRAG_NONE = 0,
531 TE_FRAG_SINGLE = 1,
532 TE_FRAG_DUAL = 2,
533 TE_FRAG_ENDLESS = 0xffffffff
534};
535
536/* Repeat the time event endlessly (until removed) */
537#define TE_REPEAT_ENDLESS (0xffffffff)
538/* If a Time Event has bounded repetitions, this is the maximal value */
539#define TE_REPEAT_MAX_MSK (0x0fffffff)
540/* If a Time Event can be fragmented, this is the max number of fragments */
541#define TE_FRAG_MAX_MSK (0x0fffffff)
542
543/**
544 * struct iwl_time_event_cmd - configuring Time Events
545 * ( TIME_EVENT_CMD = 0x29 )
546 * @id_and_color: ID and color of the relevant MAC
547 * @action: action to perform, one of FW_CTXT_ACTION_*
548 * @id: this field has two meanings, depending on the action:
549 * If the action is ADD, then it means the type of event to add.
550 * For all other actions it is the unique event ID assigned when the
551 * event was added by the FW.
552 * @apply_time: When to start the Time Event (in GP2)
553 * @max_delay: maximum delay to event's start (apply time), in TU
554 * @depends_on: the unique ID of the event we depend on (if any)
555 * @interval: interval between repetitions, in TU
556 * @interval_reciprocal: 2^32 / interval
557 * @duration: duration of event in TU
558 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
559 * @dep_policy: one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
560 * @is_present: 0 or 1, are we present or absent during the Time Event
561 * @max_frags: maximal number of fragments the Time Event can be divided to
562 * @notify: notifications using TE_NOTIF_* (whom to notify when)
563 */
564struct iwl_time_event_cmd {
565 /* COMMON_INDEX_HDR_API_S_VER_1 */
566 __le32 id_and_color;
567 __le32 action;
568 __le32 id;
569 /* MAC_TIME_EVENT_DATA_API_S_VER_1 */
570 __le32 apply_time;
571 __le32 max_delay;
572 __le32 dep_policy;
573 __le32 depends_on;
574 __le32 is_present;
575 __le32 max_frags;
576 __le32 interval;
577 __le32 interval_reciprocal;
578 __le32 duration;
579 __le32 repeat;
580 __le32 notify;
581} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_1 */
582
583/**
584 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
585 * @status: bit 0 indicates success, all others specify errors
586 * @id: the Time Event type
587 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
588 * @id_and_color: ID and color of the relevant MAC
589 */
590struct iwl_time_event_resp {
591 __le32 status;
592 __le32 id;
593 __le32 unique_id;
594 __le32 id_and_color;
595} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
596
597/**
598 * struct iwl_time_event_notif - notifications of time event start/stop
599 * ( TIME_EVENT_NOTIFICATION = 0x2a )
600 * @timestamp: action timestamp in GP2
601 * @session_id: session's unique id
602 * @unique_id: unique id of the Time Event itself
603 * @id_and_color: ID and color of the relevant MAC
604 * @action: one of TE_NOTIF_START or TE_NOTIF_END
605 * @status: true if scheduled, false otherwise (not executed)
606 */
607struct iwl_time_event_notif {
608 __le32 timestamp;
609 __le32 session_id;
610 __le32 unique_id;
611 __le32 id_and_color;
612 __le32 action;
613 __le32 status;
614} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
615
616
617/* Bindings and Time Quota */
618
619/**
620 * struct iwl_binding_cmd - configuring bindings
621 * ( BINDING_CONTEXT_CMD = 0x2b )
622 * @id_and_color: ID and color of the relevant Binding
623 * @action: action to perform, one of FW_CTXT_ACTION_*
624 * @macs: array of MAC id and colors which belong to the binding
625 * @phy: PHY id and color which belongs to the binding
626 */
627struct iwl_binding_cmd {
628 /* COMMON_INDEX_HDR_API_S_VER_1 */
629 __le32 id_and_color;
630 __le32 action;
631 /* BINDING_DATA_API_S_VER_1 */
632 __le32 macs[MAX_MACS_IN_BINDING];
633 __le32 phy;
634} __packed; /* BINDING_CMD_API_S_VER_1 */
635
35adfd6e
IP
636/* The maximal number of fragments in the FW's schedule session */
637#define IWL_MVM_MAX_QUOTA 128
638
8ca151b5
JB
639/**
640 * struct iwl_time_quota_data - configuration of time quota per binding
641 * @id_and_color: ID and color of the relevant Binding
642 * @quota: absolute time quota in TU. The scheduler will try to divide the
643 * remainig quota (after Time Events) according to this quota.
644 * @max_duration: max uninterrupted context duration in TU
645 */
646struct iwl_time_quota_data {
647 __le32 id_and_color;
648 __le32 quota;
649 __le32 max_duration;
650} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
651
652/**
653 * struct iwl_time_quota_cmd - configuration of time quota between bindings
654 * ( TIME_QUOTA_CMD = 0x2c )
655 * @quotas: allocations per binding
656 */
657struct iwl_time_quota_cmd {
658 struct iwl_time_quota_data quotas[MAX_BINDINGS];
659} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
660
661
662/* PHY context */
663
664/* Supported bands */
665#define PHY_BAND_5 (0)
666#define PHY_BAND_24 (1)
667
668/* Supported channel width, vary if there is VHT support */
669#define PHY_VHT_CHANNEL_MODE20 (0x0)
670#define PHY_VHT_CHANNEL_MODE40 (0x1)
671#define PHY_VHT_CHANNEL_MODE80 (0x2)
672#define PHY_VHT_CHANNEL_MODE160 (0x3)
673
674/*
675 * Control channel position:
676 * For legacy set bit means upper channel, otherwise lower.
677 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
678 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
679 * center_freq
680 * |
681 * 40Mhz |_______|_______|
682 * 80Mhz |_______|_______|_______|_______|
683 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
684 * code 011 010 001 000 | 100 101 110 111
685 */
686#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
687#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
688#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
689#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
690#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
691#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
692#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
693#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
694
695/*
696 * @band: PHY_BAND_*
697 * @channel: channel number
698 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
699 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
700 */
701struct iwl_fw_channel_info {
702 u8 band;
703 u8 channel;
704 u8 width;
705 u8 ctrl_pos;
706} __packed;
707
708#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
709#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
710 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
711#define PHY_RX_CHAIN_VALID_POS (1)
712#define PHY_RX_CHAIN_VALID_MSK \
713 (0x7 << PHY_RX_CHAIN_VALID_POS)
714#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
715#define PHY_RX_CHAIN_FORCE_SEL_MSK \
716 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
717#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
718#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
719 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
720#define PHY_RX_CHAIN_CNT_POS (10)
721#define PHY_RX_CHAIN_CNT_MSK \
722 (0x3 << PHY_RX_CHAIN_CNT_POS)
723#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
724#define PHY_RX_CHAIN_MIMO_CNT_MSK \
725 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
726#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
727#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
728 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
729
730/* TODO: fix the value, make it depend on firmware at runtime? */
731#define NUM_PHY_CTX 3
732
733/* TODO: complete missing documentation */
734/**
735 * struct iwl_phy_context_cmd - config of the PHY context
736 * ( PHY_CONTEXT_CMD = 0x8 )
737 * @id_and_color: ID and color of the relevant Binding
738 * @action: action to perform, one of FW_CTXT_ACTION_*
739 * @apply_time: 0 means immediate apply and context switch.
740 * other value means apply new params after X usecs
741 * @tx_param_color: ???
742 * @channel_info:
743 * @txchain_info: ???
744 * @rxchain_info: ???
745 * @acquisition_data: ???
746 * @dsp_cfg_flags: set to 0
747 */
748struct iwl_phy_context_cmd {
749 /* COMMON_INDEX_HDR_API_S_VER_1 */
750 __le32 id_and_color;
751 __le32 action;
752 /* PHY_CONTEXT_DATA_API_S_VER_1 */
753 __le32 apply_time;
754 __le32 tx_param_color;
755 struct iwl_fw_channel_info ci;
756 __le32 txchain_info;
757 __le32 rxchain_info;
758 __le32 acquisition_data;
759 __le32 dsp_cfg_flags;
760} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
761
762#define IWL_RX_INFO_PHY_CNT 8
763#define IWL_RX_INFO_AGC_IDX 1
764#define IWL_RX_INFO_RSSI_AB_IDX 2
8101a7f0
EG
765#define IWL_OFDM_AGC_A_MSK 0x0000007f
766#define IWL_OFDM_AGC_A_POS 0
767#define IWL_OFDM_AGC_B_MSK 0x00003f80
768#define IWL_OFDM_AGC_B_POS 7
769#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
770#define IWL_OFDM_AGC_CODE_POS 20
8ca151b5 771#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
8ca151b5 772#define IWL_OFDM_RSSI_A_POS 0
8101a7f0
EG
773#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
774#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
8ca151b5 775#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
8ca151b5 776#define IWL_OFDM_RSSI_B_POS 16
8101a7f0
EG
777#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
778#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
8ca151b5
JB
779
780/**
781 * struct iwl_rx_phy_info - phy info
782 * (REPLY_RX_PHY_CMD = 0xc0)
783 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
784 * @cfg_phy_cnt: configurable DSP phy data byte count
785 * @stat_id: configurable DSP phy data set ID
786 * @reserved1:
787 * @system_timestamp: GP2 at on air rise
788 * @timestamp: TSF at on air rise
789 * @beacon_time_stamp: beacon at on-air rise
790 * @phy_flags: general phy flags: band, modulation, ...
791 * @channel: channel number
792 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
793 * @rate_n_flags: RATE_MCS_*
794 * @byte_count: frame's byte-count
795 * @frame_time: frame's time on the air, based on byte count and frame rate
796 * calculation
6bfcb7e8 797 * @mac_active_msk: what MACs were active when the frame was received
8ca151b5
JB
798 *
799 * Before each Rx, the device sends this data. It contains PHY information
800 * about the reception of the packet.
801 */
802struct iwl_rx_phy_info {
803 u8 non_cfg_phy_cnt;
804 u8 cfg_phy_cnt;
805 u8 stat_id;
806 u8 reserved1;
807 __le32 system_timestamp;
808 __le64 timestamp;
809 __le32 beacon_time_stamp;
810 __le16 phy_flags;
811 __le16 channel;
812 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
813 __le32 rate_n_flags;
814 __le32 byte_count;
6bfcb7e8 815 __le16 mac_active_msk;
8ca151b5
JB
816 __le16 frame_time;
817} __packed;
818
819struct iwl_rx_mpdu_res_start {
820 __le16 byte_count;
821 __le16 reserved;
822} __packed;
823
824/**
825 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
826 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
827 * @RX_RES_PHY_FLAGS_MOD_CCK:
828 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
829 * @RX_RES_PHY_FLAGS_NARROW_BAND:
830 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
831 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
832 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
833 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
834 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
835 */
836enum iwl_rx_phy_flags {
837 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
838 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
839 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
840 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
841 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
842 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
843 RX_RES_PHY_FLAGS_AGG = BIT(7),
844 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
845 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
846 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
847};
848
849/**
850 * enum iwl_mvm_rx_status - written by fw for each Rx packet
851 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
852 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
853 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
854 * @RX_MPDU_RES_STATUS_KEY_VALID:
855 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
856 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
857 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
858 * in the driver.
859 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
860 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
861 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
862 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
863 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
864 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
865 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
866 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
867 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
868 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
869 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
870 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
871 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
872 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
873 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
874 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
875 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
876 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
877 * @RX_MPDU_RES_STATUS_RRF_KILL:
878 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
879 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
880 */
881enum iwl_mvm_rx_status {
882 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
883 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
884 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
885 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
886 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
887 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
888 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
889 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
890 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
891 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
892 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
893 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
894 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
895 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
896 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
897 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
898 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
899 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
900 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
901 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
902 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
903 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
904 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
905 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
906 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
907 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
908};
909
910/**
911 * struct iwl_radio_version_notif - information on the radio version
912 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
913 * @radio_flavor:
914 * @radio_step:
915 * @radio_dash:
916 */
917struct iwl_radio_version_notif {
918 __le32 radio_flavor;
919 __le32 radio_step;
920 __le32 radio_dash;
921} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
922
923enum iwl_card_state_flags {
924 CARD_ENABLED = 0x00,
925 HW_CARD_DISABLED = 0x01,
926 SW_CARD_DISABLED = 0x02,
927 CT_KILL_CARD_DISABLED = 0x04,
928 HALT_CARD_DISABLED = 0x08,
929 CARD_DISABLED_MSK = 0x0f,
930 CARD_IS_RX_ON = 0x10,
931};
932
933/**
934 * struct iwl_radio_version_notif - information on the radio version
935 * ( CARD_STATE_NOTIFICATION = 0xa1 )
936 * @flags: %iwl_card_state_flags
937 */
938struct iwl_card_state_notif {
939 __le32 flags;
940} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
941
942/**
943 * struct iwl_set_calib_default_cmd - set default value for calibration.
944 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
945 * @calib_index: the calibration to set value for
946 * @length: of data
947 * @data: the value to set for the calibration result
948 */
949struct iwl_set_calib_default_cmd {
950 __le16 calib_index;
951 __le16 length;
952 u8 data[0];
953} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
954
51b6b9e0
EG
955#define MAX_PORT_ID_NUM 2
956
957/**
958 * struct iwl_mcast_filter_cmd - configure multicast filter.
959 * @filter_own: Set 1 to filter out multicast packets sent by station itself
960 * @port_id: Multicast MAC addresses array specifier. This is a strange way
961 * to identify network interface adopted in host-device IF.
962 * It is used by FW as index in array of addresses. This array has
963 * MAX_PORT_ID_NUM members.
964 * @count: Number of MAC addresses in the array
965 * @pass_all: Set 1 to pass all multicast packets.
966 * @bssid: current association BSSID.
967 * @addr_list: Place holder for array of MAC addresses.
968 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
969 */
970struct iwl_mcast_filter_cmd {
971 u8 filter_own;
972 u8 port_id;
973 u8 count;
974 u8 pass_all;
975 u8 bssid[6];
976 u8 reserved[2];
977 u8 addr_list[0];
978} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
979
8ca151b5 980#endif /* __fw_api_h__ */