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8ca151b5 JB |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
ee9219b2 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
8ca151b5 JB |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of version 2 of the GNU General Public License as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but | |
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
23 | * USA | |
24 | * | |
25 | * The full GNU General Public License is included in this distribution | |
410dc5aa | 26 | * in the file called COPYING. |
8ca151b5 JB |
27 | * |
28 | * Contact Information: | |
29 | * Intel Linux Wireless <ilw@linux.intel.com> | |
30 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
31 | * | |
32 | * BSD LICENSE | |
33 | * | |
51368bf7 | 34 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
ee9219b2 | 35 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
8ca151b5 JB |
36 | * All rights reserved. |
37 | * | |
38 | * Redistribution and use in source and binary forms, with or without | |
39 | * modification, are permitted provided that the following conditions | |
40 | * are met: | |
41 | * | |
42 | * * Redistributions of source code must retain the above copyright | |
43 | * notice, this list of conditions and the following disclaimer. | |
44 | * * Redistributions in binary form must reproduce the above copyright | |
45 | * notice, this list of conditions and the following disclaimer in | |
46 | * the documentation and/or other materials provided with the | |
47 | * distribution. | |
48 | * * Neither the name Intel Corporation nor the names of its | |
49 | * contributors may be used to endorse or promote products derived | |
50 | * from this software without specific prior written permission. | |
51 | * | |
52 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
53 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
54 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
55 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
56 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
57 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
58 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
59 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
60 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
61 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
62 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
63 | * | |
64 | *****************************************************************************/ | |
65 | ||
66 | #ifndef __fw_api_h__ | |
67 | #define __fw_api_h__ | |
68 | ||
69 | #include "fw-api-rs.h" | |
70 | #include "fw-api-tx.h" | |
71 | #include "fw-api-sta.h" | |
72 | #include "fw-api-mac.h" | |
73 | #include "fw-api-power.h" | |
74 | #include "fw-api-d3.h" | |
5b7ff615 | 75 | #include "fw-api-coex.h" |
e820c2da | 76 | #include "fw-api-scan.h" |
d19ac589 | 77 | #include "fw-api-stats.h" |
ce792918 | 78 | #include "fw-api-tof.h" |
8ca151b5 | 79 | |
19e737c9 | 80 | /* Tx queue numbers */ |
8ca151b5 JB |
81 | enum { |
82 | IWL_MVM_OFFCHANNEL_QUEUE = 8, | |
83 | IWL_MVM_CMD_QUEUE = 9, | |
8ca151b5 JB |
84 | }; |
85 | ||
b2d81db7 JB |
86 | enum iwl_mvm_tx_fifo { |
87 | IWL_MVM_TX_FIFO_BK = 0, | |
88 | IWL_MVM_TX_FIFO_BE, | |
89 | IWL_MVM_TX_FIFO_VI, | |
90 | IWL_MVM_TX_FIFO_VO, | |
91 | IWL_MVM_TX_FIFO_MCAST = 5, | |
92 | IWL_MVM_TX_FIFO_CMD = 7, | |
93 | }; | |
19e737c9 | 94 | |
8ca151b5 JB |
95 | #define IWL_MVM_STATION_COUNT 16 |
96 | ||
cf7b491d AN |
97 | #define IWL_MVM_TDLS_STA_COUNT 4 |
98 | ||
8ca151b5 JB |
99 | /* commands */ |
100 | enum { | |
101 | MVM_ALIVE = 0x1, | |
102 | REPLY_ERROR = 0x2, | |
103 | ||
104 | INIT_COMPLETE_NOTIF = 0x4, | |
105 | ||
106 | /* PHY context commands */ | |
107 | PHY_CONTEXT_CMD = 0x8, | |
108 | DBG_CFG = 0x9, | |
b9fae2d5 | 109 | ANTENNA_COUPLING_NOTIFICATION = 0xa, |
8ca151b5 | 110 | |
d2496221 | 111 | /* UMAC scan commands */ |
ee9219b2 | 112 | SCAN_ITERATION_COMPLETE_UMAC = 0xb5, |
d2496221 DS |
113 | SCAN_CFG_CMD = 0xc, |
114 | SCAN_REQ_UMAC = 0xd, | |
115 | SCAN_ABORT_UMAC = 0xe, | |
116 | SCAN_COMPLETE_UMAC = 0xf, | |
117 | ||
8ca151b5 | 118 | /* station table */ |
5a258aae | 119 | ADD_STA_KEY = 0x17, |
8ca151b5 JB |
120 | ADD_STA = 0x18, |
121 | REMOVE_STA = 0x19, | |
122 | ||
123 | /* TX */ | |
124 | TX_CMD = 0x1c, | |
125 | TXPATH_FLUSH = 0x1e, | |
126 | MGMT_MCAST_KEY = 0x1f, | |
127 | ||
3edf8ff6 AA |
128 | /* scheduler config */ |
129 | SCD_QUEUE_CFG = 0x1d, | |
130 | ||
8ca151b5 JB |
131 | /* global key */ |
132 | WEP_KEY = 0x20, | |
133 | ||
04fd2c28 LK |
134 | /* Memory */ |
135 | SHARED_MEM_CFG = 0x25, | |
136 | ||
77c5d7ef AN |
137 | /* TDLS */ |
138 | TDLS_CHANNEL_SWITCH_CMD = 0x27, | |
139 | TDLS_CHANNEL_SWITCH_NOTIFICATION = 0xaa, | |
307e4723 | 140 | TDLS_CONFIG_CMD = 0xa7, |
77c5d7ef | 141 | |
8ca151b5 JB |
142 | /* MAC and Binding commands */ |
143 | MAC_CONTEXT_CMD = 0x28, | |
144 | TIME_EVENT_CMD = 0x29, /* both CMD and response */ | |
145 | TIME_EVENT_NOTIFICATION = 0x2a, | |
146 | BINDING_CONTEXT_CMD = 0x2b, | |
147 | TIME_QUOTA_CMD = 0x2c, | |
4ac6cb59 | 148 | NON_QOS_TX_COUNTER_CMD = 0x2d, |
8ca151b5 JB |
149 | |
150 | LQ_CMD = 0x4e, | |
151 | ||
a6c4fb44 MG |
152 | /* paging block to FW cpu2 */ |
153 | FW_PAGING_BLOCK_CMD = 0x4f, | |
154 | ||
8ca151b5 JB |
155 | /* Scan offload */ |
156 | SCAN_OFFLOAD_REQUEST_CMD = 0x51, | |
157 | SCAN_OFFLOAD_ABORT_CMD = 0x52, | |
720befbf | 158 | HOT_SPOT_CMD = 0x53, |
8ca151b5 JB |
159 | SCAN_OFFLOAD_COMPLETE = 0x6D, |
160 | SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E, | |
161 | SCAN_OFFLOAD_CONFIG_CMD = 0x6f, | |
35a000b7 | 162 | MATCH_FOUND_NOTIFICATION = 0xd9, |
fb98be5e | 163 | SCAN_ITERATION_COMPLETE = 0xe7, |
8ca151b5 JB |
164 | |
165 | /* Phy */ | |
166 | PHY_CONFIGURATION_CMD = 0x6a, | |
167 | CALIB_RES_NOTIF_PHY_DB = 0x6b, | |
168 | /* PHY_DB_CMD = 0x6c, */ | |
169 | ||
ce792918 GG |
170 | /* ToF - 802.11mc FTM */ |
171 | TOF_CMD = 0x10, | |
172 | TOF_NOTIFICATION = 0x11, | |
173 | ||
e811ada7 | 174 | /* Power - legacy power table command */ |
8ca151b5 | 175 | POWER_TABLE_CMD = 0x77, |
175a70b7 | 176 | PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78, |
9180ac50 | 177 | LTR_CONFIG = 0xee, |
8ca151b5 | 178 | |
9ee718aa EL |
179 | /* Thermal Throttling*/ |
180 | REPLY_THERMAL_MNG_BACKOFF = 0x7e, | |
181 | ||
0becb377 MG |
182 | /* Set/Get DC2DC frequency tune */ |
183 | DC2DC_CONFIG_CMD = 0x83, | |
184 | ||
8ca151b5 JB |
185 | /* NVM */ |
186 | NVM_ACCESS_CMD = 0x88, | |
187 | ||
188 | SET_CALIB_DEFAULT_CMD = 0x8e, | |
189 | ||
571765c8 | 190 | BEACON_NOTIFICATION = 0x90, |
8ca151b5 JB |
191 | BEACON_TEMPLATE_CMD = 0x91, |
192 | TX_ANT_CONFIGURATION_CMD = 0x98, | |
91a8bcde | 193 | STATISTICS_CMD = 0x9c, |
8ca151b5 | 194 | STATISTICS_NOTIFICATION = 0x9d, |
3e56eadf | 195 | EOSP_NOTIFICATION = 0x9e, |
88f2fd73 | 196 | REDUCE_TX_POWER_CMD = 0x9f, |
8ca151b5 JB |
197 | |
198 | /* RF-KILL commands and notifications */ | |
199 | CARD_STATE_CMD = 0xa0, | |
200 | CARD_STATE_NOTIFICATION = 0xa1, | |
201 | ||
d64048ed HG |
202 | MISSED_BEACONS_NOTIFICATION = 0xa2, |
203 | ||
e811ada7 AB |
204 | /* Power - new power table command */ |
205 | MAC_PM_POWER_TABLE = 0xa9, | |
206 | ||
30269c12 CRI |
207 | MFUART_LOAD_NOTIFICATION = 0xb1, |
208 | ||
8ca151b5 JB |
209 | REPLY_RX_PHY_CMD = 0xc0, |
210 | REPLY_RX_MPDU_CMD = 0xc1, | |
211 | BA_NOTIF = 0xc5, | |
212 | ||
dcaf9f5e AN |
213 | /* Location Aware Regulatory */ |
214 | MCC_UPDATE_CMD = 0xc8, | |
88931cc9 | 215 | MCC_CHUB_UPDATE_CMD = 0xc9, |
dcaf9f5e | 216 | |
a2d79c57 MG |
217 | MARKER_CMD = 0xcb, |
218 | ||
fb3ceb81 EG |
219 | /* BT Coex */ |
220 | BT_COEX_PRIO_TABLE = 0xcc, | |
221 | BT_COEX_PROT_ENV = 0xcd, | |
222 | BT_PROFILE_NOTIFICATION = 0xce, | |
430a3bba EG |
223 | BT_CONFIG = 0x9b, |
224 | BT_COEX_UPDATE_SW_BOOST = 0x5a, | |
225 | BT_COEX_UPDATE_CORUN_LUT = 0x5b, | |
226 | BT_COEX_UPDATE_REDUCED_TXP = 0x5c, | |
dac94da8 | 227 | BT_COEX_CI = 0x5d, |
fb3ceb81 | 228 | |
1f3b0ff8 | 229 | REPLY_SF_CFG_CMD = 0xd1, |
7df15b1e HG |
230 | REPLY_BEACON_FILTERING_CMD = 0xd2, |
231 | ||
a0a09243 LC |
232 | /* DTS measurements */ |
233 | CMD_DTS_MEASUREMENT_TRIGGER = 0xdc, | |
234 | DTS_MEASUREMENT_NOTIFICATION = 0xdd, | |
235 | ||
8ca151b5 JB |
236 | REPLY_DEBUG_CMD = 0xf0, |
237 | DEBUG_LOG_MSG = 0xf7, | |
238 | ||
c87163b9 | 239 | BCAST_FILTER_CMD = 0xcf, |
51b6b9e0 EG |
240 | MCAST_FILTER_CMD = 0xd0, |
241 | ||
8ca151b5 JB |
242 | /* D3 commands/notifications */ |
243 | D3_CONFIG_CMD = 0xd3, | |
244 | PROT_OFFLOAD_CONFIG_CMD = 0xd4, | |
245 | OFFLOADS_QUERY_CMD = 0xd5, | |
246 | REMOTE_WAKE_CONFIG_CMD = 0xd6, | |
98ee7783 | 247 | D0I3_END_CMD = 0xed, |
8ca151b5 JB |
248 | |
249 | /* for WoWLAN in particular */ | |
250 | WOWLAN_PATTERNS = 0xe0, | |
251 | WOWLAN_CONFIGURATION = 0xe1, | |
252 | WOWLAN_TSC_RSC_PARAM = 0xe2, | |
253 | WOWLAN_TKIP_PARAM = 0xe3, | |
254 | WOWLAN_KEK_KCK_MATERIAL = 0xe4, | |
255 | WOWLAN_GET_STATUSES = 0xe5, | |
256 | WOWLAN_TX_POWER_PER_DB = 0xe6, | |
257 | ||
258 | /* and for NetDetect */ | |
b04998f3 LC |
259 | SCAN_OFFLOAD_PROFILES_QUERY_CMD = 0x56, |
260 | SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD = 0x58, | |
261 | SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD = 0x59, | |
8ca151b5 JB |
262 | |
263 | REPLY_MAX = 0xff, | |
264 | }; | |
265 | ||
266 | /** | |
267 | * struct iwl_cmd_response - generic response struct for most commands | |
268 | * @status: status of the command asked, changes for each one | |
269 | */ | |
270 | struct iwl_cmd_response { | |
271 | __le32 status; | |
272 | }; | |
273 | ||
274 | /* | |
275 | * struct iwl_tx_ant_cfg_cmd | |
276 | * @valid: valid antenna configuration | |
277 | */ | |
278 | struct iwl_tx_ant_cfg_cmd { | |
279 | __le32 valid; | |
280 | } __packed; | |
281 | ||
282 | /* | |
283 | * Calibration control struct. | |
284 | * Sent as part of the phy configuration command. | |
285 | * @flow_trigger: bitmap for which calibrations to perform according to | |
286 | * flow triggers. | |
287 | * @event_trigger: bitmap for which calibrations to perform according to | |
288 | * event triggers. | |
289 | */ | |
290 | struct iwl_calib_ctrl { | |
291 | __le32 flow_trigger; | |
292 | __le32 event_trigger; | |
293 | } __packed; | |
294 | ||
295 | /* This enum defines the bitmap of various calibrations to enable in both | |
296 | * init ucode and runtime ucode through CALIBRATION_CFG_CMD. | |
297 | */ | |
298 | enum iwl_calib_cfg { | |
299 | IWL_CALIB_CFG_XTAL_IDX = BIT(0), | |
300 | IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1), | |
301 | IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2), | |
302 | IWL_CALIB_CFG_PAPD_IDX = BIT(3), | |
303 | IWL_CALIB_CFG_TX_PWR_IDX = BIT(4), | |
304 | IWL_CALIB_CFG_DC_IDX = BIT(5), | |
305 | IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6), | |
306 | IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7), | |
307 | IWL_CALIB_CFG_TX_IQ_IDX = BIT(8), | |
308 | IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9), | |
309 | IWL_CALIB_CFG_RX_IQ_IDX = BIT(10), | |
310 | IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11), | |
311 | IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12), | |
312 | IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13), | |
313 | IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14), | |
314 | IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15), | |
315 | IWL_CALIB_CFG_DAC_IDX = BIT(16), | |
316 | IWL_CALIB_CFG_ABS_IDX = BIT(17), | |
317 | IWL_CALIB_CFG_AGC_IDX = BIT(18), | |
318 | }; | |
319 | ||
320 | /* | |
321 | * Phy configuration command. | |
322 | */ | |
323 | struct iwl_phy_cfg_cmd { | |
324 | __le32 phy_cfg; | |
325 | struct iwl_calib_ctrl calib_control; | |
326 | } __packed; | |
327 | ||
328 | #define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1)) | |
329 | #define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3)) | |
330 | #define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5)) | |
331 | #define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7)) | |
332 | #define PHY_CFG_TX_CHAIN_A BIT(8) | |
333 | #define PHY_CFG_TX_CHAIN_B BIT(9) | |
334 | #define PHY_CFG_TX_CHAIN_C BIT(10) | |
335 | #define PHY_CFG_RX_CHAIN_A BIT(12) | |
336 | #define PHY_CFG_RX_CHAIN_B BIT(13) | |
337 | #define PHY_CFG_RX_CHAIN_C BIT(14) | |
338 | ||
339 | ||
340 | /* Target of the NVM_ACCESS_CMD */ | |
341 | enum { | |
342 | NVM_ACCESS_TARGET_CACHE = 0, | |
343 | NVM_ACCESS_TARGET_OTP = 1, | |
344 | NVM_ACCESS_TARGET_EEPROM = 2, | |
345 | }; | |
346 | ||
b9545b48 | 347 | /* Section types for NVM_ACCESS_CMD */ |
8ca151b5 | 348 | enum { |
ae2b21b0 | 349 | NVM_SECTION_TYPE_SW = 1, |
77db0a3c | 350 | NVM_SECTION_TYPE_REGULATORY = 3, |
ae2b21b0 EH |
351 | NVM_SECTION_TYPE_CALIBRATION = 4, |
352 | NVM_SECTION_TYPE_PRODUCTION = 5, | |
77db0a3c | 353 | NVM_SECTION_TYPE_MAC_OVERRIDE = 11, |
ce500071 EH |
354 | NVM_SECTION_TYPE_PHY_SKU = 12, |
355 | NVM_MAX_NUM_SECTIONS = 13, | |
8ca151b5 JB |
356 | }; |
357 | ||
358 | /** | |
359 | * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section | |
360 | * @op_code: 0 - read, 1 - write | |
361 | * @target: NVM_ACCESS_TARGET_* | |
362 | * @type: NVM_SECTION_TYPE_* | |
363 | * @offset: offset in bytes into the section | |
364 | * @length: in bytes, to read/write | |
365 | * @data: if write operation, the data to write. On read its empty | |
366 | */ | |
b9545b48 | 367 | struct iwl_nvm_access_cmd { |
8ca151b5 JB |
368 | u8 op_code; |
369 | u8 target; | |
370 | __le16 type; | |
371 | __le16 offset; | |
372 | __le16 length; | |
373 | u8 data[]; | |
374 | } __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */ | |
375 | ||
a6c4fb44 MG |
376 | #define NUM_OF_FW_PAGING_BLOCKS 33 /* 32 for data and 1 block for CSS */ |
377 | ||
378 | /* | |
379 | * struct iwl_fw_paging_cmd - paging layout | |
380 | * | |
381 | * (FW_PAGING_BLOCK_CMD = 0x4f) | |
382 | * | |
383 | * Send to FW the paging layout in the driver. | |
384 | * | |
385 | * @flags: various flags for the command | |
386 | * @block_size: the block size in powers of 2 | |
387 | * @block_num: number of blocks specified in the command. | |
388 | * @device_phy_addr: virtual addresses from device side | |
389 | */ | |
390 | struct iwl_fw_paging_cmd { | |
391 | __le32 flags; | |
392 | __le32 block_size; | |
393 | __le32 block_num; | |
394 | __le32 device_phy_addr[NUM_OF_FW_PAGING_BLOCKS]; | |
395 | } __packed; /* FW_PAGING_BLOCK_CMD_API_S_VER_1 */ | |
396 | ||
8ca151b5 JB |
397 | /** |
398 | * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD | |
399 | * @offset: offset in bytes into the section | |
400 | * @length: in bytes, either how much was written or read | |
401 | * @type: NVM_SECTION_TYPE_* | |
402 | * @status: 0 for success, fail otherwise | |
403 | * @data: if read operation, the data returned. Empty on write. | |
404 | */ | |
b9545b48 | 405 | struct iwl_nvm_access_resp { |
8ca151b5 JB |
406 | __le16 offset; |
407 | __le16 length; | |
408 | __le16 type; | |
409 | __le16 status; | |
410 | u8 data[]; | |
411 | } __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */ | |
412 | ||
413 | /* MVM_ALIVE 0x1 */ | |
414 | ||
415 | /* alive response is_valid values */ | |
416 | #define ALIVE_RESP_UCODE_OK BIT(0) | |
417 | #define ALIVE_RESP_RFKILL BIT(1) | |
418 | ||
419 | /* alive response ver_type values */ | |
420 | enum { | |
421 | FW_TYPE_HW = 0, | |
422 | FW_TYPE_PROT = 1, | |
423 | FW_TYPE_AP = 2, | |
424 | FW_TYPE_WOWLAN = 3, | |
425 | FW_TYPE_TIMING = 4, | |
426 | FW_TYPE_WIPAN = 5 | |
427 | }; | |
428 | ||
429 | /* alive response ver_subtype values */ | |
430 | enum { | |
431 | FW_SUBTYPE_FULL_FEATURE = 0, | |
432 | FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */ | |
433 | FW_SUBTYPE_REDUCED = 2, | |
434 | FW_SUBTYPE_ALIVE_ONLY = 3, | |
435 | FW_SUBTYPE_WOWLAN = 4, | |
436 | FW_SUBTYPE_AP_SUBTYPE = 5, | |
437 | FW_SUBTYPE_WIPAN = 6, | |
438 | FW_SUBTYPE_INITIALIZE = 9 | |
439 | }; | |
440 | ||
441 | #define IWL_ALIVE_STATUS_ERR 0xDEAD | |
442 | #define IWL_ALIVE_STATUS_OK 0xCAFE | |
443 | ||
444 | #define IWL_ALIVE_FLG_RFKILL BIT(0) | |
445 | ||
7e1223b5 | 446 | struct mvm_alive_resp_ver1 { |
8ca151b5 JB |
447 | __le16 status; |
448 | __le16 flags; | |
449 | u8 ucode_minor; | |
450 | u8 ucode_major; | |
451 | __le16 id; | |
452 | u8 api_minor; | |
453 | u8 api_major; | |
454 | u8 ver_subtype; | |
455 | u8 ver_type; | |
456 | u8 mac; | |
457 | u8 opt; | |
458 | __le16 reserved2; | |
459 | __le32 timestamp; | |
460 | __le32 error_event_table_ptr; /* SRAM address for error log */ | |
461 | __le32 log_event_table_ptr; /* SRAM address for event log */ | |
462 | __le32 cpu_register_ptr; | |
463 | __le32 dbgm_config_ptr; | |
464 | __le32 alive_counter_ptr; | |
465 | __le32 scd_base_ptr; /* SRAM address for SCD */ | |
466 | } __packed; /* ALIVE_RES_API_S_VER_1 */ | |
467 | ||
01a9ca51 EH |
468 | struct mvm_alive_resp_ver2 { |
469 | __le16 status; | |
470 | __le16 flags; | |
471 | u8 ucode_minor; | |
472 | u8 ucode_major; | |
473 | __le16 id; | |
474 | u8 api_minor; | |
475 | u8 api_major; | |
476 | u8 ver_subtype; | |
477 | u8 ver_type; | |
478 | u8 mac; | |
479 | u8 opt; | |
480 | __le16 reserved2; | |
481 | __le32 timestamp; | |
482 | __le32 error_event_table_ptr; /* SRAM address for error log */ | |
483 | __le32 log_event_table_ptr; /* SRAM address for LMAC event log */ | |
484 | __le32 cpu_register_ptr; | |
485 | __le32 dbgm_config_ptr; | |
486 | __le32 alive_counter_ptr; | |
487 | __le32 scd_base_ptr; /* SRAM address for SCD */ | |
488 | __le32 st_fwrd_addr; /* pointer to Store and forward */ | |
489 | __le32 st_fwrd_size; | |
490 | u8 umac_minor; /* UMAC version: minor */ | |
491 | u8 umac_major; /* UMAC version: major */ | |
492 | __le16 umac_id; /* UMAC version: id */ | |
493 | __le32 error_info_addr; /* SRAM address for UMAC error log */ | |
494 | __le32 dbg_print_buff_addr; | |
495 | } __packed; /* ALIVE_RES_API_S_VER_2 */ | |
496 | ||
7e1223b5 EG |
497 | struct mvm_alive_resp { |
498 | __le16 status; | |
499 | __le16 flags; | |
500 | __le32 ucode_minor; | |
501 | __le32 ucode_major; | |
502 | u8 ver_subtype; | |
503 | u8 ver_type; | |
504 | u8 mac; | |
505 | u8 opt; | |
506 | __le32 timestamp; | |
507 | __le32 error_event_table_ptr; /* SRAM address for error log */ | |
508 | __le32 log_event_table_ptr; /* SRAM address for LMAC event log */ | |
509 | __le32 cpu_register_ptr; | |
510 | __le32 dbgm_config_ptr; | |
511 | __le32 alive_counter_ptr; | |
512 | __le32 scd_base_ptr; /* SRAM address for SCD */ | |
513 | __le32 st_fwrd_addr; /* pointer to Store and forward */ | |
514 | __le32 st_fwrd_size; | |
515 | __le32 umac_minor; /* UMAC version: minor */ | |
516 | __le32 umac_major; /* UMAC version: major */ | |
517 | __le32 error_info_addr; /* SRAM address for UMAC error log */ | |
518 | __le32 dbg_print_buff_addr; | |
519 | } __packed; /* ALIVE_RES_API_S_VER_3 */ | |
520 | ||
8ca151b5 JB |
521 | /* Error response/notification */ |
522 | enum { | |
523 | FW_ERR_UNKNOWN_CMD = 0x0, | |
524 | FW_ERR_INVALID_CMD_PARAM = 0x1, | |
525 | FW_ERR_SERVICE = 0x2, | |
526 | FW_ERR_ARC_MEMORY = 0x3, | |
527 | FW_ERR_ARC_CODE = 0x4, | |
528 | FW_ERR_WATCH_DOG = 0x5, | |
529 | FW_ERR_WEP_GRP_KEY_INDX = 0x10, | |
530 | FW_ERR_WEP_KEY_SIZE = 0x11, | |
531 | FW_ERR_OBSOLETE_FUNC = 0x12, | |
532 | FW_ERR_UNEXPECTED = 0xFE, | |
533 | FW_ERR_FATAL = 0xFF | |
534 | }; | |
535 | ||
536 | /** | |
537 | * struct iwl_error_resp - FW error indication | |
538 | * ( REPLY_ERROR = 0x2 ) | |
539 | * @error_type: one of FW_ERR_* | |
540 | * @cmd_id: the command ID for which the error occured | |
541 | * @bad_cmd_seq_num: sequence number of the erroneous command | |
542 | * @error_service: which service created the error, applicable only if | |
543 | * error_type = 2, otherwise 0 | |
544 | * @timestamp: TSF in usecs. | |
545 | */ | |
546 | struct iwl_error_resp { | |
547 | __le32 error_type; | |
548 | u8 cmd_id; | |
549 | u8 reserved1; | |
550 | __le16 bad_cmd_seq_num; | |
551 | __le32 error_service; | |
552 | __le64 timestamp; | |
553 | } __packed; | |
554 | ||
555 | ||
556 | /* Common PHY, MAC and Bindings definitions */ | |
557 | ||
558 | #define MAX_MACS_IN_BINDING (3) | |
559 | #define MAX_BINDINGS (4) | |
560 | #define AUX_BINDING_INDEX (3) | |
561 | #define MAX_PHYS (4) | |
562 | ||
563 | /* Used to extract ID and color from the context dword */ | |
564 | #define FW_CTXT_ID_POS (0) | |
565 | #define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS) | |
566 | #define FW_CTXT_COLOR_POS (8) | |
567 | #define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS) | |
568 | #define FW_CTXT_INVALID (0xffffffff) | |
569 | ||
570 | #define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\ | |
571 | (_color << FW_CTXT_COLOR_POS)) | |
572 | ||
573 | /* Possible actions on PHYs, MACs and Bindings */ | |
574 | enum { | |
575 | FW_CTXT_ACTION_STUB = 0, | |
576 | FW_CTXT_ACTION_ADD, | |
577 | FW_CTXT_ACTION_MODIFY, | |
578 | FW_CTXT_ACTION_REMOVE, | |
579 | FW_CTXT_ACTION_NUM | |
580 | }; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */ | |
581 | ||
582 | /* Time Events */ | |
583 | ||
584 | /* Time Event types, according to MAC type */ | |
585 | enum iwl_time_event_type { | |
586 | /* BSS Station Events */ | |
587 | TE_BSS_STA_AGGRESSIVE_ASSOC, | |
588 | TE_BSS_STA_ASSOC, | |
589 | TE_BSS_EAP_DHCP_PROT, | |
590 | TE_BSS_QUIET_PERIOD, | |
591 | ||
592 | /* P2P Device Events */ | |
593 | TE_P2P_DEVICE_DISCOVERABLE, | |
594 | TE_P2P_DEVICE_LISTEN, | |
595 | TE_P2P_DEVICE_ACTION_SCAN, | |
596 | TE_P2P_DEVICE_FULL_SCAN, | |
597 | ||
598 | /* P2P Client Events */ | |
599 | TE_P2P_CLIENT_AGGRESSIVE_ASSOC, | |
600 | TE_P2P_CLIENT_ASSOC, | |
601 | TE_P2P_CLIENT_QUIET_PERIOD, | |
602 | ||
603 | /* P2P GO Events */ | |
604 | TE_P2P_GO_ASSOC_PROT, | |
605 | TE_P2P_GO_REPETITIVE_NOA, | |
606 | TE_P2P_GO_CT_WINDOW, | |
607 | ||
608 | /* WiDi Sync Events */ | |
609 | TE_WIDI_TX_SYNC, | |
610 | ||
7f0a7c67 | 611 | /* Channel Switch NoA */ |
f991e17b | 612 | TE_CHANNEL_SWITCH_PERIOD, |
7f0a7c67 | 613 | |
8ca151b5 JB |
614 | TE_MAX |
615 | }; /* MAC_EVENT_TYPE_API_E_VER_1 */ | |
616 | ||
f8f03c3e EL |
617 | |
618 | ||
619 | /* Time event - defines for command API v1 */ | |
620 | ||
621 | /* | |
622 | * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed. | |
623 | * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only | |
624 | * the first fragment is scheduled. | |
625 | * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only | |
626 | * the first 2 fragments are scheduled. | |
627 | * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any | |
628 | * number of fragments are valid. | |
629 | * | |
630 | * Other than the constant defined above, specifying a fragmentation value 'x' | |
631 | * means that the event can be fragmented but only the first 'x' will be | |
632 | * scheduled. | |
633 | */ | |
634 | enum { | |
635 | TE_V1_FRAG_NONE = 0, | |
636 | TE_V1_FRAG_SINGLE = 1, | |
637 | TE_V1_FRAG_DUAL = 2, | |
638 | TE_V1_FRAG_ENDLESS = 0xffffffff | |
639 | }; | |
640 | ||
641 | /* If a Time Event can be fragmented, this is the max number of fragments */ | |
642 | #define TE_V1_FRAG_MAX_MSK 0x0fffffff | |
643 | /* Repeat the time event endlessly (until removed) */ | |
644 | #define TE_V1_REPEAT_ENDLESS 0xffffffff | |
645 | /* If a Time Event has bounded repetitions, this is the maximal value */ | |
646 | #define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff | |
647 | ||
8ca151b5 JB |
648 | /* Time Event dependencies: none, on another TE, or in a specific time */ |
649 | enum { | |
f8f03c3e EL |
650 | TE_V1_INDEPENDENT = 0, |
651 | TE_V1_DEP_OTHER = BIT(0), | |
652 | TE_V1_DEP_TSF = BIT(1), | |
653 | TE_V1_EVENT_SOCIOPATHIC = BIT(2), | |
8ca151b5 | 654 | }; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */ |
f8f03c3e | 655 | |
1da80e80 | 656 | /* |
f8f03c3e EL |
657 | * @TE_V1_NOTIF_NONE: no notifications |
658 | * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start | |
659 | * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end | |
660 | * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use | |
661 | * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use. | |
662 | * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start | |
663 | * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end | |
664 | * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use. | |
665 | * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use. | |
666 | * | |
1da80e80 IP |
667 | * Supported Time event notifications configuration. |
668 | * A notification (both event and fragment) includes a status indicating weather | |
669 | * the FW was able to schedule the event or not. For fragment start/end | |
670 | * notification the status is always success. There is no start/end fragment | |
671 | * notification for monolithic events. | |
1da80e80 | 672 | */ |
8ca151b5 | 673 | enum { |
f8f03c3e EL |
674 | TE_V1_NOTIF_NONE = 0, |
675 | TE_V1_NOTIF_HOST_EVENT_START = BIT(0), | |
676 | TE_V1_NOTIF_HOST_EVENT_END = BIT(1), | |
677 | TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2), | |
678 | TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3), | |
679 | TE_V1_NOTIF_HOST_FRAG_START = BIT(4), | |
680 | TE_V1_NOTIF_HOST_FRAG_END = BIT(5), | |
681 | TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6), | |
682 | TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7), | |
1da80e80 | 683 | }; /* MAC_EVENT_ACTION_API_E_VER_2 */ |
8ca151b5 | 684 | |
a373f67c | 685 | /* Time event - defines for command API */ |
f8f03c3e | 686 | |
8ca151b5 | 687 | /* |
f8f03c3e EL |
688 | * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed. |
689 | * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only | |
8ca151b5 | 690 | * the first fragment is scheduled. |
f8f03c3e | 691 | * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only |
8ca151b5 | 692 | * the first 2 fragments are scheduled. |
f8f03c3e EL |
693 | * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any |
694 | * number of fragments are valid. | |
8ca151b5 JB |
695 | * |
696 | * Other than the constant defined above, specifying a fragmentation value 'x' | |
697 | * means that the event can be fragmented but only the first 'x' will be | |
698 | * scheduled. | |
699 | */ | |
700 | enum { | |
f8f03c3e EL |
701 | TE_V2_FRAG_NONE = 0, |
702 | TE_V2_FRAG_SINGLE = 1, | |
703 | TE_V2_FRAG_DUAL = 2, | |
704 | TE_V2_FRAG_MAX = 0xfe, | |
705 | TE_V2_FRAG_ENDLESS = 0xff | |
8ca151b5 JB |
706 | }; |
707 | ||
708 | /* Repeat the time event endlessly (until removed) */ | |
f8f03c3e | 709 | #define TE_V2_REPEAT_ENDLESS 0xff |
8ca151b5 | 710 | /* If a Time Event has bounded repetitions, this is the maximal value */ |
f8f03c3e EL |
711 | #define TE_V2_REPEAT_MAX 0xfe |
712 | ||
713 | #define TE_V2_PLACEMENT_POS 12 | |
714 | #define TE_V2_ABSENCE_POS 15 | |
715 | ||
a373f67c | 716 | /* Time event policy values |
f8f03c3e EL |
717 | * A notification (both event and fragment) includes a status indicating weather |
718 | * the FW was able to schedule the event or not. For fragment start/end | |
719 | * notification the status is always success. There is no start/end fragment | |
720 | * notification for monolithic events. | |
721 | * | |
722 | * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable | |
723 | * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start | |
724 | * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end | |
725 | * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use | |
726 | * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use. | |
727 | * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start | |
728 | * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end | |
729 | * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use. | |
730 | * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use. | |
731 | * @TE_V2_DEP_OTHER: depends on another time event | |
732 | * @TE_V2_DEP_TSF: depends on a specific time | |
733 | * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC | |
734 | * @TE_V2_ABSENCE: are we present or absent during the Time Event. | |
735 | */ | |
736 | enum { | |
737 | TE_V2_DEFAULT_POLICY = 0x0, | |
738 | ||
739 | /* notifications (event start/stop, fragment start/stop) */ | |
740 | TE_V2_NOTIF_HOST_EVENT_START = BIT(0), | |
741 | TE_V2_NOTIF_HOST_EVENT_END = BIT(1), | |
742 | TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2), | |
743 | TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3), | |
744 | ||
745 | TE_V2_NOTIF_HOST_FRAG_START = BIT(4), | |
746 | TE_V2_NOTIF_HOST_FRAG_END = BIT(5), | |
747 | TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6), | |
748 | TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7), | |
1f6bf078 | 749 | T2_V2_START_IMMEDIATELY = BIT(11), |
f8f03c3e EL |
750 | |
751 | TE_V2_NOTIF_MSK = 0xff, | |
752 | ||
753 | /* placement characteristics */ | |
754 | TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS), | |
755 | TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1), | |
756 | TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2), | |
757 | ||
758 | /* are we present or absent during the Time Event. */ | |
759 | TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS), | |
760 | }; | |
8ca151b5 JB |
761 | |
762 | /** | |
a373f67c | 763 | * struct iwl_time_event_cmd_api - configuring Time Events |
f8f03c3e EL |
764 | * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also |
765 | * with version 1. determined by IWL_UCODE_TLV_FLAGS) | |
8ca151b5 JB |
766 | * ( TIME_EVENT_CMD = 0x29 ) |
767 | * @id_and_color: ID and color of the relevant MAC | |
768 | * @action: action to perform, one of FW_CTXT_ACTION_* | |
769 | * @id: this field has two meanings, depending on the action: | |
770 | * If the action is ADD, then it means the type of event to add. | |
771 | * For all other actions it is the unique event ID assigned when the | |
772 | * event was added by the FW. | |
773 | * @apply_time: When to start the Time Event (in GP2) | |
774 | * @max_delay: maximum delay to event's start (apply time), in TU | |
775 | * @depends_on: the unique ID of the event we depend on (if any) | |
776 | * @interval: interval between repetitions, in TU | |
8ca151b5 JB |
777 | * @duration: duration of event in TU |
778 | * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS | |
8ca151b5 | 779 | * @max_frags: maximal number of fragments the Time Event can be divided to |
f8f03c3e EL |
780 | * @policy: defines whether uCode shall notify the host or other uCode modules |
781 | * on event and/or fragment start and/or end | |
782 | * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF | |
783 | * TE_EVENT_SOCIOPATHIC | |
784 | * using TE_ABSENCE and using TE_NOTIF_* | |
8ca151b5 | 785 | */ |
a373f67c | 786 | struct iwl_time_event_cmd { |
8ca151b5 JB |
787 | /* COMMON_INDEX_HDR_API_S_VER_1 */ |
788 | __le32 id_and_color; | |
789 | __le32 action; | |
790 | __le32 id; | |
f8f03c3e | 791 | /* MAC_TIME_EVENT_DATA_API_S_VER_2 */ |
8ca151b5 JB |
792 | __le32 apply_time; |
793 | __le32 max_delay; | |
8ca151b5 | 794 | __le32 depends_on; |
8ca151b5 | 795 | __le32 interval; |
8ca151b5 | 796 | __le32 duration; |
f8f03c3e EL |
797 | u8 repeat; |
798 | u8 max_frags; | |
799 | __le16 policy; | |
800 | } __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */ | |
8ca151b5 JB |
801 | |
802 | /** | |
803 | * struct iwl_time_event_resp - response structure to iwl_time_event_cmd | |
804 | * @status: bit 0 indicates success, all others specify errors | |
805 | * @id: the Time Event type | |
806 | * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE | |
807 | * @id_and_color: ID and color of the relevant MAC | |
808 | */ | |
809 | struct iwl_time_event_resp { | |
810 | __le32 status; | |
811 | __le32 id; | |
812 | __le32 unique_id; | |
813 | __le32 id_and_color; | |
814 | } __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */ | |
815 | ||
816 | /** | |
817 | * struct iwl_time_event_notif - notifications of time event start/stop | |
818 | * ( TIME_EVENT_NOTIFICATION = 0x2a ) | |
819 | * @timestamp: action timestamp in GP2 | |
820 | * @session_id: session's unique id | |
821 | * @unique_id: unique id of the Time Event itself | |
822 | * @id_and_color: ID and color of the relevant MAC | |
823 | * @action: one of TE_NOTIF_START or TE_NOTIF_END | |
824 | * @status: true if scheduled, false otherwise (not executed) | |
825 | */ | |
826 | struct iwl_time_event_notif { | |
827 | __le32 timestamp; | |
828 | __le32 session_id; | |
829 | __le32 unique_id; | |
830 | __le32 id_and_color; | |
831 | __le32 action; | |
832 | __le32 status; | |
833 | } __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */ | |
834 | ||
835 | ||
836 | /* Bindings and Time Quota */ | |
837 | ||
838 | /** | |
839 | * struct iwl_binding_cmd - configuring bindings | |
840 | * ( BINDING_CONTEXT_CMD = 0x2b ) | |
841 | * @id_and_color: ID and color of the relevant Binding | |
842 | * @action: action to perform, one of FW_CTXT_ACTION_* | |
843 | * @macs: array of MAC id and colors which belong to the binding | |
844 | * @phy: PHY id and color which belongs to the binding | |
845 | */ | |
846 | struct iwl_binding_cmd { | |
847 | /* COMMON_INDEX_HDR_API_S_VER_1 */ | |
848 | __le32 id_and_color; | |
849 | __le32 action; | |
850 | /* BINDING_DATA_API_S_VER_1 */ | |
851 | __le32 macs[MAX_MACS_IN_BINDING]; | |
852 | __le32 phy; | |
853 | } __packed; /* BINDING_CMD_API_S_VER_1 */ | |
854 | ||
35adfd6e IP |
855 | /* The maximal number of fragments in the FW's schedule session */ |
856 | #define IWL_MVM_MAX_QUOTA 128 | |
857 | ||
8ca151b5 JB |
858 | /** |
859 | * struct iwl_time_quota_data - configuration of time quota per binding | |
860 | * @id_and_color: ID and color of the relevant Binding | |
861 | * @quota: absolute time quota in TU. The scheduler will try to divide the | |
862 | * remainig quota (after Time Events) according to this quota. | |
863 | * @max_duration: max uninterrupted context duration in TU | |
864 | */ | |
865 | struct iwl_time_quota_data { | |
866 | __le32 id_and_color; | |
867 | __le32 quota; | |
868 | __le32 max_duration; | |
869 | } __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */ | |
870 | ||
871 | /** | |
872 | * struct iwl_time_quota_cmd - configuration of time quota between bindings | |
873 | * ( TIME_QUOTA_CMD = 0x2c ) | |
874 | * @quotas: allocations per binding | |
875 | */ | |
876 | struct iwl_time_quota_cmd { | |
877 | struct iwl_time_quota_data quotas[MAX_BINDINGS]; | |
878 | } __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */ | |
879 | ||
880 | ||
881 | /* PHY context */ | |
882 | ||
883 | /* Supported bands */ | |
884 | #define PHY_BAND_5 (0) | |
885 | #define PHY_BAND_24 (1) | |
886 | ||
887 | /* Supported channel width, vary if there is VHT support */ | |
888 | #define PHY_VHT_CHANNEL_MODE20 (0x0) | |
889 | #define PHY_VHT_CHANNEL_MODE40 (0x1) | |
890 | #define PHY_VHT_CHANNEL_MODE80 (0x2) | |
891 | #define PHY_VHT_CHANNEL_MODE160 (0x3) | |
892 | ||
893 | /* | |
894 | * Control channel position: | |
895 | * For legacy set bit means upper channel, otherwise lower. | |
896 | * For VHT - bit-2 marks if the control is lower/upper relative to center-freq | |
897 | * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0. | |
898 | * center_freq | |
899 | * | | |
900 | * 40Mhz |_______|_______| | |
901 | * 80Mhz |_______|_______|_______|_______| | |
902 | * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______| | |
903 | * code 011 010 001 000 | 100 101 110 111 | |
904 | */ | |
905 | #define PHY_VHT_CTRL_POS_1_BELOW (0x0) | |
906 | #define PHY_VHT_CTRL_POS_2_BELOW (0x1) | |
907 | #define PHY_VHT_CTRL_POS_3_BELOW (0x2) | |
908 | #define PHY_VHT_CTRL_POS_4_BELOW (0x3) | |
909 | #define PHY_VHT_CTRL_POS_1_ABOVE (0x4) | |
910 | #define PHY_VHT_CTRL_POS_2_ABOVE (0x5) | |
911 | #define PHY_VHT_CTRL_POS_3_ABOVE (0x6) | |
912 | #define PHY_VHT_CTRL_POS_4_ABOVE (0x7) | |
913 | ||
914 | /* | |
915 | * @band: PHY_BAND_* | |
916 | * @channel: channel number | |
917 | * @width: PHY_[VHT|LEGACY]_CHANNEL_* | |
918 | * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_* | |
919 | */ | |
920 | struct iwl_fw_channel_info { | |
921 | u8 band; | |
922 | u8 channel; | |
923 | u8 width; | |
924 | u8 ctrl_pos; | |
925 | } __packed; | |
926 | ||
927 | #define PHY_RX_CHAIN_DRIVER_FORCE_POS (0) | |
928 | #define PHY_RX_CHAIN_DRIVER_FORCE_MSK \ | |
929 | (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS) | |
930 | #define PHY_RX_CHAIN_VALID_POS (1) | |
931 | #define PHY_RX_CHAIN_VALID_MSK \ | |
932 | (0x7 << PHY_RX_CHAIN_VALID_POS) | |
933 | #define PHY_RX_CHAIN_FORCE_SEL_POS (4) | |
934 | #define PHY_RX_CHAIN_FORCE_SEL_MSK \ | |
935 | (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS) | |
936 | #define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7) | |
937 | #define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \ | |
938 | (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS) | |
939 | #define PHY_RX_CHAIN_CNT_POS (10) | |
940 | #define PHY_RX_CHAIN_CNT_MSK \ | |
941 | (0x3 << PHY_RX_CHAIN_CNT_POS) | |
942 | #define PHY_RX_CHAIN_MIMO_CNT_POS (12) | |
943 | #define PHY_RX_CHAIN_MIMO_CNT_MSK \ | |
944 | (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS) | |
945 | #define PHY_RX_CHAIN_MIMO_FORCE_POS (14) | |
946 | #define PHY_RX_CHAIN_MIMO_FORCE_MSK \ | |
947 | (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS) | |
948 | ||
949 | /* TODO: fix the value, make it depend on firmware at runtime? */ | |
950 | #define NUM_PHY_CTX 3 | |
951 | ||
952 | /* TODO: complete missing documentation */ | |
953 | /** | |
954 | * struct iwl_phy_context_cmd - config of the PHY context | |
955 | * ( PHY_CONTEXT_CMD = 0x8 ) | |
956 | * @id_and_color: ID and color of the relevant Binding | |
957 | * @action: action to perform, one of FW_CTXT_ACTION_* | |
958 | * @apply_time: 0 means immediate apply and context switch. | |
959 | * other value means apply new params after X usecs | |
960 | * @tx_param_color: ??? | |
961 | * @channel_info: | |
962 | * @txchain_info: ??? | |
963 | * @rxchain_info: ??? | |
964 | * @acquisition_data: ??? | |
965 | * @dsp_cfg_flags: set to 0 | |
966 | */ | |
967 | struct iwl_phy_context_cmd { | |
968 | /* COMMON_INDEX_HDR_API_S_VER_1 */ | |
969 | __le32 id_and_color; | |
970 | __le32 action; | |
971 | /* PHY_CONTEXT_DATA_API_S_VER_1 */ | |
972 | __le32 apply_time; | |
973 | __le32 tx_param_color; | |
974 | struct iwl_fw_channel_info ci; | |
975 | __le32 txchain_info; | |
976 | __le32 rxchain_info; | |
977 | __le32 acquisition_data; | |
978 | __le32 dsp_cfg_flags; | |
979 | } __packed; /* PHY_CONTEXT_CMD_API_VER_1 */ | |
980 | ||
720befbf AM |
981 | /* |
982 | * Aux ROC command | |
983 | * | |
984 | * Command requests the firmware to create a time event for a certain duration | |
985 | * and remain on the given channel. This is done by using the Aux framework in | |
986 | * the FW. | |
987 | * The command was first used for Hot Spot issues - but can be used regardless | |
988 | * to Hot Spot. | |
989 | * | |
990 | * ( HOT_SPOT_CMD 0x53 ) | |
991 | * | |
992 | * @id_and_color: ID and color of the MAC | |
993 | * @action: action to perform, one of FW_CTXT_ACTION_* | |
994 | * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the | |
995 | * event_unique_id should be the id of the time event assigned by ucode. | |
996 | * Otherwise ignore the event_unique_id. | |
997 | * @sta_id_and_color: station id and color, resumed during "Remain On Channel" | |
998 | * activity. | |
999 | * @channel_info: channel info | |
1000 | * @node_addr: Our MAC Address | |
1001 | * @reserved: reserved for alignment | |
1002 | * @apply_time: GP2 value to start (should always be the current GP2 value) | |
1003 | * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max | |
1004 | * time by which start of the event is allowed to be postponed. | |
1005 | * @duration: event duration in TU To calculate event duration: | |
1006 | * timeEventDuration = min(duration, remainingQuota) | |
1007 | */ | |
1008 | struct iwl_hs20_roc_req { | |
1009 | /* COMMON_INDEX_HDR_API_S_VER_1 hdr */ | |
1010 | __le32 id_and_color; | |
1011 | __le32 action; | |
1012 | __le32 event_unique_id; | |
1013 | __le32 sta_id_and_color; | |
1014 | struct iwl_fw_channel_info channel_info; | |
1015 | u8 node_addr[ETH_ALEN]; | |
1016 | __le16 reserved; | |
1017 | __le32 apply_time; | |
1018 | __le32 apply_time_max_delay; | |
1019 | __le32 duration; | |
1020 | } __packed; /* HOT_SPOT_CMD_API_S_VER_1 */ | |
1021 | ||
1022 | /* | |
1023 | * values for AUX ROC result values | |
1024 | */ | |
1025 | enum iwl_mvm_hot_spot { | |
1026 | HOT_SPOT_RSP_STATUS_OK, | |
1027 | HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS, | |
1028 | HOT_SPOT_MAX_NUM_OF_SESSIONS, | |
1029 | }; | |
1030 | ||
1031 | /* | |
1032 | * Aux ROC command response | |
1033 | * | |
1034 | * In response to iwl_hs20_roc_req the FW sends this command to notify the | |
1035 | * driver the uid of the timevent. | |
1036 | * | |
1037 | * ( HOT_SPOT_CMD 0x53 ) | |
1038 | * | |
1039 | * @event_unique_id: Unique ID of time event assigned by ucode | |
1040 | * @status: Return status 0 is success, all the rest used for specific errors | |
1041 | */ | |
1042 | struct iwl_hs20_roc_res { | |
1043 | __le32 event_unique_id; | |
1044 | __le32 status; | |
1045 | } __packed; /* HOT_SPOT_RSP_API_S_VER_1 */ | |
1046 | ||
8ca151b5 | 1047 | #define IWL_RX_INFO_PHY_CNT 8 |
a2d7b870 AA |
1048 | #define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1 |
1049 | #define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff | |
1050 | #define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00 | |
1051 | #define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000 | |
1052 | #define IWL_RX_INFO_ENERGY_ANT_A_POS 0 | |
1053 | #define IWL_RX_INFO_ENERGY_ANT_B_POS 8 | |
1054 | #define IWL_RX_INFO_ENERGY_ANT_C_POS 16 | |
1055 | ||
8ca151b5 JB |
1056 | #define IWL_RX_INFO_AGC_IDX 1 |
1057 | #define IWL_RX_INFO_RSSI_AB_IDX 2 | |
8101a7f0 EG |
1058 | #define IWL_OFDM_AGC_A_MSK 0x0000007f |
1059 | #define IWL_OFDM_AGC_A_POS 0 | |
1060 | #define IWL_OFDM_AGC_B_MSK 0x00003f80 | |
1061 | #define IWL_OFDM_AGC_B_POS 7 | |
1062 | #define IWL_OFDM_AGC_CODE_MSK 0x3fe00000 | |
1063 | #define IWL_OFDM_AGC_CODE_POS 20 | |
8ca151b5 | 1064 | #define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff |
8ca151b5 | 1065 | #define IWL_OFDM_RSSI_A_POS 0 |
8101a7f0 EG |
1066 | #define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00 |
1067 | #define IWL_OFDM_RSSI_ALLBAND_A_POS 8 | |
8ca151b5 | 1068 | #define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000 |
8ca151b5 | 1069 | #define IWL_OFDM_RSSI_B_POS 16 |
8101a7f0 EG |
1070 | #define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000 |
1071 | #define IWL_OFDM_RSSI_ALLBAND_B_POS 24 | |
8ca151b5 JB |
1072 | |
1073 | /** | |
1074 | * struct iwl_rx_phy_info - phy info | |
1075 | * (REPLY_RX_PHY_CMD = 0xc0) | |
1076 | * @non_cfg_phy_cnt: non configurable DSP phy data byte count | |
1077 | * @cfg_phy_cnt: configurable DSP phy data byte count | |
1078 | * @stat_id: configurable DSP phy data set ID | |
1079 | * @reserved1: | |
1080 | * @system_timestamp: GP2 at on air rise | |
1081 | * @timestamp: TSF at on air rise | |
1082 | * @beacon_time_stamp: beacon at on-air rise | |
1083 | * @phy_flags: general phy flags: band, modulation, ... | |
1084 | * @channel: channel number | |
1085 | * @non_cfg_phy_buf: for various implementations of non_cfg_phy | |
1086 | * @rate_n_flags: RATE_MCS_* | |
1087 | * @byte_count: frame's byte-count | |
1088 | * @frame_time: frame's time on the air, based on byte count and frame rate | |
1089 | * calculation | |
6bfcb7e8 | 1090 | * @mac_active_msk: what MACs were active when the frame was received |
8ca151b5 JB |
1091 | * |
1092 | * Before each Rx, the device sends this data. It contains PHY information | |
1093 | * about the reception of the packet. | |
1094 | */ | |
1095 | struct iwl_rx_phy_info { | |
1096 | u8 non_cfg_phy_cnt; | |
1097 | u8 cfg_phy_cnt; | |
1098 | u8 stat_id; | |
1099 | u8 reserved1; | |
1100 | __le32 system_timestamp; | |
1101 | __le64 timestamp; | |
1102 | __le32 beacon_time_stamp; | |
1103 | __le16 phy_flags; | |
1104 | __le16 channel; | |
1105 | __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT]; | |
1106 | __le32 rate_n_flags; | |
1107 | __le32 byte_count; | |
6bfcb7e8 | 1108 | __le16 mac_active_msk; |
8ca151b5 JB |
1109 | __le16 frame_time; |
1110 | } __packed; | |
1111 | ||
93190fb0 AA |
1112 | /* |
1113 | * TCP offload Rx assist info | |
1114 | * | |
1115 | * bits 0:3 - reserved | |
1116 | * bits 4:7 - MIC CRC length | |
1117 | * bits 8:12 - MAC header length | |
1118 | * bit 13 - Padding indication | |
1119 | * bit 14 - A-AMSDU indication | |
1120 | * bit 15 - Offload enabled | |
1121 | */ | |
1122 | enum iwl_csum_rx_assist_info { | |
1123 | CSUM_RXA_RESERVED_MASK = 0x000f, | |
1124 | CSUM_RXA_MICSIZE_MASK = 0x00f0, | |
1125 | CSUM_RXA_HEADERLEN_MASK = 0x1f00, | |
1126 | CSUM_RXA_PADD = BIT(13), | |
1127 | CSUM_RXA_AMSDU = BIT(14), | |
1128 | CSUM_RXA_ENA = BIT(15) | |
1129 | }; | |
1130 | ||
1131 | /** | |
1132 | * struct iwl_rx_mpdu_res_start - phy info | |
1133 | * @assist: see CSUM_RX_ASSIST_ above | |
1134 | */ | |
8ca151b5 JB |
1135 | struct iwl_rx_mpdu_res_start { |
1136 | __le16 byte_count; | |
93190fb0 AA |
1137 | __le16 assist; |
1138 | } __packed; /* _RX_MPDU_RES_START_API_S_VER_2 */ | |
8ca151b5 JB |
1139 | |
1140 | /** | |
1141 | * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags | |
1142 | * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band | |
1143 | * @RX_RES_PHY_FLAGS_MOD_CCK: | |
1144 | * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short | |
1145 | * @RX_RES_PHY_FLAGS_NARROW_BAND: | |
1146 | * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received | |
1147 | * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU | |
1148 | * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame | |
1149 | * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble | |
1150 | * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame | |
1151 | */ | |
1152 | enum iwl_rx_phy_flags { | |
1153 | RX_RES_PHY_FLAGS_BAND_24 = BIT(0), | |
1154 | RX_RES_PHY_FLAGS_MOD_CCK = BIT(1), | |
1155 | RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2), | |
1156 | RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3), | |
1157 | RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4), | |
1158 | RX_RES_PHY_FLAGS_ANTENNA_POS = 4, | |
1159 | RX_RES_PHY_FLAGS_AGG = BIT(7), | |
1160 | RX_RES_PHY_FLAGS_OFDM_HT = BIT(8), | |
1161 | RX_RES_PHY_FLAGS_OFDM_GF = BIT(9), | |
1162 | RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10), | |
1163 | }; | |
1164 | ||
1165 | /** | |
1166 | * enum iwl_mvm_rx_status - written by fw for each Rx packet | |
1167 | * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine | |
1168 | * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow | |
1169 | * @RX_MPDU_RES_STATUS_SRC_STA_FOUND: | |
1170 | * @RX_MPDU_RES_STATUS_KEY_VALID: | |
1171 | * @RX_MPDU_RES_STATUS_KEY_PARAM_OK: | |
1172 | * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed | |
1173 | * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked | |
1174 | * in the driver. | |
1175 | * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine | |
1176 | * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or | |
1177 | * alg = CCM only. Checks replay attack for 11w frames. Relevant only if | |
1178 | * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set. | |
1179 | * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted | |
1180 | * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP | |
1181 | * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM | |
1182 | * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP | |
1183 | * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC | |
1184 | * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted | |
1185 | * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm | |
1186 | * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted | |
1187 | * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP: | |
1188 | * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP: | |
1189 | * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT: | |
1190 | * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame | |
93190fb0 AA |
1191 | * @RX_MPDU_RES_STATUS_CSUM_DONE: checksum was done by the hw |
1192 | * @RX_MPDU_RES_STATUS_CSUM_OK: checksum found no errors | |
8ca151b5 JB |
1193 | * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK: |
1194 | * @RX_MPDU_RES_STATUS_STA_ID_MSK: | |
1195 | * @RX_MPDU_RES_STATUS_RRF_KILL: | |
1196 | * @RX_MPDU_RES_STATUS_FILTERING_MSK: | |
1197 | * @RX_MPDU_RES_STATUS2_FILTERING_MSK: | |
1198 | */ | |
1199 | enum iwl_mvm_rx_status { | |
1200 | RX_MPDU_RES_STATUS_CRC_OK = BIT(0), | |
1201 | RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1), | |
1202 | RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2), | |
1203 | RX_MPDU_RES_STATUS_KEY_VALID = BIT(3), | |
1204 | RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4), | |
1205 | RX_MPDU_RES_STATUS_ICV_OK = BIT(5), | |
1206 | RX_MPDU_RES_STATUS_MIC_OK = BIT(6), | |
1207 | RX_MPDU_RES_STATUS_TTAK_OK = BIT(7), | |
1208 | RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7), | |
1209 | RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8), | |
1210 | RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8), | |
1211 | RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8), | |
1212 | RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8), | |
e36e5433 | 1213 | RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8), |
8ca151b5 JB |
1214 | RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8), |
1215 | RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8), | |
1216 | RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8), | |
1217 | RX_MPDU_RES_STATUS_DEC_DONE = BIT(11), | |
1218 | RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12), | |
1219 | RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13), | |
1220 | RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14), | |
1221 | RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15), | |
93190fb0 AA |
1222 | RX_MPDU_RES_STATUS_CSUM_DONE = BIT(16), |
1223 | RX_MPDU_RES_STATUS_CSUM_OK = BIT(17), | |
8ca151b5 JB |
1224 | RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000), |
1225 | RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000), | |
1226 | RX_MPDU_RES_STATUS_RRF_KILL = BIT(29), | |
1227 | RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000), | |
1228 | RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000), | |
1229 | }; | |
1230 | ||
1231 | /** | |
1232 | * struct iwl_radio_version_notif - information on the radio version | |
1233 | * ( RADIO_VERSION_NOTIFICATION = 0x68 ) | |
1234 | * @radio_flavor: | |
1235 | * @radio_step: | |
1236 | * @radio_dash: | |
1237 | */ | |
1238 | struct iwl_radio_version_notif { | |
1239 | __le32 radio_flavor; | |
1240 | __le32 radio_step; | |
1241 | __le32 radio_dash; | |
1242 | } __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */ | |
1243 | ||
1244 | enum iwl_card_state_flags { | |
1245 | CARD_ENABLED = 0x00, | |
1246 | HW_CARD_DISABLED = 0x01, | |
1247 | SW_CARD_DISABLED = 0x02, | |
1248 | CT_KILL_CARD_DISABLED = 0x04, | |
1249 | HALT_CARD_DISABLED = 0x08, | |
1250 | CARD_DISABLED_MSK = 0x0f, | |
1251 | CARD_IS_RX_ON = 0x10, | |
1252 | }; | |
1253 | ||
1254 | /** | |
1255 | * struct iwl_radio_version_notif - information on the radio version | |
1256 | * ( CARD_STATE_NOTIFICATION = 0xa1 ) | |
1257 | * @flags: %iwl_card_state_flags | |
1258 | */ | |
1259 | struct iwl_card_state_notif { | |
1260 | __le32 flags; | |
1261 | } __packed; /* CARD_STATE_NTFY_API_S_VER_1 */ | |
1262 | ||
d64048ed HG |
1263 | /** |
1264 | * struct iwl_missed_beacons_notif - information on missed beacons | |
1265 | * ( MISSED_BEACONS_NOTIFICATION = 0xa2 ) | |
1266 | * @mac_id: interface ID | |
1267 | * @consec_missed_beacons_since_last_rx: number of consecutive missed | |
1268 | * beacons since last RX. | |
1269 | * @consec_missed_beacons: number of consecutive missed beacons | |
1270 | * @num_expected_beacons: | |
1271 | * @num_recvd_beacons: | |
1272 | */ | |
1273 | struct iwl_missed_beacons_notif { | |
1274 | __le32 mac_id; | |
1275 | __le32 consec_missed_beacons_since_last_rx; | |
1276 | __le32 consec_missed_beacons; | |
1277 | __le32 num_expected_beacons; | |
1278 | __le32 num_recvd_beacons; | |
1279 | } __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */ | |
1280 | ||
30269c12 CRI |
1281 | /** |
1282 | * struct iwl_mfuart_load_notif - mfuart image version & status | |
1283 | * ( MFUART_LOAD_NOTIFICATION = 0xb1 ) | |
1284 | * @installed_ver: installed image version | |
1285 | * @external_ver: external image version | |
1286 | * @status: MFUART loading status | |
1287 | * @duration: MFUART loading time | |
1288 | */ | |
1289 | struct iwl_mfuart_load_notif { | |
1290 | __le32 installed_ver; | |
1291 | __le32 external_ver; | |
1292 | __le32 status; | |
1293 | __le32 duration; | |
1294 | } __packed; /*MFU_LOADER_NTFY_API_S_VER_1*/ | |
1295 | ||
8ca151b5 JB |
1296 | /** |
1297 | * struct iwl_set_calib_default_cmd - set default value for calibration. | |
1298 | * ( SET_CALIB_DEFAULT_CMD = 0x8e ) | |
1299 | * @calib_index: the calibration to set value for | |
1300 | * @length: of data | |
1301 | * @data: the value to set for the calibration result | |
1302 | */ | |
1303 | struct iwl_set_calib_default_cmd { | |
1304 | __le16 calib_index; | |
1305 | __le16 length; | |
1306 | u8 data[0]; | |
1307 | } __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */ | |
1308 | ||
51b6b9e0 | 1309 | #define MAX_PORT_ID_NUM 2 |
e59647ea | 1310 | #define MAX_MCAST_FILTERING_ADDRESSES 256 |
51b6b9e0 EG |
1311 | |
1312 | /** | |
1313 | * struct iwl_mcast_filter_cmd - configure multicast filter. | |
1314 | * @filter_own: Set 1 to filter out multicast packets sent by station itself | |
1315 | * @port_id: Multicast MAC addresses array specifier. This is a strange way | |
1316 | * to identify network interface adopted in host-device IF. | |
1317 | * It is used by FW as index in array of addresses. This array has | |
1318 | * MAX_PORT_ID_NUM members. | |
1319 | * @count: Number of MAC addresses in the array | |
1320 | * @pass_all: Set 1 to pass all multicast packets. | |
1321 | * @bssid: current association BSSID. | |
1322 | * @addr_list: Place holder for array of MAC addresses. | |
1323 | * IMPORTANT: add padding if necessary to ensure DWORD alignment. | |
1324 | */ | |
1325 | struct iwl_mcast_filter_cmd { | |
1326 | u8 filter_own; | |
1327 | u8 port_id; | |
1328 | u8 count; | |
1329 | u8 pass_all; | |
1330 | u8 bssid[6]; | |
1331 | u8 reserved[2]; | |
1332 | u8 addr_list[0]; | |
1333 | } __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */ | |
1334 | ||
c87163b9 EP |
1335 | #define MAX_BCAST_FILTERS 8 |
1336 | #define MAX_BCAST_FILTER_ATTRS 2 | |
1337 | ||
1338 | /** | |
1339 | * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet | |
1340 | * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start. | |
1341 | * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e. | |
1342 | * start of ip payload). | |
1343 | */ | |
1344 | enum iwl_mvm_bcast_filter_attr_offset { | |
1345 | BCAST_FILTER_OFFSET_PAYLOAD_START = 0, | |
1346 | BCAST_FILTER_OFFSET_IP_END = 1, | |
1347 | }; | |
1348 | ||
1349 | /** | |
1350 | * struct iwl_fw_bcast_filter_attr - broadcast filter attribute | |
1351 | * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset. | |
1352 | * @offset: starting offset of this pattern. | |
1353 | * @val: value to match - big endian (MSB is the first | |
1354 | * byte to match from offset pos). | |
1355 | * @mask: mask to match (big endian). | |
1356 | */ | |
1357 | struct iwl_fw_bcast_filter_attr { | |
1358 | u8 offset_type; | |
1359 | u8 offset; | |
1360 | __le16 reserved1; | |
1361 | __be32 val; | |
1362 | __be32 mask; | |
1363 | } __packed; /* BCAST_FILTER_ATT_S_VER_1 */ | |
1364 | ||
1365 | /** | |
1366 | * enum iwl_mvm_bcast_filter_frame_type - filter frame type | |
1367 | * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames. | |
1368 | * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames | |
1369 | */ | |
1370 | enum iwl_mvm_bcast_filter_frame_type { | |
1371 | BCAST_FILTER_FRAME_TYPE_ALL = 0, | |
1372 | BCAST_FILTER_FRAME_TYPE_IPV4 = 1, | |
1373 | }; | |
1374 | ||
1375 | /** | |
1376 | * struct iwl_fw_bcast_filter - broadcast filter | |
1377 | * @discard: discard frame (1) or let it pass (0). | |
1378 | * @frame_type: &enum iwl_mvm_bcast_filter_frame_type. | |
1379 | * @num_attrs: number of valid attributes in this filter. | |
1380 | * @attrs: attributes of this filter. a filter is considered matched | |
1381 | * only when all its attributes are matched (i.e. AND relationship) | |
1382 | */ | |
1383 | struct iwl_fw_bcast_filter { | |
1384 | u8 discard; | |
1385 | u8 frame_type; | |
1386 | u8 num_attrs; | |
1387 | u8 reserved1; | |
1388 | struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS]; | |
1389 | } __packed; /* BCAST_FILTER_S_VER_1 */ | |
1390 | ||
1391 | /** | |
1392 | * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration. | |
1393 | * @default_discard: default action for this mac (discard (1) / pass (0)). | |
1394 | * @attached_filters: bitmap of relevant filters for this mac. | |
1395 | */ | |
1396 | struct iwl_fw_bcast_mac { | |
1397 | u8 default_discard; | |
1398 | u8 reserved1; | |
1399 | __le16 attached_filters; | |
1400 | } __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */ | |
1401 | ||
1402 | /** | |
1403 | * struct iwl_bcast_filter_cmd - broadcast filtering configuration | |
1404 | * @disable: enable (0) / disable (1) | |
1405 | * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS) | |
1406 | * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER) | |
1407 | * @filters: broadcast filters | |
1408 | * @macs: broadcast filtering configuration per-mac | |
1409 | */ | |
1410 | struct iwl_bcast_filter_cmd { | |
1411 | u8 disable; | |
1412 | u8 max_bcast_filters; | |
1413 | u8 max_macs; | |
1414 | u8 reserved1; | |
1415 | struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS]; | |
1416 | struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER]; | |
1417 | } __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */ | |
1418 | ||
a2d79c57 MG |
1419 | /* |
1420 | * enum iwl_mvm_marker_id - maker ids | |
1421 | * | |
1422 | * The ids for different type of markers to insert into the usniffer logs | |
1423 | */ | |
1424 | enum iwl_mvm_marker_id { | |
1425 | MARKER_ID_TX_FRAME_LATENCY = 1, | |
1426 | }; /* MARKER_ID_API_E_VER_1 */ | |
1427 | ||
1428 | /** | |
1429 | * struct iwl_mvm_marker - mark info into the usniffer logs | |
1430 | * | |
1431 | * (MARKER_CMD = 0xcb) | |
1432 | * | |
1433 | * Mark the UTC time stamp into the usniffer logs together with additional | |
1434 | * metadata, so the usniffer output can be parsed. | |
1435 | * In the command response the ucode will return the GP2 time. | |
1436 | * | |
1437 | * @dw_len: The amount of dwords following this byte including this byte. | |
1438 | * @marker_id: A unique marker id (iwl_mvm_marker_id). | |
1439 | * @reserved: reserved. | |
1440 | * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC | |
1441 | * @metadata: additional meta data that will be written to the unsiffer log | |
1442 | */ | |
1443 | struct iwl_mvm_marker { | |
1444 | u8 dwLen; | |
1445 | u8 markerId; | |
1446 | __le16 reserved; | |
1447 | __le64 timestamp; | |
1448 | __le32 metadata[0]; | |
1449 | } __packed; /* MARKER_API_S_VER_1 */ | |
1450 | ||
0becb377 MG |
1451 | /* |
1452 | * enum iwl_dc2dc_config_id - flag ids | |
1453 | * | |
1454 | * Ids of dc2dc configuration flags | |
1455 | */ | |
1456 | enum iwl_dc2dc_config_id { | |
1457 | DCDC_LOW_POWER_MODE_MSK_SET = 0x1, /* not used */ | |
1458 | DCDC_FREQ_TUNE_SET = 0x2, | |
1459 | }; /* MARKER_ID_API_E_VER_1 */ | |
1460 | ||
1461 | /** | |
1462 | * struct iwl_dc2dc_config_cmd - configure dc2dc values | |
1463 | * | |
1464 | * (DC2DC_CONFIG_CMD = 0x83) | |
1465 | * | |
1466 | * Set/Get & configure dc2dc values. | |
1467 | * The command always returns the current dc2dc values. | |
1468 | * | |
1469 | * @flags: set/get dc2dc | |
1470 | * @enable_low_power_mode: not used. | |
1471 | * @dc2dc_freq_tune0: frequency divider - digital domain | |
1472 | * @dc2dc_freq_tune1: frequency divider - analog domain | |
1473 | */ | |
1474 | struct iwl_dc2dc_config_cmd { | |
1475 | __le32 flags; | |
1476 | __le32 enable_low_power_mode; /* not used */ | |
1477 | __le32 dc2dc_freq_tune0; | |
1478 | __le32 dc2dc_freq_tune1; | |
1479 | } __packed; /* DC2DC_CONFIG_CMD_API_S_VER_1 */ | |
1480 | ||
1481 | /** | |
1482 | * struct iwl_dc2dc_config_resp - response for iwl_dc2dc_config_cmd | |
1483 | * | |
1484 | * Current dc2dc values returned by the FW. | |
1485 | * | |
1486 | * @dc2dc_freq_tune0: frequency divider - digital domain | |
1487 | * @dc2dc_freq_tune1: frequency divider - analog domain | |
1488 | */ | |
1489 | struct iwl_dc2dc_config_resp { | |
1490 | __le32 dc2dc_freq_tune0; | |
1491 | __le32 dc2dc_freq_tune1; | |
1492 | } __packed; /* DC2DC_CONFIG_RESP_API_S_VER_1 */ | |
1493 | ||
1f3b0ff8 LE |
1494 | /*********************************** |
1495 | * Smart Fifo API | |
1496 | ***********************************/ | |
1497 | /* Smart Fifo state */ | |
1498 | enum iwl_sf_state { | |
1499 | SF_LONG_DELAY_ON = 0, /* should never be called by driver */ | |
1500 | SF_FULL_ON, | |
1501 | SF_UNINIT, | |
1502 | SF_INIT_OFF, | |
1503 | SF_HW_NUM_STATES | |
1504 | }; | |
1505 | ||
1506 | /* Smart Fifo possible scenario */ | |
1507 | enum iwl_sf_scenario { | |
1508 | SF_SCENARIO_SINGLE_UNICAST, | |
1509 | SF_SCENARIO_AGG_UNICAST, | |
1510 | SF_SCENARIO_MULTICAST, | |
1511 | SF_SCENARIO_BA_RESP, | |
1512 | SF_SCENARIO_TX_RESP, | |
1513 | SF_NUM_SCENARIO | |
1514 | }; | |
1515 | ||
1516 | #define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */ | |
1517 | #define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */ | |
1518 | ||
1519 | /* smart FIFO default values */ | |
b4c82adc | 1520 | #define SF_W_MARK_SISO 6144 |
1f3b0ff8 LE |
1521 | #define SF_W_MARK_MIMO2 8192 |
1522 | #define SF_W_MARK_MIMO3 6144 | |
1523 | #define SF_W_MARK_LEGACY 4096 | |
1524 | #define SF_W_MARK_SCAN 4096 | |
1525 | ||
f4a3ee49 EH |
1526 | /* SF Scenarios timers for default configuration (aligned to 32 uSec) */ |
1527 | #define SF_SINGLE_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */ | |
1528 | #define SF_SINGLE_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */ | |
1529 | #define SF_AGG_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */ | |
1530 | #define SF_AGG_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */ | |
1531 | #define SF_MCAST_IDLE_TIMER_DEF 160 /* 150 mSec */ | |
1532 | #define SF_MCAST_AGING_TIMER_DEF 400 /* 0.4 mSec */ | |
1533 | #define SF_BA_IDLE_TIMER_DEF 160 /* 150 uSec */ | |
1534 | #define SF_BA_AGING_TIMER_DEF 400 /* 0.4 mSec */ | |
1535 | #define SF_TX_RE_IDLE_TIMER_DEF 160 /* 150 uSec */ | |
1536 | #define SF_TX_RE_AGING_TIMER_DEF 400 /* 0.4 mSec */ | |
1537 | ||
1538 | /* SF Scenarios timers for BSS MAC configuration (aligned to 32 uSec) */ | |
1f3b0ff8 LE |
1539 | #define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */ |
1540 | #define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */ | |
1541 | #define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */ | |
1542 | #define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */ | |
1543 | #define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */ | |
1544 | #define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */ | |
1545 | #define SF_BA_IDLE_TIMER 320 /* 300 uSec */ | |
1546 | #define SF_BA_AGING_TIMER 2016 /* 2 mSec */ | |
1547 | #define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */ | |
1548 | #define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */ | |
1549 | ||
1550 | #define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */ | |
1551 | ||
161bdb77 EH |
1552 | #define SF_CFG_DUMMY_NOTIF_OFF BIT(16) |
1553 | ||
1f3b0ff8 LE |
1554 | /** |
1555 | * Smart Fifo configuration command. | |
86974bff | 1556 | * @state: smart fifo state, types listed in enum %iwl_sf_sate. |
1f3b0ff8 LE |
1557 | * @watermark: Minimum allowed availabe free space in RXF for transient state. |
1558 | * @long_delay_timeouts: aging and idle timer values for each scenario | |
1559 | * in long delay state. | |
1560 | * @full_on_timeouts: timer values for each scenario in full on state. | |
1561 | */ | |
1562 | struct iwl_sf_cfg_cmd { | |
86974bff | 1563 | __le32 state; |
1f3b0ff8 LE |
1564 | __le32 watermark[SF_TRANSIENT_STATES_NUMBER]; |
1565 | __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES]; | |
1566 | __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES]; | |
1567 | } __packed; /* SF_CFG_API_S_VER_2 */ | |
1568 | ||
8ba2d7a1 EH |
1569 | /*********************************** |
1570 | * Location Aware Regulatory (LAR) API - MCC updates | |
1571 | ***********************************/ | |
1572 | ||
1573 | /** | |
1574 | * struct iwl_mcc_update_cmd - Request the device to update geographic | |
1575 | * regulatory profile according to the given MCC (Mobile Country Code). | |
1576 | * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain. | |
1577 | * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the | |
1578 | * MCC in the cmd response will be the relevant MCC in the NVM. | |
1579 | * @mcc: given mobile country code | |
1580 | * @source_id: the source from where we got the MCC, see iwl_mcc_source | |
1581 | * @reserved: reserved for alignment | |
1582 | */ | |
1583 | struct iwl_mcc_update_cmd { | |
1584 | __le16 mcc; | |
1585 | u8 source_id; | |
1586 | u8 reserved; | |
1587 | } __packed; /* LAR_UPDATE_MCC_CMD_API_S */ | |
1588 | ||
1589 | /** | |
1590 | * iwl_mcc_update_resp - response to MCC_UPDATE_CMD. | |
1591 | * Contains the new channel control profile map, if changed, and the new MCC | |
1592 | * (mobile country code). | |
1593 | * The new MCC may be different than what was requested in MCC_UPDATE_CMD. | |
47c8b154 | 1594 | * @status: see &enum iwl_mcc_update_status |
8ba2d7a1 EH |
1595 | * @mcc: the new applied MCC |
1596 | * @cap: capabilities for all channels which matches the MCC | |
1597 | * @source_id: the MCC source, see iwl_mcc_source | |
1598 | * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51 | |
1599 | * channels, depending on platform) | |
1600 | * @channels: channel control data map, DWORD for each channel. Only the first | |
1601 | * 16bits are used. | |
1602 | */ | |
1603 | struct iwl_mcc_update_resp { | |
1604 | __le32 status; | |
1605 | __le16 mcc; | |
1606 | u8 cap; | |
1607 | u8 source_id; | |
1608 | __le32 n_channels; | |
1609 | __le32 channels[0]; | |
1610 | } __packed; /* LAR_UPDATE_MCC_CMD_RESP_S */ | |
1611 | ||
1612 | /** | |
1613 | * struct iwl_mcc_chub_notif - chub notifies of mcc change | |
1614 | * (MCC_CHUB_UPDATE_CMD = 0xc9) | |
1615 | * The Chub (Communication Hub, CommsHUB) is a HW component that connects to | |
1616 | * the cellular and connectivity cores that gets updates of the mcc, and | |
1617 | * notifies the ucode directly of any mcc change. | |
1618 | * The ucode requests the driver to request the device to update geographic | |
1619 | * regulatory profile according to the given MCC (Mobile Country Code). | |
1620 | * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain. | |
1621 | * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the | |
1622 | * MCC in the cmd response will be the relevant MCC in the NVM. | |
1623 | * @mcc: given mobile country code | |
1624 | * @source_id: identity of the change originator, see iwl_mcc_source | |
1625 | * @reserved1: reserved for alignment | |
1626 | */ | |
1627 | struct iwl_mcc_chub_notif { | |
1628 | u16 mcc; | |
1629 | u8 source_id; | |
1630 | u8 reserved1; | |
1631 | } __packed; /* LAR_MCC_NOTIFY_S */ | |
1632 | ||
1633 | enum iwl_mcc_update_status { | |
1634 | MCC_RESP_NEW_CHAN_PROFILE, | |
1635 | MCC_RESP_SAME_CHAN_PROFILE, | |
1636 | MCC_RESP_INVALID, | |
1637 | MCC_RESP_NVM_DISABLED, | |
1638 | MCC_RESP_ILLEGAL, | |
1639 | MCC_RESP_LOW_PRIORITY, | |
1640 | }; | |
1641 | ||
1642 | enum iwl_mcc_source { | |
1643 | MCC_SOURCE_OLD_FW = 0, | |
1644 | MCC_SOURCE_ME = 1, | |
1645 | MCC_SOURCE_BIOS = 2, | |
1646 | MCC_SOURCE_3G_LTE_HOST = 3, | |
1647 | MCC_SOURCE_3G_LTE_DEVICE = 4, | |
1648 | MCC_SOURCE_WIFI = 5, | |
1649 | MCC_SOURCE_RESERVED = 6, | |
1650 | MCC_SOURCE_DEFAULT = 7, | |
1651 | MCC_SOURCE_UNINITIALIZED = 8, | |
1652 | MCC_SOURCE_GET_CURRENT = 0x10 | |
1653 | }; | |
1654 | ||
a0a09243 LC |
1655 | /* DTS measurements */ |
1656 | ||
1657 | enum iwl_dts_measurement_flags { | |
1658 | DTS_TRIGGER_CMD_FLAGS_TEMP = BIT(0), | |
1659 | DTS_TRIGGER_CMD_FLAGS_VOLT = BIT(1), | |
1660 | }; | |
1661 | ||
1662 | /** | |
1663 | * iwl_dts_measurement_cmd - request DTS temperature and/or voltage measurements | |
1664 | * | |
1665 | * @flags: indicates which measurements we want as specified in &enum | |
1666 | * iwl_dts_measurement_flags | |
1667 | */ | |
1668 | struct iwl_dts_measurement_cmd { | |
1669 | __le32 flags; | |
1670 | } __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */ | |
1671 | ||
1672 | /** | |
1673 | * iwl_dts_measurement_notif - notification received with the measurements | |
1674 | * | |
1675 | * @temp: the measured temperature | |
1676 | * @voltage: the measured voltage | |
1677 | */ | |
1678 | struct iwl_dts_measurement_notif { | |
1679 | __le32 temp; | |
1680 | __le32 voltage; | |
1681 | } __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S */ | |
1682 | ||
77c5d7ef AN |
1683 | /*********************************** |
1684 | * TDLS API | |
1685 | ***********************************/ | |
1686 | ||
1687 | /* Type of TDLS request */ | |
1688 | enum iwl_tdls_channel_switch_type { | |
1689 | TDLS_SEND_CHAN_SW_REQ = 0, | |
1690 | TDLS_SEND_CHAN_SW_RESP_AND_MOVE_CH, | |
1691 | TDLS_MOVE_CH, | |
1692 | }; /* TDLS_STA_CHANNEL_SWITCH_CMD_TYPE_API_E_VER_1 */ | |
1693 | ||
1694 | /** | |
1695 | * Switch timing sub-element in a TDLS channel-switch command | |
1696 | * @frame_timestamp: GP2 timestamp of channel-switch request/response packet | |
1697 | * received from peer | |
1698 | * @max_offchan_duration: What amount of microseconds out of a DTIM is given | |
1699 | * to the TDLS off-channel communication. For instance if the DTIM is | |
1700 | * 200TU and the TDLS peer is to be given 25% of the time, the value | |
1701 | * given will be 50TU, or 50 * 1024 if translated into microseconds. | |
1702 | * @switch_time: switch time the peer sent in its channel switch timing IE | |
1703 | * @switch_timout: switch timeout the peer sent in its channel switch timing IE | |
1704 | */ | |
1705 | struct iwl_tdls_channel_switch_timing { | |
1706 | __le32 frame_timestamp; /* GP2 time of peer packet Rx */ | |
1707 | __le32 max_offchan_duration; /* given in micro-seconds */ | |
1708 | __le32 switch_time; /* given in micro-seconds */ | |
1709 | __le32 switch_timeout; /* given in micro-seconds */ | |
1710 | } __packed; /* TDLS_STA_CHANNEL_SWITCH_TIMING_DATA_API_S_VER_1 */ | |
1711 | ||
1712 | #define IWL_TDLS_CH_SW_FRAME_MAX_SIZE 200 | |
1713 | ||
1714 | /** | |
1715 | * TDLS channel switch frame template | |
1716 | * | |
1717 | * A template representing a TDLS channel-switch request or response frame | |
1718 | * | |
1719 | * @switch_time_offset: offset to the channel switch timing IE in the template | |
1720 | * @tx_cmd: Tx parameters for the frame | |
1721 | * @data: frame data | |
1722 | */ | |
1723 | struct iwl_tdls_channel_switch_frame { | |
1724 | __le32 switch_time_offset; | |
1725 | struct iwl_tx_cmd tx_cmd; | |
1726 | u8 data[IWL_TDLS_CH_SW_FRAME_MAX_SIZE]; | |
1727 | } __packed; /* TDLS_STA_CHANNEL_SWITCH_FRAME_API_S_VER_1 */ | |
1728 | ||
1729 | /** | |
1730 | * TDLS channel switch command | |
1731 | * | |
1732 | * The command is sent to initiate a channel switch and also in response to | |
1733 | * incoming TDLS channel-switch request/response packets from remote peers. | |
1734 | * | |
1735 | * @switch_type: see &enum iwl_tdls_channel_switch_type | |
1736 | * @peer_sta_id: station id of TDLS peer | |
1737 | * @ci: channel we switch to | |
1738 | * @timing: timing related data for command | |
1739 | * @frame: channel-switch request/response template, depending to switch_type | |
1740 | */ | |
1741 | struct iwl_tdls_channel_switch_cmd { | |
1742 | u8 switch_type; | |
1743 | __le32 peer_sta_id; | |
1744 | struct iwl_fw_channel_info ci; | |
1745 | struct iwl_tdls_channel_switch_timing timing; | |
1746 | struct iwl_tdls_channel_switch_frame frame; | |
1747 | } __packed; /* TDLS_STA_CHANNEL_SWITCH_CMD_API_S_VER_1 */ | |
1748 | ||
1749 | /** | |
1750 | * TDLS channel switch start notification | |
1751 | * | |
1752 | * @status: non-zero on success | |
1753 | * @offchannel_duration: duration given in microseconds | |
1754 | * @sta_id: peer currently performing the channel-switch with | |
1755 | */ | |
1756 | struct iwl_tdls_channel_switch_notif { | |
1757 | __le32 status; | |
1758 | __le32 offchannel_duration; | |
1759 | __le32 sta_id; | |
1760 | } __packed; /* TDLS_STA_CHANNEL_SWITCH_NTFY_API_S_VER_1 */ | |
1761 | ||
307e4723 AN |
1762 | /** |
1763 | * TDLS station info | |
1764 | * | |
1765 | * @sta_id: station id of the TDLS peer | |
1766 | * @tx_to_peer_tid: TID reserved vs. the peer for FW based Tx | |
1767 | * @tx_to_peer_ssn: initial SSN the FW should use for Tx on its TID vs the peer | |
1768 | * @is_initiator: 1 if the peer is the TDLS link initiator, 0 otherwise | |
1769 | */ | |
1770 | struct iwl_tdls_sta_info { | |
1771 | u8 sta_id; | |
1772 | u8 tx_to_peer_tid; | |
1773 | __le16 tx_to_peer_ssn; | |
1774 | __le32 is_initiator; | |
1775 | } __packed; /* TDLS_STA_INFO_VER_1 */ | |
1776 | ||
1777 | /** | |
1778 | * TDLS basic config command | |
1779 | * | |
1780 | * @id_and_color: MAC id and color being configured | |
1781 | * @tdls_peer_count: amount of currently connected TDLS peers | |
1782 | * @tx_to_ap_tid: TID reverved vs. the AP for FW based Tx | |
1783 | * @tx_to_ap_ssn: initial SSN the FW should use for Tx on its TID vs. the AP | |
1784 | * @sta_info: per-station info. Only the first tdls_peer_count entries are set | |
1785 | * @pti_req_data_offset: offset of network-level data for the PTI template | |
1786 | * @pti_req_tx_cmd: Tx parameters for PTI request template | |
1787 | * @pti_req_template: PTI request template data | |
1788 | */ | |
1789 | struct iwl_tdls_config_cmd { | |
1790 | __le32 id_and_color; /* mac id and color */ | |
1791 | u8 tdls_peer_count; | |
1792 | u8 tx_to_ap_tid; | |
1793 | __le16 tx_to_ap_ssn; | |
1794 | struct iwl_tdls_sta_info sta_info[IWL_MVM_TDLS_STA_COUNT]; | |
1795 | ||
1796 | __le32 pti_req_data_offset; | |
1797 | struct iwl_tx_cmd pti_req_tx_cmd; | |
1798 | u8 pti_req_template[0]; | |
1799 | } __packed; /* TDLS_CONFIG_CMD_API_S_VER_1 */ | |
1800 | ||
1801 | /** | |
1802 | * TDLS per-station config information from FW | |
1803 | * | |
1804 | * @sta_id: station id of the TDLS peer | |
1805 | * @tx_to_peer_last_seq: last sequence number used by FW during FW-based Tx to | |
1806 | * the peer | |
1807 | */ | |
1808 | struct iwl_tdls_config_sta_info_res { | |
1809 | __le16 sta_id; | |
1810 | __le16 tx_to_peer_last_seq; | |
1811 | } __packed; /* TDLS_STA_INFO_RSP_VER_1 */ | |
1812 | ||
1813 | /** | |
1814 | * TDLS config information from FW | |
1815 | * | |
1816 | * @tx_to_ap_last_seq: last sequence number used by FW during FW-based Tx to AP | |
1817 | * @sta_info: per-station TDLS config information | |
1818 | */ | |
1819 | struct iwl_tdls_config_res { | |
1820 | __le32 tx_to_ap_last_seq; | |
1821 | struct iwl_tdls_config_sta_info_res sta_info[IWL_MVM_TDLS_STA_COUNT]; | |
1822 | } __packed; /* TDLS_CONFIG_RSP_API_S_VER_1 */ | |
1823 | ||
04fd2c28 LK |
1824 | #define TX_FIFO_MAX_NUM 8 |
1825 | #define RX_FIFO_MAX_NUM 2 | |
1826 | ||
1827 | /** | |
1828 | * Shared memory configuration information from the FW | |
1829 | * | |
1830 | * @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not | |
1831 | * accessible) | |
1832 | * @shared_mem_size: shared memory size | |
1833 | * @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to | |
1834 | * 0x0 as accessible only via DBGM RDAT) | |
1835 | * @sample_buff_size: internal sample buff size | |
1836 | * @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre | |
1837 | * 8000 HW set to 0x0 as not accessible) | |
1838 | * @txfifo_size: size of TXF0 ... TXF7 | |
1839 | * @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0 | |
1840 | * @page_buff_addr: used by UMAC and performance debug (page miss analysis), | |
1841 | * when paging is not supported this should be 0 | |
1842 | * @page_buff_size: size of %page_buff_addr | |
1843 | */ | |
1844 | struct iwl_shared_mem_cfg { | |
1845 | __le32 shared_mem_addr; | |
1846 | __le32 shared_mem_size; | |
1847 | __le32 sample_buff_addr; | |
1848 | __le32 sample_buff_size; | |
1849 | __le32 txfifo_addr; | |
1850 | __le32 txfifo_size[TX_FIFO_MAX_NUM]; | |
1851 | __le32 rxfifo_size[RX_FIFO_MAX_NUM]; | |
1852 | __le32 page_buff_addr; | |
1853 | __le32 page_buff_size; | |
1854 | } __packed; /* SHARED_MEM_ALLOC_API_S_VER_1 */ | |
1855 | ||
8ca151b5 | 1856 | #endif /* __fw_api_h__ */ |