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iwlwifi: add very first D0i3 support
[linux-2.6-block.git] / drivers / net / wireless / iwlwifi / mvm / fw-api.h
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8ca151b5
JB		 1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8ca151b5
JB		 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
410dc5aa 25 * in the file called COPYING.
8ca151b5
JB		 26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
51368bf7 33 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8ca151b5
JB		 34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63
64#ifndef __fw_api_h__
65#define __fw_api_h__
66
67#include "fw-api-rs.h"
68#include "fw-api-tx.h"
69#include "fw-api-sta.h"
70#include "fw-api-mac.h"
71#include "fw-api-power.h"
72#include "fw-api-d3.h"
fb3ceb81 73#include "fw-api-bt-coex.h"
8ca151b5 74
19e737c9
EL		 75/* maximal number of Tx queues in any platform */
76#define IWL_MVM_MAX_QUEUES 20
77
78/* Tx queue numbers */
8ca151b5
JB		 79enum {
80 IWL_MVM_OFFCHANNEL_QUEUE = 8,
81 IWL_MVM_CMD_QUEUE = 9,
8ca151b5
JB		 82};
83
19e737c9
EL		 84#define IWL_MVM_CMD_FIFO 7
85
8ca151b5
JB		 86#define IWL_MVM_STATION_COUNT 16
87
88/* commands */
89enum {
90 MVM_ALIVE = 0x1,
91 REPLY_ERROR = 0x2,
92
93 INIT_COMPLETE_NOTIF = 0x4,
94
95 /* PHY context commands */
96 PHY_CONTEXT_CMD = 0x8,
97 DBG_CFG = 0x9,
98
99 /* station table */
5a258aae 100 ADD_STA_KEY = 0x17,
8ca151b5
JB		 101 ADD_STA = 0x18,
102 REMOVE_STA = 0x19,
103
104 /* TX */
105 TX_CMD = 0x1c,
106 TXPATH_FLUSH = 0x1e,
107 MGMT_MCAST_KEY = 0x1f,
108
109 /* global key */
110 WEP_KEY = 0x20,
111
112 /* MAC and Binding commands */
113 MAC_CONTEXT_CMD = 0x28,
114 TIME_EVENT_CMD = 0x29, /* both CMD and response */
115 TIME_EVENT_NOTIFICATION = 0x2a,
116 BINDING_CONTEXT_CMD = 0x2b,
117 TIME_QUOTA_CMD = 0x2c,
4ac6cb59 118 NON_QOS_TX_COUNTER_CMD = 0x2d,
8ca151b5
JB		 119
120 LQ_CMD = 0x4e,
121
122 /* Calibration */
123 TEMPERATURE_NOTIFICATION = 0x62,
124 CALIBRATION_CFG_CMD = 0x65,
125 CALIBRATION_RES_NOTIFICATION = 0x66,
126 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
127 RADIO_VERSION_NOTIFICATION = 0x68,
128
129 /* Scan offload */
130 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
131 SCAN_OFFLOAD_ABORT_CMD = 0x52,
132 SCAN_OFFLOAD_COMPLETE = 0x6D,
133 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
134 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
35a000b7 135 MATCH_FOUND_NOTIFICATION = 0xd9,
8ca151b5
JB		 136
137 /* Phy */
138 PHY_CONFIGURATION_CMD = 0x6a,
139 CALIB_RES_NOTIF_PHY_DB = 0x6b,
140 /* PHY_DB_CMD = 0x6c, */
141
e811ada7 142 /* Power - legacy power table command */
8ca151b5 143 POWER_TABLE_CMD = 0x77,
175a70b7 144 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
8ca151b5 145
9ee718aa
EL		 146 /* Thermal Throttling*/
147 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
148
8ca151b5
JB		 149 /* Scanning */
150 SCAN_REQUEST_CMD = 0x80,
151 SCAN_ABORT_CMD = 0x81,
152 SCAN_START_NOTIFICATION = 0x82,
153 SCAN_RESULTS_NOTIFICATION = 0x83,
154 SCAN_COMPLETE_NOTIFICATION = 0x84,
155
156 /* NVM */
157 NVM_ACCESS_CMD = 0x88,
158
159 SET_CALIB_DEFAULT_CMD = 0x8e,
160
571765c8 161 BEACON_NOTIFICATION = 0x90,
8ca151b5
JB		 162 BEACON_TEMPLATE_CMD = 0x91,
163 TX_ANT_CONFIGURATION_CMD = 0x98,
fb3ceb81 164 BT_CONFIG = 0x9b,
8ca151b5 165 STATISTICS_NOTIFICATION = 0x9d,
3e56eadf 166 EOSP_NOTIFICATION = 0x9e,
88f2fd73 167 REDUCE_TX_POWER_CMD = 0x9f,
8ca151b5
JB		 168
169 /* RF-KILL commands and notifications */
170 CARD_STATE_CMD = 0xa0,
171 CARD_STATE_NOTIFICATION = 0xa1,
172
d64048ed
HG		 173 MISSED_BEACONS_NOTIFICATION = 0xa2,
174
e811ada7
AB		 175 /* Power - new power table command */
176 MAC_PM_POWER_TABLE = 0xa9,
177
8ca151b5
JB		 178 REPLY_RX_PHY_CMD = 0xc0,
179 REPLY_RX_MPDU_CMD = 0xc1,
180 BA_NOTIF = 0xc5,
181
fb3ceb81
EG		 182 /* BT Coex */
183 BT_COEX_PRIO_TABLE = 0xcc,
184 BT_COEX_PROT_ENV = 0xcd,
185 BT_PROFILE_NOTIFICATION = 0xce,
dac94da8 186 BT_COEX_CI = 0x5d,
fb3ceb81 187
1f3b0ff8 188 REPLY_SF_CFG_CMD = 0xd1,
7df15b1e
HG		 189 REPLY_BEACON_FILTERING_CMD = 0xd2,
190
8ca151b5
JB		 191 REPLY_DEBUG_CMD = 0xf0,
192 DEBUG_LOG_MSG = 0xf7,
193
c87163b9 194 BCAST_FILTER_CMD = 0xcf,
51b6b9e0
EG		 195 MCAST_FILTER_CMD = 0xd0,
196
8ca151b5
JB		 197 /* D3 commands/notifications */
198 D3_CONFIG_CMD = 0xd3,
199 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
200 OFFLOADS_QUERY_CMD = 0xd5,
201 REMOTE_WAKE_CONFIG_CMD = 0xd6,
98ee7783 202 D0I3_END_CMD = 0xed,
8ca151b5
JB		 203
204 /* for WoWLAN in particular */
205 WOWLAN_PATTERNS = 0xe0,
206 WOWLAN_CONFIGURATION = 0xe1,
207 WOWLAN_TSC_RSC_PARAM = 0xe2,
208 WOWLAN_TKIP_PARAM = 0xe3,
209 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
210 WOWLAN_GET_STATUSES = 0xe5,
211 WOWLAN_TX_POWER_PER_DB = 0xe6,
212
213 /* and for NetDetect */
214 NET_DETECT_CONFIG_CMD = 0x54,
215 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
216 NET_DETECT_PROFILES_CMD = 0x57,
217 NET_DETECT_HOTSPOTS_CMD = 0x58,
218 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
219
220 REPLY_MAX = 0xff,
221};
222
223/**
224 * struct iwl_cmd_response - generic response struct for most commands
225 * @status: status of the command asked, changes for each one
226 */
227struct iwl_cmd_response {
228 __le32 status;
229};
230
231/*
232 * struct iwl_tx_ant_cfg_cmd
233 * @valid: valid antenna configuration
234 */
235struct iwl_tx_ant_cfg_cmd {
236 __le32 valid;
237} __packed;
238
88f2fd73
MG		 239/**
240 * struct iwl_reduce_tx_power_cmd - TX power reduction command
241 * REDUCE_TX_POWER_CMD = 0x9f
242 * @flags: (reserved for future implementation)
243 * @mac_context_id: id of the mac ctx for which we are reducing TX power.
244 * @pwr_restriction: TX power restriction in dBms.
245 */
246struct iwl_reduce_tx_power_cmd {
247 u8 flags;
248 u8 mac_context_id;
249 __le16 pwr_restriction;
250} __packed; /* TX_REDUCED_POWER_API_S_VER_1 */
251
8ca151b5
JB		 252/*
253 * Calibration control struct.
254 * Sent as part of the phy configuration command.
255 * @flow_trigger: bitmap for which calibrations to perform according to
256 * flow triggers.
257 * @event_trigger: bitmap for which calibrations to perform according to
258 * event triggers.
259 */
260struct iwl_calib_ctrl {
261 __le32 flow_trigger;
262 __le32 event_trigger;
263} __packed;
264
265/* This enum defines the bitmap of various calibrations to enable in both
266 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
267 */
268enum iwl_calib_cfg {
269 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
270 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
271 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
272 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
273 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
274 IWL_CALIB_CFG_DC_IDX = BIT(5),
275 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
276 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
277 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
278 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
279 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
280 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
281 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
282 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
283 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
284 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
285 IWL_CALIB_CFG_DAC_IDX = BIT(16),
286 IWL_CALIB_CFG_ABS_IDX = BIT(17),
287 IWL_CALIB_CFG_AGC_IDX = BIT(18),
288};
289
290/*
291 * Phy configuration command.
292 */
293struct iwl_phy_cfg_cmd {
294 __le32 phy_cfg;
295 struct iwl_calib_ctrl calib_control;
296} __packed;
297
298#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
299#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
300#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
301#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
302#define PHY_CFG_TX_CHAIN_A BIT(8)
303#define PHY_CFG_TX_CHAIN_B BIT(9)
304#define PHY_CFG_TX_CHAIN_C BIT(10)
305#define PHY_CFG_RX_CHAIN_A BIT(12)
306#define PHY_CFG_RX_CHAIN_B BIT(13)
307#define PHY_CFG_RX_CHAIN_C BIT(14)
308
ae2b21b0 309#define NVM_MAX_NUM_SECTIONS 11
8ca151b5
JB		 310
311/* Target of the NVM_ACCESS_CMD */
312enum {
313 NVM_ACCESS_TARGET_CACHE = 0,
314 NVM_ACCESS_TARGET_OTP = 1,
315 NVM_ACCESS_TARGET_EEPROM = 2,
316};
317
b9545b48 318/* Section types for NVM_ACCESS_CMD */
8ca151b5 319enum {
ae2b21b0
EH		 320 NVM_SECTION_TYPE_SW = 1,
321 NVM_SECTION_TYPE_CALIBRATION = 4,
322 NVM_SECTION_TYPE_PRODUCTION = 5,
8ca151b5
JB		 323};
324
325/**
326 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
327 * @op_code: 0 - read, 1 - write
328 * @target: NVM_ACCESS_TARGET_*
329 * @type: NVM_SECTION_TYPE_*
330 * @offset: offset in bytes into the section
331 * @length: in bytes, to read/write
332 * @data: if write operation, the data to write. On read its empty
333 */
b9545b48 334struct iwl_nvm_access_cmd {
8ca151b5
JB		 335 u8 op_code;
336 u8 target;
337 __le16 type;
338 __le16 offset;
339 __le16 length;
340 u8 data[];
341} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
342
343/**
344 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
345 * @offset: offset in bytes into the section
346 * @length: in bytes, either how much was written or read
347 * @type: NVM_SECTION_TYPE_*
348 * @status: 0 for success, fail otherwise
349 * @data: if read operation, the data returned. Empty on write.
350 */
b9545b48 351struct iwl_nvm_access_resp {
8ca151b5
JB		 352 __le16 offset;
353 __le16 length;
354 __le16 type;
355 __le16 status;
356 u8 data[];
357} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
358
359/* MVM_ALIVE 0x1 */
360
361/* alive response is_valid values */
362#define ALIVE_RESP_UCODE_OK BIT(0)
363#define ALIVE_RESP_RFKILL BIT(1)
364
365/* alive response ver_type values */
366enum {
367 FW_TYPE_HW = 0,
368 FW_TYPE_PROT = 1,
369 FW_TYPE_AP = 2,
370 FW_TYPE_WOWLAN = 3,
371 FW_TYPE_TIMING = 4,
372 FW_TYPE_WIPAN = 5
373};
374
375/* alive response ver_subtype values */
376enum {
377 FW_SUBTYPE_FULL_FEATURE = 0,
378 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
379 FW_SUBTYPE_REDUCED = 2,
380 FW_SUBTYPE_ALIVE_ONLY = 3,
381 FW_SUBTYPE_WOWLAN = 4,
382 FW_SUBTYPE_AP_SUBTYPE = 5,
383 FW_SUBTYPE_WIPAN = 6,
384 FW_SUBTYPE_INITIALIZE = 9
385};
386
387#define IWL_ALIVE_STATUS_ERR 0xDEAD
388#define IWL_ALIVE_STATUS_OK 0xCAFE
389
390#define IWL_ALIVE_FLG_RFKILL BIT(0)
391
392struct mvm_alive_resp {
393 __le16 status;
394 __le16 flags;
395 u8 ucode_minor;
396 u8 ucode_major;
397 __le16 id;
398 u8 api_minor;
399 u8 api_major;
400 u8 ver_subtype;
401 u8 ver_type;
402 u8 mac;
403 u8 opt;
404 __le16 reserved2;
405 __le32 timestamp;
406 __le32 error_event_table_ptr; /* SRAM address for error log */
407 __le32 log_event_table_ptr; /* SRAM address for event log */
408 __le32 cpu_register_ptr;
409 __le32 dbgm_config_ptr;
410 __le32 alive_counter_ptr;
411 __le32 scd_base_ptr; /* SRAM address for SCD */
412} __packed; /* ALIVE_RES_API_S_VER_1 */
413
414/* Error response/notification */
415enum {
416 FW_ERR_UNKNOWN_CMD = 0x0,
417 FW_ERR_INVALID_CMD_PARAM = 0x1,
418 FW_ERR_SERVICE = 0x2,
419 FW_ERR_ARC_MEMORY = 0x3,
420 FW_ERR_ARC_CODE = 0x4,
421 FW_ERR_WATCH_DOG = 0x5,
422 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
423 FW_ERR_WEP_KEY_SIZE = 0x11,
424 FW_ERR_OBSOLETE_FUNC = 0x12,
425 FW_ERR_UNEXPECTED = 0xFE,
426 FW_ERR_FATAL = 0xFF
427};
428
429/**
430 * struct iwl_error_resp - FW error indication
431 * ( REPLY_ERROR = 0x2 )
432 * @error_type: one of FW_ERR_*
433 * @cmd_id: the command ID for which the error occured
434 * @bad_cmd_seq_num: sequence number of the erroneous command
435 * @error_service: which service created the error, applicable only if
436 * error_type = 2, otherwise 0
437 * @timestamp: TSF in usecs.
438 */
439struct iwl_error_resp {
440 __le32 error_type;
441 u8 cmd_id;
442 u8 reserved1;
443 __le16 bad_cmd_seq_num;
444 __le32 error_service;
445 __le64 timestamp;
446} __packed;
447
448
449/* Common PHY, MAC and Bindings definitions */
450
451#define MAX_MACS_IN_BINDING (3)
452#define MAX_BINDINGS (4)
453#define AUX_BINDING_INDEX (3)
454#define MAX_PHYS (4)
455
456/* Used to extract ID and color from the context dword */
457#define FW_CTXT_ID_POS (0)
458#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
459#define FW_CTXT_COLOR_POS (8)
460#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
461#define FW_CTXT_INVALID (0xffffffff)
462
463#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
464 (_color << FW_CTXT_COLOR_POS))
465
466/* Possible actions on PHYs, MACs and Bindings */
467enum {
468 FW_CTXT_ACTION_STUB = 0,
469 FW_CTXT_ACTION_ADD,
470 FW_CTXT_ACTION_MODIFY,
471 FW_CTXT_ACTION_REMOVE,
472 FW_CTXT_ACTION_NUM
473}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
474
475/* Time Events */
476
477/* Time Event types, according to MAC type */
478enum iwl_time_event_type {
479 /* BSS Station Events */
480 TE_BSS_STA_AGGRESSIVE_ASSOC,
481 TE_BSS_STA_ASSOC,
482 TE_BSS_EAP_DHCP_PROT,
483 TE_BSS_QUIET_PERIOD,
484
485 /* P2P Device Events */
486 TE_P2P_DEVICE_DISCOVERABLE,
487 TE_P2P_DEVICE_LISTEN,
488 TE_P2P_DEVICE_ACTION_SCAN,
489 TE_P2P_DEVICE_FULL_SCAN,
490
491 /* P2P Client Events */
492 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
493 TE_P2P_CLIENT_ASSOC,
494 TE_P2P_CLIENT_QUIET_PERIOD,
495
496 /* P2P GO Events */
497 TE_P2P_GO_ASSOC_PROT,
498 TE_P2P_GO_REPETITIVE_NOA,
499 TE_P2P_GO_CT_WINDOW,
500
501 /* WiDi Sync Events */
502 TE_WIDI_TX_SYNC,
503
504 TE_MAX
505}; /* MAC_EVENT_TYPE_API_E_VER_1 */
506
f8f03c3e
EL		 507
508
509/* Time event - defines for command API v1 */
510
511/*
512 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
513 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
514 * the first fragment is scheduled.
515 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
516 * the first 2 fragments are scheduled.
517 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
518 * number of fragments are valid.
519 *
520 * Other than the constant defined above, specifying a fragmentation value 'x'
521 * means that the event can be fragmented but only the first 'x' will be
522 * scheduled.
523 */
524enum {
525 TE_V1_FRAG_NONE = 0,
526 TE_V1_FRAG_SINGLE = 1,
527 TE_V1_FRAG_DUAL = 2,
528 TE_V1_FRAG_ENDLESS = 0xffffffff
529};
530
531/* If a Time Event can be fragmented, this is the max number of fragments */
532#define TE_V1_FRAG_MAX_MSK 0x0fffffff
533/* Repeat the time event endlessly (until removed) */
534#define TE_V1_REPEAT_ENDLESS 0xffffffff
535/* If a Time Event has bounded repetitions, this is the maximal value */
536#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
537
8ca151b5
JB		 538/* Time Event dependencies: none, on another TE, or in a specific time */
539enum {
f8f03c3e
EL		 540 TE_V1_INDEPENDENT = 0,
541 TE_V1_DEP_OTHER = BIT(0),
542 TE_V1_DEP_TSF = BIT(1),
543 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
8ca151b5 544}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
f8f03c3e 545
1da80e80 546/*
f8f03c3e
EL		 547 * @TE_V1_NOTIF_NONE: no notifications
548 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
549 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
550 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
551 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
552 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
553 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
554 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
555 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
556 *
1da80e80
IP		 557 * Supported Time event notifications configuration.
558 * A notification (both event and fragment) includes a status indicating weather
559 * the FW was able to schedule the event or not. For fragment start/end
560 * notification the status is always success. There is no start/end fragment
561 * notification for monolithic events.
1da80e80 562 */
8ca151b5 563enum {
f8f03c3e
EL		 564 TE_V1_NOTIF_NONE = 0,
565 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
566 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
567 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
568 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
569 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
570 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
571 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
572 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
1da80e80 573}; /* MAC_EVENT_ACTION_API_E_VER_2 */
8ca151b5 574
f8f03c3e
EL		 575
576/**
577 * struct iwl_time_event_cmd_api_v1 - configuring Time Events
578 * with struct MAC_TIME_EVENT_DATA_API_S_VER_1 (see also
579 * with version 2. determined by IWL_UCODE_TLV_FLAGS)
580 * ( TIME_EVENT_CMD = 0x29 )
581 * @id_and_color: ID and color of the relevant MAC
582 * @action: action to perform, one of FW_CTXT_ACTION_*
583 * @id: this field has two meanings, depending on the action:
584 * If the action is ADD, then it means the type of event to add.
585 * For all other actions it is the unique event ID assigned when the
586 * event was added by the FW.
587 * @apply_time: When to start the Time Event (in GP2)
588 * @max_delay: maximum delay to event's start (apply time), in TU
589 * @depends_on: the unique ID of the event we depend on (if any)
590 * @interval: interval between repetitions, in TU
591 * @interval_reciprocal: 2^32 / interval
592 * @duration: duration of event in TU
593 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
594 * @dep_policy: one of TE_V1_INDEPENDENT, TE_V1_DEP_OTHER, TE_V1_DEP_TSF
595 * and TE_V1_EVENT_SOCIOPATHIC
596 * @is_present: 0 or 1, are we present or absent during the Time Event
597 * @max_frags: maximal number of fragments the Time Event can be divided to
598 * @notify: notifications using TE_V1_NOTIF_* (whom to notify when)
599 */
600struct iwl_time_event_cmd_v1 {
601 /* COMMON_INDEX_HDR_API_S_VER_1 */
602 __le32 id_and_color;
603 __le32 action;
604 __le32 id;
605 /* MAC_TIME_EVENT_DATA_API_S_VER_1 */
606 __le32 apply_time;
607 __le32 max_delay;
608 __le32 dep_policy;
609 __le32 depends_on;
610 __le32 is_present;
611 __le32 max_frags;
612 __le32 interval;
613 __le32 interval_reciprocal;
614 __le32 duration;
615 __le32 repeat;
616 __le32 notify;
617} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_1 */
618
619
620/* Time event - defines for command API v2 */
621
8ca151b5 622/*
f8f03c3e
EL		 623 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
624 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
8ca151b5 625 * the first fragment is scheduled.
f8f03c3e 626 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
8ca151b5 627 * the first 2 fragments are scheduled.
f8f03c3e
EL		 628 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
629 * number of fragments are valid.
8ca151b5
JB		 630 *
631 * Other than the constant defined above, specifying a fragmentation value 'x'
632 * means that the event can be fragmented but only the first 'x' will be
633 * scheduled.
634 */
635enum {
f8f03c3e
EL		 636 TE_V2_FRAG_NONE = 0,
637 TE_V2_FRAG_SINGLE = 1,
638 TE_V2_FRAG_DUAL = 2,
639 TE_V2_FRAG_MAX = 0xfe,
640 TE_V2_FRAG_ENDLESS = 0xff
8ca151b5
JB		 641};
642
643/* Repeat the time event endlessly (until removed) */
f8f03c3e 644#define TE_V2_REPEAT_ENDLESS 0xff
8ca151b5 645/* If a Time Event has bounded repetitions, this is the maximal value */
f8f03c3e
EL		 646#define TE_V2_REPEAT_MAX 0xfe
647
648#define TE_V2_PLACEMENT_POS 12
649#define TE_V2_ABSENCE_POS 15
650
651/* Time event policy values (for time event cmd api v2)
652 * A notification (both event and fragment) includes a status indicating weather
653 * the FW was able to schedule the event or not. For fragment start/end
654 * notification the status is always success. There is no start/end fragment
655 * notification for monolithic events.
656 *
657 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
658 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
659 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
660 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
661 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
662 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
663 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
664 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
665 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
666 * @TE_V2_DEP_OTHER: depends on another time event
667 * @TE_V2_DEP_TSF: depends on a specific time
668 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
669 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
670 */
671enum {
672 TE_V2_DEFAULT_POLICY = 0x0,
673
674 /* notifications (event start/stop, fragment start/stop) */
675 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
676 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
677 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
678 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
679
680 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
681 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
682 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
683 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
684
685 TE_V2_NOTIF_MSK = 0xff,
686
687 /* placement characteristics */
688 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
689 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
690 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
691
692 /* are we present or absent during the Time Event. */
693 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
694};
8ca151b5
JB		 695
696/**
f8f03c3e
EL		 697 * struct iwl_time_event_cmd_api_v2 - configuring Time Events
698 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
699 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
8ca151b5
JB		 700 * ( TIME_EVENT_CMD = 0x29 )
701 * @id_and_color: ID and color of the relevant MAC
702 * @action: action to perform, one of FW_CTXT_ACTION_*
703 * @id: this field has two meanings, depending on the action:
704 * If the action is ADD, then it means the type of event to add.
705 * For all other actions it is the unique event ID assigned when the
706 * event was added by the FW.
707 * @apply_time: When to start the Time Event (in GP2)
708 * @max_delay: maximum delay to event's start (apply time), in TU
709 * @depends_on: the unique ID of the event we depend on (if any)
710 * @interval: interval between repetitions, in TU
8ca151b5
JB		 711 * @duration: duration of event in TU
712 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
8ca151b5 713 * @max_frags: maximal number of fragments the Time Event can be divided to
f8f03c3e
EL		 714 * @policy: defines whether uCode shall notify the host or other uCode modules
715 * on event and/or fragment start and/or end
716 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
717 * TE_EVENT_SOCIOPATHIC
718 * using TE_ABSENCE and using TE_NOTIF_*
8ca151b5 719 */
f8f03c3e 720struct iwl_time_event_cmd_v2 {
8ca151b5
JB		 721 /* COMMON_INDEX_HDR_API_S_VER_1 */
722 __le32 id_and_color;
723 __le32 action;
724 __le32 id;
f8f03c3e 725 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
8ca151b5
JB		 726 __le32 apply_time;
727 __le32 max_delay;
8ca151b5 728 __le32 depends_on;
8ca151b5 729 __le32 interval;
8ca151b5 730 __le32 duration;
f8f03c3e
EL		 731 u8 repeat;
732 u8 max_frags;
733 __le16 policy;
734} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
8ca151b5
JB		 735
736/**
737 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
738 * @status: bit 0 indicates success, all others specify errors
739 * @id: the Time Event type
740 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
741 * @id_and_color: ID and color of the relevant MAC
742 */
743struct iwl_time_event_resp {
744 __le32 status;
745 __le32 id;
746 __le32 unique_id;
747 __le32 id_and_color;
748} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
749
750/**
751 * struct iwl_time_event_notif - notifications of time event start/stop
752 * ( TIME_EVENT_NOTIFICATION = 0x2a )
753 * @timestamp: action timestamp in GP2
754 * @session_id: session's unique id
755 * @unique_id: unique id of the Time Event itself
756 * @id_and_color: ID and color of the relevant MAC
757 * @action: one of TE_NOTIF_START or TE_NOTIF_END
758 * @status: true if scheduled, false otherwise (not executed)
759 */
760struct iwl_time_event_notif {
761 __le32 timestamp;
762 __le32 session_id;
763 __le32 unique_id;
764 __le32 id_and_color;
765 __le32 action;
766 __le32 status;
767} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
768
769
770/* Bindings and Time Quota */
771
772/**
773 * struct iwl_binding_cmd - configuring bindings
774 * ( BINDING_CONTEXT_CMD = 0x2b )
775 * @id_and_color: ID and color of the relevant Binding
776 * @action: action to perform, one of FW_CTXT_ACTION_*
777 * @macs: array of MAC id and colors which belong to the binding
778 * @phy: PHY id and color which belongs to the binding
779 */
780struct iwl_binding_cmd {
781 /* COMMON_INDEX_HDR_API_S_VER_1 */
782 __le32 id_and_color;
783 __le32 action;
784 /* BINDING_DATA_API_S_VER_1 */
785 __le32 macs[MAX_MACS_IN_BINDING];
786 __le32 phy;
787} __packed; /* BINDING_CMD_API_S_VER_1 */
788
35adfd6e
IP		 789/* The maximal number of fragments in the FW's schedule session */
790#define IWL_MVM_MAX_QUOTA 128
791
8ca151b5
JB		 792/**
793 * struct iwl_time_quota_data - configuration of time quota per binding
794 * @id_and_color: ID and color of the relevant Binding
795 * @quota: absolute time quota in TU. The scheduler will try to divide the
796 * remainig quota (after Time Events) according to this quota.
797 * @max_duration: max uninterrupted context duration in TU
798 */
799struct iwl_time_quota_data {
800 __le32 id_and_color;
801 __le32 quota;
802 __le32 max_duration;
803} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
804
805/**
806 * struct iwl_time_quota_cmd - configuration of time quota between bindings
807 * ( TIME_QUOTA_CMD = 0x2c )
808 * @quotas: allocations per binding
809 */
810struct iwl_time_quota_cmd {
811 struct iwl_time_quota_data quotas[MAX_BINDINGS];
812} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
813
814
815/* PHY context */
816
817/* Supported bands */
818#define PHY_BAND_5 (0)
819#define PHY_BAND_24 (1)
820
821/* Supported channel width, vary if there is VHT support */
822#define PHY_VHT_CHANNEL_MODE20 (0x0)
823#define PHY_VHT_CHANNEL_MODE40 (0x1)
824#define PHY_VHT_CHANNEL_MODE80 (0x2)
825#define PHY_VHT_CHANNEL_MODE160 (0x3)
826
827/*
828 * Control channel position:
829 * For legacy set bit means upper channel, otherwise lower.
830 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
831 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
832 * center_freq
833 * |
834 * 40Mhz |_______|_______|
835 * 80Mhz |_______|_______|_______|_______|
836 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
837 * code 011 010 001 000 | 100 101 110 111
838 */
839#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
840#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
841#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
842#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
843#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
844#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
845#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
846#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
847
848/*
849 * @band: PHY_BAND_*
850 * @channel: channel number
851 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
852 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
853 */
854struct iwl_fw_channel_info {
855 u8 band;
856 u8 channel;
857 u8 width;
858 u8 ctrl_pos;
859} __packed;
860
861#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
862#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
863 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
864#define PHY_RX_CHAIN_VALID_POS (1)
865#define PHY_RX_CHAIN_VALID_MSK \
866 (0x7 << PHY_RX_CHAIN_VALID_POS)
867#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
868#define PHY_RX_CHAIN_FORCE_SEL_MSK \
869 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
870#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
871#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
872 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
873#define PHY_RX_CHAIN_CNT_POS (10)
874#define PHY_RX_CHAIN_CNT_MSK \
875 (0x3 << PHY_RX_CHAIN_CNT_POS)
876#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
877#define PHY_RX_CHAIN_MIMO_CNT_MSK \
878 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
879#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
880#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
881 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
882
883/* TODO: fix the value, make it depend on firmware at runtime? */
884#define NUM_PHY_CTX 3
885
886/* TODO: complete missing documentation */
887/**
888 * struct iwl_phy_context_cmd - config of the PHY context
889 * ( PHY_CONTEXT_CMD = 0x8 )
890 * @id_and_color: ID and color of the relevant Binding
891 * @action: action to perform, one of FW_CTXT_ACTION_*
892 * @apply_time: 0 means immediate apply and context switch.
893 * other value means apply new params after X usecs
894 * @tx_param_color: ???
895 * @channel_info:
896 * @txchain_info: ???
897 * @rxchain_info: ???
898 * @acquisition_data: ???
899 * @dsp_cfg_flags: set to 0
900 */
901struct iwl_phy_context_cmd {
902 /* COMMON_INDEX_HDR_API_S_VER_1 */
903 __le32 id_and_color;
904 __le32 action;
905 /* PHY_CONTEXT_DATA_API_S_VER_1 */
906 __le32 apply_time;
907 __le32 tx_param_color;
908 struct iwl_fw_channel_info ci;
909 __le32 txchain_info;
910 __le32 rxchain_info;
911 __le32 acquisition_data;
912 __le32 dsp_cfg_flags;
913} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
914
915#define IWL_RX_INFO_PHY_CNT 8
a2d7b870
AA		 916#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
917#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
918#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
919#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
920#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
921#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
922#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
923
8ca151b5
JB		 924#define IWL_RX_INFO_AGC_IDX 1
925#define IWL_RX_INFO_RSSI_AB_IDX 2
8101a7f0
EG		 926#define IWL_OFDM_AGC_A_MSK 0x0000007f
927#define IWL_OFDM_AGC_A_POS 0
928#define IWL_OFDM_AGC_B_MSK 0x00003f80
929#define IWL_OFDM_AGC_B_POS 7
930#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
931#define IWL_OFDM_AGC_CODE_POS 20
8ca151b5 932#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
8ca151b5 933#define IWL_OFDM_RSSI_A_POS 0
8101a7f0
EG		 934#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
935#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
8ca151b5 936#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
8ca151b5 937#define IWL_OFDM_RSSI_B_POS 16
8101a7f0
EG		 938#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
939#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
8ca151b5
JB		 940
941/**
942 * struct iwl_rx_phy_info - phy info
943 * (REPLY_RX_PHY_CMD = 0xc0)
944 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
945 * @cfg_phy_cnt: configurable DSP phy data byte count
946 * @stat_id: configurable DSP phy data set ID
947 * @reserved1:
948 * @system_timestamp: GP2 at on air rise
949 * @timestamp: TSF at on air rise
950 * @beacon_time_stamp: beacon at on-air rise
951 * @phy_flags: general phy flags: band, modulation, ...
952 * @channel: channel number
953 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
954 * @rate_n_flags: RATE_MCS_*
955 * @byte_count: frame's byte-count
956 * @frame_time: frame's time on the air, based on byte count and frame rate
957 * calculation
6bfcb7e8 958 * @mac_active_msk: what MACs were active when the frame was received
8ca151b5
JB		 959 *
960 * Before each Rx, the device sends this data. It contains PHY information
961 * about the reception of the packet.
962 */
963struct iwl_rx_phy_info {
964 u8 non_cfg_phy_cnt;
965 u8 cfg_phy_cnt;
966 u8 stat_id;
967 u8 reserved1;
968 __le32 system_timestamp;
969 __le64 timestamp;
970 __le32 beacon_time_stamp;
971 __le16 phy_flags;
972 __le16 channel;
973 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
974 __le32 rate_n_flags;
975 __le32 byte_count;
6bfcb7e8 976 __le16 mac_active_msk;
8ca151b5
JB		 977 __le16 frame_time;
978} __packed;
979
980struct iwl_rx_mpdu_res_start {
981 __le16 byte_count;
982 __le16 reserved;
983} __packed;
984
985/**
986 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
987 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
988 * @RX_RES_PHY_FLAGS_MOD_CCK:
989 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
990 * @RX_RES_PHY_FLAGS_NARROW_BAND:
991 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
992 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
993 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
994 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
995 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
996 */
997enum iwl_rx_phy_flags {
998 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
999 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
1000 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
1001 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1002 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1003 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1004 RX_RES_PHY_FLAGS_AGG = BIT(7),
1005 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1006 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1007 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1008};
1009
1010/**
1011 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1012 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1013 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1014 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1015 * @RX_MPDU_RES_STATUS_KEY_VALID:
1016 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1017 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1018 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1019 * in the driver.
1020 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1021 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1022 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1023 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1024 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1025 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1026 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1027 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1028 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1029 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1030 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1031 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1032 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1033 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1034 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1035 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1036 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1037 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1038 * @RX_MPDU_RES_STATUS_RRF_KILL:
1039 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1040 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1041 */
1042enum iwl_mvm_rx_status {
1043 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1044 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1045 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1046 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1047 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1048 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1049 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1050 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1051 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1052 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1053 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1054 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1055 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
e36e5433 1056 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
8ca151b5
JB		 1057 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1058 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1059 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1060 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1061 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1062 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1063 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1064 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1065 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1066 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1067 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1068 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1069 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1070};
1071
1072/**
1073 * struct iwl_radio_version_notif - information on the radio version
1074 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1075 * @radio_flavor:
1076 * @radio_step:
1077 * @radio_dash:
1078 */
1079struct iwl_radio_version_notif {
1080 __le32 radio_flavor;
1081 __le32 radio_step;
1082 __le32 radio_dash;
1083} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1084
1085enum iwl_card_state_flags {
1086 CARD_ENABLED = 0x00,
1087 HW_CARD_DISABLED = 0x01,
1088 SW_CARD_DISABLED = 0x02,
1089 CT_KILL_CARD_DISABLED = 0x04,
1090 HALT_CARD_DISABLED = 0x08,
1091 CARD_DISABLED_MSK = 0x0f,
1092 CARD_IS_RX_ON = 0x10,
1093};
1094
1095/**
1096 * struct iwl_radio_version_notif - information on the radio version
1097 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1098 * @flags: %iwl_card_state_flags
1099 */
1100struct iwl_card_state_notif {
1101 __le32 flags;
1102} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1103
d64048ed
HG		 1104/**
1105 * struct iwl_missed_beacons_notif - information on missed beacons
1106 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1107 * @mac_id: interface ID
1108 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1109 * beacons since last RX.
1110 * @consec_missed_beacons: number of consecutive missed beacons
1111 * @num_expected_beacons:
1112 * @num_recvd_beacons:
1113 */
1114struct iwl_missed_beacons_notif {
1115 __le32 mac_id;
1116 __le32 consec_missed_beacons_since_last_rx;
1117 __le32 consec_missed_beacons;
1118 __le32 num_expected_beacons;
1119 __le32 num_recvd_beacons;
1120} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1121
8ca151b5
JB		 1122/**
1123 * struct iwl_set_calib_default_cmd - set default value for calibration.
1124 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1125 * @calib_index: the calibration to set value for
1126 * @length: of data
1127 * @data: the value to set for the calibration result
1128 */
1129struct iwl_set_calib_default_cmd {
1130 __le16 calib_index;
1131 __le16 length;
1132 u8 data[0];
1133} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1134
51b6b9e0 1135#define MAX_PORT_ID_NUM 2
e59647ea 1136#define MAX_MCAST_FILTERING_ADDRESSES 256
51b6b9e0
EG		 1137
1138/**
1139 * struct iwl_mcast_filter_cmd - configure multicast filter.
1140 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1141 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1142 * to identify network interface adopted in host-device IF.
1143 * It is used by FW as index in array of addresses. This array has
1144 * MAX_PORT_ID_NUM members.
1145 * @count: Number of MAC addresses in the array
1146 * @pass_all: Set 1 to pass all multicast packets.
1147 * @bssid: current association BSSID.
1148 * @addr_list: Place holder for array of MAC addresses.
1149 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1150 */
1151struct iwl_mcast_filter_cmd {
1152 u8 filter_own;
1153 u8 port_id;
1154 u8 count;
1155 u8 pass_all;
1156 u8 bssid[6];
1157 u8 reserved[2];
1158 u8 addr_list[0];
1159} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1160
c87163b9
EP		 1161#define MAX_BCAST_FILTERS 8
1162#define MAX_BCAST_FILTER_ATTRS 2
1163
1164/**
1165 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1166 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1167 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1168 * start of ip payload).
1169 */
1170enum iwl_mvm_bcast_filter_attr_offset {
1171 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1172 BCAST_FILTER_OFFSET_IP_END = 1,
1173};
1174
1175/**
1176 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1177 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1178 * @offset: starting offset of this pattern.
1179 * @val: value to match - big endian (MSB is the first
1180 * byte to match from offset pos).
1181 * @mask: mask to match (big endian).
1182 */
1183struct iwl_fw_bcast_filter_attr {
1184 u8 offset_type;
1185 u8 offset;
1186 __le16 reserved1;
1187 __be32 val;
1188 __be32 mask;
1189} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1190
1191/**
1192 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1193 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1194 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1195 */
1196enum iwl_mvm_bcast_filter_frame_type {
1197 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1198 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1199};
1200
1201/**
1202 * struct iwl_fw_bcast_filter - broadcast filter
1203 * @discard: discard frame (1) or let it pass (0).
1204 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1205 * @num_attrs: number of valid attributes in this filter.
1206 * @attrs: attributes of this filter. a filter is considered matched
1207 * only when all its attributes are matched (i.e. AND relationship)
1208 */
1209struct iwl_fw_bcast_filter {
1210 u8 discard;
1211 u8 frame_type;
1212 u8 num_attrs;
1213 u8 reserved1;
1214 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1215} __packed; /* BCAST_FILTER_S_VER_1 */
1216
1217/**
1218 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1219 * @default_discard: default action for this mac (discard (1) / pass (0)).
1220 * @attached_filters: bitmap of relevant filters for this mac.
1221 */
1222struct iwl_fw_bcast_mac {
1223 u8 default_discard;
1224 u8 reserved1;
1225 __le16 attached_filters;
1226} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1227
1228/**
1229 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1230 * @disable: enable (0) / disable (1)
1231 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1232 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1233 * @filters: broadcast filters
1234 * @macs: broadcast filtering configuration per-mac
1235 */
1236struct iwl_bcast_filter_cmd {
1237 u8 disable;
1238 u8 max_bcast_filters;
1239 u8 max_macs;
1240 u8 reserved1;
1241 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1242 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1243} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1244
9ee718aa
EL		 1245struct mvm_statistics_dbg {
1246 __le32 burst_check;
1247 __le32 burst_count;
1248 __le32 wait_for_silence_timeout_cnt;
1249 __le32 reserved[3];
1250} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1251
1252struct mvm_statistics_div {
1253 __le32 tx_on_a;
1254 __le32 tx_on_b;
1255 __le32 exec_time;
1256 __le32 probe_time;
1257 __le32 rssi_ant;
1258 __le32 reserved2;
1259} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1260
1261struct mvm_statistics_general_common {
1262 __le32 temperature; /* radio temperature */
1263 __le32 temperature_m; /* radio voltage */
1264 struct mvm_statistics_dbg dbg;
1265 __le32 sleep_time;
1266 __le32 slots_out;
1267 __le32 slots_idle;
1268 __le32 ttl_timestamp;
1269 struct mvm_statistics_div div;
1270 __le32 rx_enable_counter;
1271 /*
1272 * num_of_sos_states:
1273 * count the number of times we have to re-tune
1274 * in order to get out of bad PHY status
1275 */
1276 __le32 num_of_sos_states;
1277} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1278
1279struct mvm_statistics_rx_non_phy {
1280 __le32 bogus_cts; /* CTS received when not expecting CTS */
1281 __le32 bogus_ack; /* ACK received when not expecting ACK */
1282 __le32 non_bssid_frames; /* number of frames with BSSID that
1283 * doesn't belong to the STA BSSID */
1284 __le32 filtered_frames; /* count frames that were dumped in the
1285 * filtering process */
1286 __le32 non_channel_beacons; /* beacons with our bss id but not on
1287 * our serving channel */
1288 __le32 channel_beacons; /* beacons with our bss id and in our
1289 * serving channel */
1290 __le32 num_missed_bcon; /* number of missed beacons */
1291 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1292 * ADC was in saturation */
1293 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1294 * for INA */
1295 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1296 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1297 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1298 __le32 interference_data_flag; /* flag for interference data
1299 * availability. 1 when data is
1300 * available. */
1301 __le32 channel_load; /* counts RX Enable time in uSec */
1302 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1303 * and CCK) counter */
1304 __le32 beacon_rssi_a;
1305 __le32 beacon_rssi_b;
1306 __le32 beacon_rssi_c;
1307 __le32 beacon_energy_a;
1308 __le32 beacon_energy_b;
1309 __le32 beacon_energy_c;
1310 __le32 num_bt_kills;
1311 __le32 mac_id;
1312 __le32 directed_data_mpdu;
1313} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1314
1315struct mvm_statistics_rx_phy {
1316 __le32 ina_cnt;
1317 __le32 fina_cnt;
1318 __le32 plcp_err;
1319 __le32 crc32_err;
1320 __le32 overrun_err;
1321 __le32 early_overrun_err;
1322 __le32 crc32_good;
1323 __le32 false_alarm_cnt;
1324 __le32 fina_sync_err_cnt;
1325 __le32 sfd_timeout;
1326 __le32 fina_timeout;
1327 __le32 unresponded_rts;
1328 __le32 rxe_frame_limit_overrun;
1329 __le32 sent_ack_cnt;
1330 __le32 sent_cts_cnt;
1331 __le32 sent_ba_rsp_cnt;
1332 __le32 dsp_self_kill;
1333 __le32 mh_format_err;
1334 __le32 re_acq_main_rssi_sum;
1335 __le32 reserved;
1336} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1337
1338struct mvm_statistics_rx_ht_phy {
1339 __le32 plcp_err;
1340 __le32 overrun_err;
1341 __le32 early_overrun_err;
1342 __le32 crc32_good;
1343 __le32 crc32_err;
1344 __le32 mh_format_err;
1345 __le32 agg_crc32_good;
1346 __le32 agg_mpdu_cnt;
1347 __le32 agg_cnt;
1348 __le32 unsupport_mcs;
1349} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1350
1351#define MAX_CHAINS 3
1352
1353struct mvm_statistics_tx_non_phy_agg {
1354 __le32 ba_timeout;
1355 __le32 ba_reschedule_frames;
1356 __le32 scd_query_agg_frame_cnt;
1357 __le32 scd_query_no_agg;
1358 __le32 scd_query_agg;
1359 __le32 scd_query_mismatch;
1360 __le32 frame_not_ready;
1361 __le32 underrun;
1362 __le32 bt_prio_kill;
1363 __le32 rx_ba_rsp_cnt;
1364 __s8 txpower[MAX_CHAINS];
1365 __s8 reserved;
1366 __le32 reserved2;
1367} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1368
1369struct mvm_statistics_tx_channel_width {
1370 __le32 ext_cca_narrow_ch20[1];
1371 __le32 ext_cca_narrow_ch40[2];
1372 __le32 ext_cca_narrow_ch80[3];
1373 __le32 ext_cca_narrow_ch160[4];
1374 __le32 last_tx_ch_width_indx;
1375 __le32 rx_detected_per_ch_width[4];
1376 __le32 success_per_ch_width[4];
1377 __le32 fail_per_ch_width[4];
1378}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1379
1380struct mvm_statistics_tx {
1381 __le32 preamble_cnt;
1382 __le32 rx_detected_cnt;
1383 __le32 bt_prio_defer_cnt;
1384 __le32 bt_prio_kill_cnt;
1385 __le32 few_bytes_cnt;
1386 __le32 cts_timeout;
1387 __le32 ack_timeout;
1388 __le32 expected_ack_cnt;
1389 __le32 actual_ack_cnt;
1390 __le32 dump_msdu_cnt;
1391 __le32 burst_abort_next_frame_mismatch_cnt;
1392 __le32 burst_abort_missing_next_frame_cnt;
1393 __le32 cts_timeout_collision;
1394 __le32 ack_or_ba_timeout_collision;
1395 struct mvm_statistics_tx_non_phy_agg agg;
1396 struct mvm_statistics_tx_channel_width channel_width;
1397} __packed; /* STATISTICS_TX_API_S_VER_4 */
1398
1399
1400struct mvm_statistics_bt_activity {
1401 __le32 hi_priority_tx_req_cnt;
1402 __le32 hi_priority_tx_denied_cnt;
1403 __le32 lo_priority_tx_req_cnt;
1404 __le32 lo_priority_tx_denied_cnt;
1405 __le32 hi_priority_rx_req_cnt;
1406 __le32 hi_priority_rx_denied_cnt;
1407 __le32 lo_priority_rx_req_cnt;
1408 __le32 lo_priority_rx_denied_cnt;
1409} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1410
1411struct mvm_statistics_general {
1412 struct mvm_statistics_general_common common;
1413 __le32 beacon_filtered;
1414 __le32 missed_beacons;
a20fd398 1415 __s8 beacon_filter_average_energy;
9ee718aa
EL		 1416 __s8 beacon_filter_reason;
1417 __s8 beacon_filter_current_energy;
1418 __s8 beacon_filter_reserved;
1419 __le32 beacon_filter_delta_time;
1420 struct mvm_statistics_bt_activity bt_activity;
1421} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1422
1423struct mvm_statistics_rx {
1424 struct mvm_statistics_rx_phy ofdm;
1425 struct mvm_statistics_rx_phy cck;
1426 struct mvm_statistics_rx_non_phy general;
1427 struct mvm_statistics_rx_ht_phy ofdm_ht;
1428} __packed; /* STATISTICS_RX_API_S_VER_3 */
1429
1430/*
1431 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1432 *
1433 * By default, uCode issues this notification after receiving a beacon
1434 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1435 * REPLY_STATISTICS_CMD 0x9c, above.
1436 *
1437 * Statistics counters continue to increment beacon after beacon, but are
1438 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1439 * 0x9c with CLEAR_STATS bit set (see above).
1440 *
1441 * uCode also issues this notification during scans. uCode clears statistics
1442 * appropriately so that each notification contains statistics for only the
1443 * one channel that has just been scanned.
1444 */
1445
1446struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */
1447 __le32 flag;
1448 struct mvm_statistics_rx rx;
1449 struct mvm_statistics_tx tx;
1450 struct mvm_statistics_general general;
1451} __packed;
1452
1f3b0ff8
LE		 1453/***********************************
1454 * Smart Fifo API
1455 ***********************************/
1456/* Smart Fifo state */
1457enum iwl_sf_state {
1458 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1459 SF_FULL_ON,
1460 SF_UNINIT,
1461 SF_INIT_OFF,
1462 SF_HW_NUM_STATES
1463};
1464
1465/* Smart Fifo possible scenario */
1466enum iwl_sf_scenario {
1467 SF_SCENARIO_SINGLE_UNICAST,
1468 SF_SCENARIO_AGG_UNICAST,
1469 SF_SCENARIO_MULTICAST,
1470 SF_SCENARIO_BA_RESP,
1471 SF_SCENARIO_TX_RESP,
1472 SF_NUM_SCENARIO
1473};
1474
1475#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1476#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1477
1478/* smart FIFO default values */
1479#define SF_W_MARK_SISO 4096
1480#define SF_W_MARK_MIMO2 8192
1481#define SF_W_MARK_MIMO3 6144
1482#define SF_W_MARK_LEGACY 4096
1483#define SF_W_MARK_SCAN 4096
1484
1485/* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
1486#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1487#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1488#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1489#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1490#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1491#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1492#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1493#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1494#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1495#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1496
1497#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1498
1499/**
1500 * Smart Fifo configuration command.
1501 * @state: smart fifo state, types listed in iwl_sf_sate.
1502 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1503 * @long_delay_timeouts: aging and idle timer values for each scenario
1504 * in long delay state.
1505 * @full_on_timeouts: timer values for each scenario in full on state.
1506 */
1507struct iwl_sf_cfg_cmd {
1508 enum iwl_sf_state state;
1509 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1510 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1511 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1512} __packed; /* SF_CFG_API_S_VER_2 */
1513
8ca151b5 1514#endif /* __fw_api_h__ */
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