Commit | Line | Data |
---|---|---|
931d4160 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
931d4160 EG |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of version 2 of the GNU General Public License as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
22 | * USA | |
23 | * | |
24 | * The full GNU General Public License is included in this distribution | |
25 | * in the file called COPYING. | |
26 | * | |
27 | * Contact Information: | |
28 | * Intel Linux Wireless <ilw@linux.intel.com> | |
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
30 | * | |
31 | * BSD LICENSE | |
32 | * | |
51368bf7 | 33 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
931d4160 EG |
34 | * All rights reserved. |
35 | * | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * | |
40 | * * Redistributions of source code must retain the above copyright | |
41 | * notice, this list of conditions and the following disclaimer. | |
42 | * * Redistributions in binary form must reproduce the above copyright | |
43 | * notice, this list of conditions and the following disclaimer in | |
44 | * the documentation and/or other materials provided with the | |
45 | * distribution. | |
46 | * * Neither the name Intel Corporation nor the names of its | |
47 | * contributors may be used to endorse or promote products derived | |
48 | * from this software without specific prior written permission. | |
49 | * | |
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
61 | * | |
62 | *****************************************************************************/ | |
63 | ||
2b76ef13 EG |
64 | #include <net/mac80211.h> |
65 | ||
931d4160 EG |
66 | #include "fw-api-bt-coex.h" |
67 | #include "iwl-modparams.h" | |
68 | #include "mvm.h" | |
f421f9c3 | 69 | #include "iwl-debug.h" |
931d4160 EG |
70 | |
71 | #define EVENT_PRIO_ANT(_evt, _prio, _shrd_ant) \ | |
72 | [(_evt)] = (((_prio) << BT_COEX_PRIO_TBL_PRIO_POS) | \ | |
73 | ((_shrd_ant) << BT_COEX_PRIO_TBL_SHRD_ANT_POS)) | |
74 | ||
75 | static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = { | |
76 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_INIT_CALIB1, | |
77 | BT_COEX_PRIO_TBL_PRIO_BYPASS, 0), | |
78 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_INIT_CALIB2, | |
79 | BT_COEX_PRIO_TBL_PRIO_BYPASS, 1), | |
80 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1, | |
81 | BT_COEX_PRIO_TBL_PRIO_LOW, 0), | |
82 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2, | |
83 | BT_COEX_PRIO_TBL_PRIO_LOW, 1), | |
84 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1, | |
85 | BT_COEX_PRIO_TBL_PRIO_HIGH, 0), | |
86 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2, | |
87 | BT_COEX_PRIO_TBL_PRIO_HIGH, 1), | |
88 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_DTIM, | |
89 | BT_COEX_PRIO_TBL_DISABLED, 0), | |
90 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_SCAN52, | |
91 | BT_COEX_PRIO_TBL_PRIO_COEX_OFF, 0), | |
92 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_SCAN24, | |
93 | BT_COEX_PRIO_TBL_PRIO_COEX_ON, 0), | |
94 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_IDLE, | |
95 | BT_COEX_PRIO_TBL_PRIO_COEX_IDLE, 0), | |
96 | 0, 0, 0, 0, 0, 0, | |
97 | }; | |
98 | ||
99 | #undef EVENT_PRIO_ANT | |
100 | ||
2b76ef13 EG |
101 | #define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62) |
102 | #define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65) | |
dac94da8 | 103 | #define BT_ANTENNA_COUPLING_THRESHOLD (30) |
2b76ef13 | 104 | |
931d4160 EG |
105 | int iwl_send_bt_prio_tbl(struct iwl_mvm *mvm) |
106 | { | |
dac94da8 EG |
107 | if (!(mvm->fw->ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWBT_COEX)) |
108 | return 0; | |
109 | ||
931d4160 EG |
110 | return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_PRIO_TABLE, CMD_SYNC, |
111 | sizeof(struct iwl_bt_coex_prio_tbl_cmd), | |
112 | &iwl_bt_prio_tbl); | |
113 | } | |
114 | ||
2de13cae | 115 | const u32 iwl_bt_ack_kill_msk[BT_KILL_MSK_MAX] = { |
5b7e662b EG |
116 | [BT_KILL_MSK_DEFAULT] = 0xffff0000, |
117 | [BT_KILL_MSK_SCO_HID_A2DP] = 0xffffffff, | |
118 | [BT_KILL_MSK_REDUCED_TXPOW] = 0, | |
931d4160 EG |
119 | }; |
120 | ||
2de13cae | 121 | const u32 iwl_bt_cts_kill_msk[BT_KILL_MSK_MAX] = { |
5b7e662b EG |
122 | [BT_KILL_MSK_DEFAULT] = 0xffff0000, |
123 | [BT_KILL_MSK_SCO_HID_A2DP] = 0xffffffff, | |
124 | [BT_KILL_MSK_REDUCED_TXPOW] = 0, | |
931d4160 EG |
125 | }; |
126 | ||
dac94da8 EG |
127 | static const __le32 iwl_bt_prio_boost[BT_COEX_BOOST_SIZE] = { |
128 | cpu_to_le32(0xf0f0f0f0), | |
129 | cpu_to_le32(0xc0c0c0c0), | |
130 | cpu_to_le32(0xfcfcfcfc), | |
131 | cpu_to_le32(0xff00ff00), | |
931d4160 EG |
132 | }; |
133 | ||
d1d5e3cd EG |
134 | static const __le32 iwl_single_shared_ant[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { |
135 | { | |
136 | cpu_to_le32(0x40000000), | |
137 | cpu_to_le32(0x00000000), | |
138 | cpu_to_le32(0x44000000), | |
139 | cpu_to_le32(0x00000000), | |
140 | cpu_to_le32(0x40000000), | |
141 | cpu_to_le32(0x00000000), | |
142 | cpu_to_le32(0x44000000), | |
143 | cpu_to_le32(0x00000000), | |
144 | cpu_to_le32(0xc0004000), | |
145 | cpu_to_le32(0xf0005000), | |
146 | cpu_to_le32(0xc0004000), | |
147 | cpu_to_le32(0xf0005000), | |
148 | }, | |
149 | { | |
150 | cpu_to_le32(0x40000000), | |
151 | cpu_to_le32(0x00000000), | |
152 | cpu_to_le32(0x44000000), | |
153 | cpu_to_le32(0x00000000), | |
154 | cpu_to_le32(0x40000000), | |
155 | cpu_to_le32(0x00000000), | |
156 | cpu_to_le32(0x44000000), | |
157 | cpu_to_le32(0x00000000), | |
158 | cpu_to_le32(0xc0004000), | |
159 | cpu_to_le32(0xf0005000), | |
160 | cpu_to_le32(0xc0004000), | |
161 | cpu_to_le32(0xf0005000), | |
162 | }, | |
163 | { | |
164 | cpu_to_le32(0x40000000), | |
165 | cpu_to_le32(0x00000000), | |
166 | cpu_to_le32(0x44000000), | |
167 | cpu_to_le32(0x00000000), | |
168 | cpu_to_le32(0x40000000), | |
169 | cpu_to_le32(0x00000000), | |
170 | cpu_to_le32(0x44000000), | |
171 | cpu_to_le32(0x00000000), | |
172 | cpu_to_le32(0xc0004000), | |
173 | cpu_to_le32(0xf0005000), | |
174 | cpu_to_le32(0xc0004000), | |
175 | cpu_to_le32(0xf0005000), | |
176 | }, | |
177 | }; | |
178 | ||
dac94da8 EG |
179 | static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { |
180 | { | |
181 | /* Tight */ | |
182 | cpu_to_le32(0xaaaaaaaa), | |
183 | cpu_to_le32(0xaaaaaaaa), | |
184 | cpu_to_le32(0xaeaaaaaa), | |
185 | cpu_to_le32(0xaaaaaaaa), | |
186 | cpu_to_le32(0xcc00ff28), | |
187 | cpu_to_le32(0x0000aaaa), | |
188 | cpu_to_le32(0xcc00aaaa), | |
189 | cpu_to_le32(0x0000aaaa), | |
190 | cpu_to_le32(0xc0004000), | |
191 | cpu_to_le32(0x00000000), | |
192 | cpu_to_le32(0xf0005000), | |
193 | cpu_to_le32(0xf0005000), | |
194 | }, | |
195 | { | |
196 | /* Loose */ | |
197 | cpu_to_le32(0xaaaaaaaa), | |
198 | cpu_to_le32(0xaaaaaaaa), | |
199 | cpu_to_le32(0xaaaaaaaa), | |
200 | cpu_to_le32(0xaaaaaaaa), | |
201 | cpu_to_le32(0xcc00ff28), | |
202 | cpu_to_le32(0x0000aaaa), | |
203 | cpu_to_le32(0xcc00aaaa), | |
204 | cpu_to_le32(0x0000aaaa), | |
205 | cpu_to_le32(0x00000000), | |
206 | cpu_to_le32(0x00000000), | |
207 | cpu_to_le32(0xf0005000), | |
208 | cpu_to_le32(0xf0005000), | |
209 | }, | |
210 | { | |
211 | /* Tx Tx disabled */ | |
212 | cpu_to_le32(0xaaaaaaaa), | |
213 | cpu_to_le32(0xaaaaaaaa), | |
214 | cpu_to_le32(0xaaaaaaaa), | |
215 | cpu_to_le32(0xaaaaaaaa), | |
216 | cpu_to_le32(0xcc00ff28), | |
217 | cpu_to_le32(0x0000aaaa), | |
218 | cpu_to_le32(0xcc00aaaa), | |
219 | cpu_to_le32(0x0000aaaa), | |
220 | cpu_to_le32(0xC0004000), | |
221 | cpu_to_le32(0xC0004000), | |
222 | cpu_to_le32(0xF0005000), | |
223 | cpu_to_le32(0xF0005000), | |
224 | }, | |
931d4160 EG |
225 | }; |
226 | ||
dac94da8 EG |
227 | /* 20MHz / 40MHz below / 40Mhz above*/ |
228 | static const __le64 iwl_ci_mask[][3] = { | |
229 | /* dummy entry for channel 0 */ | |
230 | {cpu_to_le64(0), cpu_to_le64(0), cpu_to_le64(0)}, | |
231 | { | |
232 | cpu_to_le64(0x0000001FFFULL), | |
233 | cpu_to_le64(0x0ULL), | |
234 | cpu_to_le64(0x00007FFFFFULL), | |
235 | }, | |
236 | { | |
237 | cpu_to_le64(0x000000FFFFULL), | |
238 | cpu_to_le64(0x0ULL), | |
239 | cpu_to_le64(0x0003FFFFFFULL), | |
240 | }, | |
241 | { | |
242 | cpu_to_le64(0x000003FFFCULL), | |
243 | cpu_to_le64(0x0ULL), | |
244 | cpu_to_le64(0x000FFFFFFCULL), | |
245 | }, | |
246 | { | |
247 | cpu_to_le64(0x00001FFFE0ULL), | |
248 | cpu_to_le64(0x0ULL), | |
249 | cpu_to_le64(0x007FFFFFE0ULL), | |
250 | }, | |
251 | { | |
252 | cpu_to_le64(0x00007FFF80ULL), | |
253 | cpu_to_le64(0x00007FFFFFULL), | |
254 | cpu_to_le64(0x01FFFFFF80ULL), | |
255 | }, | |
256 | { | |
257 | cpu_to_le64(0x0003FFFC00ULL), | |
258 | cpu_to_le64(0x0003FFFFFFULL), | |
259 | cpu_to_le64(0x0FFFFFFC00ULL), | |
260 | }, | |
261 | { | |
262 | cpu_to_le64(0x000FFFF000ULL), | |
263 | cpu_to_le64(0x000FFFFFFCULL), | |
264 | cpu_to_le64(0x3FFFFFF000ULL), | |
265 | }, | |
266 | { | |
267 | cpu_to_le64(0x007FFF8000ULL), | |
268 | cpu_to_le64(0x007FFFFFE0ULL), | |
269 | cpu_to_le64(0xFFFFFF8000ULL), | |
270 | }, | |
271 | { | |
272 | cpu_to_le64(0x01FFFE0000ULL), | |
273 | cpu_to_le64(0x01FFFFFF80ULL), | |
274 | cpu_to_le64(0xFFFFFE0000ULL), | |
275 | }, | |
276 | { | |
277 | cpu_to_le64(0x0FFFF00000ULL), | |
278 | cpu_to_le64(0x0FFFFFFC00ULL), | |
279 | cpu_to_le64(0x0ULL), | |
280 | }, | |
281 | { | |
282 | cpu_to_le64(0x3FFFC00000ULL), | |
283 | cpu_to_le64(0x3FFFFFF000ULL), | |
284 | cpu_to_le64(0x0) | |
285 | }, | |
286 | { | |
287 | cpu_to_le64(0xFFFE000000ULL), | |
288 | cpu_to_le64(0xFFFFFF8000ULL), | |
289 | cpu_to_le64(0x0) | |
290 | }, | |
291 | { | |
292 | cpu_to_le64(0xFFF8000000ULL), | |
293 | cpu_to_le64(0xFFFFFE0000ULL), | |
294 | cpu_to_le64(0x0) | |
295 | }, | |
296 | { | |
d2ccc902 | 297 | cpu_to_le64(0xFFC0000000ULL), |
dac94da8 | 298 | cpu_to_le64(0x0ULL), |
d2ccc902 | 299 | cpu_to_le64(0x0ULL) |
dac94da8 | 300 | }, |
931d4160 EG |
301 | }; |
302 | ||
dac94da8 EG |
303 | static const __le32 iwl_bt_mprio_lut[BT_COEX_MULTI_PRIO_LUT_SIZE] = { |
304 | cpu_to_le32(0x22002200), | |
305 | cpu_to_le32(0x33113311), | |
e715c3a9 EG |
306 | }; |
307 | ||
b9fae2d5 EG |
308 | struct corunning_block_luts { |
309 | u8 range; | |
310 | __le32 lut20[BT_COEX_CORUN_LUT_SIZE]; | |
311 | }; | |
312 | ||
313 | /* | |
314 | * Ranges for the antenna coupling calibration / co-running block LUT: | |
315 | * LUT0: [ 0, 12[ | |
316 | * LUT1: [12, 20[ | |
317 | * LUT2: [20, 21[ | |
318 | * LUT3: [21, 23[ | |
319 | * LUT4: [23, 27[ | |
320 | * LUT5: [27, 30[ | |
321 | * LUT6: [30, 32[ | |
322 | * LUT7: [32, 33[ | |
323 | * LUT8: [33, - [ | |
324 | */ | |
325 | static const struct corunning_block_luts antenna_coupling_ranges[] = { | |
326 | { | |
327 | .range = 0, | |
328 | .lut20 = { | |
329 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
330 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
331 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
332 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
333 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
334 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
335 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
336 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
337 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
338 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
339 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
340 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
341 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
342 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
343 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
344 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
345 | }, | |
346 | }, | |
347 | { | |
348 | .range = 12, | |
349 | .lut20 = { | |
350 | cpu_to_le32(0x00000001), cpu_to_le32(0x00000000), | |
351 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
352 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
353 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
354 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
355 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
356 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
357 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
358 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
359 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
360 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
361 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
362 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
363 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
364 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
365 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
366 | }, | |
367 | }, | |
368 | { | |
369 | .range = 20, | |
370 | .lut20 = { | |
371 | cpu_to_le32(0x00000002), cpu_to_le32(0x00000000), | |
372 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
373 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
374 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
375 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
376 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
377 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
378 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
379 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
380 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
381 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
382 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
383 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
384 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
385 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
386 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
387 | }, | |
388 | }, | |
389 | { | |
390 | .range = 21, | |
391 | .lut20 = { | |
392 | cpu_to_le32(0x00000003), cpu_to_le32(0x00000000), | |
393 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
394 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
395 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
396 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
397 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
398 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
399 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
400 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
401 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
402 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
403 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
404 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
405 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
406 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
407 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
408 | }, | |
409 | }, | |
410 | { | |
411 | .range = 23, | |
412 | .lut20 = { | |
413 | cpu_to_le32(0x00000004), cpu_to_le32(0x00000000), | |
414 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
415 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
416 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
417 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
418 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
419 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
420 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
421 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
422 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
423 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
424 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
425 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
426 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
427 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
428 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
429 | }, | |
430 | }, | |
431 | { | |
432 | .range = 27, | |
433 | .lut20 = { | |
434 | cpu_to_le32(0x00000005), cpu_to_le32(0x00000000), | |
435 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
436 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
437 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
438 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
439 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
440 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
441 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
442 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
443 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
444 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
445 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
446 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
447 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
448 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
449 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
450 | }, | |
451 | }, | |
452 | { | |
453 | .range = 30, | |
454 | .lut20 = { | |
455 | cpu_to_le32(0x00000006), cpu_to_le32(0x00000000), | |
456 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
457 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
458 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
459 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
460 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
461 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
462 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
463 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
464 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
465 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
466 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
467 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
468 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
469 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
470 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
471 | }, | |
472 | }, | |
473 | { | |
474 | .range = 32, | |
475 | .lut20 = { | |
476 | cpu_to_le32(0x00000007), cpu_to_le32(0x00000000), | |
477 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
478 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
479 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
480 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
481 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
482 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
483 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
484 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
485 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
486 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
487 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
488 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
489 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
490 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
491 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
492 | }, | |
493 | }, | |
494 | { | |
495 | .range = 33, | |
496 | .lut20 = { | |
497 | cpu_to_le32(0x00000008), cpu_to_le32(0x00000000), | |
498 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
499 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
500 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
501 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
502 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
503 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
504 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
505 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
506 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
507 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
508 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
509 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
510 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
511 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
512 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
513 | }, | |
514 | }, | |
515 | }; | |
516 | ||
4515f30f EG |
517 | static enum iwl_bt_coex_lut_type |
518 | iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif) | |
519 | { | |
520 | struct ieee80211_chanctx_conf *chanctx_conf; | |
521 | enum iwl_bt_coex_lut_type ret; | |
522 | u16 phy_ctx_id; | |
523 | ||
9145d151 EG |
524 | /* |
525 | * Checking that we hold mvm->mutex is a good idea, but the rate | |
526 | * control can't acquire the mutex since it runs in Tx path. | |
527 | * So this is racy in that case, but in the worst case, the AMPDU | |
528 | * size limit will be wrong for a short time which is not a big | |
529 | * issue. | |
530 | */ | |
4515f30f EG |
531 | |
532 | rcu_read_lock(); | |
533 | ||
534 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
535 | ||
536 | if (!chanctx_conf || | |
537 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
538 | rcu_read_unlock(); | |
539 | return BT_COEX_LOOSE_LUT; | |
540 | } | |
541 | ||
542 | ret = BT_COEX_TX_DIS_LUT; | |
543 | ||
39149911 EG |
544 | if (mvm->cfg->bt_shared_single_ant) { |
545 | rcu_read_unlock(); | |
546 | return ret; | |
547 | } | |
548 | ||
4515f30f EG |
549 | phy_ctx_id = *((u16 *)chanctx_conf->drv_priv); |
550 | ||
551 | if (mvm->last_bt_ci_cmd.primary_ch_phy_id == phy_ctx_id) | |
552 | ret = le32_to_cpu(mvm->last_bt_notif.primary_ch_lut); | |
553 | else if (mvm->last_bt_ci_cmd.secondary_ch_phy_id == phy_ctx_id) | |
554 | ret = le32_to_cpu(mvm->last_bt_notif.secondary_ch_lut); | |
555 | /* else - default = TX TX disallowed */ | |
556 | ||
557 | rcu_read_unlock(); | |
558 | ||
559 | return ret; | |
560 | } | |
561 | ||
931d4160 EG |
562 | int iwl_send_bt_init_conf(struct iwl_mvm *mvm) |
563 | { | |
03e304e4 EG |
564 | struct iwl_bt_coex_cmd *bt_cmd; |
565 | struct iwl_host_cmd cmd = { | |
566 | .id = BT_CONFIG, | |
567 | .len = { sizeof(*bt_cmd), }, | |
568 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
569 | .flags = CMD_SYNC, | |
931d4160 EG |
570 | }; |
571 | int ret; | |
dac94da8 EG |
572 | u32 flags; |
573 | ||
574 | if (!(mvm->fw->ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWBT_COEX)) | |
575 | return 0; | |
931d4160 | 576 | |
03e304e4 EG |
577 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); |
578 | if (!bt_cmd) | |
579 | return -ENOMEM; | |
580 | cmd.data[0] = bt_cmd; | |
581 | ||
582 | bt_cmd->max_kill = 5; | |
dac94da8 EG |
583 | bt_cmd->bt4_antenna_isolation_thr = BT_ANTENNA_COUPLING_THRESHOLD, |
584 | bt_cmd->bt4_antenna_isolation = iwlwifi_mod_params.ant_coupling, | |
585 | bt_cmd->bt4_tx_tx_delta_freq_thr = 15, | |
586 | bt_cmd->bt4_tx_rx_max_freq0 = 15, | |
03e304e4 | 587 | |
dac94da8 | 588 | flags = iwlwifi_mod_params.bt_coex_active ? |
931d4160 | 589 | BT_COEX_NW : BT_COEX_DISABLE; |
dac94da8 | 590 | bt_cmd->flags = cpu_to_le32(flags); |
931d4160 | 591 | |
dac94da8 | 592 | bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_ENABLE | |
03e304e4 EG |
593 | BT_VALID_BT_PRIO_BOOST | |
594 | BT_VALID_MAX_KILL | | |
595 | BT_VALID_3W_TMRS | | |
596 | BT_VALID_KILL_ACK | | |
597 | BT_VALID_KILL_CTS | | |
598 | BT_VALID_REDUCED_TX_POWER | | |
dac94da8 EG |
599 | BT_VALID_LUT | |
600 | BT_VALID_WIFI_RX_SW_PRIO_BOOST | | |
601 | BT_VALID_WIFI_TX_SW_PRIO_BOOST | | |
dac94da8 EG |
602 | BT_VALID_ANT_ISOLATION | |
603 | BT_VALID_ANT_ISOLATION_THRS | | |
604 | BT_VALID_TXTX_DELTA_FREQ_THRS | | |
b9c509cc EG |
605 | BT_VALID_TXRX_MAX_FREQ_0 | |
606 | BT_VALID_SYNC_TO_SCO); | |
dac94da8 | 607 | |
741e703b EG |
608 | if (IWL_MVM_BT_COEX_SYNC2SCO) |
609 | bt_cmd->flags |= cpu_to_le32(BT_COEX_SYNC2SCO); | |
610 | ||
b9fae2d5 EG |
611 | if (IWL_MVM_BT_COEX_CORUNNING) { |
612 | bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_CORUN_LUT_20 | | |
613 | BT_VALID_CORUN_LUT_40); | |
614 | bt_cmd->flags |= cpu_to_le32(BT_COEX_CORUNNING); | |
615 | } | |
616 | ||
d1d5e3cd EG |
617 | if (mvm->cfg->bt_shared_single_ant) |
618 | memcpy(&bt_cmd->decision_lut, iwl_single_shared_ant, | |
619 | sizeof(iwl_single_shared_ant)); | |
620 | else | |
621 | memcpy(&bt_cmd->decision_lut, iwl_combined_lookup, | |
622 | sizeof(iwl_combined_lookup)); | |
623 | ||
b9fae2d5 EG |
624 | /* Take first Co-running block LUT to get started */ |
625 | memcpy(bt_cmd->bt4_corun_lut20, antenna_coupling_ranges[0].lut20, | |
626 | sizeof(bt_cmd->bt4_corun_lut20)); | |
627 | memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[0].lut20, | |
628 | sizeof(bt_cmd->bt4_corun_lut40)); | |
629 | ||
dac94da8 EG |
630 | memcpy(&bt_cmd->bt_prio_boost, iwl_bt_prio_boost, |
631 | sizeof(iwl_bt_prio_boost)); | |
632 | memcpy(&bt_cmd->bt4_multiprio_lut, iwl_bt_mprio_lut, | |
633 | sizeof(iwl_bt_mprio_lut)); | |
03e304e4 | 634 | bt_cmd->kill_ack_msk = |
931d4160 | 635 | cpu_to_le32(iwl_bt_ack_kill_msk[BT_KILL_MSK_DEFAULT]); |
03e304e4 | 636 | bt_cmd->kill_cts_msk = |
931d4160 EG |
637 | cpu_to_le32(iwl_bt_cts_kill_msk[BT_KILL_MSK_DEFAULT]); |
638 | ||
2b76ef13 | 639 | memset(&mvm->last_bt_notif, 0, sizeof(mvm->last_bt_notif)); |
dac94da8 | 640 | memset(&mvm->last_bt_ci_cmd, 0, sizeof(mvm->last_bt_ci_cmd)); |
2b76ef13 | 641 | |
03e304e4 | 642 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
931d4160 | 643 | |
03e304e4 EG |
644 | kfree(bt_cmd); |
645 | return ret; | |
931d4160 | 646 | } |
f421f9c3 | 647 | |
2b76ef13 EG |
648 | static int iwl_mvm_bt_udpate_ctrl_kill_msk(struct iwl_mvm *mvm, |
649 | bool reduced_tx_power) | |
650 | { | |
651 | enum iwl_bt_kill_msk bt_kill_msk; | |
03e304e4 | 652 | struct iwl_bt_coex_cmd *bt_cmd; |
2b76ef13 | 653 | struct iwl_bt_coex_profile_notif *notif = &mvm->last_bt_notif; |
03e304e4 EG |
654 | struct iwl_host_cmd cmd = { |
655 | .id = BT_CONFIG, | |
656 | .data[0] = &bt_cmd, | |
657 | .len = { sizeof(*bt_cmd), }, | |
658 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
659 | .flags = CMD_SYNC, | |
660 | }; | |
661 | int ret = 0; | |
2b76ef13 EG |
662 | |
663 | lockdep_assert_held(&mvm->mutex); | |
664 | ||
665 | if (reduced_tx_power) { | |
666 | /* Reduced Tx power has precedence on the type of the profile */ | |
667 | bt_kill_msk = BT_KILL_MSK_REDUCED_TXPOW; | |
668 | } else { | |
669 | /* Low latency BT profile is active: give higher prio to BT */ | |
670 | if (BT_MBOX_MSG(notif, 3, SCO_STATE) || | |
671 | BT_MBOX_MSG(notif, 3, A2DP_STATE) || | |
672 | BT_MBOX_MSG(notif, 3, SNIFF_STATE)) | |
673 | bt_kill_msk = BT_KILL_MSK_SCO_HID_A2DP; | |
674 | else | |
675 | bt_kill_msk = BT_KILL_MSK_DEFAULT; | |
676 | } | |
677 | ||
678 | IWL_DEBUG_COEX(mvm, | |
679 | "Update kill_msk: %d - SCO %sactive A2DP %sactive SNIFF %sactive\n", | |
680 | bt_kill_msk, | |
681 | BT_MBOX_MSG(notif, 3, SCO_STATE) ? "" : "in", | |
682 | BT_MBOX_MSG(notif, 3, A2DP_STATE) ? "" : "in", | |
683 | BT_MBOX_MSG(notif, 3, SNIFF_STATE) ? "" : "in"); | |
684 | ||
685 | /* Don't send HCMD if there is no update */ | |
686 | if (bt_kill_msk == mvm->bt_kill_msk) | |
687 | return 0; | |
688 | ||
689 | mvm->bt_kill_msk = bt_kill_msk; | |
03e304e4 EG |
690 | |
691 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
692 | if (!bt_cmd) | |
693 | return -ENOMEM; | |
694 | cmd.data[0] = bt_cmd; | |
7352cac0 | 695 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW); |
03e304e4 EG |
696 | |
697 | bt_cmd->kill_ack_msk = cpu_to_le32(iwl_bt_ack_kill_msk[bt_kill_msk]); | |
698 | bt_cmd->kill_cts_msk = cpu_to_le32(iwl_bt_cts_kill_msk[bt_kill_msk]); | |
7352cac0 EG |
699 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | |
700 | BT_VALID_KILL_ACK | | |
701 | BT_VALID_KILL_CTS); | |
2b76ef13 | 702 | |
dac94da8 EG |
703 | IWL_DEBUG_COEX(mvm, "ACK Kill msk = 0x%08x, CTS Kill msk = 0x%08x\n", |
704 | iwl_bt_ack_kill_msk[bt_kill_msk], | |
705 | iwl_bt_cts_kill_msk[bt_kill_msk]); | |
03e304e4 EG |
706 | |
707 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
708 | ||
709 | kfree(bt_cmd); | |
710 | return ret; | |
2b76ef13 EG |
711 | } |
712 | ||
32a65c34 | 713 | int iwl_mvm_bt_coex_reduced_txp(struct iwl_mvm *mvm, u8 sta_id, bool enable) |
2b76ef13 | 714 | { |
03e304e4 EG |
715 | struct iwl_bt_coex_cmd *bt_cmd; |
716 | /* Send ASYNC since this can be sent from an atomic context */ | |
717 | struct iwl_host_cmd cmd = { | |
718 | .id = BT_CONFIG, | |
719 | .len = { sizeof(*bt_cmd), }, | |
b9fae2d5 | 720 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, |
03e304e4 | 721 | .flags = CMD_ASYNC, |
2b76ef13 | 722 | }; |
2b76ef13 | 723 | struct iwl_mvm_sta *mvmsta; |
03e304e4 | 724 | int ret; |
2b76ef13 | 725 | |
f327b04c EG |
726 | mvmsta = iwl_mvm_sta_from_staid_protected(mvm, sta_id); |
727 | if (!mvmsta) | |
2b76ef13 EG |
728 | return 0; |
729 | ||
2b76ef13 | 730 | /* nothing to do */ |
32a65c34 EG |
731 | if (mvmsta->bt_reduced_txpower_dbg || |
732 | mvmsta->bt_reduced_txpower == enable) | |
2b76ef13 EG |
733 | return 0; |
734 | ||
03e304e4 EG |
735 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_ATOMIC); |
736 | if (!bt_cmd) | |
737 | return -ENOMEM; | |
738 | cmd.data[0] = bt_cmd; | |
7352cac0 | 739 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW); |
03e304e4 | 740 | |
7352cac0 EG |
741 | bt_cmd->valid_bit_msk = |
742 | cpu_to_le32(BT_VALID_ENABLE | BT_VALID_REDUCED_TX_POWER); | |
03e304e4 EG |
743 | bt_cmd->bt_reduced_tx_power = sta_id; |
744 | ||
2b76ef13 | 745 | if (enable) |
03e304e4 | 746 | bt_cmd->bt_reduced_tx_power |= BT_REDUCED_TX_POWER_BIT; |
2b76ef13 EG |
747 | |
748 | IWL_DEBUG_COEX(mvm, "%sable reduced Tx Power for sta %d\n", | |
749 | enable ? "en" : "dis", sta_id); | |
750 | ||
751 | mvmsta->bt_reduced_txpower = enable; | |
752 | ||
03e304e4 EG |
753 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
754 | ||
755 | kfree(bt_cmd); | |
756 | return ret; | |
2b76ef13 EG |
757 | } |
758 | ||
759 | struct iwl_bt_iterator_data { | |
7da052b8 | 760 | struct iwl_bt_coex_profile_notif *notif; |
2b76ef13 EG |
761 | struct iwl_mvm *mvm; |
762 | u32 num_bss_ifaces; | |
9e511c31 | 763 | bool reduced_tx_power; |
dac94da8 EG |
764 | struct ieee80211_chanctx_conf *primary; |
765 | struct ieee80211_chanctx_conf *secondary; | |
0ee5bcdd | 766 | bool primary_ll; |
7da052b8 EG |
767 | }; |
768 | ||
f6fc5775 EG |
769 | static inline |
770 | void iwl_mvm_bt_coex_enable_rssi_event(struct iwl_mvm *mvm, | |
771 | struct ieee80211_vif *vif, | |
772 | bool enable, int rssi) | |
773 | { | |
774 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
775 | ||
776 | mvmvif->bf_data.last_bt_coex_event = rssi; | |
777 | mvmvif->bf_data.bt_coex_max_thold = | |
778 | enable ? BT_ENABLE_REDUCED_TXPOWER_THRESHOLD : 0; | |
779 | mvmvif->bf_data.bt_coex_min_thold = | |
780 | enable ? BT_DISABLE_REDUCED_TXPOWER_THRESHOLD : 0; | |
781 | } | |
782 | ||
dac94da8 | 783 | /* must be called under rcu_read_lock */ |
7da052b8 EG |
784 | static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac, |
785 | struct ieee80211_vif *vif) | |
786 | { | |
787 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
2b76ef13 EG |
788 | struct iwl_bt_iterator_data *data = _data; |
789 | struct iwl_mvm *mvm = data->mvm; | |
7da052b8 EG |
790 | struct ieee80211_chanctx_conf *chanctx_conf; |
791 | enum ieee80211_smps_mode smps_mode; | |
f6415f6b | 792 | u32 bt_activity_grading; |
2b76ef13 | 793 | int ave_rssi; |
7da052b8 | 794 | |
9ee718aa | 795 | lockdep_assert_held(&mvm->mutex); |
7da052b8 | 796 | |
f6415f6b EG |
797 | switch (vif->type) { |
798 | case NL80211_IFTYPE_STATION: | |
799 | /* default smps_mode for BSS / P2P client is AUTOMATIC */ | |
800 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
801 | data->num_bss_ifaces++; | |
802 | ||
803 | /* | |
804 | * Count unassoc BSSes, relax SMSP constraints | |
805 | * and disable reduced Tx Power | |
806 | */ | |
807 | if (!vif->bss_conf.assoc) { | |
808 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
809 | smps_mode); | |
810 | if (iwl_mvm_bt_coex_reduced_txp(mvm, | |
811 | mvmvif->ap_sta_id, | |
812 | false)) | |
813 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
814 | return; | |
815 | } | |
816 | break; | |
817 | case NL80211_IFTYPE_AP: | |
818 | /* default smps_mode for AP / GO is OFF */ | |
819 | smps_mode = IEEE80211_SMPS_OFF; | |
820 | if (!mvmvif->ap_ibss_active) { | |
821 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
822 | smps_mode); | |
823 | return; | |
824 | } | |
7da052b8 | 825 | |
f6415f6b EG |
826 | /* the Ack / Cts kill mask must be default if AP / GO */ |
827 | data->reduced_tx_power = false; | |
828 | break; | |
829 | default: | |
830 | return; | |
831 | } | |
7da052b8 | 832 | |
dac94da8 EG |
833 | chanctx_conf = rcu_dereference(vif->chanctx_conf); |
834 | ||
835 | /* If channel context is invalid or not on 2.4GHz .. */ | |
836 | if ((!chanctx_conf || | |
837 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ)) { | |
f6415f6b EG |
838 | /* ... relax constraints and disable rssi events */ |
839 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
840 | smps_mode); | |
841 | if (vif->type == NL80211_IFTYPE_STATION) | |
842 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); | |
41069b46 | 843 | return; |
dac94da8 EG |
844 | } |
845 | ||
f6415f6b EG |
846 | bt_activity_grading = le32_to_cpu(data->notif->bt_activity_grading); |
847 | if (bt_activity_grading >= BT_HIGH_TRAFFIC) | |
848 | smps_mode = IEEE80211_SMPS_STATIC; | |
849 | else if (bt_activity_grading >= BT_LOW_TRAFFIC) | |
850 | smps_mode = vif->type == NL80211_IFTYPE_AP ? | |
851 | IEEE80211_SMPS_OFF : | |
852 | IEEE80211_SMPS_DYNAMIC; | |
853 | IWL_DEBUG_COEX(data->mvm, | |
854 | "mac %d: bt_status %d bt_activity_grading %d smps_req %d\n", | |
855 | mvmvif->id, data->notif->bt_status, bt_activity_grading, | |
856 | smps_mode); | |
857 | ||
858 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, smps_mode); | |
859 | ||
0ee5bcdd EG |
860 | /* low latency is always primary */ |
861 | if (iwl_mvm_vif_low_latency(mvmvif)) { | |
862 | data->primary_ll = true; | |
863 | ||
864 | data->secondary = data->primary; | |
865 | data->primary = chanctx_conf; | |
866 | } | |
867 | ||
dac94da8 | 868 | if (vif->type == NL80211_IFTYPE_AP) { |
5023d966 | 869 | if (!mvmvif->ap_ibss_active) |
dac94da8 EG |
870 | return; |
871 | ||
dac94da8 EG |
872 | if (chanctx_conf == data->primary) |
873 | return; | |
874 | ||
0ee5bcdd EG |
875 | if (!data->primary_ll) { |
876 | /* | |
877 | * downgrade the current primary no matter what its | |
878 | * type is. | |
879 | */ | |
880 | data->secondary = data->primary; | |
881 | data->primary = chanctx_conf; | |
882 | } else { | |
883 | /* there is low latency vif - we will be secondary */ | |
884 | data->secondary = chanctx_conf; | |
885 | } | |
9166b1ee EG |
886 | return; |
887 | } | |
888 | ||
0ee5bcdd EG |
889 | /* |
890 | * STA / P2P Client, try to be primary if first vif. If we are in low | |
891 | * latency mode, we are already in primary and just don't do much | |
892 | */ | |
dac94da8 EG |
893 | if (!data->primary || data->primary == chanctx_conf) |
894 | data->primary = chanctx_conf; | |
895 | else if (!data->secondary) | |
896 | /* if secondary is not NULL, it might be a GO */ | |
897 | data->secondary = chanctx_conf; | |
898 | ||
2b76ef13 | 899 | /* don't reduce the Tx power if in loose scheme */ |
39149911 EG |
900 | if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT || |
901 | mvm->cfg->bt_shared_single_ant) { | |
902 | data->reduced_tx_power = false; | |
f6fc5775 | 903 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); |
2b76ef13 | 904 | return; |
39149911 | 905 | } |
2b76ef13 | 906 | |
4515f30f | 907 | /* reduced Txpower only if BT is on, so ...*/ |
0af8835e | 908 | if (!data->notif->bt_status) { |
2b76ef13 EG |
909 | /* ... cancel reduced Tx power ... */ |
910 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false)) | |
911 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
9e511c31 | 912 | data->reduced_tx_power = false; |
2b76ef13 EG |
913 | |
914 | /* ... and there is no need to get reports on RSSI any more. */ | |
f6fc5775 | 915 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); |
2b76ef13 EG |
916 | return; |
917 | } | |
918 | ||
911222b5 AO |
919 | /* try to get the avg rssi from fw */ |
920 | ave_rssi = mvmvif->bf_data.ave_beacon_signal; | |
2b76ef13 EG |
921 | |
922 | /* if the RSSI isn't valid, fake it is very low */ | |
923 | if (!ave_rssi) | |
924 | ave_rssi = -100; | |
925 | if (ave_rssi > BT_ENABLE_REDUCED_TXPOWER_THRESHOLD) { | |
926 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true)) | |
927 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
928 | ||
929 | /* | |
930 | * bt_kill_msk can be BT_KILL_MSK_REDUCED_TXPOW only if all the | |
931 | * BSS / P2P clients have rssi above threshold. | |
932 | * We set the bt_kill_msk to BT_KILL_MSK_REDUCED_TXPOW before | |
933 | * the iteration, if one interface's rssi isn't good enough, | |
934 | * bt_kill_msk will be set to default values. | |
935 | */ | |
936 | } else if (ave_rssi < BT_DISABLE_REDUCED_TXPOWER_THRESHOLD) { | |
937 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false)) | |
938 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
939 | ||
940 | /* | |
941 | * One interface hasn't rssi above threshold, bt_kill_msk must | |
942 | * be set to default values. | |
943 | */ | |
9e511c31 | 944 | data->reduced_tx_power = false; |
2b76ef13 EG |
945 | } |
946 | ||
947 | /* Begin to monitor the RSSI: it may influence the reduced Tx power */ | |
f6fc5775 | 948 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, true, ave_rssi); |
7da052b8 EG |
949 | } |
950 | ||
d37cac98 | 951 | static void iwl_mvm_bt_coex_notif_handle(struct iwl_mvm *mvm) |
f421f9c3 | 952 | { |
2b76ef13 | 953 | struct iwl_bt_iterator_data data = { |
7da052b8 | 954 | .mvm = mvm, |
d37cac98 | 955 | .notif = &mvm->last_bt_notif, |
9e511c31 | 956 | .reduced_tx_power = true, |
7da052b8 | 957 | }; |
dac94da8 EG |
958 | struct iwl_bt_coex_ci_cmd cmd = {}; |
959 | u8 ci_bw_idx; | |
f421f9c3 | 960 | |
dac94da8 | 961 | rcu_read_lock(); |
7da052b8 EG |
962 | ieee80211_iterate_active_interfaces_atomic( |
963 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
964 | iwl_mvm_bt_notif_iterator, &data); | |
965 | ||
dac94da8 EG |
966 | if (data.primary) { |
967 | struct ieee80211_chanctx_conf *chan = data.primary; | |
968 | if (WARN_ON(!chan->def.chan)) { | |
969 | rcu_read_unlock(); | |
970 | return; | |
971 | } | |
972 | ||
973 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
974 | ci_bw_idx = 0; | |
975 | cmd.co_run_bw_primary = 0; | |
976 | } else { | |
977 | cmd.co_run_bw_primary = 1; | |
978 | if (chan->def.center_freq1 > | |
979 | chan->def.chan->center_freq) | |
980 | ci_bw_idx = 2; | |
981 | else | |
982 | ci_bw_idx = 1; | |
983 | } | |
984 | ||
985 | cmd.bt_primary_ci = | |
986 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
987 | cmd.primary_ch_phy_id = *((u16 *)data.primary->drv_priv); | |
988 | } | |
989 | ||
990 | if (data.secondary) { | |
991 | struct ieee80211_chanctx_conf *chan = data.secondary; | |
992 | if (WARN_ON(!data.secondary->def.chan)) { | |
993 | rcu_read_unlock(); | |
994 | return; | |
995 | } | |
996 | ||
997 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
998 | ci_bw_idx = 0; | |
999 | cmd.co_run_bw_secondary = 0; | |
1000 | } else { | |
1001 | cmd.co_run_bw_secondary = 1; | |
1002 | if (chan->def.center_freq1 > | |
1003 | chan->def.chan->center_freq) | |
1004 | ci_bw_idx = 2; | |
1005 | else | |
1006 | ci_bw_idx = 1; | |
1007 | } | |
1008 | ||
1009 | cmd.bt_secondary_ci = | |
1010 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
c92f06a1 | 1011 | cmd.secondary_ch_phy_id = *((u16 *)data.secondary->drv_priv); |
dac94da8 EG |
1012 | } |
1013 | ||
1014 | rcu_read_unlock(); | |
1015 | ||
1016 | /* Don't spam the fw with the same command over and over */ | |
1017 | if (memcmp(&cmd, &mvm->last_bt_ci_cmd, sizeof(cmd))) { | |
1018 | if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_CI, CMD_SYNC, | |
1019 | sizeof(cmd), &cmd)) | |
1020 | IWL_ERR(mvm, "Failed to send BT_CI cmd"); | |
1021 | memcpy(&mvm->last_bt_ci_cmd, &cmd, sizeof(cmd)); | |
1022 | } | |
1023 | ||
2b76ef13 EG |
1024 | /* |
1025 | * If there are no BSS / P2P client interfaces, reduced Tx Power is | |
1026 | * irrelevant since it is based on the RSSI coming from the beacon. | |
1027 | * Use BT_KILL_MSK_DEFAULT in that case. | |
1028 | */ | |
9e511c31 | 1029 | data.reduced_tx_power = data.reduced_tx_power && data.num_bss_ifaces; |
2b76ef13 | 1030 | |
9e511c31 | 1031 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm, data.reduced_tx_power)) |
2b76ef13 | 1032 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
9166b1ee EG |
1033 | } |
1034 | ||
1035 | /* upon association, the fw will send in BT Coex notification */ | |
1036 | int iwl_mvm_rx_bt_coex_notif(struct iwl_mvm *mvm, | |
1037 | struct iwl_rx_cmd_buffer *rxb, | |
1038 | struct iwl_device_cmd *dev_cmd) | |
1039 | { | |
1040 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1041 | struct iwl_bt_coex_profile_notif *notif = (void *)pkt->data; | |
1042 | ||
1043 | ||
1044 | IWL_DEBUG_COEX(mvm, "BT Coex Notification received\n"); | |
dac94da8 EG |
1045 | IWL_DEBUG_COEX(mvm, "\tBT status: %s\n", |
1046 | notif->bt_status ? "ON" : "OFF"); | |
9166b1ee | 1047 | IWL_DEBUG_COEX(mvm, "\tBT open conn %d\n", notif->bt_open_conn); |
dac94da8 EG |
1048 | IWL_DEBUG_COEX(mvm, "\tBT ci compliance %d\n", notif->bt_ci_compliance); |
1049 | IWL_DEBUG_COEX(mvm, "\tBT primary_ch_lut %d\n", | |
1050 | le32_to_cpu(notif->primary_ch_lut)); | |
1051 | IWL_DEBUG_COEX(mvm, "\tBT secondary_ch_lut %d\n", | |
1052 | le32_to_cpu(notif->secondary_ch_lut)); | |
1053 | IWL_DEBUG_COEX(mvm, "\tBT activity grading %d\n", | |
1054 | le32_to_cpu(notif->bt_activity_grading)); | |
9166b1ee EG |
1055 | IWL_DEBUG_COEX(mvm, "\tBT agg traffic load %d\n", |
1056 | notif->bt_agg_traffic_load); | |
9166b1ee | 1057 | |
d37cac98 EG |
1058 | /* remember this notification for future use: rssi fluctuations */ |
1059 | memcpy(&mvm->last_bt_notif, notif, sizeof(mvm->last_bt_notif)); | |
1060 | ||
1061 | iwl_mvm_bt_coex_notif_handle(mvm); | |
2b76ef13 EG |
1062 | |
1063 | /* | |
1064 | * This is an async handler for a notification, returning anything other | |
1065 | * than 0 doesn't make sense even if HCMD failed. | |
1066 | */ | |
1067 | return 0; | |
1068 | } | |
1069 | ||
1070 | static void iwl_mvm_bt_rssi_iterator(void *_data, u8 *mac, | |
1071 | struct ieee80211_vif *vif) | |
1072 | { | |
1073 | struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv; | |
1074 | struct iwl_bt_iterator_data *data = _data; | |
1075 | struct iwl_mvm *mvm = data->mvm; | |
1076 | ||
1077 | struct ieee80211_sta *sta; | |
1078 | struct iwl_mvm_sta *mvmsta; | |
1079 | ||
f6fc5775 EG |
1080 | struct ieee80211_chanctx_conf *chanctx_conf; |
1081 | ||
1082 | rcu_read_lock(); | |
1083 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
1084 | /* If channel context is invalid or not on 2.4GHz - don't count it */ | |
1085 | if (!chanctx_conf || | |
1086 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
1087 | rcu_read_unlock(); | |
1088 | return; | |
1089 | } | |
1090 | rcu_read_unlock(); | |
1091 | ||
2b76ef13 EG |
1092 | if (vif->type != NL80211_IFTYPE_STATION || |
1093 | mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
1094 | return; | |
1095 | ||
1096 | sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[mvmvif->ap_sta_id], | |
1097 | lockdep_is_held(&mvm->mutex)); | |
56c07a9c EG |
1098 | |
1099 | /* This can happen if the station has been removed right now */ | |
1100 | if (IS_ERR_OR_NULL(sta)) | |
1101 | return; | |
1102 | ||
5b577a90 | 1103 | mvmsta = iwl_mvm_sta_from_mac80211(sta); |
2b76ef13 | 1104 | |
8e0366f9 EG |
1105 | data->num_bss_ifaces++; |
1106 | ||
2b76ef13 EG |
1107 | /* |
1108 | * This interface doesn't support reduced Tx power (because of low | |
1109 | * RSSI probably), then set bt_kill_msk to default values. | |
1110 | */ | |
1111 | if (!mvmsta->bt_reduced_txpower) | |
9e511c31 | 1112 | data->reduced_tx_power = false; |
2b76ef13 EG |
1113 | /* else - possibly leave it to BT_KILL_MSK_REDUCED_TXPOW */ |
1114 | } | |
1115 | ||
1116 | void iwl_mvm_bt_rssi_event(struct iwl_mvm *mvm, struct ieee80211_vif *vif, | |
1117 | enum ieee80211_rssi_event rssi_event) | |
1118 | { | |
1119 | struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv; | |
2b76ef13 EG |
1120 | struct iwl_bt_iterator_data data = { |
1121 | .mvm = mvm, | |
9e511c31 | 1122 | .reduced_tx_power = true, |
2b76ef13 EG |
1123 | }; |
1124 | int ret; | |
1125 | ||
3dd1cd2d | 1126 | lockdep_assert_held(&mvm->mutex); |
2b76ef13 EG |
1127 | |
1128 | /* Rssi update while not associated ?! */ | |
1129 | if (WARN_ON_ONCE(mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT)) | |
3dd1cd2d | 1130 | return; |
2b76ef13 | 1131 | |
4515f30f | 1132 | /* No BT - reports should be disabled */ |
0af8835e | 1133 | if (!mvm->last_bt_notif.bt_status) |
3dd1cd2d | 1134 | return; |
2b76ef13 EG |
1135 | |
1136 | IWL_DEBUG_COEX(mvm, "RSSI for %pM is now %s\n", vif->bss_conf.bssid, | |
1137 | rssi_event == RSSI_EVENT_HIGH ? "HIGH" : "LOW"); | |
1138 | ||
1139 | /* | |
1140 | * Check if rssi is good enough for reduced Tx power, but not in loose | |
1141 | * scheme. | |
1142 | */ | |
39149911 | 1143 | if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant || |
4515f30f | 1144 | iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT) |
2b76ef13 EG |
1145 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, |
1146 | false); | |
f421f9c3 | 1147 | else |
2b76ef13 | 1148 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true); |
f421f9c3 | 1149 | |
2b76ef13 EG |
1150 | if (ret) |
1151 | IWL_ERR(mvm, "couldn't send BT_CONFIG HCMD upon RSSI event\n"); | |
f421f9c3 | 1152 | |
2b76ef13 EG |
1153 | ieee80211_iterate_active_interfaces_atomic( |
1154 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
1155 | iwl_mvm_bt_rssi_iterator, &data); | |
f421f9c3 | 1156 | |
2b76ef13 EG |
1157 | /* |
1158 | * If there are no BSS / P2P client interfaces, reduced Tx Power is | |
1159 | * irrelevant since it is based on the RSSI coming from the beacon. | |
1160 | * Use BT_KILL_MSK_DEFAULT in that case. | |
1161 | */ | |
9e511c31 | 1162 | data.reduced_tx_power = data.reduced_tx_power && data.num_bss_ifaces; |
f421f9c3 | 1163 | |
9e511c31 | 1164 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm, data.reduced_tx_power)) |
2b76ef13 | 1165 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
f421f9c3 | 1166 | } |
9166b1ee | 1167 | |
9145d151 EG |
1168 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) |
1169 | #define LINK_QUAL_AGG_TIME_LIMIT_BT_ACT (1200) | |
1170 | ||
1171 | u16 iwl_mvm_bt_coex_agg_time_limit(struct iwl_mvm *mvm, | |
1172 | struct ieee80211_sta *sta) | |
1173 | { | |
5b577a90 | 1174 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
9145d151 EG |
1175 | enum iwl_bt_coex_lut_type lut_type; |
1176 | ||
1177 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < | |
c2119351 | 1178 | BT_HIGH_TRAFFIC) |
9145d151 EG |
1179 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; |
1180 | ||
1181 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); | |
1182 | ||
1183 | if (lut_type == BT_COEX_LOOSE_LUT) | |
1184 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; | |
1185 | ||
1186 | /* tight coex, high bt traffic, reduce AGG time limit */ | |
1187 | return LINK_QUAL_AGG_TIME_LIMIT_BT_ACT; | |
1188 | } | |
1189 | ||
ffa6c707 EG |
1190 | bool iwl_mvm_bt_coex_is_mimo_allowed(struct iwl_mvm *mvm, |
1191 | struct ieee80211_sta *sta) | |
1192 | { | |
5b577a90 | 1193 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
ffa6c707 EG |
1194 | |
1195 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < | |
1196 | BT_HIGH_TRAFFIC) | |
1197 | return true; | |
1198 | ||
1199 | /* | |
1200 | * In Tight, BT can't Rx while we Tx, so use both antennas since BT is | |
1201 | * already killed. | |
1202 | * In Loose, BT can Rx while we Tx, so forbid MIMO to let BT Rx while we | |
1203 | * Tx. | |
1204 | */ | |
1205 | return iwl_get_coex_type(mvm, mvmsta->vif) == BT_COEX_TIGHT_LUT; | |
1206 | } | |
1207 | ||
8e484f0b | 1208 | void iwl_mvm_bt_coex_vif_change(struct iwl_mvm *mvm) |
9166b1ee | 1209 | { |
dac94da8 EG |
1210 | if (!(mvm->fw->ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWBT_COEX)) |
1211 | return; | |
1212 | ||
d37cac98 | 1213 | iwl_mvm_bt_coex_notif_handle(mvm); |
9166b1ee | 1214 | } |
b9fae2d5 EG |
1215 | |
1216 | int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm, | |
1217 | struct iwl_rx_cmd_buffer *rxb, | |
1218 | struct iwl_device_cmd *dev_cmd) | |
1219 | { | |
1220 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1221 | u32 ant_isolation = le32_to_cpup((void *)pkt->data); | |
1222 | u8 __maybe_unused lower_bound, upper_bound; | |
1223 | u8 lut; | |
1224 | ||
1225 | struct iwl_bt_coex_cmd *bt_cmd; | |
1226 | struct iwl_host_cmd cmd = { | |
1227 | .id = BT_CONFIG, | |
1228 | .len = { sizeof(*bt_cmd), }, | |
1229 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
1230 | .flags = CMD_SYNC, | |
1231 | }; | |
1232 | ||
1233 | if (!IWL_MVM_BT_COEX_CORUNNING) | |
1234 | return 0; | |
1235 | ||
1236 | lockdep_assert_held(&mvm->mutex); | |
1237 | ||
1238 | if (ant_isolation == mvm->last_ant_isol) | |
1239 | return 0; | |
1240 | ||
1241 | for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++) | |
1242 | if (ant_isolation < antenna_coupling_ranges[lut + 1].range) | |
1243 | break; | |
1244 | ||
1245 | lower_bound = antenna_coupling_ranges[lut].range; | |
1246 | ||
1247 | if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1) | |
1248 | upper_bound = antenna_coupling_ranges[lut + 1].range; | |
1249 | else | |
1250 | upper_bound = antenna_coupling_ranges[lut].range; | |
1251 | ||
1252 | IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n", | |
1253 | ant_isolation, lower_bound, upper_bound, lut); | |
1254 | ||
1255 | mvm->last_ant_isol = ant_isolation; | |
1256 | ||
1257 | if (mvm->last_corun_lut == lut) | |
1258 | return 0; | |
1259 | ||
1260 | mvm->last_corun_lut = lut; | |
1261 | ||
1262 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
1263 | if (!bt_cmd) | |
1264 | return 0; | |
1265 | cmd.data[0] = bt_cmd; | |
1266 | ||
1267 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW); | |
1268 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | | |
1269 | BT_VALID_CORUN_LUT_20 | | |
1270 | BT_VALID_CORUN_LUT_40); | |
1271 | ||
1272 | /* For the moment, use the same LUT for 20GHz and 40GHz */ | |
1273 | memcpy(bt_cmd->bt4_corun_lut20, antenna_coupling_ranges[lut].lut20, | |
1274 | sizeof(bt_cmd->bt4_corun_lut20)); | |
1275 | ||
1276 | memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[lut].lut20, | |
1277 | sizeof(bt_cmd->bt4_corun_lut40)); | |
1278 | ||
1279 | return 0; | |
1280 | } |