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c85eb619 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. |
c85eb619 EG |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of version 2 of the GNU General Public License as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
22 | * USA | |
23 | * | |
24 | * The full GNU General Public License is included in this distribution | |
410dc5aa | 25 | * in the file called COPYING. |
c85eb619 EG |
26 | * |
27 | * Contact Information: | |
28 | * Intel Linux Wireless <ilw@linux.intel.com> | |
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
30 | * | |
31 | * BSD LICENSE | |
32 | * | |
51368bf7 | 33 | * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. |
c85eb619 EG |
34 | * All rights reserved. |
35 | * | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * | |
40 | * * Redistributions of source code must retain the above copyright | |
41 | * notice, this list of conditions and the following disclaimer. | |
42 | * * Redistributions in binary form must reproduce the above copyright | |
43 | * notice, this list of conditions and the following disclaimer in | |
44 | * the documentation and/or other materials provided with the | |
45 | * distribution. | |
46 | * * Neither the name Intel Corporation nor the names of its | |
47 | * contributors may be used to endorse or promote products derived | |
48 | * from this software without specific prior written permission. | |
49 | * | |
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
61 | * | |
62 | *****************************************************************************/ | |
41c50542 EG |
63 | #ifndef __iwl_trans_h__ |
64 | #define __iwl_trans_h__ | |
253a634c | 65 | |
e679378d | 66 | #include <linux/ieee80211.h> |
930dfd5f | 67 | #include <linux/mm.h> /* for page_address */ |
2bfb5092 | 68 | #include <linux/lockdep.h> |
a72b8b08 | 69 | |
69655ebf | 70 | #include "iwl-debug.h" |
6238b008 JB |
71 | #include "iwl-config.h" |
72 | #include "iwl-fw.h" | |
2a988e98 | 73 | #include "iwl-op-mode.h" |
87e5666c | 74 | |
60396183 EG |
75 | /** |
76 | * DOC: Transport layer - what is it ? | |
77 | * | |
78 | * The tranport layer is the layer that deals with the HW directly. It provides | |
79 | * an abstraction of the underlying HW to the upper layer. The transport layer | |
80 | * doesn't provide any policy, algorithm or anything of this kind, but only | |
81 | * mechanisms to make the HW do something.It is not completely stateless but | |
82 | * close to it. | |
83 | * We will have an implementation for each different supported bus. | |
84 | */ | |
85 | ||
86 | /** | |
87 | * DOC: Life cycle of the transport layer | |
88 | * | |
89 | * The transport layer has a very precise life cycle. | |
90 | * | |
91 | * 1) A helper function is called during the module initialization and | |
92 | * registers the bus driver's ops with the transport's alloc function. | |
93 | * 2) Bus's probe calls to the transport layer's allocation functions. | |
94 | * Of course this function is bus specific. | |
95 | * 3) This allocation functions will spawn the upper layer which will | |
96 | * register mac80211. | |
97 | * | |
98 | * 4) At some point (i.e. mac80211's start call), the op_mode will call | |
99 | * the following sequence: | |
100 | * start_hw | |
101 | * start_fw | |
102 | * | |
103 | * 5) Then when finished (or reset): | |
a4082843 | 104 | * stop_device |
60396183 EG |
105 | * |
106 | * 6) Eventually, the free function will be called. | |
107 | */ | |
108 | ||
60396183 EG |
109 | /** |
110 | * DOC: Host command section | |
111 | * | |
112 | * A host command is a commaned issued by the upper layer to the fw. There are | |
113 | * several versions of fw that have several APIs. The transport layer is | |
114 | * completely agnostic to these differences. | |
115 | * The transport does provide helper functionnality (i.e. SYNC / ASYNC mode), | |
116 | */ | |
f8d7c1a1 JB |
117 | #define SEQ_TO_QUEUE(s) (((s) >> 8) & 0x1f) |
118 | #define QUEUE_TO_SEQ(q) (((q) & 0x1f) << 8) | |
119 | #define SEQ_TO_INDEX(s) ((s) & 0xff) | |
120 | #define INDEX_TO_SEQ(i) ((i) & 0xff) | |
121 | #define SEQ_RX_FRAME cpu_to_le16(0x8000) | |
122 | ||
123 | /** | |
124 | * struct iwl_cmd_header | |
125 | * | |
126 | * This header format appears in the beginning of each command sent from the | |
127 | * driver, and each response/notification received from uCode. | |
128 | */ | |
129 | struct iwl_cmd_header { | |
130 | u8 cmd; /* Command ID: REPLY_RXON, etc. */ | |
131 | u8 flags; /* 0:5 reserved, 6 abort, 7 internal */ | |
132 | /* | |
133 | * The driver sets up the sequence number to values of its choosing. | |
134 | * uCode does not use this value, but passes it back to the driver | |
135 | * when sending the response to each driver-originated command, so | |
136 | * the driver can match the response to the command. Since the values | |
137 | * don't get used by uCode, the driver may set up an arbitrary format. | |
138 | * | |
139 | * There is one exception: uCode sets bit 15 when it originates | |
140 | * the response/notification, i.e. when the response/notification | |
141 | * is not a direct response to a command sent by the driver. For | |
142 | * example, uCode issues REPLY_RX when it sends a received frame | |
143 | * to the driver; it is not a direct response to any driver command. | |
144 | * | |
145 | * The Linux driver uses the following format: | |
146 | * | |
147 | * 0:7 tfd index - position within TX queue | |
148 | * 8:12 TX queue id | |
149 | * 13:14 reserved | |
150 | * 15 unsolicited RX or uCode-originated notification | |
151 | */ | |
152 | __le16 sequence; | |
153 | } __packed; | |
154 | ||
c08ce20c JB |
155 | /* iwl_cmd_header flags value */ |
156 | #define IWL_CMD_FAILED_MSK 0x40 | |
157 | ||
f8d7c1a1 JB |
158 | |
159 | #define FH_RSCSR_FRAME_SIZE_MSK 0x00003FFF /* bits 0-13 */ | |
0c19744c JB |
160 | #define FH_RSCSR_FRAME_INVALID 0x55550000 |
161 | #define FH_RSCSR_FRAME_ALIGN 0x40 | |
f8d7c1a1 JB |
162 | |
163 | struct iwl_rx_packet { | |
164 | /* | |
165 | * The first 4 bytes of the RX frame header contain both the RX frame | |
166 | * size and some flags. | |
167 | * Bit fields: | |
168 | * 31: flag flush RB request | |
169 | * 30: flag ignore TC (terminal counter) request | |
170 | * 29: flag fast IRQ request | |
171 | * 28-14: Reserved | |
172 | * 13-00: RX frame size | |
173 | */ | |
174 | __le32 len_n_flags; | |
175 | struct iwl_cmd_header hdr; | |
176 | u8 data[]; | |
177 | } __packed; | |
522376d2 | 178 | |
65b30348 JB |
179 | static inline u32 iwl_rx_packet_len(const struct iwl_rx_packet *pkt) |
180 | { | |
181 | return le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; | |
182 | } | |
183 | ||
184 | static inline u32 iwl_rx_packet_payload_len(const struct iwl_rx_packet *pkt) | |
185 | { | |
186 | return iwl_rx_packet_len(pkt) - sizeof(pkt->hdr); | |
187 | } | |
188 | ||
60396183 EG |
189 | /** |
190 | * enum CMD_MODE - how to send the host commands ? | |
191 | * | |
192 | * @CMD_SYNC: The caller will be stalled until the fw responds to the command | |
e89044d7 | 193 | * @CMD_ASYNC: Return right away and don't wait for the response |
60396183 | 194 | * @CMD_WANT_SKB: valid only with CMD_SYNC. The caller needs the buffer of the |
96791422 | 195 | * response. The caller needs to call iwl_free_resp when done. |
98ee7783 AN |
196 | * @CMD_HIGH_PRIO: The command is high priority - it goes to the front of the |
197 | * command queue, but after other high priority commands. valid only | |
198 | * with CMD_ASYNC. | |
199 | * @CMD_SEND_IN_IDLE: The command should be sent even when the trans is idle. | |
200 | * @CMD_MAKE_TRANS_IDLE: The command response should mark the trans as idle. | |
201 | * @CMD_WAKE_UP_TRANS: The command response should wake up the trans | |
202 | * (i.e. mark it as non-idle). | |
60396183 EG |
203 | */ |
204 | enum CMD_MODE { | |
4a4ee101 JB |
205 | CMD_SYNC = 0, |
206 | CMD_ASYNC = BIT(0), | |
207 | CMD_WANT_SKB = BIT(1), | |
4f59334b | 208 | CMD_SEND_IN_RFKILL = BIT(2), |
98ee7783 AN |
209 | CMD_HIGH_PRIO = BIT(3), |
210 | CMD_SEND_IN_IDLE = BIT(4), | |
211 | CMD_MAKE_TRANS_IDLE = BIT(5), | |
212 | CMD_WAKE_UP_TRANS = BIT(6), | |
522376d2 EG |
213 | }; |
214 | ||
215 | #define DEF_CMD_PAYLOAD_SIZE 320 | |
216 | ||
217 | /** | |
218 | * struct iwl_device_cmd | |
219 | * | |
220 | * For allocation of the command and tx queues, this establishes the overall | |
221 | * size of the largest command we send to uCode, except for commands that | |
222 | * aren't fully copied and use other TFD space. | |
223 | */ | |
224 | struct iwl_device_cmd { | |
225 | struct iwl_cmd_header hdr; /* uCode API */ | |
132f98c2 | 226 | u8 payload[DEF_CMD_PAYLOAD_SIZE]; |
522376d2 EG |
227 | } __packed; |
228 | ||
229 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) | |
230 | ||
1afbfb60 JB |
231 | /* |
232 | * number of transfer buffers (fragments) per transmit frame descriptor; | |
233 | * this is just the driver's idea, the hardware supports 20 | |
234 | */ | |
235 | #define IWL_MAX_CMD_TBS_PER_TFD 2 | |
522376d2 | 236 | |
60396183 EG |
237 | /** |
238 | * struct iwl_hcmd_dataflag - flag for each one of the chunks of the command | |
239 | * | |
f4feb8ac | 240 | * @IWL_HCMD_DFL_NOCOPY: By default, the command is copied to the host command's |
60396183 | 241 | * ring. The transport layer doesn't map the command's buffer to DMA, but |
e89044d7 | 242 | * rather copies it to a previously allocated DMA buffer. This flag tells |
60396183 | 243 | * the transport layer not to copy the command, but to map the existing |
3e2c1592 JB |
244 | * buffer (that is passed in) instead. This saves the memcpy and allows |
245 | * commands that are bigger than the fixed buffer to be submitted. | |
246 | * Note that a TFD entry after a NOCOPY one cannot be a normal copied one. | |
f4feb8ac JB |
247 | * @IWL_HCMD_DFL_DUP: Only valid without NOCOPY, duplicate the memory for this |
248 | * chunk internally and free it again after the command completes. This | |
249 | * can (currently) be used only once per command. | |
3e2c1592 | 250 | * Note that a TFD entry after a DUP one cannot be a normal copied one. |
60396183 | 251 | */ |
522376d2 EG |
252 | enum iwl_hcmd_dataflag { |
253 | IWL_HCMD_DFL_NOCOPY = BIT(0), | |
f4feb8ac | 254 | IWL_HCMD_DFL_DUP = BIT(1), |
522376d2 EG |
255 | }; |
256 | ||
257 | /** | |
258 | * struct iwl_host_cmd - Host command to the uCode | |
60396183 | 259 | * |
522376d2 | 260 | * @data: array of chunks that composes the data of the host command |
65b94a4a JB |
261 | * @resp_pkt: response packet, if %CMD_WANT_SKB was set |
262 | * @_rx_page_order: (internally used to free response packet) | |
263 | * @_rx_page_addr: (internally used to free response packet) | |
247c61d6 EG |
264 | * @handler_status: return value of the handler of the command |
265 | * (put in setup_rx_handlers) - valid for SYNC mode only | |
60396183 | 266 | * @flags: can be CMD_* |
e89044d7 | 267 | * @len: array of the lengths of the chunks in data |
60396183 | 268 | * @dataflags: IWL_HCMD_DFL_* |
522376d2 EG |
269 | * @id: id of the host command |
270 | */ | |
271 | struct iwl_host_cmd { | |
1afbfb60 | 272 | const void *data[IWL_MAX_CMD_TBS_PER_TFD]; |
65b94a4a JB |
273 | struct iwl_rx_packet *resp_pkt; |
274 | unsigned long _rx_page_addr; | |
275 | u32 _rx_page_order; | |
247c61d6 EG |
276 | int handler_status; |
277 | ||
522376d2 | 278 | u32 flags; |
1afbfb60 JB |
279 | u16 len[IWL_MAX_CMD_TBS_PER_TFD]; |
280 | u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD]; | |
522376d2 EG |
281 | u8 id; |
282 | }; | |
41c50542 | 283 | |
65b94a4a JB |
284 | static inline void iwl_free_resp(struct iwl_host_cmd *cmd) |
285 | { | |
286 | free_pages(cmd->_rx_page_addr, cmd->_rx_page_order); | |
287 | } | |
288 | ||
930dfd5f JB |
289 | struct iwl_rx_cmd_buffer { |
290 | struct page *_page; | |
0c19744c JB |
291 | int _offset; |
292 | bool _page_stolen; | |
d13f1862 | 293 | u32 _rx_page_order; |
ed90542b | 294 | unsigned int truesize; |
930dfd5f JB |
295 | }; |
296 | ||
297 | static inline void *rxb_addr(struct iwl_rx_cmd_buffer *r) | |
298 | { | |
0c19744c JB |
299 | return (void *)((unsigned long)page_address(r->_page) + r->_offset); |
300 | } | |
301 | ||
302 | static inline int rxb_offset(struct iwl_rx_cmd_buffer *r) | |
303 | { | |
304 | return r->_offset; | |
930dfd5f JB |
305 | } |
306 | ||
307 | static inline struct page *rxb_steal_page(struct iwl_rx_cmd_buffer *r) | |
308 | { | |
0c19744c JB |
309 | r->_page_stolen = true; |
310 | get_page(r->_page); | |
311 | return r->_page; | |
930dfd5f JB |
312 | } |
313 | ||
d13f1862 EG |
314 | static inline void iwl_free_rxb(struct iwl_rx_cmd_buffer *r) |
315 | { | |
316 | __free_pages(r->_page, r->_rx_page_order); | |
317 | } | |
318 | ||
d663ee73 JB |
319 | #define MAX_NO_RECLAIM_CMDS 6 |
320 | ||
ff110c8f GG |
321 | #define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) |
322 | ||
9eae88fa JB |
323 | /* |
324 | * Maximum number of HW queues the transport layer | |
325 | * currently supports | |
326 | */ | |
327 | #define IWL_MAX_HW_QUEUES 32 | |
b04db9ac EG |
328 | #define IWL_MAX_TID_COUNT 8 |
329 | #define IWL_FRAME_LIMIT 64 | |
9eae88fa | 330 | |
ddaf5a5b JB |
331 | /** |
332 | * enum iwl_wowlan_status - WoWLAN image/device status | |
333 | * @IWL_D3_STATUS_ALIVE: firmware is still running after resume | |
334 | * @IWL_D3_STATUS_RESET: device was reset while suspended | |
335 | */ | |
336 | enum iwl_d3_status { | |
337 | IWL_D3_STATUS_ALIVE, | |
338 | IWL_D3_STATUS_RESET, | |
339 | }; | |
340 | ||
eb7ff77e AN |
341 | /** |
342 | * enum iwl_trans_status: transport status flags | |
343 | * @STATUS_SYNC_HCMD_ACTIVE: a SYNC command is being processed | |
344 | * @STATUS_DEVICE_ENABLED: APM is enabled | |
345 | * @STATUS_TPOWER_PMI: the device might be asleep (need to wake it up) | |
346 | * @STATUS_INT_ENABLED: interrupts are enabled | |
347 | * @STATUS_RFKILL: the HW RFkill switch is in KILL position | |
348 | * @STATUS_FW_ERROR: the fw is in error state | |
98ee7783 AN |
349 | * @STATUS_TRANS_GOING_IDLE: shutting down the trans, only special commands |
350 | * are sent | |
351 | * @STATUS_TRANS_IDLE: the trans is idle - general commands are not to be sent | |
eb7ff77e AN |
352 | */ |
353 | enum iwl_trans_status { | |
354 | STATUS_SYNC_HCMD_ACTIVE, | |
355 | STATUS_DEVICE_ENABLED, | |
356 | STATUS_TPOWER_PMI, | |
357 | STATUS_INT_ENABLED, | |
358 | STATUS_RFKILL, | |
359 | STATUS_FW_ERROR, | |
98ee7783 AN |
360 | STATUS_TRANS_GOING_IDLE, |
361 | STATUS_TRANS_IDLE, | |
eb7ff77e AN |
362 | }; |
363 | ||
92d743ae MV |
364 | /** |
365 | * struct iwl_trans_config - transport configuration | |
366 | * | |
367 | * @op_mode: pointer to the upper layer. | |
c6f600fc MV |
368 | * @cmd_queue: the index of the command queue. |
369 | * Must be set before start_fw. | |
b04db9ac | 370 | * @cmd_fifo: the fifo for host commands |
d663ee73 JB |
371 | * @no_reclaim_cmds: Some devices erroneously don't set the |
372 | * SEQ_RX_FRAME bit on some notifications, this is the | |
373 | * list of such notifications to filter. Max length is | |
374 | * %MAX_NO_RECLAIM_CMDS. | |
375 | * @n_no_reclaim_cmds: # of commands in list | |
b2cf410c JB |
376 | * @rx_buf_size_8k: 8 kB RX buffer size needed for A-MSDUs, |
377 | * if unset 4k will be the RX buffer size | |
046db346 EG |
378 | * @bc_table_dword: set to true if the BC table expects the byte count to be |
379 | * in DWORD (as opposed to bytes) | |
7c5ba4a8 JB |
380 | * @queue_watchdog_timeout: time (in ms) after which queues |
381 | * are considered stuck and will trigger device restart | |
d9fb6465 JB |
382 | * @command_names: array of command names, must be 256 entries |
383 | * (one for each command); for debugging only | |
92d743ae MV |
384 | */ |
385 | struct iwl_trans_config { | |
386 | struct iwl_op_mode *op_mode; | |
9eae88fa | 387 | |
c6f600fc | 388 | u8 cmd_queue; |
b04db9ac | 389 | u8 cmd_fifo; |
d663ee73 | 390 | const u8 *no_reclaim_cmds; |
84cf0e62 | 391 | unsigned int n_no_reclaim_cmds; |
b2cf410c JB |
392 | |
393 | bool rx_buf_size_8k; | |
046db346 | 394 | bool bc_table_dword; |
7c5ba4a8 | 395 | unsigned int queue_watchdog_timeout; |
e5209263 | 396 | const char *const *command_names; |
92d743ae MV |
397 | }; |
398 | ||
87ce05a2 EG |
399 | struct iwl_trans; |
400 | ||
41c50542 EG |
401 | /** |
402 | * struct iwl_trans_ops - transport specific operations | |
60396183 EG |
403 | * |
404 | * All the handlers MUST be implemented | |
405 | * | |
57a1dc89 | 406 | * @start_hw: starts the HW- from that point on, the HW can send interrupts |
60396183 | 407 | * May sleep |
a4082843 | 408 | * @op_mode_leave: Turn off the HW RF kill indication if on |
60396183 | 409 | * May sleep |
cf614297 | 410 | * @start_fw: allocates and inits all the resources for the transport |
60396183 EG |
411 | * layer. Also kick a fw image. |
412 | * May sleep | |
adca1235 EG |
413 | * @fw_alive: called when the fw sends alive notification. If the fw provides |
414 | * the SCD base address in SRAM, then provide it here, or 0 otherwise. | |
60396183 | 415 | * May sleep |
a4082843 AN |
416 | * @stop_device: stops the whole device (embedded CPU put to reset) and stops |
417 | * the HW. From that point on, the HW will be in low power but will still | |
418 | * issue interrupt if the HW RF kill is triggered. This callback must do | |
419 | * the right thing and not crash even if start_hw() was called but not | |
420 | * start_fw(). May sleep | |
ddaf5a5b | 421 | * @d3_suspend: put the device into the correct mode for WoWLAN during |
2dd4f9f7 JB |
422 | * suspend. This is optional, if not implemented WoWLAN will not be |
423 | * supported. This callback may sleep. | |
ddaf5a5b JB |
424 | * @d3_resume: resume the device after WoWLAN, enabling the opmode to |
425 | * talk to the WoWLAN image to get its status. This is optional, if not | |
426 | * implemented WoWLAN will not be supported. This callback may sleep. | |
f946b529 EG |
427 | * @send_cmd:send a host command. Must return -ERFKILL if RFkill is asserted. |
428 | * If RFkill is asserted in the middle of a SYNC host command, it must | |
429 | * return -ERFKILL straight away. | |
60396183 | 430 | * May sleep only if CMD_SYNC is set |
41c50542 | 431 | * @tx: send an skb |
60396183 | 432 | * Must be atomic |
a0eaad71 | 433 | * @reclaim: free packet until ssn. Returns a list of freed packets. |
60396183 | 434 | * Must be atomic |
b04db9ac EG |
435 | * @txq_enable: setup a queue. To setup an AC queue, use the |
436 | * iwl_trans_ac_txq_enable wrapper. fw_alive must have been called before | |
437 | * this one. The op_mode must not configure the HCMD queue. May sleep. | |
d0624be6 | 438 | * @txq_disable: de-configure a Tx queue to send AMPDUs |
b0b46192 | 439 | * Must be atomic |
5f178cd2 | 440 | * @wait_tx_queue_empty: wait until all tx queues are empty |
60396183 | 441 | * May sleep |
87e5666c EG |
442 | * @dbgfs_register: add the dbgfs files under this directory. Files will be |
443 | * automatically deleted. | |
03905495 EG |
444 | * @write8: write a u8 to a register at offset ofs from the BAR |
445 | * @write32: write a u32 to a register at offset ofs from the BAR | |
446 | * @read32: read a u32 register at offset ofs from the BAR | |
6a06b6c1 EG |
447 | * @read_prph: read a DWORD from a periphery register |
448 | * @write_prph: write a DWORD to a periphery register | |
4fd442db | 449 | * @read_mem: read device's SRAM in DWORD |
01387ffd EG |
450 | * @write_mem: write device's SRAM in DWORD. If %buf is %NULL, then the memory |
451 | * will be zeroed. | |
c6f600fc | 452 | * @configure: configure parameters required by the transport layer from |
3dc420be EG |
453 | * the op_mode. May be called several times before start_fw, can't be |
454 | * called after that. | |
47107e84 | 455 | * @set_pmi: set the power pmi state |
e56b04ef LE |
456 | * @grab_nic_access: wake the NIC to be able to access non-HBUS regs. |
457 | * Sleeping is not allowed between grab_nic_access and | |
458 | * release_nic_access. | |
459 | * @release_nic_access: let the NIC go to sleep. The "flags" parameter | |
460 | * must be the same one that was sent before to the grab_nic_access. | |
e139dc4a | 461 | * @set_bits_mask - set SRAM register according to value and mask. |
440c411d EP |
462 | * @ref: grab a reference to the transport/FW layers, disallowing |
463 | * certain low power states | |
464 | * @unref: release a reference previously taken with @ref. Note that | |
465 | * initially the reference count is 1, making an initial @unref | |
466 | * necessary to allow low power states. | |
41c50542 EG |
467 | */ |
468 | struct iwl_trans_ops { | |
469 | ||
57a1dc89 | 470 | int (*start_hw)(struct iwl_trans *iwl_trans); |
a4082843 | 471 | void (*op_mode_leave)(struct iwl_trans *iwl_trans); |
6ae02f3e EG |
472 | int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw, |
473 | bool run_in_rfkill); | |
adca1235 | 474 | void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr); |
6d8f6eeb | 475 | void (*stop_device)(struct iwl_trans *trans); |
41c50542 | 476 | |
debff618 JB |
477 | void (*d3_suspend)(struct iwl_trans *trans, bool test); |
478 | int (*d3_resume)(struct iwl_trans *trans, enum iwl_d3_status *status, | |
479 | bool test); | |
2dd4f9f7 | 480 | |
6d8f6eeb | 481 | int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd); |
41c50542 | 482 | |
e13c0c59 | 483 | int (*tx)(struct iwl_trans *trans, struct sk_buff *skb, |
9eae88fa JB |
484 | struct iwl_device_cmd *dev_cmd, int queue); |
485 | void (*reclaim)(struct iwl_trans *trans, int queue, int ssn, | |
486 | struct sk_buff_head *skbs); | |
487 | ||
4beaf6c2 EG |
488 | void (*txq_enable)(struct iwl_trans *trans, int queue, int fifo, |
489 | int sta_id, int tid, int frame_limit, u16 ssn); | |
d0624be6 | 490 | void (*txq_disable)(struct iwl_trans *trans, int queue); |
41c50542 | 491 | |
87e5666c | 492 | int (*dbgfs_register)(struct iwl_trans *trans, struct dentry* dir); |
5f178cd2 | 493 | int (*wait_tx_queue_empty)(struct iwl_trans *trans); |
5fdda047 | 494 | |
03905495 EG |
495 | void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val); |
496 | void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val); | |
497 | u32 (*read32)(struct iwl_trans *trans, u32 ofs); | |
6a06b6c1 EG |
498 | u32 (*read_prph)(struct iwl_trans *trans, u32 ofs); |
499 | void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val); | |
4fd442db EG |
500 | int (*read_mem)(struct iwl_trans *trans, u32 addr, |
501 | void *buf, int dwords); | |
502 | int (*write_mem)(struct iwl_trans *trans, u32 addr, | |
bf0fd5da | 503 | const void *buf, int dwords); |
c6f600fc MV |
504 | void (*configure)(struct iwl_trans *trans, |
505 | const struct iwl_trans_config *trans_cfg); | |
47107e84 | 506 | void (*set_pmi)(struct iwl_trans *trans, bool state); |
e56b04ef LE |
507 | bool (*grab_nic_access)(struct iwl_trans *trans, bool silent, |
508 | unsigned long *flags); | |
509 | void (*release_nic_access)(struct iwl_trans *trans, | |
510 | unsigned long *flags); | |
e139dc4a LE |
511 | void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask, |
512 | u32 value); | |
440c411d EP |
513 | void (*ref)(struct iwl_trans *trans); |
514 | void (*unref)(struct iwl_trans *trans); | |
41c50542 EG |
515 | }; |
516 | ||
69655ebf EG |
517 | /** |
518 | * enum iwl_trans_state - state of the transport layer | |
519 | * | |
520 | * @IWL_TRANS_NO_FW: no fw has sent an alive response | |
521 | * @IWL_TRANS_FW_ALIVE: a fw has sent an alive response | |
522 | */ | |
523 | enum iwl_trans_state { | |
524 | IWL_TRANS_NO_FW = 0, | |
525 | IWL_TRANS_FW_ALIVE = 1, | |
526 | }; | |
527 | ||
6fbfae8e EG |
528 | /** |
529 | * struct iwl_trans - transport common data | |
60396183 | 530 | * |
6fbfae8e | 531 | * @ops - pointer to iwl_trans_ops |
ed277c93 | 532 | * @op_mode - pointer to the op_mode |
035f7ff2 | 533 | * @cfg - pointer to the configuration |
eb7ff77e | 534 | * @status: a bit-mask of transport status flags |
a42a1844 | 535 | * @dev - pointer to struct device * that represents the device |
99673ee5 | 536 | * @hw_id: a u32 with the ID of the device / subdevice. |
60396183 | 537 | * Set during transport allocation. |
9ca85961 | 538 | * @hw_id_str: a string with info about HW ID. Set during transport allocation. |
f6d0e9be | 539 | * @pm_support: set to true in start_hw if link pm is supported |
59c647b6 EG |
540 | * @dev_cmd_pool: pool for Tx cmd allocation - for internal use only. |
541 | * The user should use iwl_trans_{alloc,free}_tx_cmd. | |
542 | * @dev_cmd_headroom: room needed for the transport's private use before the | |
543 | * device_cmd for Tx - for internal use only | |
544 | * The user should use iwl_trans_{alloc,free}_tx_cmd. | |
f042c2eb JB |
545 | * @rx_mpdu_cmd: MPDU RX command ID, must be assigned by opmode before |
546 | * starting the firmware, used for tracing | |
547 | * @rx_mpdu_cmd_hdr_size: used for tracing, amount of data before the | |
548 | * start of the 802.11 header in the @rx_mpdu_cmd | |
bcb079a1 | 549 | * @dflt_pwr_limit: default power limit fetched from the platform (ACPI) |
6fbfae8e | 550 | */ |
41c50542 EG |
551 | struct iwl_trans { |
552 | const struct iwl_trans_ops *ops; | |
ed277c93 | 553 | struct iwl_op_mode *op_mode; |
035f7ff2 | 554 | const struct iwl_cfg *cfg; |
69655ebf | 555 | enum iwl_trans_state state; |
eb7ff77e | 556 | unsigned long status; |
e6bb4c9c | 557 | |
a42a1844 | 558 | struct device *dev; |
08079a49 | 559 | u32 hw_rev; |
99673ee5 | 560 | u32 hw_id; |
9ca85961 | 561 | char hw_id_str[52]; |
a42a1844 | 562 | |
f042c2eb JB |
563 | u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size; |
564 | ||
f6d0e9be | 565 | bool pm_support; |
97b52cfd | 566 | |
59c647b6 EG |
567 | /* The following fields are internal only */ |
568 | struct kmem_cache *dev_cmd_pool; | |
569 | size_t dev_cmd_headroom; | |
3ec45882 | 570 | char dev_cmd_pool_name[50]; |
59c647b6 | 571 | |
9da987ac MV |
572 | struct dentry *dbgfs_dir; |
573 | ||
2bfb5092 JB |
574 | #ifdef CONFIG_LOCKDEP |
575 | struct lockdep_map sync_cmd_lockdep_map; | |
576 | #endif | |
577 | ||
bcb079a1 IY |
578 | u64 dflt_pwr_limit; |
579 | ||
e6bb4c9c EG |
580 | /* pointer to trans specific struct */ |
581 | /*Ensure that this pointer will always be aligned to sizeof pointer */ | |
cbe6ab4e | 582 | char trans_specific[0] __aligned(sizeof(void *)); |
41c50542 EG |
583 | }; |
584 | ||
ed277c93 | 585 | static inline void iwl_trans_configure(struct iwl_trans *trans, |
92d743ae | 586 | const struct iwl_trans_config *trans_cfg) |
ed277c93 | 587 | { |
92d743ae | 588 | trans->op_mode = trans_cfg->op_mode; |
c6f600fc MV |
589 | |
590 | trans->ops->configure(trans, trans_cfg); | |
ed277c93 EG |
591 | } |
592 | ||
57a1dc89 | 593 | static inline int iwl_trans_start_hw(struct iwl_trans *trans) |
e6bb4c9c | 594 | { |
60396183 EG |
595 | might_sleep(); |
596 | ||
57a1dc89 | 597 | return trans->ops->start_hw(trans); |
e6bb4c9c EG |
598 | } |
599 | ||
a4082843 | 600 | static inline void iwl_trans_op_mode_leave(struct iwl_trans *trans) |
cc56feb2 | 601 | { |
60396183 EG |
602 | might_sleep(); |
603 | ||
a4082843 AN |
604 | if (trans->ops->op_mode_leave) |
605 | trans->ops->op_mode_leave(trans); | |
69655ebf | 606 | |
a4082843 | 607 | trans->op_mode = NULL; |
b4991f3f | 608 | |
69655ebf | 609 | trans->state = IWL_TRANS_NO_FW; |
cc56feb2 EG |
610 | } |
611 | ||
adca1235 | 612 | static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr) |
ed6a3803 | 613 | { |
60396183 EG |
614 | might_sleep(); |
615 | ||
69655ebf | 616 | trans->state = IWL_TRANS_FW_ALIVE; |
b04db9ac | 617 | |
adca1235 | 618 | trans->ops->fw_alive(trans, scd_addr); |
ed6a3803 EG |
619 | } |
620 | ||
0692fe41 | 621 | static inline int iwl_trans_start_fw(struct iwl_trans *trans, |
6ae02f3e EG |
622 | const struct fw_img *fw, |
623 | bool run_in_rfkill) | |
bdfbf092 | 624 | { |
cf614297 EG |
625 | might_sleep(); |
626 | ||
f042c2eb JB |
627 | WARN_ON_ONCE(!trans->rx_mpdu_cmd); |
628 | ||
efbf6e3b | 629 | clear_bit(STATUS_FW_ERROR, &trans->status); |
6ae02f3e | 630 | return trans->ops->start_fw(trans, fw, run_in_rfkill); |
bdfbf092 EG |
631 | } |
632 | ||
e6bb4c9c | 633 | static inline void iwl_trans_stop_device(struct iwl_trans *trans) |
bdfbf092 | 634 | { |
60396183 EG |
635 | might_sleep(); |
636 | ||
6d8f6eeb | 637 | trans->ops->stop_device(trans); |
69655ebf EG |
638 | |
639 | trans->state = IWL_TRANS_NO_FW; | |
bdfbf092 EG |
640 | } |
641 | ||
debff618 | 642 | static inline void iwl_trans_d3_suspend(struct iwl_trans *trans, bool test) |
ddaf5a5b JB |
643 | { |
644 | might_sleep(); | |
debff618 | 645 | trans->ops->d3_suspend(trans, test); |
ddaf5a5b JB |
646 | } |
647 | ||
648 | static inline int iwl_trans_d3_resume(struct iwl_trans *trans, | |
debff618 JB |
649 | enum iwl_d3_status *status, |
650 | bool test) | |
2dd4f9f7 JB |
651 | { |
652 | might_sleep(); | |
debff618 | 653 | return trans->ops->d3_resume(trans, status, test); |
2dd4f9f7 JB |
654 | } |
655 | ||
440c411d EP |
656 | static inline void iwl_trans_ref(struct iwl_trans *trans) |
657 | { | |
658 | if (trans->ops->ref) | |
659 | trans->ops->ref(trans); | |
660 | } | |
661 | ||
662 | static inline void iwl_trans_unref(struct iwl_trans *trans) | |
663 | { | |
664 | if (trans->ops->unref) | |
665 | trans->ops->unref(trans); | |
666 | } | |
667 | ||
e6bb4c9c | 668 | static inline int iwl_trans_send_cmd(struct iwl_trans *trans, |
2bfb5092 | 669 | struct iwl_host_cmd *cmd) |
bdfbf092 | 670 | { |
2bfb5092 JB |
671 | int ret; |
672 | ||
fba1c627 EG |
673 | if (unlikely(!(cmd->flags & CMD_SEND_IN_RFKILL) && |
674 | test_bit(STATUS_RFKILL, &trans->status))) | |
675 | return -ERFKILL; | |
676 | ||
3fc07953 AN |
677 | if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status))) |
678 | return -EIO; | |
679 | ||
f39a52bf | 680 | if (unlikely(trans->state != IWL_TRANS_FW_ALIVE)) { |
8ca95995 EG |
681 | IWL_ERR(trans, "%s bad state = %d", __func__, trans->state); |
682 | return -EIO; | |
683 | } | |
69655ebf | 684 | |
2bfb5092 JB |
685 | if (!(cmd->flags & CMD_ASYNC)) |
686 | lock_map_acquire_read(&trans->sync_cmd_lockdep_map); | |
687 | ||
688 | ret = trans->ops->send_cmd(trans, cmd); | |
689 | ||
690 | if (!(cmd->flags & CMD_ASYNC)) | |
691 | lock_map_release(&trans->sync_cmd_lockdep_map); | |
692 | ||
693 | return ret; | |
bdfbf092 EG |
694 | } |
695 | ||
59c647b6 EG |
696 | static inline struct iwl_device_cmd * |
697 | iwl_trans_alloc_tx_cmd(struct iwl_trans *trans) | |
698 | { | |
699 | u8 *dev_cmd_ptr = kmem_cache_alloc(trans->dev_cmd_pool, GFP_ATOMIC); | |
700 | ||
701 | if (unlikely(dev_cmd_ptr == NULL)) | |
702 | return NULL; | |
703 | ||
704 | return (struct iwl_device_cmd *) | |
705 | (dev_cmd_ptr + trans->dev_cmd_headroom); | |
706 | } | |
707 | ||
708 | static inline void iwl_trans_free_tx_cmd(struct iwl_trans *trans, | |
709 | struct iwl_device_cmd *dev_cmd) | |
710 | { | |
711 | u8 *dev_cmd_ptr = (u8 *)dev_cmd - trans->dev_cmd_headroom; | |
712 | ||
713 | kmem_cache_free(trans->dev_cmd_pool, dev_cmd_ptr); | |
714 | } | |
715 | ||
e6bb4c9c | 716 | static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb, |
9eae88fa | 717 | struct iwl_device_cmd *dev_cmd, int queue) |
a0eaad71 | 718 | { |
3fc07953 AN |
719 | if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status))) |
720 | return -EIO; | |
721 | ||
f39a52bf SG |
722 | if (unlikely(trans->state != IWL_TRANS_FW_ALIVE)) |
723 | IWL_ERR(trans, "%s bad state = %d", __func__, trans->state); | |
69655ebf | 724 | |
9eae88fa | 725 | return trans->ops->tx(trans, skb, dev_cmd, queue); |
a0eaad71 EG |
726 | } |
727 | ||
9eae88fa JB |
728 | static inline void iwl_trans_reclaim(struct iwl_trans *trans, int queue, |
729 | int ssn, struct sk_buff_head *skbs) | |
48d42c42 | 730 | { |
f39a52bf SG |
731 | if (unlikely(trans->state != IWL_TRANS_FW_ALIVE)) |
732 | IWL_ERR(trans, "%s bad state = %d", __func__, trans->state); | |
69655ebf | 733 | |
9eae88fa | 734 | trans->ops->reclaim(trans, queue, ssn, skbs); |
48d42c42 EG |
735 | } |
736 | ||
d0624be6 | 737 | static inline void iwl_trans_txq_disable(struct iwl_trans *trans, int queue) |
288712a6 | 738 | { |
d0624be6 | 739 | trans->ops->txq_disable(trans, queue); |
288712a6 EG |
740 | } |
741 | ||
4beaf6c2 EG |
742 | static inline void iwl_trans_txq_enable(struct iwl_trans *trans, int queue, |
743 | int fifo, int sta_id, int tid, | |
744 | int frame_limit, u16 ssn) | |
48d42c42 | 745 | { |
60396183 EG |
746 | might_sleep(); |
747 | ||
f39a52bf SG |
748 | if (unlikely((trans->state != IWL_TRANS_FW_ALIVE))) |
749 | IWL_ERR(trans, "%s bad state = %d", __func__, trans->state); | |
69655ebf | 750 | |
4beaf6c2 | 751 | trans->ops->txq_enable(trans, queue, fifo, sta_id, tid, |
9eae88fa | 752 | frame_limit, ssn); |
48d42c42 EG |
753 | } |
754 | ||
b04db9ac EG |
755 | static inline void iwl_trans_ac_txq_enable(struct iwl_trans *trans, int queue, |
756 | int fifo) | |
757 | { | |
881acd89 | 758 | iwl_trans_txq_enable(trans, queue, fifo, -1, |
b04db9ac EG |
759 | IWL_MAX_TID_COUNT, IWL_FRAME_LIMIT, 0); |
760 | } | |
761 | ||
5f178cd2 EG |
762 | static inline int iwl_trans_wait_tx_queue_empty(struct iwl_trans *trans) |
763 | { | |
f39a52bf SG |
764 | if (unlikely(trans->state != IWL_TRANS_FW_ALIVE)) |
765 | IWL_ERR(trans, "%s bad state = %d", __func__, trans->state); | |
69655ebf | 766 | |
5f178cd2 EG |
767 | return trans->ops->wait_tx_queue_empty(trans); |
768 | } | |
769 | ||
87e5666c | 770 | static inline int iwl_trans_dbgfs_register(struct iwl_trans *trans, |
4fd442db | 771 | struct dentry *dir) |
87e5666c EG |
772 | { |
773 | return trans->ops->dbgfs_register(trans, dir); | |
774 | } | |
775 | ||
03905495 EG |
776 | static inline void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val) |
777 | { | |
778 | trans->ops->write8(trans, ofs, val); | |
779 | } | |
780 | ||
781 | static inline void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val) | |
782 | { | |
783 | trans->ops->write32(trans, ofs, val); | |
784 | } | |
785 | ||
786 | static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs) | |
787 | { | |
788 | return trans->ops->read32(trans, ofs); | |
789 | } | |
790 | ||
6a06b6c1 EG |
791 | static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs) |
792 | { | |
793 | return trans->ops->read_prph(trans, ofs); | |
794 | } | |
795 | ||
796 | static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, | |
797 | u32 val) | |
798 | { | |
799 | return trans->ops->write_prph(trans, ofs, val); | |
800 | } | |
801 | ||
4fd442db EG |
802 | static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr, |
803 | void *buf, int dwords) | |
804 | { | |
805 | return trans->ops->read_mem(trans, addr, buf, dwords); | |
806 | } | |
807 | ||
808 | #define iwl_trans_read_mem_bytes(trans, addr, buf, bufsize) \ | |
809 | do { \ | |
810 | if (__builtin_constant_p(bufsize)) \ | |
811 | BUILD_BUG_ON((bufsize) % sizeof(u32)); \ | |
812 | iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\ | |
813 | } while (0) | |
814 | ||
815 | static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr) | |
816 | { | |
817 | u32 value; | |
818 | ||
819 | if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1))) | |
820 | return 0xa5a5a5a5; | |
821 | ||
822 | return value; | |
823 | } | |
824 | ||
825 | static inline int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr, | |
bf0fd5da | 826 | const void *buf, int dwords) |
4fd442db EG |
827 | { |
828 | return trans->ops->write_mem(trans, addr, buf, dwords); | |
829 | } | |
830 | ||
831 | static inline u32 iwl_trans_write_mem32(struct iwl_trans *trans, u32 addr, | |
832 | u32 val) | |
833 | { | |
834 | return iwl_trans_write_mem(trans, addr, &val, 1); | |
835 | } | |
836 | ||
47107e84 DF |
837 | static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state) |
838 | { | |
128cb89e AN |
839 | if (trans->ops->set_pmi) |
840 | trans->ops->set_pmi(trans, state); | |
47107e84 DF |
841 | } |
842 | ||
e139dc4a LE |
843 | static inline void |
844 | iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value) | |
845 | { | |
846 | trans->ops->set_bits_mask(trans, reg, mask, value); | |
847 | } | |
848 | ||
e56b04ef | 849 | #define iwl_trans_grab_nic_access(trans, silent, flags) \ |
abae2386 | 850 | __cond_lock(nic_access, \ |
e56b04ef | 851 | likely((trans)->ops->grab_nic_access(trans, silent, flags))) |
7a65d170 | 852 | |
abae2386 | 853 | static inline void __releases(nic_access) |
e56b04ef | 854 | iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags) |
7a65d170 | 855 | { |
e56b04ef | 856 | trans->ops->release_nic_access(trans, flags); |
abae2386 | 857 | __release(nic_access); |
7a65d170 EG |
858 | } |
859 | ||
2a988e98 AN |
860 | static inline void iwl_trans_fw_error(struct iwl_trans *trans) |
861 | { | |
862 | if (WARN_ON_ONCE(!trans->op_mode)) | |
863 | return; | |
864 | ||
865 | /* prevent double restarts due to the same erroneous FW */ | |
866 | if (!test_and_set_bit(STATUS_FW_ERROR, &trans->status)) | |
867 | iwl_op_mode_nic_error(trans->op_mode); | |
868 | } | |
869 | ||
b52e7ea1 | 870 | /***************************************************** |
d1ff5253 | 871 | * driver (transport) register/unregister functions |
b52e7ea1 | 872 | ******************************************************/ |
36a79223 EG |
873 | int __must_check iwl_pci_register_driver(void); |
874 | void iwl_pci_unregister_driver(void); | |
b52e7ea1 | 875 | |
2bfb5092 JB |
876 | static inline void trans_lockdep_init(struct iwl_trans *trans) |
877 | { | |
878 | #ifdef CONFIG_LOCKDEP | |
879 | static struct lock_class_key __key; | |
880 | ||
881 | lockdep_init_map(&trans->sync_cmd_lockdep_map, "sync_cmd_lockdep_map", | |
882 | &__key, 0); | |
883 | #endif | |
884 | } | |
885 | ||
41c50542 | 886 | #endif /* __iwl_trans_h__ */ |