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iwlwifi: memory allocation optimization
[linux-2.6-block.git] / drivers / net / wireless / iwlwifi / iwl-rx.c
CommitLineData
a55360e4
TW		 1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
1781a07f 30#include <linux/etherdevice.h>
a55360e4 31#include <net/mac80211.h>
a05ffd39 32#include <asm/unaligned.h>
a55360e4
TW		 33#include "iwl-eeprom.h"
34#include "iwl-dev.h"
35#include "iwl-core.h"
36#include "iwl-sta.h"
37#include "iwl-io.h"
c1354754 38#include "iwl-calib.h"
a55360e4
TW		 39#include "iwl-helpers.h"
40/************************** RX-FUNCTIONS ****************************/
41/*
42 * Rx theory of operation
43 *
44 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45 * each of which point to Receive Buffers to be filled by the NIC. These get
46 * used not only for Rx frames, but for any command response or notification
47 * from the NIC. The driver and NIC manage the Rx buffers by means
48 * of indexes into the circular buffer.
49 *
50 * Rx Queue Indexes
51 * The host/firmware share two index registers for managing the Rx buffers.
52 *
53 * The READ index maps to the first position that the firmware may be writing
54 * to -- the driver can read up to (but not including) this position and get
55 * good data.
56 * The READ index is managed by the firmware once the card is enabled.
57 *
58 * The WRITE index maps to the last position the driver has read from -- the
59 * position preceding WRITE is the last slot the firmware can place a packet.
60 *
61 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
62 * WRITE = READ.
63 *
64 * During initialization, the host sets up the READ queue position to the first
65 * INDEX position, and WRITE to the last (READ - 1 wrapped)
66 *
67 * When the firmware places a packet in a buffer, it will advance the READ index
68 * and fire the RX interrupt. The driver can then query the READ index and
69 * process as many packets as possible, moving the WRITE index forward as it
70 * resets the Rx queue buffers with new memory.
71 *
72 * The management in the driver is as follows:
73 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
74 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75 * to replenish the iwl->rxq->rx_free.
76 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77 * iwl->rxq is replenished and the READ INDEX is updated (updating the
78 * 'processed' and 'read' driver indexes as well)
79 * + A received packet is processed and handed to the kernel network stack,
80 * detached from the iwl->rxq. The driver 'processed' index is updated.
81 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
84 * were enough free buffers and RX_STALLED is set it is cleared.
85 *
86 *
87 * Driver sequence:
88 *
89 * iwl_rx_queue_alloc() Allocates rx_free
90 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
91 * iwl_rx_queue_restock
92 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93 * queue, updates firmware pointers, and updates
94 * the WRITE index. If insufficient rx_free buffers
95 * are available, schedules iwl_rx_replenish
96 *
97 * -- enable interrupts --
98 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
99 * READ INDEX, detaching the SKB from the pool.
100 * Moves the packet buffer from queue to rx_used.
101 * Calls iwl_rx_queue_restock to refill any empty
102 * slots.
103 * ...
104 *
105 */
106
107/**
108 * iwl_rx_queue_space - Return number of free slots available in queue.
109 */
110int iwl_rx_queue_space(const struct iwl_rx_queue *q)
111{
112 int s = q->read - q->write;
113 if (s <= 0)
114 s += RX_QUEUE_SIZE;
115 /* keep some buffer to not confuse full and empty queue */
116 s -= 2;
117 if (s < 0)
118 s = 0;
119 return s;
120}
121EXPORT_SYMBOL(iwl_rx_queue_space);
122
123/**
124 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
125 */
126int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
127{
128 u32 reg = 0;
129 int ret = 0;
130 unsigned long flags;
131
132 spin_lock_irqsave(&q->lock, flags);
133
134 if (q->need_update == 0)
135 goto exit_unlock;
136
137 /* If power-saving is in use, make sure device is awake */
138 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
139 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
140
141 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
142 iwl_set_bit(priv, CSR_GP_CNTRL,
143 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
144 goto exit_unlock;
145 }
146
147 ret = iwl_grab_nic_access(priv);
148 if (ret)
149 goto exit_unlock;
150
151 /* Device expects a multiple of 8 */
152 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
153 q->write & ~0x7);
154 iwl_release_nic_access(priv);
155
156 /* Else device is assumed to be awake */
157 } else
158 /* Device expects a multiple of 8 */
159 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
160
161
162 q->need_update = 0;
163
164 exit_unlock:
165 spin_unlock_irqrestore(&q->lock, flags);
166 return ret;
167}
168EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
169/**
170 * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
171 */
172static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
173 dma_addr_t dma_addr)
174{
175 return cpu_to_le32((u32)(dma_addr >> 8));
176}
177
178/**
179 * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
180 *
181 * If there are slots in the RX queue that need to be restocked,
182 * and we have free pre-allocated buffers, fill the ranks as much
183 * as we can, pulling from rx_free.
184 *
185 * This moves the 'write' index forward to catch up with 'processed', and
186 * also updates the memory address in the firmware to reference the new
187 * target buffer.
188 */
189int iwl_rx_queue_restock(struct iwl_priv *priv)
190{
191 struct iwl_rx_queue *rxq = &priv->rxq;
192 struct list_head *element;
193 struct iwl_rx_mem_buffer *rxb;
194 unsigned long flags;
195 int write;
196 int ret = 0;
197
198 spin_lock_irqsave(&rxq->lock, flags);
199 write = rxq->write & ~0x7;
200 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
201 /* Get next free Rx buffer, remove from free list */
202 element = rxq->rx_free.next;
203 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
204 list_del(element);
205
206 /* Point to Rx buffer via next RBD in circular buffer */
207 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
208 rxq->queue[rxq->write] = rxb;
209 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
210 rxq->free_count--;
211 }
212 spin_unlock_irqrestore(&rxq->lock, flags);
213 /* If the pre-allocated buffer pool is dropping low, schedule to
214 * refill it */
215 if (rxq->free_count <= RX_LOW_WATERMARK)
216 queue_work(priv->workqueue, &priv->rx_replenish);
217
218
219 /* If we've added more space for the firmware to place data, tell it.
220 * Increment device's write pointer in multiples of 8. */
221 if ((write != (rxq->write & ~0x7))
222 || (abs(rxq->write - rxq->read) > 7)) {
223 spin_lock_irqsave(&rxq->lock, flags);
224 rxq->need_update = 1;
225 spin_unlock_irqrestore(&rxq->lock, flags);
226 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
227 }
228
229 return ret;
230}
231EXPORT_SYMBOL(iwl_rx_queue_restock);
232
233
234/**
235 * iwl_rx_replenish - Move all used packet from rx_used to rx_free
236 *
237 * When moving to rx_free an SKB is allocated for the slot.
238 *
239 * Also restock the Rx queue via iwl_rx_queue_restock.
240 * This is called as a scheduled work item (except for during initialization)
241 */
242void iwl_rx_allocate(struct iwl_priv *priv)
243{
244 struct iwl_rx_queue *rxq = &priv->rxq;
245 struct list_head *element;
246 struct iwl_rx_mem_buffer *rxb;
247 unsigned long flags;
248 spin_lock_irqsave(&rxq->lock, flags);
249 while (!list_empty(&rxq->rx_used)) {
250 element = rxq->rx_used.next;
251 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
252
253 /* Alloc a new receive buffer */
254 rxb->skb = alloc_skb(priv->hw_params.rx_buf_size,
255 __GFP_NOWARN | GFP_ATOMIC);
256 if (!rxb->skb) {
257 if (net_ratelimit())
258 printk(KERN_CRIT DRV_NAME
259 ": Can not allocate SKB buffers\n");
260 /* We don't reschedule replenish work here -- we will
261 * call the restock method and if it still needs
262 * more buffers it will schedule replenish */
263 break;
264 }
265 priv->alloc_rxb_skb++;
266 list_del(element);
267
268 /* Get physical address of RB/SKB */
269 rxb->dma_addr =
270 pci_map_single(priv->pci_dev, rxb->skb->data,
271 priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE);
272 list_add_tail(&rxb->list, &rxq->rx_free);
273 rxq->free_count++;
274 }
275 spin_unlock_irqrestore(&rxq->lock, flags);
276}
277EXPORT_SYMBOL(iwl_rx_allocate);
278
279void iwl_rx_replenish(struct iwl_priv *priv)
280{
281 unsigned long flags;
282
283 iwl_rx_allocate(priv);
284
285 spin_lock_irqsave(&priv->lock, flags);
286 iwl_rx_queue_restock(priv);
287 spin_unlock_irqrestore(&priv->lock, flags);
288}
289EXPORT_SYMBOL(iwl_rx_replenish);
290
291
292/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
293 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
294 * This free routine walks the list of POOL entries and if SKB is set to
295 * non NULL it is unmapped and freed
296 */
297void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
298{
299 int i;
300 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
301 if (rxq->pool[i].skb != NULL) {
302 pci_unmap_single(priv->pci_dev,
303 rxq->pool[i].dma_addr,
304 priv->hw_params.rx_buf_size,
305 PCI_DMA_FROMDEVICE);
306 dev_kfree_skb(rxq->pool[i].skb);
307 }
308 }
309
310 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
311 rxq->dma_addr);
312 rxq->bd = NULL;
313}
314EXPORT_SYMBOL(iwl_rx_queue_free);
315
316int iwl_rx_queue_alloc(struct iwl_priv *priv)
317{
318 struct iwl_rx_queue *rxq = &priv->rxq;
319 struct pci_dev *dev = priv->pci_dev;
320 int i;
321
322 spin_lock_init(&rxq->lock);
323 INIT_LIST_HEAD(&rxq->rx_free);
324 INIT_LIST_HEAD(&rxq->rx_used);
325
326 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
327 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
328 if (!rxq->bd)
329 return -ENOMEM;
330
331 /* Fill the rx_used queue with _all_ of the Rx buffers */
332 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
333 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
334
335 /* Set us so that we have processed and used all buffers, but have
336 * not restocked the Rx queue with fresh buffers */
337 rxq->read = rxq->write = 0;
338 rxq->free_count = 0;
339 rxq->need_update = 0;
340 return 0;
341}
342EXPORT_SYMBOL(iwl_rx_queue_alloc);
343
344void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
345{
346 unsigned long flags;
347 int i;
348 spin_lock_irqsave(&rxq->lock, flags);
349 INIT_LIST_HEAD(&rxq->rx_free);
350 INIT_LIST_HEAD(&rxq->rx_used);
351 /* Fill the rx_used queue with _all_ of the Rx buffers */
352 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
353 /* In the reset function, these buffers may have been allocated
354 * to an SKB, so we need to unmap and free potential storage */
355 if (rxq->pool[i].skb != NULL) {
356 pci_unmap_single(priv->pci_dev,
357 rxq->pool[i].dma_addr,
358 priv->hw_params.rx_buf_size,
359 PCI_DMA_FROMDEVICE);
360 priv->alloc_rxb_skb--;
361 dev_kfree_skb(rxq->pool[i].skb);
362 rxq->pool[i].skb = NULL;
363 }
364 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
365 }
366
367 /* Set us so that we have processed and used all buffers, but have
368 * not restocked the Rx queue with fresh buffers */
369 rxq->read = rxq->write = 0;
370 rxq->free_count = 0;
371 spin_unlock_irqrestore(&rxq->lock, flags);
372}
373EXPORT_SYMBOL(iwl_rx_queue_reset);
374
1053d35f
RR		 375int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
376{
377 int ret;
378 unsigned long flags;
379 unsigned int rb_size;
380
381 spin_lock_irqsave(&priv->lock, flags);
382 ret = iwl_grab_nic_access(priv);
383 if (ret) {
384 spin_unlock_irqrestore(&priv->lock, flags);
385 return ret;
386 }
387
388 if (priv->cfg->mod_params->amsdu_size_8K)
389 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
390 else
391 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
392
393 /* Stop Rx DMA */
394 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
395
396 /* Reset driver's Rx queue write index */
397 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
398
399 /* Tell device where to find RBD circular buffer in DRAM */
400 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
401 rxq->dma_addr >> 8);
402
403 /* Tell device where in DRAM to update its Rx status */
404 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
d67f5489 405 (priv->shared_phys + priv->rb_closed_offset) >> 4);
1053d35f
RR		 406
407 /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
408 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
409 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
410 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
411 rb_size |
412 /* 0x10 << 4 | */
413 (RX_QUEUE_SIZE_LOG <<
414 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
415
416 /*
417 * iwl_write32(priv,CSR_INT_COAL_REG,0);
418 */
419
420 iwl_release_nic_access(priv);
421 spin_unlock_irqrestore(&priv->lock, flags);
422
423 return 0;
424}
425
b3bbacb7
TW		 426int iwl_rxq_stop(struct iwl_priv *priv)
427{
428 int ret;
429 unsigned long flags;
430
431 spin_lock_irqsave(&priv->lock, flags);
432 ret = iwl_grab_nic_access(priv);
433 if (unlikely(ret)) {
434 spin_unlock_irqrestore(&priv->lock, flags);
435 return ret;
436 }
437
438 /* stop Rx DMA */
439 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
440 ret = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
441 (1 << 24), 1000);
442 if (ret < 0)
443 IWL_ERROR("Can't stop Rx DMA.\n");
444
445 iwl_release_nic_access(priv);
446 spin_unlock_irqrestore(&priv->lock, flags);
447
448 return 0;
449}
450EXPORT_SYMBOL(iwl_rxq_stop);
451
c1354754
TW		 452void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
453 struct iwl_rx_mem_buffer *rxb)
454
455{
c1354754
TW		 456 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
457 struct iwl4965_missed_beacon_notif *missed_beacon;
458
459 missed_beacon = &pkt->u.missed_beacon;
460 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
461 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
462 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
463 le32_to_cpu(missed_beacon->total_missed_becons),
464 le32_to_cpu(missed_beacon->num_recvd_beacons),
465 le32_to_cpu(missed_beacon->num_expected_beacons));
466 if (!test_bit(STATUS_SCANNING, &priv->status))
467 iwl_init_sensitivity(priv);
468 }
c1354754
TW		 469}
470EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
8f91aecb 471
0c70515f
RR		 472int iwl_rx_agg_start(struct iwl_priv *priv, const u8 *addr, int tid, u16 ssn)
473{
474 unsigned long flags;
475 int sta_id;
476
477 sta_id = iwl_find_station(priv, addr);
478 if (sta_id == IWL_INVALID_STATION)
479 return -ENXIO;
480
481 spin_lock_irqsave(&priv->sta_lock, flags);
482 priv->stations[sta_id].sta.station_flags_msk = 0;
483 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
484 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
485 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
486 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
487 spin_unlock_irqrestore(&priv->sta_lock, flags);
488
489 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
490 CMD_ASYNC);
491}
492EXPORT_SYMBOL(iwl_rx_agg_start);
493
494int iwl_rx_agg_stop(struct iwl_priv *priv, const u8 *addr, int tid)
495{
496 unsigned long flags;
497 int sta_id;
498
499 sta_id = iwl_find_station(priv, addr);
500 if (sta_id == IWL_INVALID_STATION)
501 return -ENXIO;
502
503 spin_lock_irqsave(&priv->sta_lock, flags);
504 priv->stations[sta_id].sta.station_flags_msk = 0;
505 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
506 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
507 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
508 spin_unlock_irqrestore(&priv->sta_lock, flags);
509
510 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
511 CMD_ASYNC);
512}
513EXPORT_SYMBOL(iwl_rx_agg_stop);
514
8f91aecb
EG		 515
516/* Calculate noise level, based on measurements during network silence just
517 * before arriving beacon. This measurement can be done only if we know
518 * exactly when to expect beacons, therefore only when we're associated. */
519static void iwl_rx_calc_noise(struct iwl_priv *priv)
520{
521 struct statistics_rx_non_phy *rx_info
522 = &(priv->statistics.rx.general);
523 int num_active_rx = 0;
524 int total_silence = 0;
525 int bcn_silence_a =
526 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
527 int bcn_silence_b =
528 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
529 int bcn_silence_c =
530 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
531
532 if (bcn_silence_a) {
533 total_silence += bcn_silence_a;
534 num_active_rx++;
535 }
536 if (bcn_silence_b) {
537 total_silence += bcn_silence_b;
538 num_active_rx++;
539 }
540 if (bcn_silence_c) {
541 total_silence += bcn_silence_c;
542 num_active_rx++;
543 }
544
545 /* Average among active antennas */
546 if (num_active_rx)
547 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
548 else
549 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
550
551 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
552 bcn_silence_a, bcn_silence_b, bcn_silence_c,
553 priv->last_rx_noise);
554}
555
556#define REG_RECALIB_PERIOD (60)
557
558void iwl_rx_statistics(struct iwl_priv *priv,
559 struct iwl_rx_mem_buffer *rxb)
560{
5225640b 561 int change;
8f91aecb
EG		 562 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
563
564 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
565 (int)sizeof(priv->statistics), pkt->len);
566
5225640b
ZY		 567 change = ((priv->statistics.general.temperature !=
568 pkt->u.stats.general.temperature) ||
569 ((priv->statistics.flag &
570 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
571 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
572
8f91aecb
EG		 573 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
574
575 set_bit(STATUS_STATISTICS, &priv->status);
576
577 /* Reschedule the statistics timer to occur in
578 * REG_RECALIB_PERIOD seconds to ensure we get a
579 * thermal update even if the uCode doesn't give
580 * us one */
581 mod_timer(&priv->statistics_periodic, jiffies +
582 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
583
584 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
585 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
586 iwl_rx_calc_noise(priv);
587 queue_work(priv->workqueue, &priv->run_time_calib_work);
588 }
589
590 iwl_leds_background(priv);
591
5225640b
ZY		 592 if (priv->cfg->ops->lib->temperature && change)
593 priv->cfg->ops->lib->temperature(priv);
8f91aecb
EG		 594}
595EXPORT_SYMBOL(iwl_rx_statistics);
1781a07f
EG		 596
597#define PERFECT_RSSI (-20) /* dBm */
598#define WORST_RSSI (-95) /* dBm */
599#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
600
601/* Calculate an indication of rx signal quality (a percentage, not dBm!).
602 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
603 * about formulas used below. */
604static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
605{
606 int sig_qual;
607 int degradation = PERFECT_RSSI - rssi_dbm;
608
609 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
610 * as indicator; formula is (signal dbm - noise dbm).
611 * SNR at or above 40 is a great signal (100%).
612 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
613 * Weakest usable signal is usually 10 - 15 dB SNR. */
614 if (noise_dbm) {
615 if (rssi_dbm - noise_dbm >= 40)
616 return 100;
617 else if (rssi_dbm < noise_dbm)
618 return 0;
619 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
620
621 /* Else use just the signal level.
622 * This formula is a least squares fit of data points collected and
623 * compared with a reference system that had a percentage (%) display
624 * for signal quality. */
625 } else
626 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
627 (15 * RSSI_RANGE + 62 * degradation)) /
628 (RSSI_RANGE * RSSI_RANGE);
629
630 if (sig_qual > 100)
631 sig_qual = 100;
632 else if (sig_qual < 1)
633 sig_qual = 0;
634
635 return sig_qual;
636}
637
638#ifdef CONFIG_IWLWIFI_DEBUG
639
640/**
641 * iwl_dbg_report_frame - dump frame to syslog during debug sessions
642 *
643 * You may hack this function to show different aspects of received frames,
644 * including selective frame dumps.
645 * group100 parameter selects whether to show 1 out of 100 good frames.
646 *
647 * TODO: This was originally written for 3945, need to audit for
648 * proper operation with 4965.
649 */
650static void iwl_dbg_report_frame(struct iwl_priv *priv,
651 struct iwl_rx_packet *pkt,
652 struct ieee80211_hdr *header, int group100)
653{
654 u32 to_us;
655 u32 print_summary = 0;
656 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
657 u32 hundred = 0;
658 u32 dataframe = 0;
659 __le16 fc;
660 u16 seq_ctl;
661 u16 channel;
662 u16 phy_flags;
663 int rate_sym;
664 u16 length;
665 u16 status;
666 u16 bcn_tmr;
667 u32 tsf_low;
668 u64 tsf;
669 u8 rssi;
670 u8 agc;
671 u16 sig_avg;
672 u16 noise_diff;
673 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
674 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
675 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
676 u8 *data = IWL_RX_DATA(pkt);
677
678 if (likely(!(priv->debug_level & IWL_DL_RX)))
679 return;
680
681 /* MAC header */
682 fc = header->frame_control;
683 seq_ctl = le16_to_cpu(header->seq_ctrl);
684
685 /* metadata */
686 channel = le16_to_cpu(rx_hdr->channel);
687 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
688 rate_sym = rx_hdr->rate;
689 length = le16_to_cpu(rx_hdr->len);
690
691 /* end-of-frame status and timestamp */
692 status = le32_to_cpu(rx_end->status);
693 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
694 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
695 tsf = le64_to_cpu(rx_end->timestamp);
696
697 /* signal statistics */
698 rssi = rx_stats->rssi;
699 agc = rx_stats->agc;
700 sig_avg = le16_to_cpu(rx_stats->sig_avg);
701 noise_diff = le16_to_cpu(rx_stats->noise_diff);
702
703 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
704
705 /* if data frame is to us and all is good,
706 * (optionally) print summary for only 1 out of every 100 */
707 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
708 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
709 dataframe = 1;
710 if (!group100)
711 print_summary = 1; /* print each frame */
712 else if (priv->framecnt_to_us < 100) {
713 priv->framecnt_to_us++;
714 print_summary = 0;
715 } else {
716 priv->framecnt_to_us = 0;
717 print_summary = 1;
718 hundred = 1;
719 }
720 } else {
721 /* print summary for all other frames */
722 print_summary = 1;
723 }
724
725 if (print_summary) {
726 char *title;
727 int rate_idx;
728 u32 bitrate;
729
730 if (hundred)
731 title = "100Frames";
732 else if (ieee80211_has_retry(fc))
733 title = "Retry";
734 else if (ieee80211_is_assoc_resp(fc))
735 title = "AscRsp";
736 else if (ieee80211_is_reassoc_resp(fc))
737 title = "RasRsp";
738 else if (ieee80211_is_probe_resp(fc)) {
739 title = "PrbRsp";
740 print_dump = 1; /* dump frame contents */
741 } else if (ieee80211_is_beacon(fc)) {
742 title = "Beacon";
743 print_dump = 1; /* dump frame contents */
744 } else if (ieee80211_is_atim(fc))
745 title = "ATIM";
746 else if (ieee80211_is_auth(fc))
747 title = "Auth";
748 else if (ieee80211_is_deauth(fc))
749 title = "DeAuth";
750 else if (ieee80211_is_disassoc(fc))
751 title = "DisAssoc";
752 else
753 title = "Frame";
754
755 rate_idx = iwl_hwrate_to_plcp_idx(rate_sym);
756 if (unlikely(rate_idx == -1))
757 bitrate = 0;
758 else
759 bitrate = iwl_rates[rate_idx].ieee / 2;
760
761 /* print frame summary.
762 * MAC addresses show just the last byte (for brevity),
763 * but you can hack it to show more, if you'd like to. */
764 if (dataframe)
765 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
766 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
767 title, le16_to_cpu(fc), header->addr1[5],
768 length, rssi, channel, bitrate);
769 else {
770 /* src/dst addresses assume managed mode */
771 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
772 "src=0x%02x, rssi=%u, tim=%lu usec, "
773 "phy=0x%02x, chnl=%d\n",
774 title, le16_to_cpu(fc), header->addr1[5],
775 header->addr3[5], rssi,
776 tsf_low - priv->scan_start_tsf,
777 phy_flags, channel);
778 }
779 }
780 if (print_dump)
781 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
782}
783#else
784static inline void iwl_dbg_report_frame(struct iwl_priv *priv,
785 struct iwl_rx_packet *pkt,
786 struct ieee80211_hdr *header,
787 int group100)
788{
789}
790#endif
791
792static void iwl_add_radiotap(struct iwl_priv *priv,
793 struct sk_buff *skb,
794 struct iwl4965_rx_phy_res *rx_start,
795 struct ieee80211_rx_status *stats,
796 u32 ampdu_status)
797{
798 s8 signal = stats->signal;
799 s8 noise = 0;
800 int rate = stats->rate_idx;
801 u64 tsf = stats->mactime;
802 __le16 antenna;
803 __le16 phy_flags_hw = rx_start->phy_flags;
804 struct iwl4965_rt_rx_hdr {
805 struct ieee80211_radiotap_header rt_hdr;
806 __le64 rt_tsf; /* TSF */
807 u8 rt_flags; /* radiotap packet flags */
808 u8 rt_rate; /* rate in 500kb/s */
809 __le16 rt_channelMHz; /* channel in MHz */
810 __le16 rt_chbitmask; /* channel bitfield */
811 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
812 s8 rt_dbmnoise;
813 u8 rt_antenna; /* antenna number */
814 } __attribute__ ((packed)) *iwl4965_rt;
815
816 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
817 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
818 if (net_ratelimit())
819 printk(KERN_ERR "not enough headroom [%d] for "
820 "radiotap head [%zd]\n",
821 skb_headroom(skb), sizeof(*iwl4965_rt));
822 return;
823 }
824
825 /* put radiotap header in front of 802.11 header and data */
826 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
827
828 /* initialise radiotap header */
829 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
830 iwl4965_rt->rt_hdr.it_pad = 0;
831
832 /* total header + data */
a05ffd39 833 put_unaligned_le16(sizeof(*iwl4965_rt), &iwl4965_rt->rt_hdr.it_len);
1781a07f
EG		 834
835 /* Indicate all the fields we add to the radiotap header */
a05ffd39
TW		 836 put_unaligned_le32((1 << IEEE80211_RADIOTAP_TSFT) |
837 (1 << IEEE80211_RADIOTAP_FLAGS) |
838 (1 << IEEE80211_RADIOTAP_RATE) |
839 (1 << IEEE80211_RADIOTAP_CHANNEL) |
840 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
841 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
842 (1 << IEEE80211_RADIOTAP_ANTENNA),
843 &(iwl4965_rt->rt_hdr.it_present));
1781a07f
EG		 844
845 /* Zero the flags, we'll add to them as we go */
846 iwl4965_rt->rt_flags = 0;
847
a05ffd39 848 put_unaligned_le64(tsf, &iwl4965_rt->rt_tsf);
1781a07f
EG		 849
850 iwl4965_rt->rt_dbmsignal = signal;
851 iwl4965_rt->rt_dbmnoise = noise;
852
853 /* Convert the channel frequency and set the flags */
854 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
855 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
a05ffd39
TW		 856 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ,
857 &iwl4965_rt->rt_chbitmask);
1781a07f 858 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
a05ffd39
TW		 859 put_unaligned_le16(IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ,
860 &iwl4965_rt->rt_chbitmask);
1781a07f 861 else /* 802.11g */
a05ffd39
TW		 862 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ,
863 &iwl4965_rt->rt_chbitmask);
1781a07f
EG		 864
865 if (rate == -1)
866 iwl4965_rt->rt_rate = 0;
867 else
868 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
869
870 /*
871 * "antenna number"
872 *
873 * It seems that the antenna field in the phy flags value
874 * is actually a bitfield. This is undefined by radiotap,
875 * it wants an actual antenna number but I always get "7"
876 * for most legacy frames I receive indicating that the
877 * same frame was received on all three RX chains.
878 *
879 * I think this field should be removed in favour of a
880 * new 802.11n radiotap field "RX chains" that is defined
881 * as a bitmask.
882 */
883 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
884 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
885
886 /* set the preamble flag if appropriate */
887 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
888 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
889
890 stats->flag |= RX_FLAG_RADIOTAP;
891}
892
893static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
894{
895 /* 0 - mgmt, 1 - cnt, 2 - data */
896 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
897 priv->rx_stats[idx].cnt++;
898 priv->rx_stats[idx].bytes += len;
899}
900
901/*
902 * returns non-zero if packet should be dropped
903 */
904static int iwl_set_decrypted_flag(struct iwl_priv *priv,
905 struct ieee80211_hdr *hdr,
906 u32 decrypt_res,
907 struct ieee80211_rx_status *stats)
908{
909 u16 fc = le16_to_cpu(hdr->frame_control);
910
911 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
912 return 0;
913
914 if (!(fc & IEEE80211_FCTL_PROTECTED))
915 return 0;
916
917 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
918 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
919 case RX_RES_STATUS_SEC_TYPE_TKIP:
920 /* The uCode has got a bad phase 1 Key, pushes the packet.
921 * Decryption will be done in SW. */
922 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
923 RX_RES_STATUS_BAD_KEY_TTAK)
924 break;
925
926 case RX_RES_STATUS_SEC_TYPE_WEP:
927 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
928 RX_RES_STATUS_BAD_ICV_MIC) {
929 /* bad ICV, the packet is destroyed since the
930 * decryption is inplace, drop it */
931 IWL_DEBUG_RX("Packet destroyed\n");
932 return -1;
933 }
934 case RX_RES_STATUS_SEC_TYPE_CCMP:
935 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
936 RX_RES_STATUS_DECRYPT_OK) {
937 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
938 stats->flag |= RX_FLAG_DECRYPTED;
939 }
940 break;
941
942 default:
943 break;
944 }
945 return 0;
946}
947
948static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
949{
950 u32 decrypt_out = 0;
951
952 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
953 RX_RES_STATUS_STATION_FOUND)
954 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
955 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
956
957 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
958
959 /* packet was not encrypted */
960 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
961 RX_RES_STATUS_SEC_TYPE_NONE)
962 return decrypt_out;
963
964 /* packet was encrypted with unknown alg */
965 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
966 RX_RES_STATUS_SEC_TYPE_ERR)
967 return decrypt_out;
968
969 /* decryption was not done in HW */
970 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
971 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
972 return decrypt_out;
973
974 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
975
976 case RX_RES_STATUS_SEC_TYPE_CCMP:
977 /* alg is CCM: check MIC only */
978 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
979 /* Bad MIC */
980 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
981 else
982 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
983
984 break;
985
986 case RX_RES_STATUS_SEC_TYPE_TKIP:
987 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
988 /* Bad TTAK */
989 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
990 break;
991 }
992 /* fall through if TTAK OK */
993 default:
994 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
995 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
996 else
997 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
998 break;
999 };
1000
1001 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
1002 decrypt_in, decrypt_out);
1003
1004 return decrypt_out;
1005}
1006
4b8817b2 1007static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
1781a07f
EG		 1008 int include_phy,
1009 struct iwl_rx_mem_buffer *rxb,
1010 struct ieee80211_rx_status *stats)
1011{
1012 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1013 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
1014 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
1015 struct ieee80211_hdr *hdr;
1016 u16 len;
1017 __le32 *rx_end;
1018 unsigned int skblen;
1019 u32 ampdu_status;
1020 u32 ampdu_status_legacy;
1021
1022 if (!include_phy && priv->last_phy_res[0])
1023 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
1024
1025 if (!rx_start) {
1026 IWL_ERROR("MPDU frame without a PHY data\n");
1027 return;
1028 }
1029 if (include_phy) {
1030 hdr = (struct ieee80211_hdr *)((u8 *) &rx_start[1] +
1031 rx_start->cfg_phy_cnt);
1032
1033 len = le16_to_cpu(rx_start->byte_count);
1034
1035 rx_end = (__le32 *) ((u8 *) &pkt->u.raw[0] +
1036 sizeof(struct iwl4965_rx_phy_res) +
1037 rx_start->cfg_phy_cnt + len);
1038
1039 } else {
1040 struct iwl4965_rx_mpdu_res_start *amsdu =
1041 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1042
1043 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
1044 sizeof(struct iwl4965_rx_mpdu_res_start));
1045 len = le16_to_cpu(amsdu->byte_count);
1046 rx_start->byte_count = amsdu->byte_count;
1047 rx_end = (__le32 *) (((u8 *) hdr) + len);
1048 }
1781a07f
EG		 1049
1050 ampdu_status = le32_to_cpu(*rx_end);
1051 skblen = ((u8 *) rx_end - (u8 *) &pkt->u.raw[0]) + sizeof(u32);
1052
1053 if (!include_phy) {
1054 /* New status scheme, need to translate */
1055 ampdu_status_legacy = ampdu_status;
1056 ampdu_status = iwl_translate_rx_status(priv, ampdu_status);
1057 }
1058
1059 /* start from MAC */
1060 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
1061 skb_put(rxb->skb, len); /* end where data ends */
1062
1063 /* We only process data packets if the interface is open */
1064 if (unlikely(!priv->is_open)) {
1065 IWL_DEBUG_DROP_LIMIT
1066 ("Dropping packet while interface is not open.\n");
1067 return;
1068 }
1069
1781a07f
EG		 1070 hdr = (struct ieee80211_hdr *)rxb->skb->data;
1071
1072 /* in case of HW accelerated crypto and bad decryption, drop */
1073 if (!priv->hw_params.sw_crypto &&
1074 iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
1075 return;
1076
1077 if (priv->add_radiotap)
1078 iwl_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
1079
1080 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
1081 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
1082 priv->alloc_rxb_skb--;
1083 rxb->skb = NULL;
1084}
1085
1086/* Calc max signal level (dBm) among 3 possible receivers */
1087static int iwl_calc_rssi(struct iwl_priv *priv,
1088 struct iwl4965_rx_phy_res *rx_resp)
1089{
1090 /* data from PHY/DSP regarding signal strength, etc.,
1091 * contents are always there, not configurable by host. */
1092 struct iwl4965_rx_non_cfg_phy *ncphy =
1093 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
1094 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
1095 >> IWL_AGC_DB_POS;
1096
1097 u32 valid_antennae =
1098 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
1099 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
1100 u8 max_rssi = 0;
1101 u32 i;
1102
1103 /* Find max rssi among 3 possible receivers.
1104 * These values are measured by the digital signal processor (DSP).
1105 * They should stay fairly constant even as the signal strength varies,
1106 * if the radio's automatic gain control (AGC) is working right.
1107 * AGC value (see below) will provide the "interesting" info. */
1108 for (i = 0; i < 3; i++)
1109 if (valid_antennae & (1 << i))
1110 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
1111
1112 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
1113 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
1114 max_rssi, agc);
1115
1116 /* dBm = max_rssi dB - agc dB - constant.
1117 * Higher AGC (higher radio gain) means lower signal. */
1118 return max_rssi - agc - IWL_RSSI_OFFSET;
1119}
1120
1121static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
1122{
1123 unsigned long flags;
1124
1125 spin_lock_irqsave(&priv->sta_lock, flags);
1126 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
1127 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
1128 priv->stations[sta_id].sta.sta.modify_mask = 0;
1129 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1130 spin_unlock_irqrestore(&priv->sta_lock, flags);
1131
1132 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
1133}
1134
1135static void iwl_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
1136{
1137 /* FIXME: need locking over ps_status ??? */
1138 u8 sta_id = iwl_find_station(priv, addr);
1139
1140 if (sta_id != IWL_INVALID_STATION) {
1141 u8 sta_awake = priv->stations[sta_id].
1142 ps_status == STA_PS_STATUS_WAKE;
1143
1144 if (sta_awake && ps_bit)
1145 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
1146 else if (!sta_awake && !ps_bit) {
1147 iwl_sta_modify_ps_wake(priv, sta_id);
1148 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
1149 }
1150 }
1151}
1152
4b8817b2 1153/* This is necessary only for a number of statistics, see the caller. */
1781a07f
EG		 1154static int iwl_is_network_packet(struct iwl_priv *priv,
1155 struct ieee80211_hdr *header)
1156{
1157 /* Filter incoming packets to determine if they are targeted toward
1158 * this network, discarding packets coming from ourselves */
1159 switch (priv->iw_mode) {
1160 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
4b8817b2
EG		 1161 /* packets to our IBSS update information */
1162 return !compare_ether_addr(header->addr3, priv->bssid);
1781a07f 1163 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
4b8817b2
EG		 1164 /* packets to our IBSS update information */
1165 return !compare_ether_addr(header->addr2, priv->bssid);
1781a07f 1166 default:
4b8817b2 1167 return 1;
1781a07f 1168 }
1781a07f
EG		 1169}
1170
1171/* Called for REPLY_RX (legacy ABG frames), or
1172 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
1173void iwl_rx_reply_rx(struct iwl_priv *priv,
1174 struct iwl_rx_mem_buffer *rxb)
1175{
1176 struct ieee80211_hdr *header;
1177 struct ieee80211_rx_status rx_status;
1178 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1179 /* Use phy data (Rx signal strength, etc.) contained within
1180 * this rx packet for legacy frames,
1181 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
1182 int include_phy = (pkt->hdr.cmd == REPLY_RX);
1183 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
1184 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
1185 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
1186 __le32 *rx_end;
1187 unsigned int len = 0;
1188 u16 fc;
1189 u8 network_packet;
1190
1191 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
1192 rx_status.freq =
1193 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
1194 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1195 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1196 rx_status.rate_idx =
1197 iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
1198 if (rx_status.band == IEEE80211_BAND_5GHZ)
1199 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
1200
1201 rx_status.antenna = 0;
1202 rx_status.flag = 0;
2ff75b78 1203 rx_status.flag |= RX_FLAG_TSFT;
1781a07f
EG		 1204
1205 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
1206 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
1207 rx_start->cfg_phy_cnt);
1208 return;
1209 }
1210
1211 if (!include_phy) {
1212 if (priv->last_phy_res[0])
1213 rx_start = (struct iwl4965_rx_phy_res *)
1214 &priv->last_phy_res[1];
1215 else
1216 rx_start = NULL;
1217 }
1218
1219 if (!rx_start) {
1220 IWL_ERROR("MPDU frame without a PHY data\n");
1221 return;
1222 }
1223
1224 if (include_phy) {
1225 header = (struct ieee80211_hdr *)((u8 *) &rx_start[1]
1226 + rx_start->cfg_phy_cnt);
1227
1228 len = le16_to_cpu(rx_start->byte_count);
1229 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
1230 sizeof(struct iwl4965_rx_phy_res) + len);
1231 } else {
1232 struct iwl4965_rx_mpdu_res_start *amsdu =
1233 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1234
1235 header = (void *)(pkt->u.raw +
1236 sizeof(struct iwl4965_rx_mpdu_res_start));
1237 len = le16_to_cpu(amsdu->byte_count);
1238 rx_end = (__le32 *) (pkt->u.raw +
1239 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
1240 }
1241
1242 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
1243 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1244 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
1245 le32_to_cpu(*rx_end));
1246 return;
1247 }
1248
1249 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
1250
1251 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1252 rx_status.signal = iwl_calc_rssi(priv, rx_start);
1253
1254 /* Meaningful noise values are available only from beacon statistics,
1255 * which are gathered only when associated, and indicate noise
1256 * only for the associated network channel ...
1257 * Ignore these noise values while scanning (other channels) */
1258 if (iwl_is_associated(priv) &&
1259 !test_bit(STATUS_SCANNING, &priv->status)) {
1260 rx_status.noise = priv->last_rx_noise;
1261 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1262 rx_status.noise);
1263 } else {
1264 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1265 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1266 }
1267
1268 /* Reset beacon noise level if not associated. */
1269 if (!iwl_is_associated(priv))
1270 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1271
1272 /* Set "1" to report good data frames in groups of 100 */
1273 /* FIXME: need to optimze the call: */
1274 iwl_dbg_report_frame(priv, pkt, header, 1);
1275
1276 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
1277 rx_status.signal, rx_status.noise, rx_status.signal,
1278 (unsigned long long)rx_status.mactime);
1279
4b8817b2 1280 /* Take shortcut when only in monitor mode */
1781a07f 1281 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
4b8817b2 1282 iwl_pass_packet_to_mac80211(priv, include_phy,
1781a07f
EG		 1283 rxb, &rx_status);
1284 return;
1285 }
1286
1287 network_packet = iwl_is_network_packet(priv, header);
1288 if (network_packet) {
1289 priv->last_rx_rssi = rx_status.signal;
1290 priv->last_beacon_time = priv->ucode_beacon_time;
1291 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
1292 }
1293
1294 fc = le16_to_cpu(header->frame_control);
1295 switch (fc & IEEE80211_FCTL_FTYPE) {
1296 case IEEE80211_FTYPE_MGMT:
4b8817b2 1297 case IEEE80211_FTYPE_DATA:
1781a07f
EG		 1298 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
1299 iwl_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
1300 header->addr2);
4b8817b2 1301 /* fall through */
1781a07f 1302 default:
4b8817b2
EG		 1303 iwl_pass_packet_to_mac80211(priv, include_phy, rxb,
1304 &rx_status);
1781a07f
EG		 1305 break;
1306
1307 }
1308}
1309EXPORT_SYMBOL(iwl_rx_reply_rx);
1310
1311/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1312 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1313void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1314 struct iwl_rx_mem_buffer *rxb)
1315{
1316 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1317 priv->last_phy_res[0] = 1;
1318 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1319 sizeof(struct iwl4965_rx_phy_res));
1320}
1321EXPORT_SYMBOL(iwl_rx_reply_rx_phy);
Linux 6.x block layer and io_uring tree(s)