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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
1f447808 | 3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of version 2 of the GNU General Public License as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program; if not, write to the Free Software Foundation, Inc., | |
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
19 | * | |
20 | * The full GNU General Public License is included in this distribution in the | |
21 | * file called LICENSE. | |
22 | * | |
23 | * Contact Information: | |
759ef89f | 24 | * Intel Linux Wireless <ilw@linux.intel.com> |
b481de9c ZY |
25 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
26 | * | |
27 | *****************************************************************************/ | |
28 | ||
3395f6e9 TW |
29 | #ifndef __iwl_io_h__ |
30 | #define __iwl_io_h__ | |
b481de9c ZY |
31 | |
32 | #include <linux/io.h> | |
33 | ||
ed391f4e | 34 | #include "iwl-dev.h" |
0a6857e7 | 35 | #include "iwl-debug.h" |
be1a71a1 | 36 | #include "iwl-devtrace.h" |
b481de9c ZY |
37 | |
38 | /* | |
39 | * IO, register, and NIC memory access functions | |
40 | * | |
41 | * NOTE on naming convention and macro usage for these | |
42 | * | |
43 | * A single _ prefix before a an access function means that no state | |
44 | * check or debug information is printed when that function is called. | |
45 | * | |
46 | * A double __ prefix before an access function means that state is checked | |
775ea378 TW |
47 | * and the current line number and caller function name are printed in addition |
48 | * to any other debug output. | |
b481de9c ZY |
49 | * |
50 | * The non-prefixed name is the #define that maps the caller into a | |
775ea378 TW |
51 | * #define that provides the caller's name and __LINE__ to the double |
52 | * prefix version. | |
b481de9c ZY |
53 | * |
54 | * If you wish to call the function without any debug or state checking, | |
55 | * you should use the single _ prefix version (as is used by dependent IO | |
3395f6e9 TW |
56 | * routines, for example _iwl_read_direct32 calls the non-check version of |
57 | * _iwl_read32.) | |
b481de9c ZY |
58 | * |
59 | * These declarations are *extremely* useful in quickly isolating code deltas | |
a96a27f9 | 60 | * which result in misconfiguration of the hardware I/O. In combination with |
b481de9c ZY |
61 | * git-bisect and the IO debug level you can quickly determine the specific |
62 | * commit which breaks the IO sequence to the hardware. | |
63 | * | |
64 | */ | |
65 | ||
4e03185f BC |
66 | static inline void _iwl_write8(struct iwl_priv *priv, u32 ofs, u8 val) |
67 | { | |
68 | trace_iwlwifi_dev_iowrite8(priv, ofs, val); | |
69 | iowrite8(val, priv->hw_base + ofs); | |
70 | } | |
71 | ||
72 | #ifdef CONFIG_IWLWIFI_DEBUG | |
73 | static inline void __iwl_write8(const char *f, u32 l, struct iwl_priv *priv, | |
74 | u32 ofs, u8 val) | |
75 | { | |
76 | IWL_DEBUG_IO(priv, "write8(0x%08X, 0x%02X) - %s %d\n", ofs, val, f, l); | |
77 | _iwl_write8(priv, ofs, val); | |
78 | } | |
79 | #define iwl_write8(priv, ofs, val) \ | |
80 | __iwl_write8(__FILE__, __LINE__, priv, ofs, val) | |
81 | #else | |
82 | #define iwl_write8(priv, ofs, val) _iwl_write8(priv, ofs, val) | |
83 | #endif | |
84 | ||
85 | ||
be1a71a1 JB |
86 | static inline void _iwl_write32(struct iwl_priv *priv, u32 ofs, u32 val) |
87 | { | |
88 | trace_iwlwifi_dev_iowrite32(priv, ofs, val); | |
89 | iowrite32(val, priv->hw_base + ofs); | |
90 | } | |
91 | ||
0a6857e7 | 92 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 93 | static inline void __iwl_write32(const char *f, u32 l, struct iwl_priv *priv, |
b481de9c ZY |
94 | u32 ofs, u32 val) |
95 | { | |
e1623446 | 96 | IWL_DEBUG_IO(priv, "write32(0x%08X, 0x%08X) - %s %d\n", ofs, val, f, l); |
3395f6e9 | 97 | _iwl_write32(priv, ofs, val); |
b481de9c | 98 | } |
3395f6e9 TW |
99 | #define iwl_write32(priv, ofs, val) \ |
100 | __iwl_write32(__FILE__, __LINE__, priv, ofs, val) | |
b481de9c | 101 | #else |
3395f6e9 | 102 | #define iwl_write32(priv, ofs, val) _iwl_write32(priv, ofs, val) |
b481de9c ZY |
103 | #endif |
104 | ||
be1a71a1 JB |
105 | static inline u32 _iwl_read32(struct iwl_priv *priv, u32 ofs) |
106 | { | |
107 | u32 val = ioread32(priv->hw_base + ofs); | |
108 | trace_iwlwifi_dev_ioread32(priv, ofs, val); | |
109 | return val; | |
110 | } | |
111 | ||
0a6857e7 | 112 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 113 | static inline u32 __iwl_read32(char *f, u32 l, struct iwl_priv *priv, u32 ofs) |
b481de9c | 114 | { |
e1623446 | 115 | IWL_DEBUG_IO(priv, "read_direct32(0x%08X) - %s %d\n", ofs, f, l); |
3395f6e9 | 116 | return _iwl_read32(priv, ofs); |
b481de9c | 117 | } |
3395f6e9 | 118 | #define iwl_read32(priv, ofs) __iwl_read32(__FILE__, __LINE__, priv, ofs) |
b481de9c | 119 | #else |
3395f6e9 | 120 | #define iwl_read32(p, o) _iwl_read32(p, o) |
b481de9c ZY |
121 | #endif |
122 | ||
4087f6f6 | 123 | #define IWL_POLL_INTERVAL 10 /* microseconds */ |
3395f6e9 | 124 | static inline int _iwl_poll_bit(struct iwl_priv *priv, u32 addr, |
b481de9c ZY |
125 | u32 bits, u32 mask, int timeout) |
126 | { | |
4087f6f6 | 127 | int t = 0; |
b481de9c ZY |
128 | |
129 | do { | |
3395f6e9 | 130 | if ((_iwl_read32(priv, addr) & mask) == (bits & mask)) |
4087f6f6 WF |
131 | return t; |
132 | udelay(IWL_POLL_INTERVAL); | |
133 | t += IWL_POLL_INTERVAL; | |
134 | } while (t < timeout); | |
b481de9c ZY |
135 | |
136 | return -ETIMEDOUT; | |
137 | } | |
0a6857e7 | 138 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 139 | static inline int __iwl_poll_bit(const char *f, u32 l, |
c79dd5b5 | 140 | struct iwl_priv *priv, u32 addr, |
b481de9c ZY |
141 | u32 bits, u32 mask, int timeout) |
142 | { | |
3395f6e9 | 143 | int ret = _iwl_poll_bit(priv, addr, bits, mask, timeout); |
e1623446 | 144 | IWL_DEBUG_IO(priv, "poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n", |
5c1b0958 | 145 | addr, bits, mask, |
c3056065 | 146 | unlikely(ret == -ETIMEDOUT) ? "timeout" : "", f, l); |
ac17a947 | 147 | return ret; |
b481de9c | 148 | } |
3395f6e9 TW |
149 | #define iwl_poll_bit(priv, addr, bits, mask, timeout) \ |
150 | __iwl_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout) | |
b481de9c | 151 | #else |
3395f6e9 | 152 | #define iwl_poll_bit(p, a, b, m, t) _iwl_poll_bit(p, a, b, m, t) |
b481de9c ZY |
153 | #endif |
154 | ||
3395f6e9 | 155 | static inline void _iwl_set_bit(struct iwl_priv *priv, u32 reg, u32 mask) |
b481de9c | 156 | { |
3395f6e9 | 157 | _iwl_write32(priv, reg, _iwl_read32(priv, reg) | mask); |
b481de9c | 158 | } |
0a6857e7 | 159 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 160 | static inline void __iwl_set_bit(const char *f, u32 l, |
c79dd5b5 | 161 | struct iwl_priv *priv, u32 reg, u32 mask) |
b481de9c | 162 | { |
3395f6e9 | 163 | u32 val = _iwl_read32(priv, reg) | mask; |
e1623446 | 164 | IWL_DEBUG_IO(priv, "set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); |
3395f6e9 | 165 | _iwl_write32(priv, reg, val); |
b481de9c | 166 | } |
a8b50a0a MA |
167 | static inline void iwl_set_bit(struct iwl_priv *p, u32 r, u32 m) |
168 | { | |
169 | unsigned long reg_flags; | |
170 | ||
171 | spin_lock_irqsave(&p->reg_lock, reg_flags); | |
172 | __iwl_set_bit(__FILE__, __LINE__, p, r, m); | |
173 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | |
174 | } | |
b481de9c | 175 | #else |
a8b50a0a MA |
176 | static inline void iwl_set_bit(struct iwl_priv *p, u32 r, u32 m) |
177 | { | |
178 | unsigned long reg_flags; | |
179 | ||
180 | spin_lock_irqsave(&p->reg_lock, reg_flags); | |
181 | _iwl_set_bit(p, r, m); | |
182 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | |
183 | } | |
b481de9c ZY |
184 | #endif |
185 | ||
3395f6e9 | 186 | static inline void _iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask) |
b481de9c | 187 | { |
3395f6e9 | 188 | _iwl_write32(priv, reg, _iwl_read32(priv, reg) & ~mask); |
b481de9c | 189 | } |
0a6857e7 | 190 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 191 | static inline void __iwl_clear_bit(const char *f, u32 l, |
c79dd5b5 | 192 | struct iwl_priv *priv, u32 reg, u32 mask) |
b481de9c | 193 | { |
3395f6e9 | 194 | u32 val = _iwl_read32(priv, reg) & ~mask; |
e1623446 | 195 | IWL_DEBUG_IO(priv, "clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val); |
3395f6e9 | 196 | _iwl_write32(priv, reg, val); |
b481de9c | 197 | } |
a8b50a0a MA |
198 | static inline void iwl_clear_bit(struct iwl_priv *p, u32 r, u32 m) |
199 | { | |
200 | unsigned long reg_flags; | |
201 | ||
202 | spin_lock_irqsave(&p->reg_lock, reg_flags); | |
203 | __iwl_clear_bit(__FILE__, __LINE__, p, r, m); | |
204 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | |
205 | } | |
b481de9c | 206 | #else |
a8b50a0a MA |
207 | static inline void iwl_clear_bit(struct iwl_priv *p, u32 r, u32 m) |
208 | { | |
209 | unsigned long reg_flags; | |
210 | ||
211 | spin_lock_irqsave(&p->reg_lock, reg_flags); | |
212 | _iwl_clear_bit(p, r, m); | |
213 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | |
214 | } | |
b481de9c ZY |
215 | #endif |
216 | ||
3395f6e9 | 217 | static inline int _iwl_grab_nic_access(struct iwl_priv *priv) |
b481de9c | 218 | { |
ac17a947 | 219 | int ret; |
18d426c4 | 220 | u32 val; |
a8b50a0a | 221 | |
b481de9c | 222 | /* this bit wakes up the NIC */ |
3395f6e9 | 223 | _iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
a7e66110 BC |
224 | |
225 | /* | |
226 | * These bits say the device is running, and should keep running for | |
227 | * at least a short while (at least as long as MAC_ACCESS_REQ stays 1), | |
228 | * but they do not indicate that embedded SRAM is restored yet; | |
229 | * 3945 and 4965 have volatile SRAM, and must save/restore contents | |
230 | * to/from host DRAM when sleeping/waking for power-saving. | |
231 | * Each direction takes approximately 1/4 millisecond; with this | |
232 | * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a | |
233 | * series of register accesses are expected (e.g. reading Event Log), | |
234 | * to keep device from sleeping. | |
235 | * | |
236 | * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that | |
237 | * SRAM is okay/restored. We don't check that here because this call | |
238 | * is just for hardware register access; but GP1 MAC_SLEEP check is a | |
239 | * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log). | |
240 | * | |
241 | * 5000 series and later (including 1000 series) have non-volatile SRAM, | |
242 | * and do not save/restore SRAM when power cycling. | |
243 | */ | |
3395f6e9 | 244 | ret = _iwl_poll_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
245 | CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, |
246 | (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | | |
e9414b6b | 247 | CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); |
ac17a947 | 248 | if (ret < 0) { |
18d426c4 RC |
249 | val = _iwl_read32(priv, CSR_GP_CNTRL); |
250 | IWL_ERR(priv, "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val); | |
a8b50a0a | 251 | _iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI); |
b481de9c ZY |
252 | return -EIO; |
253 | } | |
254 | ||
b481de9c ZY |
255 | return 0; |
256 | } | |
257 | ||
0a6857e7 | 258 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 259 | static inline int __iwl_grab_nic_access(const char *f, u32 l, |
c79dd5b5 | 260 | struct iwl_priv *priv) |
b481de9c | 261 | { |
e1623446 | 262 | IWL_DEBUG_IO(priv, "grabbing nic access - %s %d\n", f, l); |
3395f6e9 | 263 | return _iwl_grab_nic_access(priv); |
b481de9c | 264 | } |
3395f6e9 TW |
265 | #define iwl_grab_nic_access(priv) \ |
266 | __iwl_grab_nic_access(__FILE__, __LINE__, priv) | |
b481de9c | 267 | #else |
3395f6e9 TW |
268 | #define iwl_grab_nic_access(priv) \ |
269 | _iwl_grab_nic_access(priv) | |
b481de9c ZY |
270 | #endif |
271 | ||
3395f6e9 | 272 | static inline void _iwl_release_nic_access(struct iwl_priv *priv) |
b481de9c | 273 | { |
a8b50a0a MA |
274 | _iwl_clear_bit(priv, CSR_GP_CNTRL, |
275 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | |
b481de9c | 276 | } |
0a6857e7 | 277 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 278 | static inline void __iwl_release_nic_access(const char *f, u32 l, |
c79dd5b5 | 279 | struct iwl_priv *priv) |
b481de9c | 280 | { |
b481de9c | 281 | |
e1623446 | 282 | IWL_DEBUG_IO(priv, "releasing nic access - %s %d\n", f, l); |
3395f6e9 | 283 | _iwl_release_nic_access(priv); |
b481de9c | 284 | } |
3395f6e9 TW |
285 | #define iwl_release_nic_access(priv) \ |
286 | __iwl_release_nic_access(__FILE__, __LINE__, priv) | |
b481de9c | 287 | #else |
3395f6e9 TW |
288 | #define iwl_release_nic_access(priv) \ |
289 | _iwl_release_nic_access(priv) | |
b481de9c ZY |
290 | #endif |
291 | ||
3395f6e9 | 292 | static inline u32 _iwl_read_direct32(struct iwl_priv *priv, u32 reg) |
b481de9c | 293 | { |
3395f6e9 | 294 | return _iwl_read32(priv, reg); |
b481de9c | 295 | } |
0a6857e7 | 296 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 297 | static inline u32 __iwl_read_direct32(const char *f, u32 l, |
c79dd5b5 | 298 | struct iwl_priv *priv, u32 reg) |
b481de9c | 299 | { |
3395f6e9 | 300 | u32 value = _iwl_read_direct32(priv, reg); |
91dd6c27 | 301 | IWL_DEBUG_IO(priv, "read_direct32(0x%4X) = 0x%08x - %s %d\n", reg, value, |
b481de9c ZY |
302 | f, l); |
303 | return value; | |
304 | } | |
a8b50a0a MA |
305 | static inline u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg) |
306 | { | |
307 | u32 value; | |
308 | unsigned long reg_flags; | |
309 | ||
310 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
311 | iwl_grab_nic_access(priv); | |
312 | value = __iwl_read_direct32(__FILE__, __LINE__, priv, reg); | |
313 | iwl_release_nic_access(priv); | |
314 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
315 | return value; | |
316 | } | |
317 | ||
b481de9c | 318 | #else |
a8b50a0a MA |
319 | static inline u32 iwl_read_direct32(struct iwl_priv *priv, u32 reg) |
320 | { | |
321 | u32 value; | |
322 | unsigned long reg_flags; | |
323 | ||
324 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
325 | iwl_grab_nic_access(priv); | |
326 | value = _iwl_read_direct32(priv, reg); | |
327 | iwl_release_nic_access(priv); | |
328 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
329 | return value; | |
330 | ||
331 | } | |
b481de9c ZY |
332 | #endif |
333 | ||
3395f6e9 | 334 | static inline void _iwl_write_direct32(struct iwl_priv *priv, |
b481de9c ZY |
335 | u32 reg, u32 value) |
336 | { | |
3395f6e9 | 337 | _iwl_write32(priv, reg, value); |
b481de9c | 338 | } |
a8b50a0a | 339 | static inline void iwl_write_direct32(struct iwl_priv *priv, u32 reg, u32 value) |
b481de9c | 340 | { |
a8b50a0a MA |
341 | unsigned long reg_flags; |
342 | ||
343 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
344 | if (!iwl_grab_nic_access(priv)) { | |
345 | _iwl_write_direct32(priv, reg, value); | |
346 | iwl_release_nic_access(priv); | |
347 | } | |
348 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c | 349 | } |
b481de9c | 350 | |
3395f6e9 | 351 | static inline void iwl_write_reg_buf(struct iwl_priv *priv, |
b481de9c ZY |
352 | u32 reg, u32 len, u32 *values) |
353 | { | |
354 | u32 count = sizeof(u32); | |
355 | ||
356 | if ((priv != NULL) && (values != NULL)) { | |
357 | for (; 0 < len; len -= count, reg += count, values++) | |
a8b50a0a | 358 | iwl_write_direct32(priv, reg, *values); |
b481de9c ZY |
359 | } |
360 | } | |
361 | ||
73d7b5ac ZY |
362 | static inline int _iwl_poll_direct_bit(struct iwl_priv *priv, u32 addr, |
363 | u32 mask, int timeout) | |
b481de9c | 364 | { |
a8b50a0a MA |
365 | int t = 0; |
366 | ||
367 | do { | |
368 | if ((iwl_read_direct32(priv, addr) & mask) == mask) | |
369 | return t; | |
370 | udelay(IWL_POLL_INTERVAL); | |
371 | t += IWL_POLL_INTERVAL; | |
372 | } while (t < timeout); | |
373 | ||
374 | return -ETIMEDOUT; | |
b481de9c ZY |
375 | } |
376 | ||
0a6857e7 | 377 | #ifdef CONFIG_IWLWIFI_DEBUG |
3395f6e9 | 378 | static inline int __iwl_poll_direct_bit(const char *f, u32 l, |
c79dd5b5 | 379 | struct iwl_priv *priv, |
b481de9c ZY |
380 | u32 addr, u32 mask, int timeout) |
381 | { | |
3395f6e9 | 382 | int ret = _iwl_poll_direct_bit(priv, addr, mask, timeout); |
b481de9c | 383 | |
ac17a947 | 384 | if (unlikely(ret == -ETIMEDOUT)) |
e1623446 | 385 | IWL_DEBUG_IO(priv, "poll_direct_bit(0x%08X, 0x%08X) - " |
b481de9c ZY |
386 | "timedout - %s %d\n", addr, mask, f, l); |
387 | else | |
e1623446 | 388 | IWL_DEBUG_IO(priv, "poll_direct_bit(0x%08X, 0x%08X) = 0x%08X " |
ac17a947 TW |
389 | "- %s %d\n", addr, mask, ret, f, l); |
390 | return ret; | |
b481de9c | 391 | } |
3395f6e9 TW |
392 | #define iwl_poll_direct_bit(priv, addr, mask, timeout) \ |
393 | __iwl_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout) | |
b481de9c | 394 | #else |
3395f6e9 | 395 | #define iwl_poll_direct_bit _iwl_poll_direct_bit |
b481de9c ZY |
396 | #endif |
397 | ||
3395f6e9 | 398 | static inline u32 _iwl_read_prph(struct iwl_priv *priv, u32 reg) |
b481de9c | 399 | { |
3395f6e9 | 400 | _iwl_write_direct32(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24)); |
a8ec42c1 | 401 | rmb(); |
3395f6e9 | 402 | return _iwl_read_direct32(priv, HBUS_TARG_PRPH_RDAT); |
b481de9c | 403 | } |
a8b50a0a | 404 | static inline u32 iwl_read_prph(struct iwl_priv *priv, u32 reg) |
b481de9c | 405 | { |
a8b50a0a MA |
406 | unsigned long reg_flags; |
407 | u32 val; | |
b481de9c | 408 | |
a8b50a0a MA |
409 | spin_lock_irqsave(&priv->reg_lock, reg_flags); |
410 | iwl_grab_nic_access(priv); | |
411 | val = _iwl_read_prph(priv, reg); | |
412 | iwl_release_nic_access(priv); | |
413 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
414 | return val; | |
415 | } | |
b481de9c | 416 | |
3395f6e9 | 417 | static inline void _iwl_write_prph(struct iwl_priv *priv, |
b481de9c ZY |
418 | u32 addr, u32 val) |
419 | { | |
3395f6e9 | 420 | _iwl_write_direct32(priv, HBUS_TARG_PRPH_WADDR, |
b481de9c | 421 | ((addr & 0x0000FFFF) | (3 << 24))); |
a8ec42c1 | 422 | wmb(); |
3395f6e9 | 423 | _iwl_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val); |
b481de9c | 424 | } |
a8b50a0a MA |
425 | |
426 | static inline void iwl_write_prph(struct iwl_priv *priv, u32 addr, u32 val) | |
b481de9c | 427 | { |
a8b50a0a | 428 | unsigned long reg_flags; |
b481de9c | 429 | |
a8b50a0a MA |
430 | spin_lock_irqsave(&priv->reg_lock, reg_flags); |
431 | if (!iwl_grab_nic_access(priv)) { | |
432 | _iwl_write_prph(priv, addr, val); | |
433 | iwl_release_nic_access(priv); | |
434 | } | |
435 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
436 | } | |
b481de9c | 437 | |
3395f6e9 TW |
438 | #define _iwl_set_bits_prph(priv, reg, mask) \ |
439 | _iwl_write_prph(priv, reg, (_iwl_read_prph(priv, reg) | mask)) | |
a8b50a0a MA |
440 | |
441 | static inline void iwl_set_bits_prph(struct iwl_priv *priv, u32 reg, u32 mask) | |
b481de9c | 442 | { |
a8b50a0a | 443 | unsigned long reg_flags; |
ac17a947 | 444 | |
a8b50a0a MA |
445 | spin_lock_irqsave(&priv->reg_lock, reg_flags); |
446 | iwl_grab_nic_access(priv); | |
3395f6e9 | 447 | _iwl_set_bits_prph(priv, reg, mask); |
a8b50a0a MA |
448 | iwl_release_nic_access(priv); |
449 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c | 450 | } |
b481de9c | 451 | |
3395f6e9 TW |
452 | #define _iwl_set_bits_mask_prph(priv, reg, bits, mask) \ |
453 | _iwl_write_prph(priv, reg, ((_iwl_read_prph(priv, reg) & mask) | bits)) | |
d8609652 | 454 | |
a8b50a0a MA |
455 | static inline void iwl_set_bits_mask_prph(struct iwl_priv *priv, u32 reg, |
456 | u32 bits, u32 mask) | |
b481de9c | 457 | { |
a8b50a0a MA |
458 | unsigned long reg_flags; |
459 | ||
460 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
461 | iwl_grab_nic_access(priv); | |
3395f6e9 | 462 | _iwl_set_bits_mask_prph(priv, reg, bits, mask); |
a8b50a0a MA |
463 | iwl_release_nic_access(priv); |
464 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c | 465 | } |
b481de9c | 466 | |
3395f6e9 | 467 | static inline void iwl_clear_bits_prph(struct iwl_priv |
b481de9c ZY |
468 | *priv, u32 reg, u32 mask) |
469 | { | |
a8b50a0a MA |
470 | unsigned long reg_flags; |
471 | u32 val; | |
472 | ||
473 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
474 | iwl_grab_nic_access(priv); | |
475 | val = _iwl_read_prph(priv, reg); | |
3395f6e9 | 476 | _iwl_write_prph(priv, reg, (val & ~mask)); |
a8b50a0a MA |
477 | iwl_release_nic_access(priv); |
478 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c ZY |
479 | } |
480 | ||
3395f6e9 | 481 | static inline u32 iwl_read_targ_mem(struct iwl_priv *priv, u32 addr) |
b481de9c | 482 | { |
a8b50a0a MA |
483 | unsigned long reg_flags; |
484 | u32 value; | |
485 | ||
486 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
487 | iwl_grab_nic_access(priv); | |
488 | ||
489 | _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr); | |
a8ec42c1 | 490 | rmb(); |
a8b50a0a MA |
491 | value = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
492 | ||
493 | iwl_release_nic_access(priv); | |
494 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
495 | return value; | |
b481de9c ZY |
496 | } |
497 | ||
3395f6e9 | 498 | static inline void iwl_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val) |
b481de9c | 499 | { |
a8b50a0a MA |
500 | unsigned long reg_flags; |
501 | ||
502 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
503 | if (!iwl_grab_nic_access(priv)) { | |
504 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); | |
505 | wmb(); | |
506 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, val); | |
507 | iwl_release_nic_access(priv); | |
508 | } | |
509 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c ZY |
510 | } |
511 | ||
3395f6e9 | 512 | static inline void iwl_write_targ_mem_buf(struct iwl_priv *priv, u32 addr, |
af7cca2a | 513 | u32 len, u32 *values) |
b481de9c | 514 | { |
a8b50a0a MA |
515 | unsigned long reg_flags; |
516 | ||
517 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | |
518 | if (!iwl_grab_nic_access(priv)) { | |
519 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr); | |
520 | wmb(); | |
521 | for (; 0 < len; len -= sizeof(u32), values++) | |
522 | _iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values); | |
523 | ||
524 | iwl_release_nic_access(priv); | |
525 | } | |
526 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | |
b481de9c | 527 | } |
b481de9c | 528 | #endif |