iwlwifi: move iwl4965_mac_ampdu_action to iwl4965-base.c
[linux-2.6-block.git] / drivers / net / wireless / iwlwifi / iwl-dev.h
CommitLineData
b481de9c
ZY
1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
fcd427bb 26/*
3e0d4cb1 27 * Please use this file (iwl-dev.h) for driver implementation definitions.
5a36ba0e 28 * Please use iwl-commands.h for uCode API definitions.
fcd427bb
BC
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
be1f3ab6
EG
32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
b481de9c 34
5d08cd1d
CH
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
5d08cd1d 39#define DRV_NAME "iwl4965"
ad97edd2 40#include "iwl-rfkill.h"
6bc913bd 41#include "iwl-eeprom.h"
5d08cd1d 42#include "iwl-4965-hw.h"
6f83eaa1 43#include "iwl-csr.h"
5d08cd1d 44#include "iwl-prph.h"
0a6857e7 45#include "iwl-debug.h"
ab53d8af 46#include "iwl-led.h"
5da4b55f 47#include "iwl-power.h"
5d08cd1d 48
fed9017e
RR
49/* configuration for the iwl4965 */
50extern struct iwl_cfg iwl4965_agn_cfg;
5a6a256e
TW
51extern struct iwl_cfg iwl5300_agn_cfg;
52extern struct iwl_cfg iwl5100_agn_cfg;
53extern struct iwl_cfg iwl5350_agn_cfg;
47408639
EK
54extern struct iwl_cfg iwl5100_bg_cfg;
55extern struct iwl_cfg iwl5100_abg_cfg;
fed9017e 56
099b40b7
RR
57/* CT-KILL constants */
58#define CT_KILL_THRESHOLD 110 /* in Celsius */
4bf775cd 59
5d08cd1d
CH
60/* Default noise level to report when noise measurement is not available.
61 * This may be because we're:
62 * 1) Not associated (4965, no beacon statistics being sent to driver)
63 * 2) Scanning (noise measurement does not apply to associated channel)
64 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
65 * Use default noise value of -127 ... this is below the range of measurable
66 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
67 * Also, -127 works better than 0 when averaging frames with/without
68 * noise info (e.g. averaging might be done in app); measured dBm values are
69 * always negative ... using a negative value as the default keeps all
70 * averages within an s8's (used in some apps) range of negative values. */
71#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
72
5d08cd1d
CH
73/*
74 * RTS threshold here is total size [2347] minus 4 FCS bytes
75 * Per spec:
76 * a value of 0 means RTS on all data/management packets
77 * a value > max MSDU size means no RTS
78 * else RTS for data/management frames where MPDU is larger
79 * than RTS value.
80 */
81#define DEFAULT_RTS_THRESHOLD 2347U
82#define MIN_RTS_THRESHOLD 0U
83#define MAX_RTS_THRESHOLD 2347U
84#define MAX_MSDU_SIZE 2304U
85#define MAX_MPDU_SIZE 2346U
86#define DEFAULT_BEACON_INTERVAL 100U
87#define DEFAULT_SHORT_RETRY_LIMIT 7U
88#define DEFAULT_LONG_RETRY_LIMIT 4U
89
a55360e4 90struct iwl_rx_mem_buffer {
5d08cd1d
CH
91 dma_addr_t dma_addr;
92 struct sk_buff *skb;
93 struct list_head list;
94};
95
5d08cd1d
CH
96/*
97 * Generic queue structure
98 *
99 * Contains common data for Rx and Tx queues
100 */
443cfd45 101struct iwl_queue {
5d08cd1d
CH
102 int n_bd; /* number of BDs in this queue */
103 int write_ptr; /* 1-st empty entry (index) host_w*/
104 int read_ptr; /* last used entry (index) host_r*/
105 dma_addr_t dma_addr; /* physical addr for BD's */
106 int n_window; /* safe queue window */
107 u32 id;
108 int low_mark; /* low watermark, resume queue if free
109 * space more than this */
110 int high_mark; /* high watermark, stop queue if free
111 * space less than this */
112} __attribute__ ((packed));
113
114#define MAX_NUM_OF_TBS (20)
115
bc47279f 116/* One for each TFD */
8567c63e 117struct iwl_tx_info {
5d08cd1d
CH
118 struct sk_buff *skb[MAX_NUM_OF_TBS];
119};
120
121/**
16466903 122 * struct iwl_tx_queue - Tx Queue for DMA
bc47279f
BC
123 * @q: generic Rx/Tx queue descriptor
124 * @bd: base of circular buffer of TFDs
125 * @cmd: array of command/Tx buffers
126 * @dma_addr_cmd: physical address of cmd/tx buffer array
127 * @txb: array of per-TFD driver data
128 * @need_update: indicates need to update read/write index
129 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
5d08cd1d 130 *
bc47279f
BC
131 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
132 * descriptors) and required locking structures.
5d08cd1d 133 */
16466903 134struct iwl_tx_queue {
443cfd45 135 struct iwl_queue q;
1053d35f 136 struct iwl_tfd_frame *bd;
857485c0 137 struct iwl_cmd *cmd;
5d08cd1d 138 dma_addr_t dma_addr_cmd;
8567c63e 139 struct iwl_tx_info *txb;
5d08cd1d
CH
140 int need_update;
141 int sched_retry;
142 int active;
143};
144
145#define IWL_NUM_SCAN_RATES (2)
146
bb8c093b 147struct iwl4965_channel_tgd_info {
5d08cd1d
CH
148 u8 type;
149 s8 max_power;
150};
151
bb8c093b 152struct iwl4965_channel_tgh_info {
5d08cd1d
CH
153 s64 last_radar_time;
154};
155
5d08cd1d
CH
156/*
157 * One for each channel, holds all channel setup data
158 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
159 * with one another!
160 */
bf85ea4f 161struct iwl_channel_info {
bb8c093b
CH
162 struct iwl4965_channel_tgd_info tgd;
163 struct iwl4965_channel_tgh_info tgh;
073d3f5f
TW
164 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
165 struct iwl_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
166 * FAT channel */
5d08cd1d
CH
167
168 u8 channel; /* channel number */
169 u8 flags; /* flags copied from EEPROM */
170 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
fcd427bb 171 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
5d08cd1d
CH
172 s8 min_power; /* always 0 */
173 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
174
175 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
176 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
8318d78a 177 enum ieee80211_band band;
5d08cd1d 178
5d08cd1d
CH
179 /* FAT channel info */
180 s8 fat_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
181 s8 fat_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
182 s8 fat_min_power; /* always 0 */
183 s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */
184 u8 fat_flags; /* flags copied from EEPROM */
fcd427bb 185 u8 fat_extension_channel; /* HT_IE_EXT_CHANNEL_* */
5d08cd1d
CH
186};
187
bb8c093b 188struct iwl4965_clip_group {
5d08cd1d
CH
189 /* maximum power level to prevent clipping for each rate, derived by
190 * us from this band's saturation power in EEPROM */
191 const s8 clip_powers[IWL_MAX_RATES];
192};
193
194#include "iwl-4965-rs.h"
195
196#define IWL_TX_FIFO_AC0 0
197#define IWL_TX_FIFO_AC1 1
198#define IWL_TX_FIFO_AC2 2
199#define IWL_TX_FIFO_AC3 3
200#define IWL_TX_FIFO_HCCA_1 5
201#define IWL_TX_FIFO_HCCA_2 6
202#define IWL_TX_FIFO_NONE 7
203
204/* Minimum number of queues. MAX_NUM is defined in hw specific files */
205#define IWL_MIN_NUM_QUEUES 4
206
207/* Power management (not Tx power) structures */
208
6f4083aa
TW
209enum iwl_pwr_src {
210 IWL_PWR_SRC_VMAIN,
211 IWL_PWR_SRC_VAUX,
212};
213
5d08cd1d
CH
214#define IEEE80211_DATA_LEN 2304
215#define IEEE80211_4ADDR_LEN 30
216#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
217#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
218
fcab423d 219struct iwl_frame {
5d08cd1d
CH
220 union {
221 struct ieee80211_hdr frame;
bb8c093b 222 struct iwl4965_tx_beacon_cmd beacon;
5d08cd1d
CH
223 u8 raw[IEEE80211_FRAME_LEN];
224 u8 cmd[360];
225 } u;
226 struct list_head list;
227};
228
229#define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf)
230#define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8)
a0b484fe
JB
231#define SEQ_TO_INDEX(x) ((u8)(x & 0xff))
232#define INDEX_TO_SEQ(x) ((u8)(x & 0xff))
5d08cd1d
CH
233#define SEQ_HUGE_FRAME (0x4000)
234#define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000)
235#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
236#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
237#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
238
239enum {
240 /* CMD_SIZE_NORMAL = 0, */
241 CMD_SIZE_HUGE = (1 << 0),
242 /* CMD_SYNC = 0, */
243 CMD_ASYNC = (1 << 1),
244 /* CMD_NO_SKB = 0, */
245 CMD_WANT_SKB = (1 << 2),
246};
247
857485c0 248struct iwl_cmd;
c79dd5b5 249struct iwl_priv;
5d08cd1d 250
857485c0
TW
251struct iwl_cmd_meta {
252 struct iwl_cmd_meta *source;
5d08cd1d
CH
253 union {
254 struct sk_buff *skb;
c79dd5b5 255 int (*callback)(struct iwl_priv *priv,
857485c0 256 struct iwl_cmd *cmd, struct sk_buff *skb);
5d08cd1d
CH
257 } __attribute__ ((packed)) u;
258
259 /* The CMD_SIZE_HUGE flag bit indicates that the command
260 * structure is stored at the end of the shared queue memory. */
261 u32 flags;
262
263} __attribute__ ((packed));
264
d2f18bfd 265#define IWL_CMD_MAX_PAYLOAD 320
bd68fb6f 266
bc47279f 267/**
857485c0 268 * struct iwl_cmd
bc47279f
BC
269 *
270 * For allocation of the command and tx queues, this establishes the overall
271 * size of the largest command we send to uCode, except for a scan command
272 * (which is relatively huge; space is allocated separately).
273 */
857485c0
TW
274struct iwl_cmd {
275 struct iwl_cmd_meta meta; /* driver data */
276 struct iwl_cmd_header hdr; /* uCode API */
5d08cd1d 277 union {
133636de 278 struct iwl_addsta_cmd addsta;
ec1a7460 279 struct iwl_led_cmd led;
5d08cd1d
CH
280 u32 flags;
281 u8 val8;
282 u16 val16;
283 u32 val32;
bb8c093b
CH
284 struct iwl4965_bt_cmd bt;
285 struct iwl4965_rxon_time_cmd rxon_time;
ca579617 286 struct iwl_powertable_cmd powertable;
1ff50bda 287 struct iwl_qosparam_cmd qosparam;
83d527d9 288 struct iwl_tx_cmd tx;
bb8c093b
CH
289 struct iwl4965_tx_beacon_cmd tx_beacon;
290 struct iwl4965_rxon_assoc_cmd rxon_assoc;
7a999bf0 291 struct iwl_rem_sta_cmd rm_sta;
5d08cd1d 292 u8 *indirect;
bd68fb6f 293 u8 payload[IWL_CMD_MAX_PAYLOAD];
5d08cd1d
CH
294 } __attribute__ ((packed)) cmd;
295} __attribute__ ((packed));
296
857485c0 297struct iwl_host_cmd {
5d08cd1d
CH
298 u8 id;
299 u16 len;
857485c0 300 struct iwl_cmd_meta meta;
5d08cd1d
CH
301 const void *data;
302};
303
857485c0
TW
304#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_cmd) - \
305 sizeof(struct iwl_cmd_meta))
5d08cd1d
CH
306
307/*
308 * RX related structures and functions
309 */
310#define RX_FREE_BUFFERS 64
311#define RX_LOW_WATERMARK 8
312
313#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
314#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
315#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
316
317/**
a55360e4 318 * struct iwl_rx_queue - Rx queue
5d08cd1d
CH
319 * @processed: Internal index to last handled Rx packet
320 * @read: Shared index to newest available Rx buffer
321 * @write: Shared index to oldest written Rx packet
322 * @free_count: Number of pre-allocated buffers in rx_free
323 * @rx_free: list of free SKBs for use
324 * @rx_used: List of Rx buffers with no SKB
325 * @need_update: flag to indicate we need to update read/write index
326 *
a55360e4 327 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
5d08cd1d 328 */
a55360e4 329struct iwl_rx_queue {
5d08cd1d
CH
330 __le32 *bd;
331 dma_addr_t dma_addr;
a55360e4
TW
332 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
333 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH
334 u32 processed;
335 u32 read;
336 u32 write;
337 u32 free_count;
338 struct list_head rx_free;
339 struct list_head rx_used;
340 int need_update;
341 spinlock_t lock;
342};
343
344#define IWL_SUPPORTED_RATES_IE_LEN 8
345
346#define SCAN_INTERVAL 100
347
348#define MAX_A_CHANNELS 252
349#define MIN_A_CHANNELS 7
350
351#define MAX_B_CHANNELS 14
352#define MIN_B_CHANNELS 1
353
5d08cd1d
CH
354#define MAX_TID_COUNT 9
355
356#define IWL_INVALID_RATE 0xFF
357#define IWL_INVALID_VALUE -1
358
bc47279f 359/**
6def9761 360 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
bc47279f
BC
361 * @txq_id: Tx queue used for Tx attempt
362 * @frame_count: # frames attempted by Tx command
363 * @wait_for_ba: Expect block-ack before next Tx reply
364 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
365 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
366 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
367 * @rate_n_flags: Rate at which Tx was attempted
368 *
369 * If REPLY_TX indicates that aggregation was attempted, driver must wait
370 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
371 * until block ack arrives.
372 */
6def9761 373struct iwl_ht_agg {
5d08cd1d
CH
374 u16 txq_id;
375 u16 frame_count;
376 u16 wait_for_ba;
377 u16 start_idx;
fe01b477 378 u64 bitmap;
5d08cd1d 379 u32 rate_n_flags;
fe01b477
RR
380#define IWL_AGG_OFF 0
381#define IWL_AGG_ON 1
382#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
383#define IWL_EMPTYING_HW_QUEUE_DELBA 3
384 u8 state;
5d08cd1d 385};
fe01b477 386
5d08cd1d 387
6def9761 388struct iwl_tid_data {
5d08cd1d 389 u16 seq_number;
fe01b477 390 u16 tfds_in_queue;
6def9761 391 struct iwl_ht_agg agg;
5d08cd1d
CH
392};
393
6def9761 394struct iwl_hw_key {
5d08cd1d
CH
395 enum ieee80211_key_alg alg;
396 int keylen;
0211ddda 397 u8 keyidx;
5d08cd1d
CH
398 u8 key[32];
399};
400
bb8c093b 401union iwl4965_ht_rate_supp {
5d08cd1d
CH
402 u16 rates;
403 struct {
404 u8 siso_rate;
405 u8 mimo_rate;
406 };
407};
408
5d08cd1d 409#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
5d08cd1d
CH
410#define CFG_HT_MPDU_DENSITY_2USEC (0x5)
411#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_2USEC
412
9e0cc6de
RR
413struct iwl_ht_info {
414 /* self configuration data */
5d08cd1d 415 u8 is_ht;
9e0cc6de 416 u8 supported_chan_width;
5d08cd1d 417 u16 tx_mimo_ps_mode;
9e0cc6de 418 u8 is_green_field;
bb54244b 419 u8 sgf; /* HT_SHORT_GI_* short guard interval */
5d08cd1d
CH
420 u8 max_amsdu_size;
421 u8 ampdu_factor;
422 u8 mpdu_density;
9e0cc6de
RR
423 u8 supp_mcs_set[16];
424 /* BSS related data */
425 u8 control_channel;
5d08cd1d 426 u8 extension_chan_offset;
5d08cd1d 427 u8 tx_chan_width;
9e0cc6de
RR
428 u8 ht_protection;
429 u8 non_GF_STA_present;
5d08cd1d 430};
5d08cd1d 431
1ff50bda 432union iwl_qos_capabity {
5d08cd1d
CH
433 struct {
434 u8 edca_count:4; /* bit 0-3 */
435 u8 q_ack:1; /* bit 4 */
436 u8 queue_request:1; /* bit 5 */
437 u8 txop_request:1; /* bit 6 */
438 u8 reserved:1; /* bit 7 */
439 } q_AP;
440 struct {
441 u8 acvo_APSD:1; /* bit 0 */
442 u8 acvi_APSD:1; /* bit 1 */
443 u8 ac_bk_APSD:1; /* bit 2 */
444 u8 ac_be_APSD:1; /* bit 3 */
445 u8 q_ack:1; /* bit 4 */
446 u8 max_len:2; /* bit 5-6 */
447 u8 more_data_ack:1; /* bit 7 */
448 } q_STA;
449 u8 val;
450};
451
452/* QoS structures */
1ff50bda 453struct iwl_qos_info {
5d08cd1d
CH
454 int qos_enable;
455 int qos_active;
1ff50bda
EG
456 union iwl_qos_capabity qos_cap;
457 struct iwl_qosparam_cmd def_qos_parm;
5d08cd1d 458};
5d08cd1d
CH
459
460#define STA_PS_STATUS_WAKE 0
461#define STA_PS_STATUS_SLEEP 1
462
6def9761 463struct iwl_station_entry {
133636de 464 struct iwl_addsta_cmd sta;
6def9761 465 struct iwl_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH
466 u8 used;
467 u8 ps_status;
6def9761 468 struct iwl_hw_key keyinfo;
5d08cd1d
CH
469};
470
471/* one for each uCode image (inst/data, boot/init/runtime) */
472struct fw_desc {
473 void *v_addr; /* access by driver */
474 dma_addr_t p_addr; /* access by card's busmaster DMA */
475 u32 len; /* bytes */
476};
477
478/* uCode file layout */
14b3d338 479struct iwl_ucode {
5d08cd1d
CH
480 __le32 ver; /* major/minor/subminor */
481 __le32 inst_size; /* bytes of runtime instructions */
482 __le32 data_size; /* bytes of runtime data */
483 __le32 init_size; /* bytes of initialization instructions */
484 __le32 init_data_size; /* bytes of initialization data */
485 __le32 boot_size; /* bytes of bootstrap instructions */
486 u8 data[0]; /* data in same order as "size" elements */
487};
488
bb8c093b 489struct iwl4965_ibss_seq {
5d08cd1d
CH
490 u8 mac[ETH_ALEN];
491 u16 seq_num;
492 u16 frag_num;
493 unsigned long packet_time;
494 struct list_head list;
495};
496
f0832f13
EG
497struct iwl_sensitivity_ranges {
498 u16 min_nrg_cck;
499 u16 max_nrg_cck;
500
501 u16 nrg_th_cck;
502 u16 nrg_th_ofdm;
503
504 u16 auto_corr_min_ofdm;
505 u16 auto_corr_min_ofdm_mrc;
506 u16 auto_corr_min_ofdm_x1;
507 u16 auto_corr_min_ofdm_mrc_x1;
508
509 u16 auto_corr_max_ofdm;
510 u16 auto_corr_max_ofdm_mrc;
511 u16 auto_corr_max_ofdm_x1;
512 u16 auto_corr_max_ofdm_mrc_x1;
513
514 u16 auto_corr_max_cck;
515 u16 auto_corr_max_cck_mrc;
516 u16 auto_corr_min_cck;
517 u16 auto_corr_min_cck_mrc;
518};
519
099b40b7
RR
520
521#define IWL_FAT_CHANNEL_52 BIT(IEEE80211_BAND_5GHZ)
522
bc47279f 523/**
5425e490 524 * struct iwl_hw_params
bc47279f 525 * @max_txq_num: Max # Tx queues supported
099b40b7
RR
526 * @tx/rx_chains_num: Number of TX/RX chains
527 * @valid_tx/rx_ant: usable antennas
bc47279f 528 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
bc47279f 529 * @max_rxq_log: Log-base-2 of max_rxq_size
099b40b7 530 * @rx_buf_size: Rx buffer size
bc47279f
BC
531 * @max_stations:
532 * @bcast_sta_id:
099b40b7
RR
533 * @fat_channel: is 40MHz width possible in band 2.4
534 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
535 * @sw_crypto: 0 for hw, 1 for sw
536 * @max_xxx_size: for ucode uses
537 * @ct_kill_threshold: temperature threshold
f0832f13 538 * @struct iwl_sensitivity_ranges: range of sensitivity values
7f3e4bb6 539 * @first_ampdu_q: first HW queue available for ampdu
bc47279f 540 */
5425e490 541struct iwl_hw_params {
5d08cd1d 542 u16 max_txq_num;
ec35cf2a
TW
543 u8 tx_chains_num;
544 u8 rx_chains_num;
545 u8 valid_tx_ant;
546 u8 valid_rx_ant;
5d08cd1d 547 u16 max_rxq_size;
ec35cf2a 548 u16 max_rxq_log;
9ee1ba47
RR
549 u32 rx_buf_size;
550 u32 max_pkt_size;
5d08cd1d
CH
551 u8 max_stations;
552 u8 bcast_sta_id;
099b40b7
RR
553 u8 fat_channel;
554 u8 sw_crypto;
555 u32 max_inst_size;
556 u32 max_data_size;
557 u32 max_bsm_size;
558 u32 ct_kill_threshold; /* value in hw-dependent units */
f0832f13 559 const struct iwl_sensitivity_ranges *sens;
7f3e4bb6 560 u8 first_ampdu_q;
5d08cd1d
CH
561};
562
a9841013
EG
563#define HT_SHORT_GI_20MHZ (1 << 0)
564#define HT_SHORT_GI_40MHZ (1 << 1)
5d08cd1d
CH
565
566
bb8c093b 567#define IWL_RX_HDR(x) ((struct iwl4965_rx_frame_hdr *)(\
5d08cd1d
CH
568 x->u.rx_frame.stats.payload + \
569 x->u.rx_frame.stats.phy_count))
bb8c093b 570#define IWL_RX_END(x) ((struct iwl4965_rx_frame_end *)(\
5d08cd1d
CH
571 IWL_RX_HDR(x)->payload + \
572 le16_to_cpu(IWL_RX_HDR(x)->len)))
573#define IWL_RX_STATS(x) (&x->u.rx_frame.stats)
574#define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload)
575
576
577/******************************************************************************
578 *
579 * Functions implemented in iwl-base.c which are forward declared here
580 * for use by iwl-*.c
581 *
582 *****************************************************************************/
133636de
TW
583struct iwl_addsta_cmd;
584extern int iwl_send_add_sta(struct iwl_priv *priv,
585 struct iwl_addsta_cmd *sta, u8 flags);
4f40e4d9
TW
586u8 iwl_add_station_flags(struct iwl_priv *priv, const u8 *addr, int is_ap,
587 u8 flags, struct ieee80211_ht_info *ht_info);
c79dd5b5 588extern unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
5d08cd1d
CH
589 struct ieee80211_hdr *hdr,
590 const u8 *dest, int left);
5da4b55f 591extern void iwl4965_update_chain_flags(struct iwl_priv *priv);
079a2533 592int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
ca579617 593extern int iwl4965_set_power(struct iwl_priv *priv, void *cmd);
079a2533 594
57bd1bea 595extern const u8 iwl_bcast_addr[ETH_ALEN];
5d08cd1d
CH
596
597/******************************************************************************
598 *
599 * Functions implemented in iwl-[34]*.c which are forward declared here
600 * for use by iwl-base.c
601 *
602 * NOTE: The implementation of these functions are hardware specific
603 * which is why they are in the hardware specific files (vs. iwl-base.c)
604 *
605 * Naming convention --
bb8c093b
CH
606 * iwl4965_ <-- Its part of iwlwifi (should be changed to iwl4965_)
607 * iwl4965_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW)
5d08cd1d 608 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH
609 * iwl4965_bg_ <-- Called from work queue context
610 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH
611 *
612 ****************************************************************************/
b3bbacb7 613extern int iwl_rxq_stop(struct iwl_priv *priv);
da1bc453 614extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
c79dd5b5 615extern unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
fcab423d 616 struct iwl_frame *frame, u8 rate);
c79dd5b5 617extern void iwl4965_disable_events(struct iwl_priv *priv);
5d08cd1d 618
c79dd5b5 619extern int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel);
443cfd45 620extern int iwl_queue_space(const struct iwl_queue *q);
fd4abac5
TW
621static inline int iwl_queue_used(const struct iwl_queue *q, int i)
622{
623 return q->write_ptr > q->read_ptr ?
624 (i >= q->read_ptr && i < q->write_ptr) :
625 !(i < q->read_ptr && i >= q->write_ptr);
626}
627
628
629static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
630{
631 /* This is for scan command, the big buffer at end of command array */
632 if (is_huge)
633 return q->n_window; /* must be power of 2 */
634
635 /* Otherwise, use normal size buffers */
636 return index & (q->n_window - 1);
637}
638
639
c79dd5b5 640struct iwl_priv;
b481de9c
ZY
641
642/*
643 * Forward declare iwl-4965.c functions for iwl-base.c
644 */
c79dd5b5 645extern void iwl4965_rf_kill_ct_config(struct iwl_priv *priv);
c79dd5b5 646int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
fe01b477 647 u8 tid, int txq_id);
78330fdd 648
b481de9c
ZY
649/* Structures, enum, and defines specific to the 4965 */
650
16466903 651#define IWL_KW_SIZE 0x1000 /*4k */
b481de9c 652
16466903 653struct iwl_kw {
b481de9c
ZY
654 dma_addr_t dma_addr;
655 void *v_addr;
656 size_t size;
657};
658
b481de9c
ZY
659#define IWL_CHANNEL_WIDTH_20MHZ 0
660#define IWL_CHANNEL_WIDTH_40MHZ 1
661
662#define IWL_MIMO_PS_STATIC 0
663#define IWL_MIMO_PS_NONE 3
664#define IWL_MIMO_PS_DYNAMIC 1
665#define IWL_MIMO_PS_INVALID 2
666
667#define IWL_OPERATION_MODE_AUTO 0
668#define IWL_OPERATION_MODE_HT_ONLY 1
669#define IWL_OPERATION_MODE_MIXED 2
670#define IWL_OPERATION_MODE_20MHZ 3
671
3195cdb7
TW
672#define IWL_TX_CRC_SIZE 4
673#define IWL_TX_DELIMITER_SIZE 4
b481de9c 674
b481de9c 675#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
b481de9c 676
bb8c093b 677struct iwl4965_lq_mngr {
b481de9c
ZY
678 spinlock_t lock;
679 s32 max_window_size;
680 s32 *expected_tpt;
681 u8 *next_higher_rate;
682 u8 *next_lower_rate;
683 unsigned long stamp;
684 unsigned long stamp_last;
685 u32 flush_time;
686 u32 tx_packets;
b481de9c
ZY
687};
688
b481de9c
ZY
689/* Sensitivity and chain noise calibration */
690#define INTERFERENCE_DATA_AVAILABLE __constant_cpu_to_le32(1)
691#define INITIALIZATION_VALUE 0xFFFF
692#define CAL_NUM_OF_BEACONS 20
693#define MAXIMUM_ALLOWED_PATHLOSS 15
694
b481de9c
ZY
695#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
696
697#define MAX_FA_OFDM 50
698#define MIN_FA_OFDM 5
699#define MAX_FA_CCK 50
700#define MIN_FA_CCK 5
701
b481de9c
ZY
702#define AUTO_CORR_STEP_OFDM 1
703
b481de9c
ZY
704#define AUTO_CORR_STEP_CCK 3
705#define AUTO_CORR_MAX_TH_CCK 160
706
b481de9c
ZY
707#define NRG_DIFF 2
708#define NRG_STEP_CCK 2
709#define NRG_MARGIN 8
710#define MAX_NUMBER_CCK_NO_FA 100
711
712#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
713
714#define CHAIN_A 0
715#define CHAIN_B 1
716#define CHAIN_C 2
717#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
718#define ALL_BAND_FILTER 0xFF00
719#define IN_BAND_FILTER 0xFF
720#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
721
3195cdb7
TW
722#define NRG_NUM_PREV_STAT_L 20
723#define NUM_RX_CHAINS 3
724
bb8c093b 725enum iwl4965_false_alarm_state {
b481de9c
ZY
726 IWL_FA_TOO_MANY = 0,
727 IWL_FA_TOO_FEW = 1,
728 IWL_FA_GOOD_RANGE = 2,
729};
730
bb8c093b 731enum iwl4965_chain_noise_state {
b481de9c
ZY
732 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
733 IWL_CHAIN_NOISE_ACCUMULATE = 1,
734 IWL_CHAIN_NOISE_CALIBRATED = 2,
735};
736
bb8c093b 737enum iwl4965_calib_enabled_state {
b481de9c
ZY
738 IWL_CALIB_DISABLED = 0, /* must be 0 */
739 IWL_CALIB_ENABLED = 1,
740};
741
742struct statistics_general_data {
743 u32 beacon_silence_rssi_a;
744 u32 beacon_silence_rssi_b;
745 u32 beacon_silence_rssi_c;
746 u32 beacon_energy_a;
747 u32 beacon_energy_b;
748 u32 beacon_energy_c;
749};
750
7c616cba
TW
751struct iwl_calib_results {
752 void *tx_iq_res;
753 void *tx_iq_perd_res;
754 void *lo_res;
755 u32 tx_iq_res_len;
756 u32 tx_iq_perd_res_len;
757 u32 lo_res_len;
758};
759
dbb983b7
RR
760enum ucode_type {
761 UCODE_NONE = 0,
762 UCODE_INIT,
763 UCODE_RT
764};
765
b481de9c 766/* Sensitivity calib data */
f0832f13 767struct iwl_sensitivity_data {
b481de9c
ZY
768 u32 auto_corr_ofdm;
769 u32 auto_corr_ofdm_mrc;
770 u32 auto_corr_ofdm_x1;
771 u32 auto_corr_ofdm_mrc_x1;
772 u32 auto_corr_cck;
773 u32 auto_corr_cck_mrc;
774
775 u32 last_bad_plcp_cnt_ofdm;
776 u32 last_fa_cnt_ofdm;
777 u32 last_bad_plcp_cnt_cck;
778 u32 last_fa_cnt_cck;
779
780 u32 nrg_curr_state;
781 u32 nrg_prev_state;
782 u32 nrg_value[10];
783 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
784 u32 nrg_silence_ref;
785 u32 nrg_energy_idx;
786 u32 nrg_silence_idx;
787 u32 nrg_th_cck;
788 s32 nrg_auto_corr_silence_diff;
789 u32 num_in_cck_no_fa;
790 u32 nrg_th_ofdm;
b481de9c
ZY
791};
792
793/* Chain noise (differential Rx gain) calib data */
f0832f13 794struct iwl_chain_noise_data {
b481de9c
ZY
795 u8 state;
796 u16 beacon_count;
797 u32 chain_noise_a;
798 u32 chain_noise_b;
799 u32 chain_noise_c;
800 u32 chain_signal_a;
801 u32 chain_signal_b;
802 u32 chain_signal_c;
803 u8 disconn_array[NUM_RX_CHAINS];
804 u8 delta_gain_code[NUM_RX_CHAINS];
805 u8 radio_write;
806};
807
abceddb4
BC
808#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
809#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
b481de9c 810
5d08cd1d 811
c8b0e6e1 812#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
5d08cd1d
CH
813
814enum {
815 MEASUREMENT_READY = (1 << 0),
816 MEASUREMENT_ACTIVE = (1 << 1),
817};
818
819#endif
820
dfe7d458
RR
821#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */
822
c79dd5b5 823struct iwl_priv {
5d08cd1d
CH
824
825 /* ieee device used by generic ieee processing code */
826 struct ieee80211_hw *hw;
827 struct ieee80211_channel *ieee_channels;
828 struct ieee80211_rate *ieee_rates;
82b9a121 829 struct iwl_cfg *cfg;
5d08cd1d
CH
830
831 /* temporary frame storage list */
832 struct list_head free_frames;
833 int frames_count;
834
8318d78a 835 enum ieee80211_band band;
5d08cd1d 836 int alloc_rxb_skb;
12342c47 837 bool add_radiotap;
5d08cd1d 838
c79dd5b5 839 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
a55360e4 840 struct iwl_rx_mem_buffer *rxb);
5d08cd1d 841
8318d78a 842 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
5d08cd1d 843
c8b0e6e1 844#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
5d08cd1d 845 /* spectrum measurement report caching */
bb8c093b 846 struct iwl4965_spectrum_notification measure_report;
5d08cd1d
CH
847 u8 measurement_status;
848#endif
849 /* ucode beacon time */
850 u32 ucode_beacon_time;
851
bb8c093b 852 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 853 * Access via channel # using indirect index array */
bf85ea4f 854 struct iwl_channel_info *channel_info; /* channel info array */
5d08cd1d
CH
855 u8 channel_count; /* # of channels */
856
857 /* each calibration channel group in the EEPROM has a derived
858 * clip setting for each rate. */
bb8c093b 859 const struct iwl4965_clip_group clip_groups[5];
5d08cd1d
CH
860
861 /* thermal calibration */
862 s32 temperature; /* degrees Kelvin */
863 s32 last_temperature;
864
7c616cba
TW
865 /* init calibration results */
866 struct iwl_calib_results calib_results;
867
5d08cd1d
CH
868 /* Scan related variables */
869 unsigned long last_scan_jiffies;
7878a5a4 870 unsigned long next_scan_jiffies;
5d08cd1d
CH
871 unsigned long scan_start;
872 unsigned long scan_pass_start;
873 unsigned long scan_start_tsf;
874 int scan_bands;
875 int one_direct_scan;
876 u8 direct_ssid_len;
877 u8 direct_ssid[IW_ESSID_MAX_SIZE];
2a421b91 878 struct iwl_scan_cmd *scan;
f53696de 879 u32 scan_tx_ant[IEEE80211_NUM_BANDS];
5d08cd1d
CH
880
881 /* spinlock */
882 spinlock_t lock; /* protect general shared data */
883 spinlock_t hcmd_lock; /* protect hcmd */
884 struct mutex mutex;
885
886 /* basic pci-network driver stuff */
887 struct pci_dev *pci_dev;
888
889 /* pci hardware address support */
890 void __iomem *hw_base;
b661c819
TW
891 u32 hw_rev;
892 u32 hw_wa_rev;
893 u8 rev_id;
5d08cd1d
CH
894
895 /* uCode images, save to reload in case of failure */
896 struct fw_desc ucode_code; /* runtime inst */
897 struct fw_desc ucode_data; /* runtime data original */
898 struct fw_desc ucode_data_backup; /* runtime data save/restore */
899 struct fw_desc ucode_init; /* initialization inst */
900 struct fw_desc ucode_init_data; /* initialization data */
901 struct fw_desc ucode_boot; /* bootstrap inst */
dbb983b7
RR
902 enum ucode_type ucode_type;
903 u8 ucode_write_complete; /* the image write is complete */
5d08cd1d
CH
904
905
bb8c093b 906 struct iwl4965_rxon_time_cmd rxon_timing;
5d08cd1d
CH
907
908 /* We declare this const so it can only be
909 * changed via explicit cast within the
910 * routines that actually update the physical
911 * hardware */
c1adf9fb
GG
912 const struct iwl_rxon_cmd active_rxon;
913 struct iwl_rxon_cmd staging_rxon;
5d08cd1d
CH
914
915 int error_recovering;
c1adf9fb 916 struct iwl_rxon_cmd recovery_rxon;
5d08cd1d
CH
917
918 /* 1st responses from initialize and runtime uCode images.
919 * 4965's initialize alive response contains some calibration data. */
885ba202
TW
920 struct iwl_init_alive_resp card_alive_init;
921 struct iwl_alive_resp card_alive;
eadd3c4b 922#ifdef CONFIG_IWLWIFI_RFKILL
80fcc9e2 923 struct rfkill *rfkill;
ad97edd2 924#endif
5d08cd1d 925
36316126 926#ifdef CONFIG_IWLWIFI_LEDS
0eee6127 927 struct iwl_led led[IWL_LED_TRG_MAX];
ab53d8af
MA
928 unsigned long last_blink_time;
929 u8 last_blink_rate;
930 u8 allow_blinking;
931 u64 led_tpt;
5d08cd1d
CH
932#endif
933
934 u16 active_rate;
935 u16 active_rate_basic;
936
5d08cd1d
CH
937 u8 assoc_station_added;
938 u8 use_ant_b_for_management_frame; /* Tx antenna selection */
5d08cd1d 939 u8 start_calib;
f0832f13
EG
940 struct iwl_sensitivity_data sensitivity_data;
941 struct iwl_chain_noise_data chain_noise_data;
5d08cd1d 942 __le16 sensitivity_tbl[HD_TABLE_SIZE];
5d08cd1d 943
9e0cc6de 944 struct iwl_ht_info current_ht_config;
5d08cd1d
CH
945 u8 last_phy_res[100];
946
947 /* Rate scaling data */
bb8c093b 948 struct iwl4965_lq_mngr lq_mngr;
5d08cd1d
CH
949
950 /* Rate scaling data */
951 s8 data_retry_limit;
952 u8 retry_rate;
953
954 wait_queue_head_t wait_command_queue;
955
956 int activity_timer_active;
957
958 /* Rx and Tx DMA processing queues */
a55360e4 959 struct iwl_rx_queue rxq;
16466903 960 struct iwl_tx_queue txq[IWL_MAX_NUM_QUEUES];
5d08cd1d 961 unsigned long txq_ctx_active_msk;
16466903 962 struct iwl_kw kw; /* keep warm address */
5d08cd1d
CH
963 u32 scd_base_addr; /* scheduler sram base address */
964
965 unsigned long status;
5d08cd1d
CH
966
967 int last_rx_rssi; /* From Rx packet statisitics */
968 int last_rx_noise; /* From beacon statistics */
969
19758bef
TW
970 /* counts mgmt, ctl, and data packets */
971 struct traffic_stats {
972 u32 cnt;
973 u64 bytes;
974 } tx_stats[3], rx_stats[3];
975
5da4b55f 976 struct iwl_power_mgr power_data;
5d08cd1d 977
8f91aecb 978 struct iwl_notif_statistics statistics;
5d08cd1d
CH
979 unsigned long last_statistics_time;
980
981 /* context information */
982 u8 essid[IW_ESSID_MAX_SIZE];
983 u8 essid_len;
984 u16 rates_mask;
985
986 u32 power_mode;
987 u32 antenna;
988 u8 bssid[ETH_ALEN];
989 u16 rts_threshold;
990 u8 mac_addr[ETH_ALEN];
991
992 /*station table variables */
993 spinlock_t sta_lock;
994 int num_stations;
6def9761 995 struct iwl_station_entry stations[IWL_STATION_COUNT];
6974e363
EG
996 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
997 u8 default_wep_key;
998 u8 key_mapping_key;
80fb47a1 999 unsigned long ucode_key_table;
5d08cd1d
CH
1000
1001 /* Indication if ieee80211_ops->open has been called */
69dc5d9d 1002 u8 is_open;
5d08cd1d
CH
1003
1004 u8 mac80211_registered;
5d08cd1d 1005
5d08cd1d
CH
1006 /* Rx'd packet timing information */
1007 u32 last_beacon_time;
1008 u64 last_tsf;
1009
5d08cd1d 1010 /* eeprom */
073d3f5f
TW
1011 u8 *eeprom;
1012 struct iwl_eeprom_calib_info *calib_info;
5d08cd1d 1013
69dc5d9d 1014 enum ieee80211_if_types iw_mode;
5d08cd1d
CH
1015
1016 struct sk_buff *ibss_beacon;
1017
1018 /* Last Rx'd beacon timestamp */
3109ece1 1019 u64 timestamp;
5d08cd1d 1020 u16 beacon_int;
32bfd35d 1021 struct ieee80211_vif *vif;
5d08cd1d 1022
5425e490 1023 struct iwl_hw_params hw_params;
059ff826
TW
1024 /* driver/uCode shared Tx Byte Counts and Rx status */
1025 void *shared_virt;
d67f5489 1026 int rb_closed_offset;
059ff826
TW
1027 /* Physical Pointer to Tx Byte Counts and Rx status */
1028 dma_addr_t shared_phys;
1029
5d08cd1d
CH
1030 /* Current association information needed to configure the
1031 * hardware */
1032 u16 assoc_id;
1033 u16 assoc_capability;
1034 u8 ps_mode;
1035
1ff50bda 1036 struct iwl_qos_info qos_data;
5d08cd1d
CH
1037
1038 struct workqueue_struct *workqueue;
1039
1040 struct work_struct up;
1041 struct work_struct restart;
1042 struct work_struct calibrated_work;
1043 struct work_struct scan_completed;
1044 struct work_struct rx_replenish;
1045 struct work_struct rf_kill;
1046 struct work_struct abort_scan;
1047 struct work_struct update_link_led;
1048 struct work_struct auth_work;
1049 struct work_struct report_work;
1050 struct work_struct request_scan;
1051 struct work_struct beacon_update;
4419e39b 1052 struct work_struct set_monitor;
5d08cd1d
CH
1053
1054 struct tasklet_struct irq_tasklet;
1055
1056 struct delayed_work init_alive_start;
1057 struct delayed_work alive_start;
5d08cd1d 1058 struct delayed_work scan_check;
630fe9b6
TW
1059 /* TX Power */
1060 s8 tx_power_user_lmt;
1061 s8 tx_power_channel_lmt;
5d08cd1d
CH
1062
1063#ifdef CONFIG_PM
1064 u32 pm_state[16];
1065#endif
1066
0a6857e7 1067#ifdef CONFIG_IWLWIFI_DEBUG
5d08cd1d 1068 /* debugging info */
bf403db8 1069 u32 debug_level;
5d08cd1d
CH
1070 u32 framecnt_to_us;
1071 atomic_t restrict_refcnt;
712b6cf5
TW
1072#ifdef CONFIG_IWLWIFI_DEBUGFS
1073 /* debugfs */
1074 struct iwl_debugfs *dbgfs;
1075#endif /* CONFIG_IWLWIFI_DEBUGFS */
1076#endif /* CONFIG_IWLWIFI_DEBUG */
5d08cd1d
CH
1077
1078 struct work_struct txpower_work;
445c2dff
TW
1079 u32 disable_sens_cal;
1080 u32 disable_chain_noise_cal;
203566f3 1081 u32 disable_tx_power_cal;
16e727e8 1082 struct work_struct run_time_calib_work;
5d08cd1d 1083 struct timer_list statistics_periodic;
c79dd5b5 1084}; /*iwl_priv */
5d08cd1d 1085
36470749
RR
1086static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1087{
1088 set_bit(txq_id, &priv->txq_ctx_active_msk);
1089}
1090
1091static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1092{
1093 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1094}
1095
994d31f7 1096#ifdef CONFIG_IWLWIFI_DEBUG
a332f8d6
TW
1097const char *iwl_get_tx_fail_reason(u32 status);
1098#else
1099static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
1100#endif
1101
1102
a332f8d6
TW
1103static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1104 int txq_id, int idx)
1105{
1106 if (priv->txq[txq_id].txb[idx].skb[0])
1107 return (struct ieee80211_hdr *)priv->txq[txq_id].
1108 txb[idx].skb[0]->data;
1109 return NULL;
1110}
a332f8d6
TW
1111
1112
3109ece1 1113static inline int iwl_is_associated(struct iwl_priv *priv)
5d08cd1d
CH
1114{
1115 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1116}
1117
bf85ea4f 1118static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1119{
1120 if (ch_info == NULL)
1121 return 0;
1122 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1123}
1124
bf85ea4f 1125static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1126{
1127 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1128}
1129
bf85ea4f 1130static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1131{
8318d78a 1132 return ch_info->band == IEEE80211_BAND_5GHZ;
5d08cd1d
CH
1133}
1134
bf85ea4f 1135static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1136{
8318d78a 1137 return ch_info->band == IEEE80211_BAND_2GHZ;
5d08cd1d
CH
1138}
1139
bf85ea4f 1140static inline int is_channel_passive(const struct iwl_channel_info *ch)
5d08cd1d
CH
1141{
1142 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1143}
1144
bf85ea4f 1145static inline int is_channel_ibss(const struct iwl_channel_info *ch)
5d08cd1d
CH
1146{
1147 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1148}
1149
bf403db8
EK
1150#ifdef CONFIG_IWLWIFI_DEBUG
1151static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
1152 void *p, u32 len)
1153{
1154 if (!(priv->debug_level & level))
1155 return;
1156
1157 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
1158 p, len, 1);
1159}
1160#else
1161static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
1162 void *p, u32 len)
1163{
1164}
1165#endif
1166
8622e705 1167extern const struct iwl_channel_info *iwl_get_channel_info(
c79dd5b5 1168 const struct iwl_priv *priv, enum ieee80211_band band, u16 channel);
5d08cd1d 1169
c79dd5b5 1170/* Requires full declaration of iwl_priv before including */
5d08cd1d 1171
be1f3ab6 1172#endif /* __iwl_dev_h__ */