iwlwifi: HW bug fixes
[linux-2.6-block.git] / drivers / net / wireless / iwlwifi / iwl-dev.h
CommitLineData
b481de9c
ZY
1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
fcd427bb 26/*
3e0d4cb1 27 * Please use this file (iwl-dev.h) for driver implementation definitions.
5a36ba0e 28 * Please use iwl-commands.h for uCode API definitions.
fcd427bb
BC
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
be1f3ab6
EG
32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
b481de9c 34
5d08cd1d
CH
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
4fc22b21 39#define DRV_NAME "iwlagn"
ad97edd2 40#include "iwl-rfkill.h"
6bc913bd 41#include "iwl-eeprom.h"
5d08cd1d 42#include "iwl-4965-hw.h"
6f83eaa1 43#include "iwl-csr.h"
5d08cd1d 44#include "iwl-prph.h"
0a6857e7 45#include "iwl-debug.h"
ab53d8af 46#include "iwl-led.h"
5da4b55f 47#include "iwl-power.h"
e227ceac 48#include "iwl-agn-rs.h"
5d08cd1d 49
fed9017e
RR
50/* configuration for the iwl4965 */
51extern struct iwl_cfg iwl4965_agn_cfg;
5a6a256e
TW
52extern struct iwl_cfg iwl5300_agn_cfg;
53extern struct iwl_cfg iwl5100_agn_cfg;
54extern struct iwl_cfg iwl5350_agn_cfg;
47408639
EK
55extern struct iwl_cfg iwl5100_bg_cfg;
56extern struct iwl_cfg iwl5100_abg_cfg;
fed9017e 57
099b40b7
RR
58/* CT-KILL constants */
59#define CT_KILL_THRESHOLD 110 /* in Celsius */
4bf775cd 60
5d08cd1d
CH
61/* Default noise level to report when noise measurement is not available.
62 * This may be because we're:
63 * 1) Not associated (4965, no beacon statistics being sent to driver)
64 * 2) Scanning (noise measurement does not apply to associated channel)
65 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
66 * Use default noise value of -127 ... this is below the range of measurable
67 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
68 * Also, -127 works better than 0 when averaging frames with/without
69 * noise info (e.g. averaging might be done in app); measured dBm values are
70 * always negative ... using a negative value as the default keeps all
71 * averages within an s8's (used in some apps) range of negative values. */
72#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
73
5d08cd1d
CH
74/*
75 * RTS threshold here is total size [2347] minus 4 FCS bytes
76 * Per spec:
77 * a value of 0 means RTS on all data/management packets
78 * a value > max MSDU size means no RTS
79 * else RTS for data/management frames where MPDU is larger
80 * than RTS value.
81 */
82#define DEFAULT_RTS_THRESHOLD 2347U
83#define MIN_RTS_THRESHOLD 0U
84#define MAX_RTS_THRESHOLD 2347U
85#define MAX_MSDU_SIZE 2304U
86#define MAX_MPDU_SIZE 2346U
87#define DEFAULT_BEACON_INTERVAL 100U
88#define DEFAULT_SHORT_RETRY_LIMIT 7U
89#define DEFAULT_LONG_RETRY_LIMIT 4U
90
a55360e4 91struct iwl_rx_mem_buffer {
5d08cd1d
CH
92 dma_addr_t dma_addr;
93 struct sk_buff *skb;
94 struct list_head list;
95};
96
5d08cd1d
CH
97/*
98 * Generic queue structure
99 *
100 * Contains common data for Rx and Tx queues
101 */
443cfd45 102struct iwl_queue {
5d08cd1d
CH
103 int n_bd; /* number of BDs in this queue */
104 int write_ptr; /* 1-st empty entry (index) host_w*/
105 int read_ptr; /* last used entry (index) host_r*/
106 dma_addr_t dma_addr; /* physical addr for BD's */
107 int n_window; /* safe queue window */
108 u32 id;
109 int low_mark; /* low watermark, resume queue if free
110 * space more than this */
111 int high_mark; /* high watermark, stop queue if free
112 * space less than this */
113} __attribute__ ((packed));
114
115#define MAX_NUM_OF_TBS (20)
116
bc47279f 117/* One for each TFD */
8567c63e 118struct iwl_tx_info {
5d08cd1d
CH
119 struct sk_buff *skb[MAX_NUM_OF_TBS];
120};
121
122/**
16466903 123 * struct iwl_tx_queue - Tx Queue for DMA
bc47279f
BC
124 * @q: generic Rx/Tx queue descriptor
125 * @bd: base of circular buffer of TFDs
126 * @cmd: array of command/Tx buffers
127 * @dma_addr_cmd: physical address of cmd/tx buffer array
128 * @txb: array of per-TFD driver data
129 * @need_update: indicates need to update read/write index
130 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
5d08cd1d 131 *
bc47279f
BC
132 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
133 * descriptors) and required locking structures.
5d08cd1d 134 */
16466903 135struct iwl_tx_queue {
443cfd45 136 struct iwl_queue q;
1053d35f 137 struct iwl_tfd_frame *bd;
857485c0 138 struct iwl_cmd *cmd;
5d08cd1d 139 dma_addr_t dma_addr_cmd;
8567c63e 140 struct iwl_tx_info *txb;
5d08cd1d
CH
141 int need_update;
142 int sched_retry;
143 int active;
144};
145
146#define IWL_NUM_SCAN_RATES (2)
147
bb8c093b 148struct iwl4965_channel_tgd_info {
5d08cd1d
CH
149 u8 type;
150 s8 max_power;
151};
152
bb8c093b 153struct iwl4965_channel_tgh_info {
5d08cd1d
CH
154 s64 last_radar_time;
155};
156
5d08cd1d
CH
157/*
158 * One for each channel, holds all channel setup data
159 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
160 * with one another!
161 */
bf85ea4f 162struct iwl_channel_info {
bb8c093b
CH
163 struct iwl4965_channel_tgd_info tgd;
164 struct iwl4965_channel_tgh_info tgh;
073d3f5f
TW
165 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
166 struct iwl_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
167 * FAT channel */
5d08cd1d
CH
168
169 u8 channel; /* channel number */
170 u8 flags; /* flags copied from EEPROM */
171 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
fcd427bb 172 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
5d08cd1d
CH
173 s8 min_power; /* always 0 */
174 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
175
176 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
177 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
8318d78a 178 enum ieee80211_band band;
5d08cd1d 179
5d08cd1d
CH
180 /* FAT channel info */
181 s8 fat_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
182 s8 fat_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
183 s8 fat_min_power; /* always 0 */
184 s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */
185 u8 fat_flags; /* flags copied from EEPROM */
fcd427bb 186 u8 fat_extension_channel; /* HT_IE_EXT_CHANNEL_* */
5d08cd1d
CH
187};
188
bb8c093b 189struct iwl4965_clip_group {
5d08cd1d
CH
190 /* maximum power level to prevent clipping for each rate, derived by
191 * us from this band's saturation power in EEPROM */
192 const s8 clip_powers[IWL_MAX_RATES];
193};
194
5d08cd1d
CH
195
196#define IWL_TX_FIFO_AC0 0
197#define IWL_TX_FIFO_AC1 1
198#define IWL_TX_FIFO_AC2 2
199#define IWL_TX_FIFO_AC3 3
200#define IWL_TX_FIFO_HCCA_1 5
201#define IWL_TX_FIFO_HCCA_2 6
202#define IWL_TX_FIFO_NONE 7
203
204/* Minimum number of queues. MAX_NUM is defined in hw specific files */
205#define IWL_MIN_NUM_QUEUES 4
206
207/* Power management (not Tx power) structures */
208
6f4083aa
TW
209enum iwl_pwr_src {
210 IWL_PWR_SRC_VMAIN,
211 IWL_PWR_SRC_VAUX,
212};
213
5d08cd1d
CH
214#define IEEE80211_DATA_LEN 2304
215#define IEEE80211_4ADDR_LEN 30
216#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
217#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
218
fcab423d 219struct iwl_frame {
5d08cd1d
CH
220 union {
221 struct ieee80211_hdr frame;
4bf64efd 222 struct iwl_tx_beacon_cmd beacon;
5d08cd1d
CH
223 u8 raw[IEEE80211_FRAME_LEN];
224 u8 cmd[360];
225 } u;
226 struct list_head list;
227};
228
229#define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf)
230#define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8)
a0b484fe
JB
231#define SEQ_TO_INDEX(x) ((u8)(x & 0xff))
232#define INDEX_TO_SEQ(x) ((u8)(x & 0xff))
5d08cd1d
CH
233#define SEQ_HUGE_FRAME (0x4000)
234#define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000)
235#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
236#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
237#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
238
239enum {
240 /* CMD_SIZE_NORMAL = 0, */
241 CMD_SIZE_HUGE = (1 << 0),
242 /* CMD_SYNC = 0, */
243 CMD_ASYNC = (1 << 1),
244 /* CMD_NO_SKB = 0, */
245 CMD_WANT_SKB = (1 << 2),
246};
247
857485c0 248struct iwl_cmd;
c79dd5b5 249struct iwl_priv;
5d08cd1d 250
857485c0
TW
251struct iwl_cmd_meta {
252 struct iwl_cmd_meta *source;
5d08cd1d
CH
253 union {
254 struct sk_buff *skb;
c79dd5b5 255 int (*callback)(struct iwl_priv *priv,
857485c0 256 struct iwl_cmd *cmd, struct sk_buff *skb);
5d08cd1d
CH
257 } __attribute__ ((packed)) u;
258
259 /* The CMD_SIZE_HUGE flag bit indicates that the command
260 * structure is stored at the end of the shared queue memory. */
261 u32 flags;
262
263} __attribute__ ((packed));
264
d2f18bfd 265#define IWL_CMD_MAX_PAYLOAD 320
bd68fb6f 266
bc47279f 267/**
857485c0 268 * struct iwl_cmd
bc47279f
BC
269 *
270 * For allocation of the command and tx queues, this establishes the overall
271 * size of the largest command we send to uCode, except for a scan command
272 * (which is relatively huge; space is allocated separately).
273 */
857485c0
TW
274struct iwl_cmd {
275 struct iwl_cmd_meta meta; /* driver data */
276 struct iwl_cmd_header hdr; /* uCode API */
5d08cd1d 277 union {
133636de 278 struct iwl_addsta_cmd addsta;
ec1a7460 279 struct iwl_led_cmd led;
5d08cd1d
CH
280 u32 flags;
281 u8 val8;
282 u16 val16;
283 u32 val32;
bb8c093b
CH
284 struct iwl4965_bt_cmd bt;
285 struct iwl4965_rxon_time_cmd rxon_time;
ca579617 286 struct iwl_powertable_cmd powertable;
1ff50bda 287 struct iwl_qosparam_cmd qosparam;
83d527d9 288 struct iwl_tx_cmd tx;
bb8c093b 289 struct iwl4965_rxon_assoc_cmd rxon_assoc;
7a999bf0 290 struct iwl_rem_sta_cmd rm_sta;
5d08cd1d 291 u8 *indirect;
bd68fb6f 292 u8 payload[IWL_CMD_MAX_PAYLOAD];
5d08cd1d
CH
293 } __attribute__ ((packed)) cmd;
294} __attribute__ ((packed));
295
857485c0 296struct iwl_host_cmd {
5d08cd1d
CH
297 u8 id;
298 u16 len;
857485c0 299 struct iwl_cmd_meta meta;
5d08cd1d
CH
300 const void *data;
301};
302
857485c0
TW
303#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_cmd) - \
304 sizeof(struct iwl_cmd_meta))
5d08cd1d
CH
305
306/*
307 * RX related structures and functions
308 */
309#define RX_FREE_BUFFERS 64
310#define RX_LOW_WATERMARK 8
311
312#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
313#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
314#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
315
316/**
a55360e4 317 * struct iwl_rx_queue - Rx queue
5d08cd1d
CH
318 * @processed: Internal index to last handled Rx packet
319 * @read: Shared index to newest available Rx buffer
320 * @write: Shared index to oldest written Rx packet
321 * @free_count: Number of pre-allocated buffers in rx_free
322 * @rx_free: list of free SKBs for use
323 * @rx_used: List of Rx buffers with no SKB
324 * @need_update: flag to indicate we need to update read/write index
325 *
a55360e4 326 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
5d08cd1d 327 */
a55360e4 328struct iwl_rx_queue {
5d08cd1d
CH
329 __le32 *bd;
330 dma_addr_t dma_addr;
a55360e4
TW
331 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
332 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH
333 u32 processed;
334 u32 read;
335 u32 write;
336 u32 free_count;
337 struct list_head rx_free;
338 struct list_head rx_used;
339 int need_update;
340 spinlock_t lock;
341};
342
343#define IWL_SUPPORTED_RATES_IE_LEN 8
344
345#define SCAN_INTERVAL 100
346
347#define MAX_A_CHANNELS 252
348#define MIN_A_CHANNELS 7
349
350#define MAX_B_CHANNELS 14
351#define MIN_B_CHANNELS 1
352
5d08cd1d
CH
353#define MAX_TID_COUNT 9
354
355#define IWL_INVALID_RATE 0xFF
356#define IWL_INVALID_VALUE -1
357
bc47279f 358/**
6def9761 359 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
bc47279f
BC
360 * @txq_id: Tx queue used for Tx attempt
361 * @frame_count: # frames attempted by Tx command
362 * @wait_for_ba: Expect block-ack before next Tx reply
363 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
364 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
365 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
366 * @rate_n_flags: Rate at which Tx was attempted
367 *
368 * If REPLY_TX indicates that aggregation was attempted, driver must wait
369 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
370 * until block ack arrives.
371 */
6def9761 372struct iwl_ht_agg {
5d08cd1d
CH
373 u16 txq_id;
374 u16 frame_count;
375 u16 wait_for_ba;
376 u16 start_idx;
fe01b477 377 u64 bitmap;
5d08cd1d 378 u32 rate_n_flags;
fe01b477
RR
379#define IWL_AGG_OFF 0
380#define IWL_AGG_ON 1
381#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
382#define IWL_EMPTYING_HW_QUEUE_DELBA 3
383 u8 state;
5d08cd1d 384};
fe01b477 385
5d08cd1d 386
6def9761 387struct iwl_tid_data {
5d08cd1d 388 u16 seq_number;
fe01b477 389 u16 tfds_in_queue;
6def9761 390 struct iwl_ht_agg agg;
5d08cd1d
CH
391};
392
6def9761 393struct iwl_hw_key {
5d08cd1d
CH
394 enum ieee80211_key_alg alg;
395 int keylen;
0211ddda 396 u8 keyidx;
5d08cd1d
CH
397 u8 key[32];
398};
399
bb8c093b 400union iwl4965_ht_rate_supp {
5d08cd1d
CH
401 u16 rates;
402 struct {
403 u8 siso_rate;
404 u8 mimo_rate;
405 };
406};
407
5d08cd1d 408#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
5d08cd1d
CH
409#define CFG_HT_MPDU_DENSITY_2USEC (0x5)
410#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_2USEC
411
9e0cc6de
RR
412struct iwl_ht_info {
413 /* self configuration data */
5d08cd1d 414 u8 is_ht;
9e0cc6de 415 u8 supported_chan_width;
5d08cd1d 416 u16 tx_mimo_ps_mode;
9e0cc6de 417 u8 is_green_field;
bb54244b 418 u8 sgf; /* HT_SHORT_GI_* short guard interval */
5d08cd1d
CH
419 u8 max_amsdu_size;
420 u8 ampdu_factor;
421 u8 mpdu_density;
9e0cc6de
RR
422 u8 supp_mcs_set[16];
423 /* BSS related data */
424 u8 control_channel;
5d08cd1d 425 u8 extension_chan_offset;
5d08cd1d 426 u8 tx_chan_width;
9e0cc6de
RR
427 u8 ht_protection;
428 u8 non_GF_STA_present;
5d08cd1d 429};
5d08cd1d 430
1ff50bda 431union iwl_qos_capabity {
5d08cd1d
CH
432 struct {
433 u8 edca_count:4; /* bit 0-3 */
434 u8 q_ack:1; /* bit 4 */
435 u8 queue_request:1; /* bit 5 */
436 u8 txop_request:1; /* bit 6 */
437 u8 reserved:1; /* bit 7 */
438 } q_AP;
439 struct {
440 u8 acvo_APSD:1; /* bit 0 */
441 u8 acvi_APSD:1; /* bit 1 */
442 u8 ac_bk_APSD:1; /* bit 2 */
443 u8 ac_be_APSD:1; /* bit 3 */
444 u8 q_ack:1; /* bit 4 */
445 u8 max_len:2; /* bit 5-6 */
446 u8 more_data_ack:1; /* bit 7 */
447 } q_STA;
448 u8 val;
449};
450
451/* QoS structures */
1ff50bda 452struct iwl_qos_info {
5d08cd1d
CH
453 int qos_enable;
454 int qos_active;
1ff50bda
EG
455 union iwl_qos_capabity qos_cap;
456 struct iwl_qosparam_cmd def_qos_parm;
5d08cd1d 457};
5d08cd1d
CH
458
459#define STA_PS_STATUS_WAKE 0
460#define STA_PS_STATUS_SLEEP 1
461
6def9761 462struct iwl_station_entry {
133636de 463 struct iwl_addsta_cmd sta;
6def9761 464 struct iwl_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH
465 u8 used;
466 u8 ps_status;
6def9761 467 struct iwl_hw_key keyinfo;
5d08cd1d
CH
468};
469
470/* one for each uCode image (inst/data, boot/init/runtime) */
471struct fw_desc {
472 void *v_addr; /* access by driver */
473 dma_addr_t p_addr; /* access by card's busmaster DMA */
474 u32 len; /* bytes */
475};
476
477/* uCode file layout */
14b3d338 478struct iwl_ucode {
5d08cd1d
CH
479 __le32 ver; /* major/minor/subminor */
480 __le32 inst_size; /* bytes of runtime instructions */
481 __le32 data_size; /* bytes of runtime data */
482 __le32 init_size; /* bytes of initialization instructions */
483 __le32 init_data_size; /* bytes of initialization data */
484 __le32 boot_size; /* bytes of bootstrap instructions */
485 u8 data[0]; /* data in same order as "size" elements */
486};
487
bb8c093b 488struct iwl4965_ibss_seq {
5d08cd1d
CH
489 u8 mac[ETH_ALEN];
490 u16 seq_num;
491 u16 frag_num;
492 unsigned long packet_time;
493 struct list_head list;
494};
495
f0832f13
EG
496struct iwl_sensitivity_ranges {
497 u16 min_nrg_cck;
498 u16 max_nrg_cck;
499
500 u16 nrg_th_cck;
501 u16 nrg_th_ofdm;
502
503 u16 auto_corr_min_ofdm;
504 u16 auto_corr_min_ofdm_mrc;
505 u16 auto_corr_min_ofdm_x1;
506 u16 auto_corr_min_ofdm_mrc_x1;
507
508 u16 auto_corr_max_ofdm;
509 u16 auto_corr_max_ofdm_mrc;
510 u16 auto_corr_max_ofdm_x1;
511 u16 auto_corr_max_ofdm_mrc_x1;
512
513 u16 auto_corr_max_cck;
514 u16 auto_corr_max_cck_mrc;
515 u16 auto_corr_min_cck;
516 u16 auto_corr_min_cck_mrc;
517};
518
099b40b7
RR
519
520#define IWL_FAT_CHANNEL_52 BIT(IEEE80211_BAND_5GHZ)
521
bc47279f 522/**
5425e490 523 * struct iwl_hw_params
bc47279f 524 * @max_txq_num: Max # Tx queues supported
099b40b7
RR
525 * @tx/rx_chains_num: Number of TX/RX chains
526 * @valid_tx/rx_ant: usable antennas
bc47279f 527 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
bc47279f 528 * @max_rxq_log: Log-base-2 of max_rxq_size
099b40b7 529 * @rx_buf_size: Rx buffer size
bc47279f
BC
530 * @max_stations:
531 * @bcast_sta_id:
099b40b7
RR
532 * @fat_channel: is 40MHz width possible in band 2.4
533 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
534 * @sw_crypto: 0 for hw, 1 for sw
535 * @max_xxx_size: for ucode uses
536 * @ct_kill_threshold: temperature threshold
f0832f13 537 * @struct iwl_sensitivity_ranges: range of sensitivity values
7f3e4bb6 538 * @first_ampdu_q: first HW queue available for ampdu
bc47279f 539 */
5425e490 540struct iwl_hw_params {
5d08cd1d 541 u16 max_txq_num;
ec35cf2a
TW
542 u8 tx_chains_num;
543 u8 rx_chains_num;
544 u8 valid_tx_ant;
545 u8 valid_rx_ant;
5d08cd1d 546 u16 max_rxq_size;
ec35cf2a 547 u16 max_rxq_log;
9ee1ba47
RR
548 u32 rx_buf_size;
549 u32 max_pkt_size;
5d08cd1d
CH
550 u8 max_stations;
551 u8 bcast_sta_id;
099b40b7
RR
552 u8 fat_channel;
553 u8 sw_crypto;
554 u32 max_inst_size;
555 u32 max_data_size;
556 u32 max_bsm_size;
557 u32 ct_kill_threshold; /* value in hw-dependent units */
f0832f13 558 const struct iwl_sensitivity_ranges *sens;
7f3e4bb6 559 u8 first_ampdu_q;
5d08cd1d
CH
560};
561
a9841013
EG
562#define HT_SHORT_GI_20MHZ (1 << 0)
563#define HT_SHORT_GI_40MHZ (1 << 1)
5d08cd1d
CH
564
565
bb8c093b 566#define IWL_RX_HDR(x) ((struct iwl4965_rx_frame_hdr *)(\
5d08cd1d
CH
567 x->u.rx_frame.stats.payload + \
568 x->u.rx_frame.stats.phy_count))
bb8c093b 569#define IWL_RX_END(x) ((struct iwl4965_rx_frame_end *)(\
5d08cd1d
CH
570 IWL_RX_HDR(x)->payload + \
571 le16_to_cpu(IWL_RX_HDR(x)->len)))
572#define IWL_RX_STATS(x) (&x->u.rx_frame.stats)
573#define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload)
574
575
576/******************************************************************************
577 *
578 * Functions implemented in iwl-base.c which are forward declared here
579 * for use by iwl-*.c
580 *
581 *****************************************************************************/
133636de
TW
582struct iwl_addsta_cmd;
583extern int iwl_send_add_sta(struct iwl_priv *priv,
584 struct iwl_addsta_cmd *sta, u8 flags);
4f40e4d9
TW
585u8 iwl_add_station_flags(struct iwl_priv *priv, const u8 *addr, int is_ap,
586 u8 flags, struct ieee80211_ht_info *ht_info);
c79dd5b5 587extern unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
5d08cd1d
CH
588 struct ieee80211_hdr *hdr,
589 const u8 *dest, int left);
5da4b55f 590extern void iwl4965_update_chain_flags(struct iwl_priv *priv);
079a2533 591int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
ca579617 592extern int iwl4965_set_power(struct iwl_priv *priv, void *cmd);
079a2533 593
57bd1bea 594extern const u8 iwl_bcast_addr[ETH_ALEN];
5d08cd1d
CH
595
596/******************************************************************************
597 *
598 * Functions implemented in iwl-[34]*.c which are forward declared here
599 * for use by iwl-base.c
600 *
601 * NOTE: The implementation of these functions are hardware specific
602 * which is why they are in the hardware specific files (vs. iwl-base.c)
603 *
604 * Naming convention --
bb8c093b
CH
605 * iwl4965_ <-- Its part of iwlwifi (should be changed to iwl4965_)
606 * iwl4965_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW)
5d08cd1d 607 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH
608 * iwl4965_bg_ <-- Called from work queue context
609 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH
610 *
611 ****************************************************************************/
b3bbacb7 612extern int iwl_rxq_stop(struct iwl_priv *priv);
da1bc453 613extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
c79dd5b5 614extern unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
fcab423d 615 struct iwl_frame *frame, u8 rate);
c79dd5b5 616extern void iwl4965_disable_events(struct iwl_priv *priv);
5d08cd1d 617
c79dd5b5 618extern int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel);
443cfd45 619extern int iwl_queue_space(const struct iwl_queue *q);
fd4abac5
TW
620static inline int iwl_queue_used(const struct iwl_queue *q, int i)
621{
622 return q->write_ptr > q->read_ptr ?
623 (i >= q->read_ptr && i < q->write_ptr) :
624 !(i < q->read_ptr && i >= q->write_ptr);
625}
626
627
628static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
629{
630 /* This is for scan command, the big buffer at end of command array */
631 if (is_huge)
632 return q->n_window; /* must be power of 2 */
633
634 /* Otherwise, use normal size buffers */
635 return index & (q->n_window - 1);
636}
637
638
c79dd5b5 639struct iwl_priv;
b481de9c
ZY
640
641/*
642 * Forward declare iwl-4965.c functions for iwl-base.c
643 */
c79dd5b5 644extern void iwl4965_rf_kill_ct_config(struct iwl_priv *priv);
c79dd5b5 645int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
fe01b477 646 u8 tid, int txq_id);
78330fdd 647
b481de9c
ZY
648/* Structures, enum, and defines specific to the 4965 */
649
16466903 650#define IWL_KW_SIZE 0x1000 /*4k */
b481de9c 651
16466903 652struct iwl_kw {
b481de9c
ZY
653 dma_addr_t dma_addr;
654 void *v_addr;
655 size_t size;
656};
657
b481de9c
ZY
658#define IWL_CHANNEL_WIDTH_20MHZ 0
659#define IWL_CHANNEL_WIDTH_40MHZ 1
660
661#define IWL_MIMO_PS_STATIC 0
662#define IWL_MIMO_PS_NONE 3
663#define IWL_MIMO_PS_DYNAMIC 1
664#define IWL_MIMO_PS_INVALID 2
665
666#define IWL_OPERATION_MODE_AUTO 0
667#define IWL_OPERATION_MODE_HT_ONLY 1
668#define IWL_OPERATION_MODE_MIXED 2
669#define IWL_OPERATION_MODE_20MHZ 3
670
3195cdb7
TW
671#define IWL_TX_CRC_SIZE 4
672#define IWL_TX_DELIMITER_SIZE 4
b481de9c 673
b481de9c 674#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
b481de9c 675
bb8c093b 676struct iwl4965_lq_mngr {
b481de9c
ZY
677 spinlock_t lock;
678 s32 max_window_size;
679 s32 *expected_tpt;
680 u8 *next_higher_rate;
681 u8 *next_lower_rate;
682 unsigned long stamp;
683 unsigned long stamp_last;
684 u32 flush_time;
685 u32 tx_packets;
b481de9c
ZY
686};
687
b481de9c
ZY
688/* Sensitivity and chain noise calibration */
689#define INTERFERENCE_DATA_AVAILABLE __constant_cpu_to_le32(1)
690#define INITIALIZATION_VALUE 0xFFFF
691#define CAL_NUM_OF_BEACONS 20
692#define MAXIMUM_ALLOWED_PATHLOSS 15
693
b481de9c
ZY
694#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
695
696#define MAX_FA_OFDM 50
697#define MIN_FA_OFDM 5
698#define MAX_FA_CCK 50
699#define MIN_FA_CCK 5
700
b481de9c
ZY
701#define AUTO_CORR_STEP_OFDM 1
702
b481de9c
ZY
703#define AUTO_CORR_STEP_CCK 3
704#define AUTO_CORR_MAX_TH_CCK 160
705
b481de9c
ZY
706#define NRG_DIFF 2
707#define NRG_STEP_CCK 2
708#define NRG_MARGIN 8
709#define MAX_NUMBER_CCK_NO_FA 100
710
711#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
712
713#define CHAIN_A 0
714#define CHAIN_B 1
715#define CHAIN_C 2
716#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
717#define ALL_BAND_FILTER 0xFF00
718#define IN_BAND_FILTER 0xFF
719#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
720
3195cdb7
TW
721#define NRG_NUM_PREV_STAT_L 20
722#define NUM_RX_CHAINS 3
723
bb8c093b 724enum iwl4965_false_alarm_state {
b481de9c
ZY
725 IWL_FA_TOO_MANY = 0,
726 IWL_FA_TOO_FEW = 1,
727 IWL_FA_GOOD_RANGE = 2,
728};
729
bb8c093b 730enum iwl4965_chain_noise_state {
b481de9c
ZY
731 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
732 IWL_CHAIN_NOISE_ACCUMULATE = 1,
733 IWL_CHAIN_NOISE_CALIBRATED = 2,
734};
735
bb8c093b 736enum iwl4965_calib_enabled_state {
b481de9c
ZY
737 IWL_CALIB_DISABLED = 0, /* must be 0 */
738 IWL_CALIB_ENABLED = 1,
739};
740
741struct statistics_general_data {
742 u32 beacon_silence_rssi_a;
743 u32 beacon_silence_rssi_b;
744 u32 beacon_silence_rssi_c;
745 u32 beacon_energy_a;
746 u32 beacon_energy_b;
747 u32 beacon_energy_c;
748};
749
7c616cba
TW
750struct iwl_calib_results {
751 void *tx_iq_res;
752 void *tx_iq_perd_res;
753 void *lo_res;
754 u32 tx_iq_res_len;
755 u32 tx_iq_perd_res_len;
756 u32 lo_res_len;
757};
758
dbb983b7
RR
759enum ucode_type {
760 UCODE_NONE = 0,
761 UCODE_INIT,
762 UCODE_RT
763};
764
b481de9c 765/* Sensitivity calib data */
f0832f13 766struct iwl_sensitivity_data {
b481de9c
ZY
767 u32 auto_corr_ofdm;
768 u32 auto_corr_ofdm_mrc;
769 u32 auto_corr_ofdm_x1;
770 u32 auto_corr_ofdm_mrc_x1;
771 u32 auto_corr_cck;
772 u32 auto_corr_cck_mrc;
773
774 u32 last_bad_plcp_cnt_ofdm;
775 u32 last_fa_cnt_ofdm;
776 u32 last_bad_plcp_cnt_cck;
777 u32 last_fa_cnt_cck;
778
779 u32 nrg_curr_state;
780 u32 nrg_prev_state;
781 u32 nrg_value[10];
782 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
783 u32 nrg_silence_ref;
784 u32 nrg_energy_idx;
785 u32 nrg_silence_idx;
786 u32 nrg_th_cck;
787 s32 nrg_auto_corr_silence_diff;
788 u32 num_in_cck_no_fa;
789 u32 nrg_th_ofdm;
b481de9c
ZY
790};
791
792/* Chain noise (differential Rx gain) calib data */
f0832f13 793struct iwl_chain_noise_data {
b481de9c
ZY
794 u8 state;
795 u16 beacon_count;
796 u32 chain_noise_a;
797 u32 chain_noise_b;
798 u32 chain_noise_c;
799 u32 chain_signal_a;
800 u32 chain_signal_b;
801 u32 chain_signal_c;
802 u8 disconn_array[NUM_RX_CHAINS];
803 u8 delta_gain_code[NUM_RX_CHAINS];
804 u8 radio_write;
805};
806
abceddb4
BC
807#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
808#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
b481de9c 809
5d08cd1d 810
5d08cd1d
CH
811enum {
812 MEASUREMENT_READY = (1 << 0),
813 MEASUREMENT_ACTIVE = (1 << 1),
814};
815
5d08cd1d 816
dfe7d458
RR
817#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */
818
c79dd5b5 819struct iwl_priv {
5d08cd1d
CH
820
821 /* ieee device used by generic ieee processing code */
822 struct ieee80211_hw *hw;
823 struct ieee80211_channel *ieee_channels;
824 struct ieee80211_rate *ieee_rates;
82b9a121 825 struct iwl_cfg *cfg;
5d08cd1d
CH
826
827 /* temporary frame storage list */
828 struct list_head free_frames;
829 int frames_count;
830
8318d78a 831 enum ieee80211_band band;
5d08cd1d 832 int alloc_rxb_skb;
12342c47 833 bool add_radiotap;
5d08cd1d 834
c79dd5b5 835 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
a55360e4 836 struct iwl_rx_mem_buffer *rxb);
5d08cd1d 837
8318d78a 838 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
5d08cd1d 839
4fc22b21 840#ifdef CONFIG_IWLAGN_SPECTRUM_MEASUREMENT
5d08cd1d 841 /* spectrum measurement report caching */
bb8c093b 842 struct iwl4965_spectrum_notification measure_report;
5d08cd1d
CH
843 u8 measurement_status;
844#endif
845 /* ucode beacon time */
846 u32 ucode_beacon_time;
847
bb8c093b 848 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 849 * Access via channel # using indirect index array */
bf85ea4f 850 struct iwl_channel_info *channel_info; /* channel info array */
5d08cd1d
CH
851 u8 channel_count; /* # of channels */
852
853 /* each calibration channel group in the EEPROM has a derived
854 * clip setting for each rate. */
bb8c093b 855 const struct iwl4965_clip_group clip_groups[5];
5d08cd1d
CH
856
857 /* thermal calibration */
858 s32 temperature; /* degrees Kelvin */
859 s32 last_temperature;
860
7c616cba
TW
861 /* init calibration results */
862 struct iwl_calib_results calib_results;
863
5d08cd1d
CH
864 /* Scan related variables */
865 unsigned long last_scan_jiffies;
7878a5a4 866 unsigned long next_scan_jiffies;
5d08cd1d
CH
867 unsigned long scan_start;
868 unsigned long scan_pass_start;
869 unsigned long scan_start_tsf;
870 int scan_bands;
871 int one_direct_scan;
872 u8 direct_ssid_len;
873 u8 direct_ssid[IW_ESSID_MAX_SIZE];
2a421b91 874 struct iwl_scan_cmd *scan;
f53696de 875 u32 scan_tx_ant[IEEE80211_NUM_BANDS];
5d08cd1d
CH
876
877 /* spinlock */
878 spinlock_t lock; /* protect general shared data */
879 spinlock_t hcmd_lock; /* protect hcmd */
880 struct mutex mutex;
881
882 /* basic pci-network driver stuff */
883 struct pci_dev *pci_dev;
884
885 /* pci hardware address support */
886 void __iomem *hw_base;
b661c819
TW
887 u32 hw_rev;
888 u32 hw_wa_rev;
889 u8 rev_id;
5d08cd1d
CH
890
891 /* uCode images, save to reload in case of failure */
892 struct fw_desc ucode_code; /* runtime inst */
893 struct fw_desc ucode_data; /* runtime data original */
894 struct fw_desc ucode_data_backup; /* runtime data save/restore */
895 struct fw_desc ucode_init; /* initialization inst */
896 struct fw_desc ucode_init_data; /* initialization data */
897 struct fw_desc ucode_boot; /* bootstrap inst */
dbb983b7
RR
898 enum ucode_type ucode_type;
899 u8 ucode_write_complete; /* the image write is complete */
5d08cd1d
CH
900
901
bb8c093b 902 struct iwl4965_rxon_time_cmd rxon_timing;
5d08cd1d
CH
903
904 /* We declare this const so it can only be
905 * changed via explicit cast within the
906 * routines that actually update the physical
907 * hardware */
c1adf9fb
GG
908 const struct iwl_rxon_cmd active_rxon;
909 struct iwl_rxon_cmd staging_rxon;
5d08cd1d
CH
910
911 int error_recovering;
c1adf9fb 912 struct iwl_rxon_cmd recovery_rxon;
5d08cd1d
CH
913
914 /* 1st responses from initialize and runtime uCode images.
915 * 4965's initialize alive response contains some calibration data. */
885ba202
TW
916 struct iwl_init_alive_resp card_alive_init;
917 struct iwl_alive_resp card_alive;
eadd3c4b 918#ifdef CONFIG_IWLWIFI_RFKILL
80fcc9e2 919 struct rfkill *rfkill;
ad97edd2 920#endif
5d08cd1d 921
36316126 922#ifdef CONFIG_IWLWIFI_LEDS
0eee6127 923 struct iwl_led led[IWL_LED_TRG_MAX];
ab53d8af
MA
924 unsigned long last_blink_time;
925 u8 last_blink_rate;
926 u8 allow_blinking;
927 u64 led_tpt;
5d08cd1d
CH
928#endif
929
930 u16 active_rate;
931 u16 active_rate_basic;
932
5d08cd1d
CH
933 u8 assoc_station_added;
934 u8 use_ant_b_for_management_frame; /* Tx antenna selection */
5d08cd1d 935 u8 start_calib;
f0832f13
EG
936 struct iwl_sensitivity_data sensitivity_data;
937 struct iwl_chain_noise_data chain_noise_data;
5d08cd1d 938 __le16 sensitivity_tbl[HD_TABLE_SIZE];
5d08cd1d 939
9e0cc6de 940 struct iwl_ht_info current_ht_config;
5d08cd1d
CH
941 u8 last_phy_res[100];
942
943 /* Rate scaling data */
bb8c093b 944 struct iwl4965_lq_mngr lq_mngr;
5d08cd1d
CH
945
946 /* Rate scaling data */
947 s8 data_retry_limit;
948 u8 retry_rate;
949
950 wait_queue_head_t wait_command_queue;
951
952 int activity_timer_active;
953
954 /* Rx and Tx DMA processing queues */
a55360e4 955 struct iwl_rx_queue rxq;
16466903 956 struct iwl_tx_queue txq[IWL_MAX_NUM_QUEUES];
5d08cd1d 957 unsigned long txq_ctx_active_msk;
16466903 958 struct iwl_kw kw; /* keep warm address */
5d08cd1d
CH
959 u32 scd_base_addr; /* scheduler sram base address */
960
961 unsigned long status;
5d08cd1d
CH
962
963 int last_rx_rssi; /* From Rx packet statisitics */
964 int last_rx_noise; /* From beacon statistics */
965
19758bef
TW
966 /* counts mgmt, ctl, and data packets */
967 struct traffic_stats {
968 u32 cnt;
969 u64 bytes;
970 } tx_stats[3], rx_stats[3];
971
5da4b55f 972 struct iwl_power_mgr power_data;
5d08cd1d 973
8f91aecb 974 struct iwl_notif_statistics statistics;
5d08cd1d
CH
975 unsigned long last_statistics_time;
976
977 /* context information */
978 u8 essid[IW_ESSID_MAX_SIZE];
979 u8 essid_len;
980 u16 rates_mask;
981
982 u32 power_mode;
983 u32 antenna;
984 u8 bssid[ETH_ALEN];
985 u16 rts_threshold;
986 u8 mac_addr[ETH_ALEN];
987
988 /*station table variables */
989 spinlock_t sta_lock;
990 int num_stations;
6def9761 991 struct iwl_station_entry stations[IWL_STATION_COUNT];
6974e363
EG
992 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
993 u8 default_wep_key;
994 u8 key_mapping_key;
80fb47a1 995 unsigned long ucode_key_table;
5d08cd1d
CH
996
997 /* Indication if ieee80211_ops->open has been called */
69dc5d9d 998 u8 is_open;
5d08cd1d
CH
999
1000 u8 mac80211_registered;
5d08cd1d 1001
5d08cd1d
CH
1002 /* Rx'd packet timing information */
1003 u32 last_beacon_time;
1004 u64 last_tsf;
1005
5d08cd1d 1006 /* eeprom */
073d3f5f
TW
1007 u8 *eeprom;
1008 struct iwl_eeprom_calib_info *calib_info;
5d08cd1d 1009
69dc5d9d 1010 enum ieee80211_if_types iw_mode;
5d08cd1d
CH
1011
1012 struct sk_buff *ibss_beacon;
1013
1014 /* Last Rx'd beacon timestamp */
3109ece1 1015 u64 timestamp;
5d08cd1d 1016 u16 beacon_int;
32bfd35d 1017 struct ieee80211_vif *vif;
5d08cd1d 1018
5425e490 1019 struct iwl_hw_params hw_params;
059ff826
TW
1020 /* driver/uCode shared Tx Byte Counts and Rx status */
1021 void *shared_virt;
d67f5489 1022 int rb_closed_offset;
059ff826
TW
1023 /* Physical Pointer to Tx Byte Counts and Rx status */
1024 dma_addr_t shared_phys;
1025
5d08cd1d
CH
1026 /* Current association information needed to configure the
1027 * hardware */
1028 u16 assoc_id;
1029 u16 assoc_capability;
1030 u8 ps_mode;
1031
1ff50bda 1032 struct iwl_qos_info qos_data;
5d08cd1d
CH
1033
1034 struct workqueue_struct *workqueue;
1035
1036 struct work_struct up;
1037 struct work_struct restart;
1038 struct work_struct calibrated_work;
1039 struct work_struct scan_completed;
1040 struct work_struct rx_replenish;
1041 struct work_struct rf_kill;
1042 struct work_struct abort_scan;
1043 struct work_struct update_link_led;
1044 struct work_struct auth_work;
1045 struct work_struct report_work;
1046 struct work_struct request_scan;
1047 struct work_struct beacon_update;
4419e39b 1048 struct work_struct set_monitor;
5d08cd1d
CH
1049
1050 struct tasklet_struct irq_tasklet;
1051
1052 struct delayed_work init_alive_start;
1053 struct delayed_work alive_start;
5d08cd1d 1054 struct delayed_work scan_check;
630fe9b6
TW
1055 /* TX Power */
1056 s8 tx_power_user_lmt;
1057 s8 tx_power_channel_lmt;
5d08cd1d
CH
1058
1059#ifdef CONFIG_PM
1060 u32 pm_state[16];
1061#endif
1062
0a6857e7 1063#ifdef CONFIG_IWLWIFI_DEBUG
5d08cd1d 1064 /* debugging info */
bf403db8 1065 u32 debug_level;
5d08cd1d
CH
1066 u32 framecnt_to_us;
1067 atomic_t restrict_refcnt;
712b6cf5
TW
1068#ifdef CONFIG_IWLWIFI_DEBUGFS
1069 /* debugfs */
1070 struct iwl_debugfs *dbgfs;
1071#endif /* CONFIG_IWLWIFI_DEBUGFS */
1072#endif /* CONFIG_IWLWIFI_DEBUG */
5d08cd1d
CH
1073
1074 struct work_struct txpower_work;
445c2dff
TW
1075 u32 disable_sens_cal;
1076 u32 disable_chain_noise_cal;
203566f3 1077 u32 disable_tx_power_cal;
16e727e8 1078 struct work_struct run_time_calib_work;
5d08cd1d 1079 struct timer_list statistics_periodic;
c79dd5b5 1080}; /*iwl_priv */
5d08cd1d 1081
36470749
RR
1082static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1083{
1084 set_bit(txq_id, &priv->txq_ctx_active_msk);
1085}
1086
1087static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1088{
1089 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1090}
1091
994d31f7 1092#ifdef CONFIG_IWLWIFI_DEBUG
a332f8d6
TW
1093const char *iwl_get_tx_fail_reason(u32 status);
1094#else
1095static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
1096#endif
1097
1098
a332f8d6
TW
1099static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1100 int txq_id, int idx)
1101{
1102 if (priv->txq[txq_id].txb[idx].skb[0])
1103 return (struct ieee80211_hdr *)priv->txq[txq_id].
1104 txb[idx].skb[0]->data;
1105 return NULL;
1106}
a332f8d6
TW
1107
1108
3109ece1 1109static inline int iwl_is_associated(struct iwl_priv *priv)
5d08cd1d
CH
1110{
1111 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1112}
1113
bf85ea4f 1114static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1115{
1116 if (ch_info == NULL)
1117 return 0;
1118 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1119}
1120
bf85ea4f 1121static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1122{
1123 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1124}
1125
bf85ea4f 1126static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1127{
8318d78a 1128 return ch_info->band == IEEE80211_BAND_5GHZ;
5d08cd1d
CH
1129}
1130
bf85ea4f 1131static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1132{
8318d78a 1133 return ch_info->band == IEEE80211_BAND_2GHZ;
5d08cd1d
CH
1134}
1135
bf85ea4f 1136static inline int is_channel_passive(const struct iwl_channel_info *ch)
5d08cd1d
CH
1137{
1138 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1139}
1140
bf85ea4f 1141static inline int is_channel_ibss(const struct iwl_channel_info *ch)
5d08cd1d
CH
1142{
1143 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1144}
1145
bf403db8
EK
1146#ifdef CONFIG_IWLWIFI_DEBUG
1147static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
1148 void *p, u32 len)
1149{
1150 if (!(priv->debug_level & level))
1151 return;
1152
1153 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
1154 p, len, 1);
1155}
1156#else
1157static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
1158 void *p, u32 len)
1159{
1160}
1161#endif
1162
8622e705 1163extern const struct iwl_channel_info *iwl_get_channel_info(
c79dd5b5 1164 const struct iwl_priv *priv, enum ieee80211_band band, u16 channel);
5d08cd1d 1165
c79dd5b5 1166/* Requires full declaration of iwl_priv before including */
5d08cd1d 1167
be1f3ab6 1168#endif /* __iwl_dev_h__ */