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iwlwifi: virtualize op_mode's rx
[linux-2.6-block.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
4e318262 5 * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
19335774 37#include "iwl-debug.h"
df48c323 38#include "iwl-core.h"
b661c819 39#include "iwl-io.h"
5da4b55f 40#include "iwl-power.h"
48f20d35 41#include "iwl-shared.h"
9d143e9a 42#include "iwl-agn.h"
bdfbf092 43#include "iwl-trans.h"
ed277c93 44#include "iwl-wifi.h"
df48c323 45
57bd1bea 46const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
57bd1bea 47
d9fe60de
JB		 48#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
49#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
b39488a9 50static void iwl_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 51 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 52 enum ieee80211_band band)
53{
39130df3 54 u16 max_bit_rate = 0;
d6189124
EG		 55 u8 rx_chains_num = hw_params(priv).rx_chains_num;
56 u8 tx_chains_num = hw_params(priv).tx_chains_num;
39130df3 57
c7de35cd 58 ht_info->cap = 0;
d9fe60de 59 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 60
d9fe60de 61 ht_info->ht_supported = true;
c7de35cd 62
38622419
DF		 63 if (cfg(priv)->ht_params &&
64 cfg(priv)->ht_params->ht_greenfield_support)
b261793d 65 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 66 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 67 max_bit_rate = MAX_BIT_RATE_20_MHZ;
d6189124 68 if (hw_params(priv).ht40_channel & BIT(band)) {
d9fe60de
JB		 69 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
70 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
71 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 72 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 73 }
c7de35cd 74
9d143e9a 75 if (iwlagn_mod_params.amsdu_size_8K)
d9fe60de 76 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 77
78 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
79 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
80
d9fe60de 81 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 82 if (rx_chains_num >= 2)
d9fe60de 83 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 84 if (rx_chains_num >= 3)
d9fe60de 85 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 86
87 /* Highest supported Rx data rate */
88 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 89 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
90 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 91
92 /* Tx MCS capabilities */
d9fe60de 93 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 94 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 95 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
96 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
97 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 98 }
c7de35cd 99}
c7de35cd 100
c7de35cd 101/**
b39488a9 102 * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
c7de35cd 103 */
b39488a9 104int iwl_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 105{
106 struct iwl_channel_info *ch;
107 struct ieee80211_supported_band *sband;
108 struct ieee80211_channel *channels;
109 struct ieee80211_channel *geo_ch;
110 struct ieee80211_rate *rates;
111 int i = 0;
75d80cad 112 s8 max_tx_power = IWLAGN_TX_POWER_TARGET_POWER_MIN;
c7de35cd
RR		 113
114 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
115 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 116 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
63013ae3 117 set_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status);
c7de35cd
RR		 118 return 0;
119 }
120
7f90dce1
EG		 121 channels = kcalloc(priv->channel_count,
122 sizeof(struct ieee80211_channel), GFP_KERNEL);
c7de35cd
RR		 123 if (!channels)
124 return -ENOMEM;
125
7f90dce1 126 rates = kcalloc(IWL_RATE_COUNT_LEGACY, sizeof(struct ieee80211_rate),
c7de35cd
RR		 127 GFP_KERNEL);
128 if (!rates) {
129 kfree(channels);
130 return -ENOMEM;
131 }
132
133 /* 5.2GHz channels start after the 2.4GHz channels */
134 sband = &priv->bands[IEEE80211_BAND_5GHZ];
135 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
136 /* just OFDM */
137 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 138 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 139
38622419 140 if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE)
b39488a9 141 iwl_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 142 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 143
144 sband = &priv->bands[IEEE80211_BAND_2GHZ];
145 sband->channels = channels;
146 /* OFDM & CCK */
147 sband->bitrates = rates;
5027309b 148 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 149
38622419 150 if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE)
b39488a9 151 iwl_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 152 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 153
154 priv->ieee_channels = channels;
155 priv->ieee_rates = rates;
156
c7de35cd
RR		 157 for (i = 0; i < priv->channel_count; i++) {
158 ch = &priv->channel_info[i];
159
160 /* FIXME: might be removed if scan is OK */
161 if (!is_channel_valid(ch))
162 continue;
163
5a3a0352 164 sband = &priv->bands[ch->band];
c7de35cd
RR		 165
166 geo_ch = &sband->channels[sband->n_channels++];
167
168 geo_ch->center_freq =
5a3a0352 169 ieee80211_channel_to_frequency(ch->channel, ch->band);
c7de35cd
RR		 170 geo_ch->max_power = ch->max_power_avg;
171 geo_ch->max_antenna_gain = 0xff;
172 geo_ch->hw_value = ch->channel;
173
174 if (is_channel_valid(ch)) {
175 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
176 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
177
178 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
179 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
180
181 if (ch->flags & EEPROM_CHANNEL_RADAR)
182 geo_ch->flags |= IEEE80211_CHAN_RADAR;
183
7aafef1c 184 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 185
75d80cad
SG		 186 if (ch->max_power_avg > max_tx_power)
187 max_tx_power = ch->max_power_avg;
c7de35cd
RR		 188 } else {
189 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
190 }
191
e1623446 192 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 193 ch->channel, geo_ch->center_freq,
194 is_channel_a_band(ch) ? "5.2" : "2.4",
195 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
196 "restricted" : "valid",
197 geo_ch->flags);
198 }
199
75d80cad
SG		 200 priv->tx_power_device_lmt = max_tx_power;
201 priv->tx_power_user_lmt = max_tx_power;
202 priv->tx_power_next = max_tx_power;
203
c7de35cd 204 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
38622419 205 cfg(priv)->sku & EEPROM_SKU_CAP_BAND_52GHZ) {
978785a3 206 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
9ca85961
EG		 207 "Please send your %s to maintainer.\n",
208 trans(priv)->hw_id_str);
38622419 209 cfg(priv)->sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
c7de35cd
RR		 210 }
211
978785a3 212 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 213 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
214 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd 215
63013ae3 216 set_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status);
c7de35cd
RR		 217
218 return 0;
219}
220
221/*
b39488a9 222 * iwl_free_geos - undo allocations in iwl_init_geos
c7de35cd 223 */
b39488a9 224void iwl_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 225{
226 kfree(priv->ieee_channels);
227 kfree(priv->ieee_rates);
63013ae3 228 clear_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status);
c7de35cd 229}
c7de35cd 230
7e6a5886
JB		 231static bool iwl_is_channel_extension(struct iwl_priv *priv,
232 enum ieee80211_band band,
233 u16 channel, u8 extension_chan_offset)
47c5196e
TW		 234{
235 const struct iwl_channel_info *ch_info;
236
237 ch_info = iwl_get_channel_info(priv, band, channel);
238 if (!is_channel_valid(ch_info))
7e6a5886 239 return false;
47c5196e 240
d9fe60de 241 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 242 return !(ch_info->ht40_extension_channel &
689da1b3 243 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 244 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 245 return !(ch_info->ht40_extension_channel &
689da1b3 246 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e 247
7e6a5886 248 return false;
47c5196e
TW		 249}
250
7e6a5886
JB		 251bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
252 struct iwl_rxon_context *ctx,
253 struct ieee80211_sta_ht_cap *ht_cap)
47c5196e 254{
7e6a5886
JB		 255 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
256 return false;
47c5196e 257
7e6a5886
JB		 258 /*
259 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
a2b0f02e
WYG		 260 * the bit will not set if it is pure 40MHz case
261 */
7e6a5886
JB		 262 if (ht_cap && !ht_cap->ht_supported)
263 return false;
264
d73e4923 265#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4 266 if (priv->disable_ht40)
7e6a5886 267 return false;
1e4247d4 268#endif
7e6a5886 269
611d3eb7 270 return iwl_is_channel_extension(priv, priv->band,
246ed355 271 le16_to_cpu(ctx->staging.channel),
7e6a5886 272 ctx->ht.extension_chan_offset);
47c5196e 273}
47c5196e 274
2c2f3b33
TW		 275static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
276{
ea196fdb
JB		 277 u16 new_val;
278 u16 beacon_factor;
279
280 /*
281 * If mac80211 hasn't given us a beacon interval, program
282 * the default into the device (not checking this here
283 * would cause the adjustment below to return the maximum
284 * value, which may break PAN.)
285 */
286 if (!beacon_val)
287 return DEFAULT_BEACON_INTERVAL;
288
289 /*
290 * If the beacon interval we obtained from the peer
291 * is too large, we'll have to wake up more often
292 * (and in IBSS case, we'll beacon too much)
293 *
294 * For example, if max_beacon_val is 4096, and the
295 * requested beacon interval is 7000, we'll have to
296 * use 3500 to be able to wake up on the beacons.
297 *
298 * This could badly influence beacon detection stats.
299 */
2c2f3b33
TW		 300
301 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
302 new_val = beacon_val / beacon_factor;
303
304 if (!new_val)
305 new_val = max_beacon_val;
306
307 return new_val;
308}
309
47313e34 310int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
2c2f3b33
TW		 311{
312 u64 tsf;
313 s32 interval_tm, rem;
2c2f3b33
TW		 314 struct ieee80211_conf *conf = NULL;
315 u16 beacon_int;
47313e34 316 struct ieee80211_vif *vif = ctx->vif;
2c2f3b33 317
8c222544 318 conf = &priv->hw->conf;
2c2f3b33 319
6ac2f839 320 lockdep_assert_held(&priv->shrd->mutex);
948f5a2f 321
246ed355 322 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 323
246ed355
JB		 324 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
325 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 326
47313e34 327 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
2c2f3b33 328
47313e34
JB		 329 /*
330 * TODO: For IBSS we need to get atim_window from mac80211,
331 * for now just always use 0
332 */
333 ctx->timing.atim_window = 0;
2c2f3b33 334
bde4530e 335 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
f1f270b2
JB		 336 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
337 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
338 priv->contexts[IWL_RXON_CTX_BSS].vif &&
339 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
bde4530e
JB		 340 ctx->timing.beacon_interval =
341 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
342 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
f1f270b2
JB		 343 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
344 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
345 priv->contexts[IWL_RXON_CTX_PAN].vif &&
346 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
347 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
348 !ctx->vif->bss_conf.beacon_int)) {
349 ctx->timing.beacon_interval =
350 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
351 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
bde4530e
JB		 352 } else {
353 beacon_int = iwl_adjust_beacon_interval(beacon_int,
ab9e212e 354 IWL_MAX_UCODE_BEACON_INTERVAL * TIME_UNIT);
bde4530e
JB		 355 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
356 }
2c2f3b33 357
bbb05cb5
JB		 358 ctx->beacon_int = beacon_int;
359
2c2f3b33 360 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 361 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 362 rem = do_div(tsf, interval_tm);
246ed355 363 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 364
47313e34 365 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
2491fa42 366
2c2f3b33
TW		 367 IWL_DEBUG_ASSOC(priv,
368 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB		 369 le16_to_cpu(ctx->timing.beacon_interval),
370 le32_to_cpu(ctx->timing.beacon_init_val),
371 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 372
e6bb4c9c 373 return iwl_trans_send_cmd_pdu(trans(priv), ctx->rxon_timing_cmd,
e419d62d 374 CMD_SYNC, sizeof(ctx->timing), &ctx->timing);
2c2f3b33 375}
2c2f3b33 376
246ed355
JB		 377void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
378 int hw_decrypt)
8ccde88a 379{
246ed355 380 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO		 381
382 if (hw_decrypt)
383 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
384 else
385 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
386
387}
8ccde88a 388
dacefedb 389/* validate RXON structure is valid */
246ed355 390int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a 391{
246ed355 392 struct iwl_rxon_cmd *rxon = &ctx->staging;
c914ac26 393 u32 errors = 0;
8ccde88a
SO		 394
395 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
dacefedb
JB		 396 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
397 IWL_WARN(priv, "check 2.4G: wrong narrow\n");
c914ac26 398 errors |= BIT(0);
dacefedb
JB		 399 }
400 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
401 IWL_WARN(priv, "check 2.4G: wrong radar\n");
c914ac26 402 errors |= BIT(1);
dacefedb 403 }
8ccde88a 404 } else {
dacefedb
JB		 405 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
406 IWL_WARN(priv, "check 5.2G: not short slot!\n");
c914ac26 407 errors |= BIT(2);
dacefedb
JB		 408 }
409 if (rxon->flags & RXON_FLG_CCK_MSK) {
410 IWL_WARN(priv, "check 5.2G: CCK!\n");
c914ac26 411 errors |= BIT(3);
dacefedb
JB		 412 }
413 }
414 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
415 IWL_WARN(priv, "mac/bssid mcast!\n");
c914ac26 416 errors |= BIT(4);
8ccde88a 417 }
8ccde88a
SO		 418
419 /* make sure basic rates 6Mbps and 1Mbps are supported */
dacefedb
JB		 420 if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
421 (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
422 IWL_WARN(priv, "neither 1 nor 6 are basic\n");
c914ac26 423 errors |= BIT(5);
dacefedb 424 }
8ccde88a 425
dacefedb
JB		 426 if (le16_to_cpu(rxon->assoc_id) > 2007) {
427 IWL_WARN(priv, "aid > 2007\n");
c914ac26 428 errors |= BIT(6);
dacefedb 429 }
8ccde88a 430
dacefedb
JB		 431 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
432 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
433 IWL_WARN(priv, "CCK and short slot\n");
c914ac26 434 errors |= BIT(7);
dacefedb 435 }
8ccde88a 436
dacefedb
JB		 437 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
438 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
439 IWL_WARN(priv, "CCK and auto detect");
c914ac26 440 errors |= BIT(8);
dacefedb 441 }
8ccde88a 442
dacefedb
JB		 443 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
444 RXON_FLG_TGG_PROTECT_MSK)) ==
445 RXON_FLG_TGG_PROTECT_MSK) {
446 IWL_WARN(priv, "TGg but no auto-detect\n");
c914ac26 447 errors |= BIT(9);
dacefedb 448 }
8ccde88a 449
c914ac26
JB		 450 if (rxon->channel == 0) {
451 IWL_WARN(priv, "zero channel is invalid\n");
452 errors |= BIT(10);
8ccde88a 453 }
c914ac26
JB		 454
455 WARN(errors, "Invalid RXON (%#x), channel %d",
456 errors, le16_to_cpu(rxon->channel));
457
458 return errors ? -EINVAL : 0;
8ccde88a 459}
8ccde88a
SO		 460
461/**
462 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
463 * @priv: staging_rxon is compared to active_rxon
464 *
465 * If the RXON structure is changing enough to require a new tune,
466 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
467 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
468 */
246ed355
JB		 469int iwl_full_rxon_required(struct iwl_priv *priv,
470 struct iwl_rxon_context *ctx)
8ccde88a 471{
246ed355
JB		 472 const struct iwl_rxon_cmd *staging = &ctx->staging;
473 const struct iwl_rxon_cmd *active = &ctx->active;
474
475#define CHK(cond) \
476 if ((cond)) { \
477 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
478 return 1; \
479 }
480
481#define CHK_NEQ(c1, c2) \
482 if ((c1) != (c2)) { \
483 IWL_DEBUG_INFO(priv, "need full RXON - " \
484 #c1 " != " #c2 " - %d != %d\n", \
485 (c1), (c2)); \
486 return 1; \
487 }
8ccde88a
SO		 488
489 /* These items are only settable from the full RXON command */
246ed355
JB		 490 CHK(!iwl_is_associated_ctx(ctx));
491 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
492 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
493 CHK(compare_ether_addr(staging->wlap_bssid_addr,
494 active->wlap_bssid_addr));
495 CHK_NEQ(staging->dev_type, active->dev_type);
496 CHK_NEQ(staging->channel, active->channel);
497 CHK_NEQ(staging->air_propagation, active->air_propagation);
498 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
499 active->ofdm_ht_single_stream_basic_rates);
500 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
501 active->ofdm_ht_dual_stream_basic_rates);
502 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
503 active->ofdm_ht_triple_stream_basic_rates);
504 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO		 505
506 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
507 * be updated with the RXON_ASSOC command -- however only some
508 * flag transitions are allowed using RXON_ASSOC */
509
510 /* Check if we are not switching bands */
246ed355
JB		 511 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
512 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO		 513
514 /* Check if we are switching association toggle */
246ed355
JB		 515 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
516 active->filter_flags & RXON_FILTER_ASSOC_MSK);
517
518#undef CHK
519#undef CHK_NEQ
8ccde88a
SO		 520
521 return 0;
522}
8ccde88a 523
246ed355
JB		 524static void _iwl_set_rxon_ht(struct iwl_priv *priv,
525 struct iwl_ht_config *ht_conf,
526 struct iwl_rxon_context *ctx)
47c5196e 527{
246ed355 528 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 529
7e6a5886 530 if (!ctx->ht.enabled) {
a2b0f02e 531 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 532 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 533 RXON_FLG_HT40_PROT_MSK |
42eb7c64 534 RXON_FLG_HT_PROT_MSK);
47c5196e 535 return;
42eb7c64 536 }
47c5196e 537
7e6a5886 538 /* FIXME: if the definition of ht.protection changed, the "translation"
a2b0f02e
WYG		 539 * will be needed for rxon->flags
540 */
7e6a5886 541 rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 542
543 /* Set up channel bandwidth:
7aafef1c 544 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 545 /* clear the HT channel mode before set the mode */
546 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
547 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7e6a5886 548 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
7aafef1c 549 /* pure ht40 */
7e6a5886 550 if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 551 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 552 /* Note: control channel is opposite of extension channel */
7e6a5886 553 switch (ctx->ht.extension_chan_offset) {
508b08e7
WYG		 554 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
555 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
556 break;
557 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
558 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
559 break;
560 }
561 } else {
a2b0f02e 562 /* Note: control channel is opposite of extension channel */
7e6a5886 563 switch (ctx->ht.extension_chan_offset) {
a2b0f02e
WYG		 564 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
565 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
566 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
567 break;
568 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
569 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
570 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
571 break;
572 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
573 default:
574 /* channel location only valid if in Mixed mode */
575 IWL_ERR(priv, "invalid extension channel offset\n");
576 break;
577 }
578 }
579 } else {
580 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 581 }
582
e3f10cea 583 iwlagn_set_rxon_chain(priv, ctx);
47c5196e 584
02bb1bea 585 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 586 "extension channel offset 0x%x\n",
7e6a5886
JB		 587 le32_to_cpu(rxon->flags), ctx->ht.protection,
588 ctx->ht.extension_chan_offset);
47c5196e 589}
246ed355
JB		 590
591void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
592{
593 struct iwl_rxon_context *ctx;
594
595 for_each_context(priv, ctx)
596 _iwl_set_rxon_ht(priv, ht_conf, ctx);
597}
47c5196e 598
246ed355 599/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 600u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 601 enum ieee80211_band band)
14023641
AK		 602{
603 const struct iwl_channel_info *ch_info;
604 int i;
605 u8 channel = 0;
246ed355
JB		 606 u8 min, max;
607 struct iwl_rxon_context *ctx;
14023641 608
14023641 609 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB		 610 min = 14;
611 max = priv->channel_count;
14023641 612 } else {
246ed355
JB		 613 min = 0;
614 max = 14;
615 }
616
617 for (i = min; i < max; i++) {
618 bool busy = false;
619
620 for_each_context(priv, ctx) {
621 busy = priv->channel_info[i].channel ==
622 le16_to_cpu(ctx->staging.channel);
623 if (busy)
624 break;
14023641 625 }
246ed355
JB		 626
627 if (busy)
628 continue;
629
630 channel = priv->channel_info[i].channel;
631 ch_info = iwl_get_channel_info(priv, band, channel);
632 if (is_channel_valid(ch_info))
633 break;
14023641
AK		 634 }
635
636 return channel;
637}
14023641 638
bf85ea4f 639/**
3edb5fd6
SZ		 640 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
641 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 642
bf85ea4f 643 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 644 * in the staging RXON flag structure based on the ch->band
bf85ea4f 645 */
dd63b84e 646void iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
246ed355 647 struct iwl_rxon_context *ctx)
bf85ea4f 648{
17e72782 649 enum ieee80211_band band = ch->band;
81e95430 650 u16 channel = ch->hw_value;
17e72782 651
246ed355 652 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f 653 (priv->band == band))
dd63b84e 654 return;
bf85ea4f 655
246ed355 656 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 657 if (band == IEEE80211_BAND_5GHZ)
246ed355 658 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 659 else
246ed355 660 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK		 661
662 priv->band = band;
663
e1623446 664 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f 665
bf85ea4f 666}
bf85ea4f 667
79d07325 668void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 669 struct iwl_rxon_context *ctx,
79d07325
WYG		 670 enum ieee80211_band band,
671 struct ieee80211_vif *vif)
8ccde88a
SO		 672{
673 if (band == IEEE80211_BAND_5GHZ) {
246ed355 674 ctx->staging.flags &=
8ccde88a
SO		 675 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
676 | RXON_FLG_CCK_MSK);
246ed355 677 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO		 678 } else {
679 /* Copied from iwl_post_associate() */
c213d745 680 if (vif && vif->bss_conf.use_short_slot)
246ed355 681 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 682 else
246ed355 683 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 684
246ed355
JB		 685 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
686 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
687 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO		 688 }
689}
8ccde88a
SO		 690
691/*
692 * initialize rxon structure with default values from eeprom
693 */
1dda6d28 694void iwl_connection_init_rx_config(struct iwl_priv *priv,
d0fe478c 695 struct iwl_rxon_context *ctx)
8ccde88a
SO		 696{
697 const struct iwl_channel_info *ch_info;
698
246ed355 699 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 700
d0fe478c
JB		 701 if (!ctx->vif) {
702 ctx->staging.dev_type = ctx->unused_devtype;
703 } else switch (ctx->vif->type) {
8ccde88a 704 case NL80211_IFTYPE_AP:
d0fe478c 705 ctx->staging.dev_type = ctx->ap_devtype;
8ccde88a
SO		 706 break;
707
708 case NL80211_IFTYPE_STATION:
d0fe478c 709 ctx->staging.dev_type = ctx->station_devtype;
246ed355 710 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO		 711 break;
712
713 case NL80211_IFTYPE_ADHOC:
d0fe478c 714 ctx->staging.dev_type = ctx->ibss_devtype;
246ed355
JB		 715 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
716 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO		 717 RXON_FILTER_ACCEPT_GRP_MSK;
718 break;
719
8ccde88a 720 default:
d0fe478c
JB		 721 IWL_ERR(priv, "Unsupported interface type %d\n",
722 ctx->vif->type);
8ccde88a
SO		 723 break;
724 }
725
726#if 0
727 /* TODO: Figure out when short_preamble would be set and cache from
728 * that */
729 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 730 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 731 else
246ed355 732 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO		 733#endif
734
735 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 736 le16_to_cpu(ctx->active.channel));
8ccde88a
SO		 737
738 if (!ch_info)
739 ch_info = &priv->channel_info[0];
740
246ed355 741 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO		 742 priv->band = ch_info->band;
743
d0fe478c 744 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
8ccde88a 745
246ed355 746 ctx->staging.ofdm_basic_rates =
8ccde88a 747 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 748 ctx->staging.cck_basic_rates =
8ccde88a
SO		 749 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
750
a2b0f02e 751 /* clear both MIX and PURE40 mode flag */
246ed355 752 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 753 RXON_FLG_CHANNEL_MODE_PURE_40);
d0fe478c
JB		 754 if (ctx->vif)
755 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
7684c408 756
246ed355
JB		 757 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
758 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
759 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a 760}
8ccde88a 761
79d07325 762void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 763{
764 const struct ieee80211_supported_band *hw = NULL;
765 struct ieee80211_rate *rate;
246ed355 766 struct iwl_rxon_context *ctx;
8ccde88a
SO		 767 int i;
768
769 hw = iwl_get_hw_mode(priv, priv->band);
770 if (!hw) {
771 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
772 return;
773 }
774
775 priv->active_rate = 0;
8ccde88a
SO		 776
777 for (i = 0; i < hw->n_bitrates; i++) {
778 rate = &(hw->bitrates[i]);
5027309b 779 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 780 priv->active_rate |= (1 << rate->hw_value);
781 }
782
4a02886b 783 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 784
246ed355
JB		 785 for_each_context(priv, ctx) {
786 ctx->staging.cck_basic_rates =
787 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 788
246ed355
JB		 789 ctx->staging.ofdm_basic_rates =
790 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
791 }
8ccde88a 792}
79d07325
WYG		 793
794void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
795{
8bd413e6
JB		 796 /*
797 * MULTI-FIXME
ade4c649 798 * See iwlagn_mac_channel_switch.
8bd413e6
JB		 799 */
800 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
801
63013ae3 802 if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
79d07325
WYG		 803 return;
804
63013ae3
EG		 805 if (test_and_clear_bit(STATUS_CHANNEL_SWITCH_PENDING,
806 &priv->shrd->status))
8bd413e6 807 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325 808}
8ccde88a 809
8ccde88a 810#ifdef CONFIG_IWLWIFI_DEBUG
14991a9d
EG		 811void iwl_print_rx_config_cmd(struct iwl_priv *priv,
812 enum iwl_rxon_context_id ctxid)
8ccde88a 813{
522376d2 814 struct iwl_rxon_context *ctx = &priv->contexts[ctxid];
246ed355 815 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 816
e1623446 817 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 818 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 819 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
820 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
821 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 822 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 823 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
824 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 825 rxon->ofdm_basic_rates);
e1623446
TW		 826 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
827 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
828 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
829 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 830}
6686d17e 831#endif
e649437f
JB		 832
833void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
8ccde88a 834{
491bc292
WYG		 835 unsigned int reload_msec;
836 unsigned long reload_jiffies;
837
8ccde88a 838 /* Set the FW error flag -- cleared on iwl_down */
63013ae3 839 set_bit(STATUS_FW_ERROR, &priv->shrd->status);
8ccde88a
SO		 840
841 /* Cancel currently queued command. */
63013ae3 842 clear_bit(STATUS_HCMD_ACTIVE, &priv->shrd->status);
8ccde88a 843
79e3b16b 844 iwl_abort_notification_waits(priv->shrd);
e74fe233 845
e649437f
JB		 846 /* Keep the restart process from trying to send host
847 * commands by clearing the ready bit */
63013ae3 848 clear_bit(STATUS_READY, &priv->shrd->status);
e649437f 849
effd4d9a 850 wake_up(&priv->shrd->wait_command_queue);
e649437f
JB		 851
852 if (!ondemand) {
853 /*
854 * If firmware keep reloading, then it indicate something
855 * serious wrong and firmware having problem to recover
856 * from it. Instead of keep trying which will fill the syslog
857 * and hang the system, let's just stop it
858 */
859 reload_jiffies = jiffies;
860 reload_msec = jiffies_to_msecs((long) reload_jiffies -
861 (long) priv->reload_jiffies);
862 priv->reload_jiffies = reload_jiffies;
863 if (reload_msec <= IWL_MIN_RELOAD_DURATION) {
864 priv->reload_count++;
865 if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) {
866 IWL_ERR(priv, "BUG_ON, Stop restarting\n");
867 return;
868 }
869 } else
870 priv->reload_count = 0;
871 }
872
63013ae3 873 if (!test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) {
9d143e9a 874 if (iwlagn_mod_params.restart_fw) {
9ca06f0a 875 IWL_DEBUG_FW_ERRORS(priv,
e649437f 876 "Restarting adapter due to uCode error.\n");
1ee158d8 877 queue_work(priv->workqueue, &priv->restart);
e649437f 878 } else
9ca06f0a 879 IWL_DEBUG_FW_ERRORS(priv,
e649437f
JB		 880 "Detected FW error, but not restarting\n");
881 }
882}
883
630fe9b6
TW		 884int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
885{
a25a66ac
SG		 886 int ret;
887 s8 prev_tx_power;
f844a709
SG		 888 bool defer;
889 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
a25a66ac 890
6ac2f839 891 lockdep_assert_held(&priv->shrd->mutex);
a25a66ac
SG		 892
893 if (priv->tx_power_user_lmt == tx_power && !force)
894 return 0;
895
b744cb79
WYG		 896 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
897 IWL_WARN(priv,
898 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 899 tx_power,
b744cb79 900 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 901 return -EINVAL;
902 }
903
dc1b0973 904 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 905 IWL_WARN(priv,
906 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 907 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 908 return -EINVAL;
909 }
910
845a9c0d 911 if (!iwl_is_ready_rf(priv->shrd))
a25a66ac 912 return -EIO;
630fe9b6 913
f844a709
SG		 914 /* scan complete and commit_rxon use tx_power_next value,
915 * it always need to be updated for newest request */
a25a66ac 916 priv->tx_power_next = tx_power;
f844a709
SG		 917
918 /* do not set tx power when scanning or channel changing */
63013ae3 919 defer = test_bit(STATUS_SCANNING, &priv->shrd->status) ||
f844a709
SG		 920 memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
921 if (defer && !force) {
922 IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
a25a66ac 923 return 0;
5eadd94b 924 }
630fe9b6 925
a25a66ac
SG		 926 prev_tx_power = priv->tx_power_user_lmt;
927 priv->tx_power_user_lmt = tx_power;
928
5beaaf37 929 ret = iwlagn_send_tx_power(priv);
a25a66ac
SG		 930
931 /* if fail to set tx_power, restore the orig. tx power */
932 if (ret) {
933 priv->tx_power_user_lmt = prev_tx_power;
934 priv->tx_power_next = prev_tx_power;
935 }
630fe9b6
TW		 936 return ret;
937}
630fe9b6 938
65b52bde 939void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 940{
941 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 942 .lead_time = BT_LEAD_TIME_DEF,
943 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 944 .kill_ack_mask = 0,
945 .kill_cts_mask = 0,
946 };
947
b60eec9b 948 if (!iwlagn_mod_params.bt_coex_active)
06702a73
WYG		 949 bt_cmd.flags = BT_COEX_DISABLE;
950 else
951 bt_cmd.flags = BT_COEX_ENABLE;
952
f21dd005 953 priv->bt_enable_flag = bt_cmd.flags;
06702a73
WYG		 954 IWL_DEBUG_INFO(priv, "BT coex %s\n",
955 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
956
e6bb4c9c 957 if (iwl_trans_send_cmd_pdu(trans(priv), REPLY_BT_CONFIG,
e419d62d 958 CMD_SYNC, sizeof(struct iwl_bt_cmd), &bt_cmd))
65b52bde 959 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd 960}
17f841cd 961
ef8d5529 962int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 963{
ef8d5529
WYG		 964 struct iwl_statistics_cmd statistics_cmd = {
965 .configuration_flags =
966 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 967 };
ef8d5529
WYG		 968
969 if (flags & CMD_ASYNC)
e6bb4c9c 970 return iwl_trans_send_cmd_pdu(trans(priv), REPLY_STATISTICS_CMD,
e419d62d 971 CMD_ASYNC,
ef8d5529 972 sizeof(struct iwl_statistics_cmd),
e419d62d 973 &statistics_cmd);
ef8d5529 974 else
e6bb4c9c 975 return iwl_trans_send_cmd_pdu(trans(priv), REPLY_STATISTICS_CMD,
e419d62d 976 CMD_SYNC,
ef8d5529
WYG		 977 sizeof(struct iwl_statistics_cmd),
978 &statistics_cmd);
49ea8596 979}
7e8c519e 980
488829f1 981
727882d6 982
d8052319 983
20594eb0
WYG		 984#ifdef CONFIG_IWLWIFI_DEBUGFS
985
986#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
987
988void iwl_reset_traffic_log(struct iwl_priv *priv)
989{
990 priv->tx_traffic_idx = 0;
991 priv->rx_traffic_idx = 0;
992 if (priv->tx_traffic)
993 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
994 if (priv->rx_traffic)
995 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
996}
997
998int iwl_alloc_traffic_mem(struct iwl_priv *priv)
999{
1000 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
1001
8f470ce3 1002 if (iwl_get_debug_level(priv->shrd) & IWL_DL_TX) {
20594eb0
WYG		 1003 if (!priv->tx_traffic) {
1004 priv->tx_traffic =
1005 kzalloc(traffic_size, GFP_KERNEL);
1006 if (!priv->tx_traffic)
1007 return -ENOMEM;
1008 }
1009 }
8f470ce3 1010 if (iwl_get_debug_level(priv->shrd) & IWL_DL_RX) {
20594eb0
WYG		 1011 if (!priv->rx_traffic) {
1012 priv->rx_traffic =
1013 kzalloc(traffic_size, GFP_KERNEL);
1014 if (!priv->rx_traffic)
1015 return -ENOMEM;
1016 }
1017 }
1018 iwl_reset_traffic_log(priv);
1019 return 0;
1020}
20594eb0
WYG		 1021
1022void iwl_free_traffic_mem(struct iwl_priv *priv)
1023{
1024 kfree(priv->tx_traffic);
1025 priv->tx_traffic = NULL;
1026
1027 kfree(priv->rx_traffic);
1028 priv->rx_traffic = NULL;
1029}
20594eb0
WYG		 1030
1031void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
1032 u16 length, struct ieee80211_hdr *header)
1033{
1034 __le16 fc;
1035 u16 len;
1036
8f470ce3 1037 if (likely(!(iwl_get_debug_level(priv->shrd) & IWL_DL_TX)))
20594eb0
WYG		 1038 return;
1039
1040 if (!priv->tx_traffic)
1041 return;
1042
1043 fc = header->frame_control;
1044 if (ieee80211_is_data(fc)) {
1045 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1046 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1047 memcpy((priv->tx_traffic +
1048 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1049 header, len);
1050 priv->tx_traffic_idx =
1051 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1052 }
1053}
20594eb0
WYG		 1054
1055void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
1056 u16 length, struct ieee80211_hdr *header)
1057{
1058 __le16 fc;
1059 u16 len;
1060
8f470ce3 1061 if (likely(!(iwl_get_debug_level(priv->shrd) & IWL_DL_RX)))
20594eb0
WYG		 1062 return;
1063
1064 if (!priv->rx_traffic)
1065 return;
1066
1067 fc = header->frame_control;
1068 if (ieee80211_is_data(fc)) {
1069 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
1070 ? IWL_TRAFFIC_ENTRY_SIZE : length;
1071 memcpy((priv->rx_traffic +
1072 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
1073 header, len);
1074 priv->rx_traffic_idx =
1075 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
1076 }
1077}
22fdf3c9
WYG		 1078
1079const char *get_mgmt_string(int cmd)
1080{
1081 switch (cmd) {
1082 IWL_CMD(MANAGEMENT_ASSOC_REQ);
1083 IWL_CMD(MANAGEMENT_ASSOC_RESP);
1084 IWL_CMD(MANAGEMENT_REASSOC_REQ);
1085 IWL_CMD(MANAGEMENT_REASSOC_RESP);
1086 IWL_CMD(MANAGEMENT_PROBE_REQ);
1087 IWL_CMD(MANAGEMENT_PROBE_RESP);
1088 IWL_CMD(MANAGEMENT_BEACON);
1089 IWL_CMD(MANAGEMENT_ATIM);
1090 IWL_CMD(MANAGEMENT_DISASSOC);
1091 IWL_CMD(MANAGEMENT_AUTH);
1092 IWL_CMD(MANAGEMENT_DEAUTH);
1093 IWL_CMD(MANAGEMENT_ACTION);
1094 default:
1095 return "UNKNOWN";
1096
1097 }
1098}
1099
1100const char *get_ctrl_string(int cmd)
1101{
1102 switch (cmd) {
1103 IWL_CMD(CONTROL_BACK_REQ);
1104 IWL_CMD(CONTROL_BACK);
1105 IWL_CMD(CONTROL_PSPOLL);
1106 IWL_CMD(CONTROL_RTS);
1107 IWL_CMD(CONTROL_CTS);
1108 IWL_CMD(CONTROL_ACK);
1109 IWL_CMD(CONTROL_CFEND);
1110 IWL_CMD(CONTROL_CFENDACK);
1111 default:
1112 return "UNKNOWN";
1113
1114 }
1115}
1116
7163b8a4 1117void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 1118{
1119 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9
WYG		 1120 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
1121}
1122
1123/*
1124 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
1125 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
1126 * Use debugFs to display the rx/rx_statistics
1127 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
1128 * information will be recorded, but DATA pkt still will be recorded
1129 * for the reason of iwl_led.c need to control the led blinking based on
1130 * number of tx and rx data.
1131 *
1132 */
1133void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
1134{
1135 struct traffic_stats *stats;
1136
1137 if (is_tx)
1138 stats = &priv->tx_stats;
1139 else
1140 stats = &priv->rx_stats;
1141
1142 if (ieee80211_is_mgmt(fc)) {
1143 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1144 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1145 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
1146 break;
1147 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
1148 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
1149 break;
1150 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1151 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
1152 break;
1153 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
1154 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
1155 break;
1156 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
1157 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
1158 break;
1159 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
1160 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
1161 break;
1162 case cpu_to_le16(IEEE80211_STYPE_BEACON):
1163 stats->mgmt[MANAGEMENT_BEACON]++;
1164 break;
1165 case cpu_to_le16(IEEE80211_STYPE_ATIM):
1166 stats->mgmt[MANAGEMENT_ATIM]++;
1167 break;
1168 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
1169 stats->mgmt[MANAGEMENT_DISASSOC]++;
1170 break;
1171 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1172 stats->mgmt[MANAGEMENT_AUTH]++;
1173 break;
1174 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1175 stats->mgmt[MANAGEMENT_DEAUTH]++;
1176 break;
1177 case cpu_to_le16(IEEE80211_STYPE_ACTION):
1178 stats->mgmt[MANAGEMENT_ACTION]++;
1179 break;
1180 }
1181 } else if (ieee80211_is_ctl(fc)) {
1182 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1183 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
1184 stats->ctrl[CONTROL_BACK_REQ]++;
1185 break;
1186 case cpu_to_le16(IEEE80211_STYPE_BACK):
1187 stats->ctrl[CONTROL_BACK]++;
1188 break;
1189 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
1190 stats->ctrl[CONTROL_PSPOLL]++;
1191 break;
1192 case cpu_to_le16(IEEE80211_STYPE_RTS):
1193 stats->ctrl[CONTROL_RTS]++;
1194 break;
1195 case cpu_to_le16(IEEE80211_STYPE_CTS):
1196 stats->ctrl[CONTROL_CTS]++;
1197 break;
1198 case cpu_to_le16(IEEE80211_STYPE_ACK):
1199 stats->ctrl[CONTROL_ACK]++;
1200 break;
1201 case cpu_to_le16(IEEE80211_STYPE_CFEND):
1202 stats->ctrl[CONTROL_CFEND]++;
1203 break;
1204 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
1205 stats->ctrl[CONTROL_CFENDACK]++;
1206 break;
1207 }
1208 } else {
1209 /* data */
1210 stats->data_cnt++;
1211 stats->data_bytes += len;
1212 }
1213}
20594eb0
WYG		 1214#endif
1215
a93e7973 1216static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a 1217{
63013ae3 1218 if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
afbdd69a
WYG		 1219 return;
1220
246ed355 1221 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG		 1222 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
1223 return;
1224 }
1225 /*
1226 * There is no easy and better way to force reset the radio,
1227 * the only known method is switching channel which will force to
1228 * reset and tune the radio.
1229 * Use internal short scan (single channel) operation to should
1230 * achieve this objective.
1231 * Driver should reset the radio when number of consecutive missed
1232 * beacon, or any other uCode error condition detected.
1233 */
1234 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
1235 iwl_internal_short_hw_scan(priv);
afbdd69a 1236}
a93e7973 1237
a93e7973 1238
c04f9f22 1239int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 1240{
8a472da4
WYG		 1241 struct iwl_force_reset *force_reset;
1242
63013ae3 1243 if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
a93e7973
WYG		 1244 return -EINVAL;
1245
8a472da4
WYG		 1246 if (mode >= IWL_MAX_FORCE_RESET) {
1247 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
1248 return -EINVAL;
1249 }
1250 force_reset = &priv->force_reset[mode];
1251 force_reset->reset_request_count++;
c04f9f22
WYG		 1252 if (!external) {
1253 if (force_reset->last_force_reset_jiffies &&
1254 time_after(force_reset->last_force_reset_jiffies +
1255 force_reset->reset_duration, jiffies)) {
1256 IWL_DEBUG_INFO(priv, "force reset rejected\n");
1257 force_reset->reset_reject_count++;
1258 return -EAGAIN;
1259 }
a93e7973 1260 }
8a472da4
WYG		 1261 force_reset->reset_success_count++;
1262 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 1263 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 1264 switch (mode) {
1265 case IWL_RF_RESET:
1266 iwl_force_rf_reset(priv);
1267 break;
1268 case IWL_FW_RESET:
c04f9f22
WYG		 1269 /*
1270 * if the request is from external(ex: debugfs),
1271 * then always perform the request in regardless the module
1272 * parameter setting
1273 * if the request is from internal (uCode error or driver
1274 * detect failure), then fw_restart module parameter
1275 * need to be check before performing firmware reload
1276 */
9d143e9a 1277 if (!external && !iwlagn_mod_params.restart_fw) {
c04f9f22
WYG		 1278 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
1279 "module parameter setting\n");
1280 break;
1281 }
a93e7973 1282 IWL_ERR(priv, "On demand firmware reload\n");
e649437f 1283 iwlagn_fw_error(priv, true);
a93e7973 1284 break;
a93e7973 1285 }
a93e7973
WYG		 1286 return 0;
1287}
b74e31a9 1288
d4daaea6 1289
317d09f7
WYG		 1290int iwl_cmd_echo_test(struct iwl_priv *priv)
1291{
7e4005cc 1292 int ret;
317d09f7
WYG		 1293 struct iwl_host_cmd cmd = {
1294 .id = REPLY_ECHO,
89db3b97 1295 .len = { 0 },
317d09f7
WYG		 1296 .flags = CMD_SYNC,
1297 };
1298
7e4005cc
WYG		 1299 ret = iwl_trans_send_cmd(trans(priv), &cmd);
1300 if (ret)
1301 IWL_ERR(priv, "echo testing fail: 0X%x\n", ret);
1302 else
1303 IWL_DEBUG_INFO(priv, "echo testing pass\n");
1304 return ret;
317d09f7
WYG		 1305}
1306
f22be624 1307static inline int iwl_check_stuck_queue(struct iwl_priv *priv, int txq)
b74e31a9 1308{
f22be624 1309 if (iwl_trans_check_stuck_queue(trans(priv), txq)) {
317d09f7 1310 int ret;
317d09f7 1311 ret = iwl_force_reset(priv, IWL_FW_RESET, false);
22de94de 1312 return (ret == -EAGAIN) ? 0 : 1;
b74e31a9
WYG		 1313 }
1314 return 0;
1315}
1316
22de94de
SG		 1317/*
1318 * Making watchdog tick be a quarter of timeout assure we will
1319 * discover the queue hung between timeout and 1.25*timeout
1320 */
1321#define IWL_WD_TICK(timeout) ((timeout) / 4)
1322
1323/*
1324 * Watchdog timer callback, we check each tx queue for stuck, if if hung
1325 * we reset the firmware. If everything is fine just rearm the timer.
1326 */
1327void iwl_bg_watchdog(unsigned long data)
b74e31a9
WYG		 1328{
1329 struct iwl_priv *priv = (struct iwl_priv *)data;
1330 int cnt;
22de94de 1331 unsigned long timeout;
b74e31a9 1332
63013ae3 1333 if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
b74e31a9
WYG		 1334 return;
1335
46e7741e
WYG		 1336 if (iwl_is_rfkill(priv->shrd))
1337 return;
1338
38622419 1339 timeout = cfg(priv)->base_params->wd_timeout;
22de94de
SG		 1340 if (timeout == 0)
1341 return;
1342
b74e31a9 1343 /* monitor and check for stuck cmd queue */
cefeaa5f 1344 if (iwl_check_stuck_queue(priv, priv->shrd->cmd_queue))
b74e31a9
WYG		 1345 return;
1346
1347 /* monitor and check for other stuck queues */
246ed355 1348 if (iwl_is_any_associated(priv)) {
d6189124 1349 for (cnt = 0; cnt < hw_params(priv).max_txq_num; cnt++) {
b74e31a9 1350 /* skip as we already checked the command queue */
cefeaa5f 1351 if (cnt == priv->shrd->cmd_queue)
b74e31a9
WYG		 1352 continue;
1353 if (iwl_check_stuck_queue(priv, cnt))
1354 return;
1355 }
1356 }
22de94de
SG		 1357
1358 mod_timer(&priv->watchdog, jiffies +
1359 msecs_to_jiffies(IWL_WD_TICK(timeout)));
b74e31a9 1360}
22de94de
SG		 1361
1362void iwl_setup_watchdog(struct iwl_priv *priv)
1363{
38622419 1364 unsigned int timeout = cfg(priv)->base_params->wd_timeout;
afbdd69a 1365
9995ffe5
WYG		 1366 if (!iwlagn_mod_params.wd_disable) {
1367 /* use system default */
38622419 1368 if (timeout && !cfg(priv)->base_params->wd_disable)
9995ffe5
WYG		 1369 mod_timer(&priv->watchdog,
1370 jiffies +
1371 msecs_to_jiffies(IWL_WD_TICK(timeout)));
1372 else
1373 del_timer(&priv->watchdog);
1374 } else {
1375 /* module parameter overwrite default configuration */
1376 if (timeout && iwlagn_mod_params.wd_disable == 2)
1377 mod_timer(&priv->watchdog,
1378 jiffies +
1379 msecs_to_jiffies(IWL_WD_TICK(timeout)));
1380 else
1381 del_timer(&priv->watchdog);
1382 }
22de94de 1383}
a0ee74cf 1384
8c222544
EG		 1385/**
1386 * iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time
1387 * @priv -- pointer to iwl_priv data structure
1388 * @tsf_bits -- number of bits need to shift for masking)
1389 */
1390static inline u32 iwl_beacon_time_mask_low(struct iwl_priv *priv,
1391 u16 tsf_bits)
1392{
1393 return (1 << tsf_bits) - 1;
1394}
1395
1396/**
1397 * iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time
1398 * @priv -- pointer to iwl_priv data structure
1399 * @tsf_bits -- number of bits need to shift for masking)
1400 */
1401static inline u32 iwl_beacon_time_mask_high(struct iwl_priv *priv,
1402 u16 tsf_bits)
1403{
1404 return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
1405}
1406
a0ee74cf
WYG		 1407/*
1408 * extended beacon time format
1409 * time in usec will be changed into a 32-bit value in extended:internal format
1410 * the extended part is the beacon counts
1411 * the internal part is the time in usec within one beacon interval
1412 */
1413u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
1414{
1415 u32 quot;
1416 u32 rem;
1417 u32 interval = beacon_interval * TIME_UNIT;
1418
1419 if (!interval || !usec)
1420 return 0;
1421
1422 quot = (usec / interval) &
403ba56a
DF		 1423 (iwl_beacon_time_mask_high(priv, IWLAGN_EXT_BEACON_TIME_POS) >>
1424 IWLAGN_EXT_BEACON_TIME_POS);
a0ee74cf 1425 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
403ba56a 1426 IWLAGN_EXT_BEACON_TIME_POS);
a0ee74cf 1427
403ba56a 1428 return (quot << IWLAGN_EXT_BEACON_TIME_POS) + rem;
a0ee74cf 1429}
a0ee74cf
WYG		 1430
1431/* base is usually what we get from ucode with each received frame,
1432 * the same as HW timer counter counting down
1433 */
1434__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
1435 u32 addon, u32 beacon_interval)
1436{
1437 u32 base_low = base & iwl_beacon_time_mask_low(priv,
403ba56a 1438 IWLAGN_EXT_BEACON_TIME_POS);
a0ee74cf 1439 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
403ba56a 1440 IWLAGN_EXT_BEACON_TIME_POS);
a0ee74cf
WYG		 1441 u32 interval = beacon_interval * TIME_UNIT;
1442 u32 res = (base & iwl_beacon_time_mask_high(priv,
403ba56a 1443 IWLAGN_EXT_BEACON_TIME_POS)) +
a0ee74cf 1444 (addon & iwl_beacon_time_mask_high(priv,
403ba56a 1445 IWLAGN_EXT_BEACON_TIME_POS));
a0ee74cf
WYG		 1446
1447 if (base_low > addon_low)
1448 res += base_low - addon_low;
1449 else if (base_low < addon_low) {
1450 res += interval + base_low - addon_low;
403ba56a 1451 res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
a0ee74cf 1452 } else
403ba56a 1453 res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
a0ee74cf
WYG		 1454
1455 return cpu_to_le32(res);
1456}
a0ee74cf 1457
3e10caeb
EG		 1458void iwl_set_hw_rfkill_state(struct iwl_priv *priv, bool state)
1459{
1460 wiphy_rfkill_set_hw_state(priv->hw->wiphy, state);
1461}
7a10e3e4
EG		 1462
1463void iwl_nic_config(struct iwl_priv *priv)
1464{
38622419 1465 cfg(priv)->lib->nic_config(priv);
7a10e3e4 1466}
909e9b23 1467
ed277c93 1468void iwl_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb)
909e9b23 1469{
ed277c93 1470 struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);
909e9b23
EG		 1471 struct ieee80211_tx_info *info;
1472
1473 info = IEEE80211_SKB_CB(skb);
1474 kmem_cache_free(priv->tx_cmd_pool, (info->driver_data[1]));
1475 dev_kfree_skb_any(skb);
1476}
859cfb0a
EG		 1477
1478void iwl_stop_sw_queue(struct iwl_priv *priv, u8 ac)
1479{
1480 ieee80211_stop_queue(priv->hw, ac);
1481}
1482
1483void iwl_wake_sw_queue(struct iwl_priv *priv, u8 ac)
1484{
1485 ieee80211_wake_queue(priv->hw, ac);
1486}
Linux 6.x block layer and io_uring tree(s)