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iwlwifi: avoid race condition in channel change
[linux-2.6-block.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW		 46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG		 51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
67static bool bt_coex_active = true;
68module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 69MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 70
c7de35cd
RR		 71#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
72 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
73 IWL_RATE_SISO_##s##M_PLCP, \
74 IWL_RATE_MIMO2_##s##M_PLCP,\
75 IWL_RATE_MIMO3_##s##M_PLCP,\
76 IWL_RATE_##r##M_IEEE, \
77 IWL_RATE_##ip##M_INDEX, \
78 IWL_RATE_##in##M_INDEX, \
79 IWL_RATE_##rp##M_INDEX, \
80 IWL_RATE_##rn##M_INDEX, \
81 IWL_RATE_##pp##M_INDEX, \
82 IWL_RATE_##np##M_INDEX }
83
a562a9dd
RC		 84u32 iwl_debug_level;
85EXPORT_SYMBOL(iwl_debug_level);
86
c7de35cd
RR		 87/*
88 * Parameter order:
89 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
90 *
91 * If there isn't a valid next or previous rate then INV is used which
92 * maps to IWL_RATE_INVALID
93 *
94 */
1826dcc0 95const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 96 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
97 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
98 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
99 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
100 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
101 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
102 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
103 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
104 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
105 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
106 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
107 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
108 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
109 /* FIXME:RS: ^^ should be INV (legacy) */
110};
1826dcc0 111EXPORT_SYMBOL(iwl_rates);
c7de35cd 112
e7d326ac
TW		 113int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
114{
115 int idx = 0;
116
117 /* HT rate format */
118 if (rate_n_flags & RATE_MCS_HT_MSK) {
119 idx = (rate_n_flags & 0xff);
120
60d32215
DH		 121 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
122 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
123 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 124 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
125
126 idx += IWL_FIRST_OFDM_RATE;
127 /* skip 9M not supported in ht*/
128 if (idx >= IWL_RATE_9M_INDEX)
129 idx += 1;
130 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
131 return idx;
132
133 /* legacy rate format, search for match in table */
134 } else {
135 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
136 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
137 return idx;
138 }
139
140 return -1;
141}
142EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
143
0e1654fa 144u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
76eff18b
TW		 145{
146 int i;
147 u8 ind = ant;
0e1654fa 148
76eff18b
TW		 149 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
150 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
0e1654fa 151 if (valid & BIT(ind))
76eff18b
TW		 152 return ind;
153 }
154 return ant;
155}
47ff65c4 156EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 157
158const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
159EXPORT_SYMBOL(iwl_bcast_addr);
160
161
1d0a082d
AK		 162/* This function both allocates and initializes hw and priv. */
163struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
164 struct ieee80211_ops *hw_ops)
165{
166 struct iwl_priv *priv;
167
168 /* mac80211 allocates memory for this device instance, including
169 * space for this driver's private structure */
170 struct ieee80211_hw *hw =
171 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
172 if (hw == NULL) {
c96c31e4 173 pr_err("%s: Can not allocate network device\n",
a3139c59 174 cfg->name);
1d0a082d
AK		 175 goto out;
176 }
177
178 priv = hw->priv;
179 priv->hw = hw;
180
181out:
182 return hw;
183}
184EXPORT_SYMBOL(iwl_alloc_all);
185
14d2aac5
AK		 186/*
187 * QoS support
188*/
e61146e3 189static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK		 190{
191 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
192 return;
193
194 priv->qos_data.def_qos_parm.qos_flags = 0;
195
14d2aac5
AK		 196 if (priv->qos_data.qos_active)
197 priv->qos_data.def_qos_parm.qos_flags |=
198 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
199
200 if (priv->current_ht_config.is_ht)
201 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
202
e61146e3
SG		 203 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
204 priv->qos_data.qos_active,
205 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 206
e61146e3
SG		 207 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
208 sizeof(struct iwl_qosparam_cmd),
209 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 210}
c7de35cd 211
d9fe60de
JB		 212#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
213#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 214static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 215 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 216 enum ieee80211_band band)
217{
39130df3
RR		 218 u16 max_bit_rate = 0;
219 u8 rx_chains_num = priv->hw_params.rx_chains_num;
220 u8 tx_chains_num = priv->hw_params.tx_chains_num;
221
c7de35cd 222 ht_info->cap = 0;
d9fe60de 223 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 224
d9fe60de 225 ht_info->ht_supported = true;
c7de35cd 226
b261793d
DH		 227 if (priv->cfg->ht_greenfield_support)
228 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 229 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 230 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 231 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 232 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
233 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
234 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 235 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 236 }
c7de35cd
RR		 237
238 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 239 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 240
241 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
242 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
243
d9fe60de 244 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 245 if (rx_chains_num >= 2)
d9fe60de 246 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 247 if (rx_chains_num >= 3)
d9fe60de 248 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 249
250 /* Highest supported Rx data rate */
251 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 252 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
253 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 254
255 /* Tx MCS capabilities */
d9fe60de 256 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 257 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 258 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
259 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
260 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 261 }
c7de35cd 262}
c7de35cd 263
c7de35cd
RR		 264/**
265 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
266 */
534166de 267int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 268{
269 struct iwl_channel_info *ch;
270 struct ieee80211_supported_band *sband;
271 struct ieee80211_channel *channels;
272 struct ieee80211_channel *geo_ch;
273 struct ieee80211_rate *rates;
274 int i = 0;
275
276 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
277 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 278 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 279 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
280 return 0;
281 }
282
283 channels = kzalloc(sizeof(struct ieee80211_channel) *
284 priv->channel_count, GFP_KERNEL);
285 if (!channels)
286 return -ENOMEM;
287
5027309b 288 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 289 GFP_KERNEL);
290 if (!rates) {
291 kfree(channels);
292 return -ENOMEM;
293 }
294
295 /* 5.2GHz channels start after the 2.4GHz channels */
296 sband = &priv->bands[IEEE80211_BAND_5GHZ];
297 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
298 /* just OFDM */
299 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 300 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 301
49779293 302 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 303 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 304 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 305
306 sband = &priv->bands[IEEE80211_BAND_2GHZ];
307 sband->channels = channels;
308 /* OFDM & CCK */
309 sband->bitrates = rates;
5027309b 310 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 311
49779293 312 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 313 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 314 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 315
316 priv->ieee_channels = channels;
317 priv->ieee_rates = rates;
318
c7de35cd
RR		 319 for (i = 0; i < priv->channel_count; i++) {
320 ch = &priv->channel_info[i];
321
322 /* FIXME: might be removed if scan is OK */
323 if (!is_channel_valid(ch))
324 continue;
325
326 if (is_channel_a_band(ch))
327 sband = &priv->bands[IEEE80211_BAND_5GHZ];
328 else
329 sband = &priv->bands[IEEE80211_BAND_2GHZ];
330
331 geo_ch = &sband->channels[sband->n_channels++];
332
333 geo_ch->center_freq =
334 ieee80211_channel_to_frequency(ch->channel);
335 geo_ch->max_power = ch->max_power_avg;
336 geo_ch->max_antenna_gain = 0xff;
337 geo_ch->hw_value = ch->channel;
338
339 if (is_channel_valid(ch)) {
340 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
341 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
342
343 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
344 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
345
346 if (ch->flags & EEPROM_CHANNEL_RADAR)
347 geo_ch->flags |= IEEE80211_CHAN_RADAR;
348
7aafef1c 349 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 350
dc1b0973
WYG		 351 if (ch->max_power_avg > priv->tx_power_device_lmt)
352 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 353 } else {
354 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
355 }
356
e1623446 357 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 358 ch->channel, geo_ch->center_freq,
359 is_channel_a_band(ch) ? "5.2" : "2.4",
360 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
361 "restricted" : "valid",
362 geo_ch->flags);
363 }
364
365 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
366 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 367 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
368 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 369 priv->pci_dev->device,
370 priv->pci_dev->subsystem_device);
c7de35cd
RR		 371 priv->cfg->sku &= ~IWL_SKU_A;
372 }
373
978785a3 374 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 375 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
376 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 377
378 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
379
380 return 0;
381}
534166de 382EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 383
384/*
385 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
386 */
534166de 387void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 388{
389 kfree(priv->ieee_channels);
390 kfree(priv->ieee_rates);
391 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
392}
534166de 393EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 394
37dc70fe 395/*
94597ab2 396 * iwlcore_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
37dc70fe
AK		 397 * function.
398 */
94597ab2
JB		 399void iwlcore_tx_cmd_protection(struct iwl_priv *priv,
400 struct ieee80211_tx_info *info,
401 __le16 fc, __le32 *tx_flags)
37dc70fe
AK		 402{
403 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
404 *tx_flags |= TX_CMD_FLG_RTS_MSK;
405 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
94597ab2
JB		 406 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
407
408 if (!ieee80211_is_mgmt(fc))
409 return;
410
411 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
412 case cpu_to_le16(IEEE80211_STYPE_AUTH):
413 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
414 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
415 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
416 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
417 *tx_flags |= TX_CMD_FLG_CTS_MSK;
418 break;
419 }
37dc70fe
AK		 420 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
421 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
422 *tx_flags |= TX_CMD_FLG_CTS_MSK;
94597ab2 423 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
37dc70fe
AK		 424 }
425}
94597ab2
JB		 426EXPORT_SYMBOL(iwlcore_tx_cmd_protection);
427
37dc70fe 428
28a6b07a 429static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 430{
ba37a3d0 431 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 432 priv->current_ht_config.single_chain_sufficient;
c7de35cd 433}
963f5517 434
47c5196e
TW		 435static u8 iwl_is_channel_extension(struct iwl_priv *priv,
436 enum ieee80211_band band,
437 u16 channel, u8 extension_chan_offset)
438{
439 const struct iwl_channel_info *ch_info;
440
441 ch_info = iwl_get_channel_info(priv, band, channel);
442 if (!is_channel_valid(ch_info))
443 return 0;
444
d9fe60de 445 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 446 return !(ch_info->ht40_extension_channel &
689da1b3 447 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 448 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 449 return !(ch_info->ht40_extension_channel &
689da1b3 450 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 451
452 return 0;
453}
454
7aafef1c 455u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 456 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 457{
fad95bf5 458 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 459
fad95bf5 460 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 461 return 0;
462
a2b0f02e
WYG		 463 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
464 * the bit will not set if it is pure 40MHz case
465 */
47c5196e 466 if (sta_ht_inf) {
a2b0f02e 467 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 468 return 0;
469 }
d73e4923 470#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4
WYG		 471 if (priv->disable_ht40)
472 return 0;
473#endif
611d3eb7
WYG		 474 return iwl_is_channel_extension(priv, priv->band,
475 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 476 ht_conf->extension_chan_offset);
47c5196e 477}
7aafef1c 478EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 479
2c2f3b33
TW		 480static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
481{
482 u16 new_val = 0;
483 u16 beacon_factor = 0;
484
485 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
486 new_val = beacon_val / beacon_factor;
487
488 if (!new_val)
489 new_val = max_beacon_val;
490
491 return new_val;
492}
493
1dda6d28 494void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
2c2f3b33
TW		 495{
496 u64 tsf;
497 s32 interval_tm, rem;
498 unsigned long flags;
499 struct ieee80211_conf *conf = NULL;
500 u16 beacon_int;
501
502 conf = ieee80211_get_hw_conf(priv->hw);
503
504 spin_lock_irqsave(&priv->lock, flags);
505 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
506 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
507
1dda6d28 508 beacon_int = vif->bss_conf.beacon_int;
2c2f3b33 509
1dda6d28 510 if (vif->type == NL80211_IFTYPE_ADHOC) {
2c2f3b33
TW		 511 /* TODO: we need to get atim_window from upper stack
512 * for now we set to 0 */
513 priv->rxon_timing.atim_window = 0;
1dda6d28
JB		 514 } else {
515 priv->rxon_timing.atim_window = 0;
2c2f3b33
TW		 516 }
517
518 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 519 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
2c2f3b33
TW		 520 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
521
522 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 523 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33
TW		 524 rem = do_div(tsf, interval_tm);
525 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
526
527 spin_unlock_irqrestore(&priv->lock, flags);
528 IWL_DEBUG_ASSOC(priv,
529 "beacon interval %d beacon timer %d beacon tim %d\n",
530 le16_to_cpu(priv->rxon_timing.beacon_interval),
531 le32_to_cpu(priv->rxon_timing.beacon_init_val),
532 le16_to_cpu(priv->rxon_timing.atim_window));
533}
534EXPORT_SYMBOL(iwl_setup_rxon_timing);
535
8ccde88a
SO		 536void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
537{
538 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
539
540 if (hw_decrypt)
541 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
542 else
543 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
544
545}
546EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
547
548/**
549 * iwl_check_rxon_cmd - validate RXON structure is valid
550 *
551 * NOTE: This is really only useful during development and can eventually
552 * be #ifdef'd out once the driver is stable and folks aren't actively
553 * making changes
554 */
555int iwl_check_rxon_cmd(struct iwl_priv *priv)
556{
557 int error = 0;
558 int counter = 1;
559 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
560
561 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
562 error |= le32_to_cpu(rxon->flags &
563 (RXON_FLG_TGJ_NARROW_BAND_MSK |
564 RXON_FLG_RADAR_DETECT_MSK));
565 if (error)
566 IWL_WARN(priv, "check 24G fields %d | %d\n",
567 counter++, error);
568 } else {
569 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
570 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
571 if (error)
572 IWL_WARN(priv, "check 52 fields %d | %d\n",
573 counter++, error);
574 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
575 if (error)
576 IWL_WARN(priv, "check 52 CCK %d | %d\n",
577 counter++, error);
578 }
579 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
580 if (error)
581 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
582
583 /* make sure basic rates 6Mbps and 1Mbps are supported */
584 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
585 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
586 if (error)
587 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
588
589 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
590 if (error)
591 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
592
593 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
594 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
595 if (error)
596 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
597 counter++, error);
598
599 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
600 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
601 if (error)
602 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
603 counter++, error);
604
605 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
606 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
607 if (error)
608 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
609 counter++, error);
610
611 if (error)
612 IWL_WARN(priv, "Tuning to channel %d\n",
613 le16_to_cpu(rxon->channel));
614
615 if (error) {
616 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
617 return -1;
618 }
619 return 0;
620}
621EXPORT_SYMBOL(iwl_check_rxon_cmd);
622
623/**
624 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
625 * @priv: staging_rxon is compared to active_rxon
626 *
627 * If the RXON structure is changing enough to require a new tune,
628 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
629 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
630 */
631int iwl_full_rxon_required(struct iwl_priv *priv)
632{
633
634 /* These items are only settable from the full RXON command */
635 if (!(iwl_is_associated(priv)) ||
636 compare_ether_addr(priv->staging_rxon.bssid_addr,
637 priv->active_rxon.bssid_addr) ||
638 compare_ether_addr(priv->staging_rxon.node_addr,
639 priv->active_rxon.node_addr) ||
640 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
641 priv->active_rxon.wlap_bssid_addr) ||
642 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
643 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
644 (priv->staging_rxon.air_propagation !=
645 priv->active_rxon.air_propagation) ||
646 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
647 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
648 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
649 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 650 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
651 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 652 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
653 return 1;
654
655 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
656 * be updated with the RXON_ASSOC command -- however only some
657 * flag transitions are allowed using RXON_ASSOC */
658
659 /* Check if we are not switching bands */
660 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
661 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
662 return 1;
663
664 /* Check if we are switching association toggle */
665 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
666 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
667 return 1;
668
669 return 0;
670}
671EXPORT_SYMBOL(iwl_full_rxon_required);
672
673u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
674{
4a02886b
JB		 675 /*
676 * Assign the lowest rate -- should really get this from
677 * the beacon skb from mac80211.
678 */
8ccde88a
SO		 679 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
680 return IWL_RATE_1M_PLCP;
681 else
682 return IWL_RATE_6M_PLCP;
683}
684EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
685
fad95bf5 686void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 687{
c1adf9fb 688 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 689
fad95bf5 690 if (!ht_conf->is_ht) {
a2b0f02e 691 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 692 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 693 RXON_FLG_HT40_PROT_MSK |
42eb7c64 694 RXON_FLG_HT_PROT_MSK);
47c5196e 695 return;
42eb7c64 696 }
47c5196e 697
a2b0f02e
WYG		 698 /* FIXME: if the definition of ht_protection changed, the "translation"
699 * will be needed for rxon->flags
700 */
fad95bf5 701 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 702
703 /* Set up channel bandwidth:
7aafef1c 704 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 705 /* clear the HT channel mode before set the mode */
706 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
707 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 708 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
709 /* pure ht40 */
fad95bf5 710 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 711 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 712 /* Note: control channel is opposite of extension channel */
fad95bf5 713 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 714 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
715 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
716 break;
717 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
718 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
719 break;
720 }
721 } else {
a2b0f02e 722 /* Note: control channel is opposite of extension channel */
fad95bf5 723 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 724 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
725 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
726 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
727 break;
728 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
729 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
730 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
731 break;
732 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
733 default:
734 /* channel location only valid if in Mixed mode */
735 IWL_ERR(priv, "invalid extension channel offset\n");
736 break;
737 }
738 }
739 } else {
740 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 741 }
742
45823531
AK		 743 if (priv->cfg->ops->hcmd->set_rxon_chain)
744 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 745
02bb1bea 746 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 747 "extension channel offset 0x%x\n",
fad95bf5
JB		 748 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
749 ht_conf->extension_chan_offset);
47c5196e
TW		 750}
751EXPORT_SYMBOL(iwl_set_rxon_ht);
752
9e5e6c32
TW		 753#define IWL_NUM_RX_CHAINS_MULTIPLE 3
754#define IWL_NUM_RX_CHAINS_SINGLE 2
755#define IWL_NUM_IDLE_CHAINS_DUAL 2
756#define IWL_NUM_IDLE_CHAINS_SINGLE 1
757
2b396a12
JB		 758/*
759 * Determine how many receiver/antenna chains to use.
760 *
761 * More provides better reception via diversity. Fewer saves power
762 * at the expense of throughput, but only when not in powersave to
763 * start with.
764 *
c7de35cd
RR		 765 * MIMO (dual stream) requires at least 2, but works better with 3.
766 * This does not determine *which* chains to use, just how many.
767 */
28a6b07a 768static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 769{
c7de35cd 770 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 771 if (is_single_rx_stream(priv))
9e5e6c32 772 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 773 else
9e5e6c32 774 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 775}
c7de35cd 776
2b396a12 777/*
3f3e0376
WYG		 778 * When we are in power saving mode, unless device support spatial
779 * multiplexing power save, use the active count for rx chain count.
2b396a12 780 */
28a6b07a
TW		 781static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
782{
ba37a3d0
JB		 783 /* # Rx chains when idling, depending on SMPS mode */
784 switch (priv->current_ht_config.smps) {
785 case IEEE80211_SMPS_STATIC:
786 case IEEE80211_SMPS_DYNAMIC:
787 return IWL_NUM_IDLE_CHAINS_SINGLE;
788 case IEEE80211_SMPS_OFF:
789 return active_cnt;
c15d20c1 790 default:
ba37a3d0
JB		 791 WARN(1, "invalid SMPS mode %d",
792 priv->current_ht_config.smps);
793 return active_cnt;
3f3e0376 794 }
c7de35cd
RR		 795}
796
04816448
GE		 797/* up to 4 chains */
798static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
799{
800 u8 res;
801 res = (chain_bitmap & BIT(0)) >> 0;
802 res += (chain_bitmap & BIT(1)) >> 1;
803 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 804 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 805 return res;
806}
807
c7de35cd
RR		 808/**
809 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
810 *
811 * Selects how many and which Rx receivers/antennas/chains to use.
812 * This should not be used for scan command ... it puts data in wrong place.
813 */
814void iwl_set_rxon_chain(struct iwl_priv *priv)
815{
28a6b07a
TW		 816 bool is_single = is_single_rx_stream(priv);
817 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 818 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
819 u32 active_chains;
28a6b07a 820 u16 rx_chain;
c7de35cd
RR		 821
822 /* Tell uCode which antennas are actually connected.
823 * Before first association, we assume all antennas are connected.
824 * Just after first association, iwl_chain_noise_calibration()
825 * checks which antennas actually *are* connected. */
04816448
GE		 826 if (priv->chain_noise_data.active_chains)
827 active_chains = priv->chain_noise_data.active_chains;
828 else
829 active_chains = priv->hw_params.valid_rx_ant;
830
831 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 832
833 /* How many receivers should we use? */
28a6b07a
TW		 834 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
835 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
836
28a6b07a 837
04816448
GE		 838 /* correct rx chain count according hw settings
839 * and chain noise calibration
840 */
841 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
842 if (valid_rx_cnt < active_rx_cnt)
843 active_rx_cnt = valid_rx_cnt;
844
845 if (valid_rx_cnt < idle_rx_cnt)
846 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 847
848 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
849 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
850
851 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
852
9e5e6c32 853 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 854 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
855 else
856 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
857
e1623446 858 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 859 priv->staging_rxon.rx_chain,
860 active_rx_cnt, idle_rx_cnt);
861
862 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
863 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 864}
865EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f 866
14023641
AK		 867/* Return valid channel */
868u8 iwl_get_single_channel_number(struct iwl_priv *priv,
869 enum ieee80211_band band)
870{
871 const struct iwl_channel_info *ch_info;
872 int i;
873 u8 channel = 0;
874
875 /* only scan single channel, good enough to reset the RF */
876 /* pick the first valid not in-use channel */
877 if (band == IEEE80211_BAND_5GHZ) {
878 for (i = 14; i < priv->channel_count; i++) {
879 if (priv->channel_info[i].channel !=
880 le16_to_cpu(priv->staging_rxon.channel)) {
881 channel = priv->channel_info[i].channel;
882 ch_info = iwl_get_channel_info(priv,
883 band, channel);
884 if (is_channel_valid(ch_info))
885 break;
886 }
887 }
888 } else {
889 for (i = 0; i < 14; i++) {
890 if (priv->channel_info[i].channel !=
891 le16_to_cpu(priv->staging_rxon.channel)) {
892 channel =
893 priv->channel_info[i].channel;
894 ch_info = iwl_get_channel_info(priv,
895 band, channel);
896 if (is_channel_valid(ch_info))
897 break;
898 }
899 }
900 }
901
902 return channel;
903}
904EXPORT_SYMBOL(iwl_get_single_channel_number);
905
bf85ea4f 906/**
17e72782 907 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 908 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
909 * @channel: Any channel valid for the requested phymode
910
911 * In addition to setting the staging RXON, priv->phymode is also set.
912 *
913 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
914 * in the staging RXON flag structure based on the phymode
915 */
17e72782 916int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 917{
17e72782 918 enum ieee80211_band band = ch->band;
81e95430 919 u16 channel = ch->hw_value;
17e72782 920
8622e705 921 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 922 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 923 channel, band);
924 return -EINVAL;
925 }
926
927 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
928 (priv->band == band))
929 return 0;
930
931 priv->staging_rxon.channel = cpu_to_le16(channel);
932 if (band == IEEE80211_BAND_5GHZ)
933 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
934 else
935 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
936
937 priv->band = band;
938
e1623446 939 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 940
941 return 0;
942}
c7de35cd 943EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 944
79d07325
WYG		 945void iwl_set_flags_for_band(struct iwl_priv *priv,
946 enum ieee80211_band band,
947 struct ieee80211_vif *vif)
8ccde88a
SO		 948{
949 if (band == IEEE80211_BAND_5GHZ) {
950 priv->staging_rxon.flags &=
951 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
952 | RXON_FLG_CCK_MSK);
953 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
954 } else {
955 /* Copied from iwl_post_associate() */
c213d745 956 if (vif && vif->bss_conf.use_short_slot)
8ccde88a
SO		 957 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
958 else
959 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
960
8ccde88a
SO		 961 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
962 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
963 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
964 }
965}
79d07325 966EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO		 967
968/*
969 * initialize rxon structure with default values from eeprom
970 */
1dda6d28
JB		 971void iwl_connection_init_rx_config(struct iwl_priv *priv,
972 struct ieee80211_vif *vif)
8ccde88a
SO		 973{
974 const struct iwl_channel_info *ch_info;
1dda6d28
JB		 975 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
976
977 if (vif)
978 type = vif->type;
8ccde88a
SO		 979
980 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
981
1dda6d28 982 switch (type) {
8ccde88a
SO		 983 case NL80211_IFTYPE_AP:
984 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
985 break;
986
987 case NL80211_IFTYPE_STATION:
988 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
989 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
990 break;
991
992 case NL80211_IFTYPE_ADHOC:
993 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
994 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
995 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
996 RXON_FILTER_ACCEPT_GRP_MSK;
997 break;
998
8ccde88a 999 default:
1dda6d28 1000 IWL_ERR(priv, "Unsupported interface type %d\n", type);
8ccde88a
SO		 1001 break;
1002 }
1003
1004#if 0
1005 /* TODO: Figure out when short_preamble would be set and cache from
1006 * that */
1007 if (!hw_to_local(priv->hw)->short_preamble)
1008 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1009 else
1010 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1011#endif
1012
1013 ch_info = iwl_get_channel_info(priv, priv->band,
1014 le16_to_cpu(priv->active_rxon.channel));
1015
1016 if (!ch_info)
1017 ch_info = &priv->channel_info[0];
1018
8ccde88a
SO		 1019 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1020 priv->band = ch_info->band;
1021
1dda6d28 1022 iwl_set_flags_for_band(priv, priv->band, vif);
8ccde88a
SO		 1023
1024 priv->staging_rxon.ofdm_basic_rates =
1025 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1026 priv->staging_rxon.cck_basic_rates =
1027 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1028
a2b0f02e
WYG		 1029 /* clear both MIX and PURE40 mode flag */
1030 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1031 RXON_FLG_CHANNEL_MODE_PURE_40);
7684c408
JB		 1032
1033 if (vif)
1034 memcpy(priv->staging_rxon.node_addr, vif->addr, ETH_ALEN);
1035
8ccde88a
SO		 1036 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1037 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1038 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1039}
1040EXPORT_SYMBOL(iwl_connection_init_rx_config);
1041
79d07325 1042void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1043{
1044 const struct ieee80211_supported_band *hw = NULL;
1045 struct ieee80211_rate *rate;
1046 int i;
1047
1048 hw = iwl_get_hw_mode(priv, priv->band);
1049 if (!hw) {
1050 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1051 return;
1052 }
1053
1054 priv->active_rate = 0;
8ccde88a
SO		 1055
1056 for (i = 0; i < hw->n_bitrates; i++) {
1057 rate = &(hw->bitrates[i]);
5027309b 1058 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1059 priv->active_rate |= (1 << rate->hw_value);
1060 }
1061
4a02886b 1062 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1063
4a02886b
JB		 1064 priv->staging_rxon.cck_basic_rates =
1065 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1066
1067 priv->staging_rxon.ofdm_basic_rates =
1068 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1069}
79d07325
WYG		 1070EXPORT_SYMBOL(iwl_set_rate);
1071
1072void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
1073{
1074 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1075 return;
1076
1077 if (priv->switch_rxon.switch_in_progress) {
1078 ieee80211_chswitch_done(priv->vif, is_success);
1079 mutex_lock(&priv->mutex);
1080 priv->switch_rxon.switch_in_progress = false;
1081 mutex_unlock(&priv->mutex);
1082 }
1083}
1084EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO		 1085
1086void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1087{
2f301227 1088 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO		 1089 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1090 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1091
0924e519
WYG		 1092 if (priv->switch_rxon.switch_in_progress) {
1093 if (!le32_to_cpu(csa->status) &&
1094 (csa->channel == priv->switch_rxon.channel)) {
1095 rxon->channel = csa->channel;
1096 priv->staging_rxon.channel = csa->channel;
1097 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1098 le16_to_cpu(csa->channel));
79d07325
WYG		 1099 iwl_chswitch_done(priv, true);
1100 } else {
0924e519
WYG		 1101 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1102 le16_to_cpu(csa->channel));
79d07325
WYG		 1103 iwl_chswitch_done(priv, false);
1104 }
0924e519 1105 }
8ccde88a
SO		 1106}
1107EXPORT_SYMBOL(iwl_rx_csa);
1108
1109#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1110void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO		 1111{
1112 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1113
e1623446 1114 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1115 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1116 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1117 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1118 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1119 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1120 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1121 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1122 rxon->ofdm_basic_rates);
e1623446
TW		 1123 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1124 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1125 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1126 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1127}
a643565e 1128EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1129#endif
8ccde88a
SO		 1130/**
1131 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1132 */
1133void iwl_irq_handle_error(struct iwl_priv *priv)
1134{
1135 /* Set the FW error flag -- cleared on iwl_down */
1136 set_bit(STATUS_FW_ERROR, &priv->status);
1137
1138 /* Cancel currently queued command. */
1139 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1140
459bc732
SZ		 1141 IWL_ERR(priv, "Loaded firmware version: %s\n",
1142 priv->hw->wiphy->fw_version);
1143
3a3ff72c 1144 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1145 if (priv->cfg->ops->lib->dump_csr)
1146 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1147 if (priv->cfg->ops->lib->dump_fh)
1148 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1149 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1150#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1151 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1152 iwl_print_rx_config_cmd(priv);
8ccde88a
SO		 1153#endif
1154
1155 wake_up_interruptible(&priv->wait_command_queue);
1156
1157 /* Keep the restart process from trying to send host
1158 * commands by clearing the INIT status bit */
1159 clear_bit(STATUS_READY, &priv->status);
1160
1161 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1162 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1163 "Restarting adapter due to uCode error.\n");
1164
8ccde88a
SO		 1165 if (priv->cfg->mod_params->restart_fw)
1166 queue_work(priv->workqueue, &priv->restart);
1167 }
1168}
1169EXPORT_SYMBOL(iwl_irq_handle_error);
1170
f8e200de 1171static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1172{
5220af0c 1173 int ret = 0;
d68b603c 1174
5220af0c 1175 /* stop device's busmaster DMA activity */
d68b603c
AK		 1176 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1177
5220af0c 1178 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1179 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1180 if (ret)
1181 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1182
d68b603c
AK		 1183 IWL_DEBUG_INFO(priv, "stop master\n");
1184
5220af0c 1185 return ret;
d68b603c 1186}
d68b603c
AK		 1187
1188void iwl_apm_stop(struct iwl_priv *priv)
1189{
fadb3582
BC		 1190 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1191
5220af0c 1192 /* Stop device's DMA activity */
d68b603c
AK		 1193 iwl_apm_stop_master(priv);
1194
5220af0c 1195 /* Reset the entire device */
d68b603c
AK		 1196 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1197
1198 udelay(10);
5220af0c
BC		 1199
1200 /*
1201 * Clear "initialization complete" bit to move adapter from
1202 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1203 */
d68b603c 1204 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1205}
1206EXPORT_SYMBOL(iwl_apm_stop);
1207
fadb3582
BC		 1208
1209/*
1210 * Start up NIC's basic functionality after it has been reset
1211 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1212 * NOTE: This does not load uCode nor start the embedded processor
1213 */
1214int iwl_apm_init(struct iwl_priv *priv)
1215{
1216 int ret = 0;
1217 u16 lctl;
1218
1219 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1220
1221 /*
1222 * Use "set_bit" below rather than "write", to preserve any hardware
1223 * bits already set by default after reset.
1224 */
1225
1226 /* Disable L0S exit timer (platform NMI Work/Around) */
1227 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1228 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1229
1230 /*
1231 * Disable L0s without affecting L1;
1232 * don't wait for ICH L0s (ICH bug W/A)
1233 */
1234 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1235 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1236
1237 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1238 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1239
1240 /*
1241 * Enable HAP INTA (interrupt from management bus) to
1242 * wake device's PCI Express link L1a -> L0s
1243 * NOTE: This is no-op for 3945 (non-existant bit)
1244 */
1245 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1246 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1247
1248 /*
a6c5c731
BC		 1249 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1250 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1251 * If so (likely), disable L0S, so device moves directly L0->L1;
1252 * costs negligible amount of power savings.
1253 * If not (unlikely), enable L0S, so there is at least some
1254 * power savings, even without L1.
fadb3582
BC		 1255 */
1256 if (priv->cfg->set_l0s) {
1257 lctl = iwl_pcie_link_ctl(priv);
1258 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1259 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1260 /* L1-ASPM enabled; disable(!) L0S */
1261 iwl_set_bit(priv, CSR_GIO_REG,
1262 CSR_GIO_REG_VAL_L0S_ENABLED);
1263 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1264 } else {
1265 /* L1-ASPM disabled; enable(!) L0S */
1266 iwl_clear_bit(priv, CSR_GIO_REG,
1267 CSR_GIO_REG_VAL_L0S_ENABLED);
1268 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1269 }
1270 }
1271
1272 /* Configure analog phase-lock-loop before activating to D0A */
1273 if (priv->cfg->pll_cfg_val)
1274 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1275
1276 /*
1277 * Set "initialization complete" bit to move adapter from
1278 * D0U* --> D0A* (powered-up active) state.
1279 */
1280 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1281
1282 /*
1283 * Wait for clock stabilization; once stabilized, access to
1284 * device-internal resources is supported, e.g. iwl_write_prph()
1285 * and accesses to uCode SRAM.
1286 */
1287 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1288 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1289 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1290 if (ret < 0) {
1291 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1292 goto out;
1293 }
1294
1295 /*
1296 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1297 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1298 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1299 * and don't need BSM to restore data after power-saving sleep.
1300 *
1301 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1302 * do not disable clocks. This preserves any hardware bits already
1303 * set by default in "CLK_CTRL_REG" after reset.
1304 */
1305 if (priv->cfg->use_bsm)
1306 iwl_write_prph(priv, APMG_CLK_EN_REG,
1307 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1308 else
1309 iwl_write_prph(priv, APMG_CLK_EN_REG,
1310 APMG_CLK_VAL_DMA_CLK_RQT);
1311 udelay(20);
1312
1313 /* Disable L1-Active */
1314 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1315 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1316
1317out:
1318 return ret;
1319}
1320EXPORT_SYMBOL(iwl_apm_init);
1321
1322
1323
8ccde88a
SO		 1324void iwl_configure_filter(struct ieee80211_hw *hw,
1325 unsigned int changed_flags,
1326 unsigned int *total_flags,
3ac64bee 1327 u64 multicast)
8ccde88a
SO		 1328{
1329 struct iwl_priv *priv = hw->priv;
3474ad63
JB		 1330 __le32 filter_or = 0, filter_nand = 0;
1331
1332#define CHK(test, flag) do { \
1333 if (*total_flags & (test)) \
1334 filter_or |= (flag); \
1335 else \
1336 filter_nand |= (flag); \
1337 } while (0)
8ccde88a 1338
e1623446 1339 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1340 changed_flags, *total_flags);
1341
3474ad63 1342 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3474ad63
JB		 1343 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
1344 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
8ccde88a 1345
3474ad63
JB		 1346#undef CHK
1347
1348 mutex_lock(&priv->mutex);
1349
1350 priv->staging_rxon.filter_flags &= ~filter_nand;
1351 priv->staging_rxon.filter_flags |= filter_or;
1352
1353 iwlcore_commit_rxon(priv);
1354
1355 mutex_unlock(&priv->mutex);
8ccde88a 1356
d1e89f37
JB		 1357 /*
1358 * Receiving all multicast frames is always enabled by the
1359 * default flags setup in iwl_connection_init_rx_config()
1360 * since we currently do not support programming multicast
1361 * filters into the device.
1362 */
8ccde88a
SO		 1363 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1364 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1365}
1366EXPORT_SYMBOL(iwl_configure_filter);
1367
630fe9b6
TW		 1368int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1369{
1370 int ret = 0;
5eadd94b
WYG		 1371 s8 prev_tx_power = priv->tx_power_user_lmt;
1372
b744cb79
WYG		 1373 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1374 IWL_WARN(priv,
1375 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1376 tx_power,
b744cb79 1377 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1378 return -EINVAL;
1379 }
1380
dc1b0973 1381 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1382 IWL_WARN(priv,
1383 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1384 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1385 return -EINVAL;
1386 }
1387
1388 if (priv->tx_power_user_lmt != tx_power)
1389 force = true;
1390
019fb97d 1391 /* if nic is not up don't send command */
5eadd94b
WYG		 1392 if (iwl_is_ready_rf(priv)) {
1393 priv->tx_power_user_lmt = tx_power;
1394 if (force && priv->cfg->ops->lib->send_tx_power)
1395 ret = priv->cfg->ops->lib->send_tx_power(priv);
1396 else if (!priv->cfg->ops->lib->send_tx_power)
1397 ret = -EOPNOTSUPP;
1398 /*
1399 * if fail to set tx_power, restore the orig. tx power
1400 */
1401 if (ret)
1402 priv->tx_power_user_lmt = prev_tx_power;
1403 }
630fe9b6 1404
5eadd94b
WYG		 1405 /*
1406 * Even this is an async host command, the command
1407 * will always report success from uCode
1408 * So once driver can placing the command into the queue
1409 * successfully, driver can use priv->tx_power_user_lmt
1410 * to reflect the current tx power
1411 */
630fe9b6
TW		 1412 return ret;
1413}
1414EXPORT_SYMBOL(iwl_set_tx_power);
1415
ef850d7c 1416irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1417{
1418 struct iwl_priv *priv = data;
1419 u32 inta, inta_mask;
1420 u32 inta_fh;
6e8cc38d 1421 unsigned long flags;
f17d08a6
AK		 1422 if (!priv)
1423 return IRQ_NONE;
1424
6e8cc38d 1425 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1426
1427 /* Disable (but don't clear!) interrupts here to avoid
1428 * back-to-back ISRs and sporadic interrupts from our NIC.
1429 * If we have something to service, the tasklet will re-enable ints.
1430 * If we *don't* have something, we'll re-enable before leaving here. */
1431 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1432 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1433
1434 /* Discover which interrupts are active/pending */
1435 inta = iwl_read32(priv, CSR_INT);
1436 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1437
1438 /* Ignore interrupt if there's nothing in NIC to service.
1439 * This may be due to IRQ shared with another device,
1440 * or due to sporadic interrupts thrown from our NIC. */
1441 if (!inta && !inta_fh) {
1442 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1443 goto none;
1444 }
1445
1446 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1447 /* Hardware disappeared. It might have already raised
1448 * an interrupt */
1449 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1450 goto unplugged;
1451 }
1452
1453 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1454 inta, inta_mask, inta_fh);
1455
1456 inta &= ~CSR_INT_BIT_SCD;
1457
1458 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1459 if (likely(inta || inta_fh))
1460 tasklet_schedule(&priv->irq_tasklet);
1461
1462 unplugged:
6e8cc38d 1463 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1464 return IRQ_HANDLED;
1465
1466 none:
1467 /* re-enable interrupts here since we don't have anything to service. */
1468 /* only Re-enable if diabled by irq */
1469 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1470 iwl_enable_interrupts(priv);
6e8cc38d 1471 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1472 return IRQ_NONE;
1473}
ef850d7c 1474EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1475
65b52bde 1476void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1477{
1478 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1479 .lead_time = BT_LEAD_TIME_DEF,
1480 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1481 .kill_ack_mask = 0,
1482 .kill_cts_mask = 0,
1483 };
1484
06702a73
WYG		 1485 if (!bt_coex_active)
1486 bt_cmd.flags = BT_COEX_DISABLE;
1487 else
1488 bt_cmd.flags = BT_COEX_ENABLE;
1489
1490 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1491 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1492
65b52bde
JB		 1493 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1494 sizeof(struct iwl_bt_cmd), &bt_cmd))
1495 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1496}
1497EXPORT_SYMBOL(iwl_send_bt_config);
1498
ef8d5529 1499int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1500{
ef8d5529
WYG		 1501 struct iwl_statistics_cmd statistics_cmd = {
1502 .configuration_flags =
1503 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1504 };
ef8d5529
WYG		 1505
1506 if (flags & CMD_ASYNC)
1507 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1508 sizeof(struct iwl_statistics_cmd),
1509 &statistics_cmd, NULL);
1510 else
1511 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1512 sizeof(struct iwl_statistics_cmd),
1513 &statistics_cmd);
49ea8596
EG		 1514}
1515EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1516
14a08a7f
EG		 1517/*
1518 * CARD_STATE_CMD
1519 *
1520 * Use: Sets the device's internal card state to enable, disable, or halt
1521 *
1522 * When in the 'enable' state the card operates as normal.
1523 * When in the 'disable' state, the card enters into a low power mode.
1524 * When in the 'halt' state, the card is shut down and must be fully
1525 * restarted to come back on.
1526 */
c496294e 1527int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1528{
1529 struct iwl_host_cmd cmd = {
1530 .id = REPLY_CARD_STATE_CMD,
1531 .len = sizeof(u32),
1532 .data = &flags,
c2acea8e 1533 .flags = meta_flag,
14a08a7f
EG		 1534 };
1535
1536 return iwl_send_cmd(priv, &cmd);
1537}
1538
030f05ed
AK		 1539void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1540 struct iwl_rx_mem_buffer *rxb)
1541{
1542#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1543 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1544 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1545 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1546 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1547#endif
1548}
1549EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1550
1551void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1552 struct iwl_rx_mem_buffer *rxb)
1553{
2f301227 1554 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1555 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1556 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1557 "notification for %s:\n", len,
1558 get_cmd_string(pkt->hdr.cmd));
1559 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1560}
1561EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1562
1563void iwl_rx_reply_error(struct iwl_priv *priv,
1564 struct iwl_rx_mem_buffer *rxb)
1565{
2f301227 1566 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1567
1568 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1569 "seq 0x%04X ser 0x%08X\n",
1570 le32_to_cpu(pkt->u.err_resp.error_type),
1571 get_cmd_string(pkt->u.err_resp.cmd_id),
1572 pkt->u.err_resp.cmd_id,
1573 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1574 le32_to_cpu(pkt->u.err_resp.error_info));
1575}
1576EXPORT_SYMBOL(iwl_rx_reply_error);
1577
a83b9141
WYG		 1578void iwl_clear_isr_stats(struct iwl_priv *priv)
1579{
1580 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1581}
a83b9141 1582
488829f1
AK		 1583int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1584 const struct ieee80211_tx_queue_params *params)
1585{
1586 struct iwl_priv *priv = hw->priv;
1587 unsigned long flags;
1588 int q;
1589
1590 IWL_DEBUG_MAC80211(priv, "enter\n");
1591
1592 if (!iwl_is_ready_rf(priv)) {
1593 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1594 return -EIO;
1595 }
1596
1597 if (queue >= AC_NUM) {
1598 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1599 return 0;
1600 }
1601
1602 q = AC_NUM - 1 - queue;
1603
1604 spin_lock_irqsave(&priv->lock, flags);
1605
1606 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1607 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1608 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1609 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1610 cpu_to_le16((params->txop * 32));
1611
1612 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK		 1613
1614 spin_unlock_irqrestore(&priv->lock, flags);
1615
1616 IWL_DEBUG_MAC80211(priv, "leave\n");
1617 return 0;
1618}
1619EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b 1620
a85d7cca
JB		 1621int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1622{
1623 struct iwl_priv *priv = hw->priv;
1624
1625 return priv->ibss_manager == IWL_IBSS_MANAGER;
1626}
1627EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon);
1628
5bbe233b 1629static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1630 struct ieee80211_vif *vif)
5bbe233b 1631{
fad95bf5 1632 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1633 struct ieee80211_sta *sta;
ca3c1f59 1634 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5bbe233b 1635
91dd6c27 1636 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1637
fad95bf5 1638 if (!ht_conf->is_ht)
5bbe233b
AK		 1639 return;
1640
fad95bf5 1641 ht_conf->ht_protection =
9ed6bcce 1642 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1643 ht_conf->non_GF_STA_present =
9ed6bcce 1644 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1645
02bb1bea
JB		 1646 ht_conf->single_chain_sufficient = false;
1647
ca3c1f59 1648 switch (vif->type) {
02bb1bea
JB		 1649 case NL80211_IFTYPE_STATION:
1650 rcu_read_lock();
ca3c1f59 1651 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB		 1652 if (sta) {
1653 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1654 int maxstreams;
1655
1656 maxstreams = (ht_cap->mcs.tx_params &
1657 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1658 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1659 maxstreams += 1;
1660
1661 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1662 (ht_cap->mcs.rx_mask[2] == 0))
1663 ht_conf->single_chain_sufficient = true;
1664 if (maxstreams <= 1)
1665 ht_conf->single_chain_sufficient = true;
1666 } else {
1667 /*
1668 * If at all, this can only happen through a race
1669 * when the AP disconnects us while we're still
1670 * setting up the connection, in that case mac80211
1671 * will soon tell us about that.
1672 */
1673 ht_conf->single_chain_sufficient = true;
1674 }
1675 rcu_read_unlock();
1676 break;
1677 case NL80211_IFTYPE_ADHOC:
1678 ht_conf->single_chain_sufficient = true;
1679 break;
1680 default:
1681 break;
1682 }
5bbe233b
AK		 1683
1684 IWL_DEBUG_MAC80211(priv, "leave\n");
1685}
1686
c91c3efc
AK		 1687static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1688{
c91c3efc
AK		 1689 iwl_led_disassociate(priv);
1690 /*
1691 * inform the ucode that there is no longer an
1692 * association and that no more packets should be
1693 * sent
1694 */
1695 priv->staging_rxon.filter_flags &=
1696 ~RXON_FILTER_ASSOC_MSK;
1697 priv->staging_rxon.assoc_id = 0;
1698 iwlcore_commit_rxon(priv);
1699}
1700
0bc5774f
JB		 1701static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1702{
1703 struct iwl_priv *priv = hw->priv;
1704 unsigned long flags;
1705 __le64 timestamp;
1706
1707 IWL_DEBUG_MAC80211(priv, "enter\n");
1708
1709 if (!iwl_is_ready_rf(priv)) {
1710 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1711 return -EIO;
1712 }
1713
1714 spin_lock_irqsave(&priv->lock, flags);
1715
1716 if (priv->ibss_beacon)
1717 dev_kfree_skb(priv->ibss_beacon);
1718
1719 priv->ibss_beacon = skb;
1720
1721 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1722 priv->timestamp = le64_to_cpu(timestamp);
1723
1724 IWL_DEBUG_MAC80211(priv, "leave\n");
1725 spin_unlock_irqrestore(&priv->lock, flags);
1726
1727 priv->cfg->ops->lib->post_associate(priv, priv->vif);
1728
1729 return 0;
1730}
1731
5bbe233b 1732void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1733 struct ieee80211_vif *vif,
1734 struct ieee80211_bss_conf *bss_conf,
1735 u32 changes)
5bbe233b
AK		 1736{
1737 struct iwl_priv *priv = hw->priv;
3a650292 1738 int ret;
5bbe233b
AK		 1739
1740 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1741
2d0ddec5
JB		 1742 if (!iwl_is_alive(priv))
1743 return;
1744
1745 mutex_lock(&priv->mutex);
1746
4ced3f74
JB		 1747 if (changes & BSS_CHANGED_QOS) {
1748 unsigned long flags;
1749
1750 spin_lock_irqsave(&priv->lock, flags);
1751 priv->qos_data.qos_active = bss_conf->qos;
1752 iwl_update_qos(priv);
1753 spin_unlock_irqrestore(&priv->lock, flags);
1754 }
1755
92445c95 1756 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB		 1757 dev_kfree_skb(priv->ibss_beacon);
1758 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1759 }
1760
d7129e19 1761 if (changes & BSS_CHANGED_BEACON_INT) {
d7129e19
JB		 1762 /* TODO: in AP mode, do something to make this take effect */
1763 }
1764
1765 if (changes & BSS_CHANGED_BSSID) {
1766 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1767
1768 /*
1769 * If there is currently a HW scan going on in the
1770 * background then we need to cancel it else the RXON
1771 * below/in post_associate will fail.
1772 */
2d0ddec5 1773 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1774 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1775 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1776 mutex_unlock(&priv->mutex);
1777 return;
1778 }
2d0ddec5 1779
d7129e19 1780 /* mac80211 only sets assoc when in STATION mode */
92445c95 1781 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
d7129e19
JB		 1782 memcpy(priv->staging_rxon.bssid_addr,
1783 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1784
d7129e19
JB		 1785 /* currently needed in a few places */
1786 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1787 } else {
1788 priv->staging_rxon.filter_flags &=
1789 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1790 }
d7129e19 1791
2d0ddec5
JB		 1792 }
1793
d7129e19
JB		 1794 /*
1795 * This needs to be after setting the BSSID in case
1796 * mac80211 decides to do both changes at once because
1797 * it will invoke post_associate.
1798 */
92445c95 1799 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB		 1800 changes & BSS_CHANGED_BEACON) {
1801 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1802
1803 if (beacon)
1804 iwl_mac_beacon_update(hw, beacon);
1805 }
1806
5bbe233b
AK		 1807 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1808 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1809 bss_conf->use_short_preamble);
1810 if (bss_conf->use_short_preamble)
1811 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1812 else
1813 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1814 }
1815
1816 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1817 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1818 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1819 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1820 else
1821 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
94597ab2
JB		 1822 if (bss_conf->use_cts_prot)
1823 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
1824 else
1825 priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN;
5bbe233b
AK		 1826 }
1827
d7129e19
JB		 1828 if (changes & BSS_CHANGED_BASIC_RATES) {
1829 /* XXX use this information
1830 *
1831 * To do that, remove code from iwl_set_rate() and put something
1832 * like this here:
1833 *
1834 if (A-band)
1835 priv->staging_rxon.ofdm_basic_rates =
1836 bss_conf->basic_rates;
1837 else
1838 priv->staging_rxon.ofdm_basic_rates =
1839 bss_conf->basic_rates >> 4;
1840 priv->staging_rxon.cck_basic_rates =
1841 bss_conf->basic_rates & 0xF;
1842 */
1843 }
1844
5bbe233b 1845 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1846 iwl_ht_conf(priv, vif);
45823531
AK		 1847
1848 if (priv->cfg->ops->hcmd->set_rxon_chain)
1849 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 1850 }
1851
1852 if (changes & BSS_CHANGED_ASSOC) {
1853 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1854 if (bss_conf->assoc) {
5bbe233b 1855 priv->timestamp = bss_conf->timestamp;
5bbe233b 1856
e932a609
JB		 1857 iwl_led_associate(priv);
1858
d7129e19 1859 if (!iwl_is_rfkill(priv))
1dda6d28 1860 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc
AK		 1861 } else
1862 iwl_set_no_assoc(priv);
d7129e19
JB		 1863 }
1864
1dda6d28 1865 if (changes && iwl_is_associated(priv) && bss_conf->aid) {
d7129e19
JB		 1866 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1867 changes);
1868 ret = iwl_send_rxon_assoc(priv);
1869 if (!ret) {
1870 /* Sync active_rxon with latest change. */
1871 memcpy((void *)&priv->active_rxon,
1872 &priv->staging_rxon,
1873 sizeof(struct iwl_rxon_cmd));
5bbe233b 1874 }
5bbe233b 1875 }
d7129e19 1876
c91c3efc
AK		 1877 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1878 if (vif->bss_conf.enable_beacon) {
1879 memcpy(priv->staging_rxon.bssid_addr,
1880 bss_conf->bssid, ETH_ALEN);
1881 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1882 iwlcore_config_ap(priv, vif);
c91c3efc
AK		 1883 } else
1884 iwl_set_no_assoc(priv);
f513dfff
DH		 1885 }
1886
1fa61b2e
JB		 1887 if (changes & BSS_CHANGED_IBSS) {
1888 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1889 bss_conf->ibss_joined);
1890 if (ret)
1891 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1892 bss_conf->ibss_joined ? "add" : "remove",
1893 bss_conf->bssid);
1894 }
1895
d7129e19
JB		 1896 mutex_unlock(&priv->mutex);
1897
2d0ddec5 1898 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 1899}
1900EXPORT_SYMBOL(iwl_bss_info_changed);
1901
b55e75ed 1902static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1903{
1dda6d28 1904 iwl_connection_init_rx_config(priv, vif);
727882d6
AK		 1905
1906 if (priv->cfg->ops->hcmd->set_rxon_chain)
1907 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1908
b55e75ed 1909 return iwlcore_commit_rxon(priv);
727882d6 1910}
727882d6 1911
b55e75ed 1912int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1913{
1914 struct iwl_priv *priv = hw->priv;
47e28f41 1915 int err = 0;
cbb6ab94 1916
3779db10
JB		 1917 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
1918 vif->type, vif->addr);
cbb6ab94 1919
47e28f41
JB		 1920 mutex_lock(&priv->mutex);
1921
b55e75ed
JB		 1922 if (WARN_ON(!iwl_is_ready_rf(priv))) {
1923 err = -EINVAL;
1924 goto out;
1925 }
1926
cbb6ab94
AK		 1927 if (priv->vif) {
1928 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 1929 err = -EOPNOTSUPP;
1930 goto out;
cbb6ab94
AK		 1931 }
1932
1ed32e4f
JB		 1933 priv->vif = vif;
1934 priv->iw_mode = vif->type;
cbb6ab94 1935
b55e75ed
JB		 1936 err = iwl_set_mode(priv, vif);
1937 if (err)
1938 goto out_err;
7e246191 1939
b55e75ed 1940 goto out;
cbb6ab94 1941
b55e75ed
JB		 1942 out_err:
1943 priv->vif = NULL;
1944 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1945 out:
cbb6ab94
AK		 1946 mutex_unlock(&priv->mutex);
1947
1948 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1949 return err;
cbb6ab94
AK		 1950}
1951EXPORT_SYMBOL(iwl_mac_add_interface);
1952
d8052319 1953void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 1954 struct ieee80211_vif *vif)
d8052319
AK		 1955{
1956 struct iwl_priv *priv = hw->priv;
02f5ba5b 1957 bool scan_completed = false;
d8052319
AK		 1958
1959 IWL_DEBUG_MAC80211(priv, "enter\n");
1960
1961 mutex_lock(&priv->mutex);
1962
1963 if (iwl_is_ready_rf(priv)) {
1964 iwl_scan_cancel_timeout(priv, 100);
1965 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1966 iwlcore_commit_rxon(priv);
1967 }
1ed32e4f 1968 if (priv->vif == vif) {
d8052319 1969 priv->vif = NULL;
f84b29ec 1970 if (priv->scan_vif == vif) {
02f5ba5b 1971 scan_completed = true;
f84b29ec
JB		 1972 priv->scan_vif = NULL;
1973 priv->scan_request = NULL;
1974 }
d8052319
AK		 1975 memset(priv->bssid, 0, ETH_ALEN);
1976 }
1977 mutex_unlock(&priv->mutex);
1978
02f5ba5b
JB		 1979 if (scan_completed)
1980 ieee80211_scan_completed(priv->hw, true);
1981
d8052319
AK		 1982 IWL_DEBUG_MAC80211(priv, "leave\n");
1983
1984}
1985EXPORT_SYMBOL(iwl_mac_remove_interface);
1986
4808368d
AK		 1987/**
1988 * iwl_mac_config - mac80211 config callback
4808368d
AK		 1989 */
1990int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
1991{
1992 struct iwl_priv *priv = hw->priv;
1993 const struct iwl_channel_info *ch_info;
1994 struct ieee80211_conf *conf = &hw->conf;
aa2dc6b5 1995 struct ieee80211_channel *channel = conf->channel;
fad95bf5 1996 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 1997 unsigned long flags = 0;
1998 int ret = 0;
1999 u16 ch;
2000 int scan_active = 0;
2001
2002 mutex_lock(&priv->mutex);
2003
4808368d 2004 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
aa2dc6b5 2005 channel->hw_value, changed);
4808368d
AK		 2006
2007 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2008 test_bit(STATUS_SCANNING, &priv->status))) {
2009 scan_active = 1;
2010 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2011 }
2012
ba37a3d0
JB		 2013 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2014 IEEE80211_CONF_CHANGE_CHANNEL)) {
2015 /* mac80211 uses static for non-HT which is what we want */
2016 priv->current_ht_config.smps = conf->smps_mode;
2017
2018 /*
2019 * Recalculate chain counts.
2020 *
2021 * If monitor mode is enabled then mac80211 will
2022 * set up the SM PS mode to OFF if an HT channel is
2023 * configured.
2024 */
2025 if (priv->cfg->ops->hcmd->set_rxon_chain)
2026 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2027 }
4808368d
AK		 2028
2029 /* during scanning mac80211 will delay channel setting until
2030 * scan finish with changed = 0
2031 */
2032 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2033 if (scan_active)
2034 goto set_ch_out;
2035
aa2dc6b5
SZ		 2036 ch = channel->hw_value;
2037 ch_info = iwl_get_channel_info(priv, channel->band, ch);
4808368d
AK		 2038 if (!is_channel_valid(ch_info)) {
2039 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2040 ret = -EINVAL;
2041 goto set_ch_out;
2042 }
2043
4808368d
AK		 2044 spin_lock_irqsave(&priv->lock, flags);
2045
28bd723b
DH		 2046 /* Configure HT40 channels */
2047 ht_conf->is_ht = conf_is_ht(conf);
2048 if (ht_conf->is_ht) {
2049 if (conf_is_ht40_minus(conf)) {
2050 ht_conf->extension_chan_offset =
2051 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2052 ht_conf->is_40mhz = true;
28bd723b
DH		 2053 } else if (conf_is_ht40_plus(conf)) {
2054 ht_conf->extension_chan_offset =
2055 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2056 ht_conf->is_40mhz = true;
28bd723b
DH		 2057 } else {
2058 ht_conf->extension_chan_offset =
2059 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2060 ht_conf->is_40mhz = false;
28bd723b
DH		 2061 }
2062 } else
c812ee24 2063 ht_conf->is_40mhz = false;
28bd723b
DH		 2064 /* Default to no protection. Protection mode will later be set
2065 * from BSS config in iwl_ht_conf */
2066 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d 2067
4808368d
AK		 2068 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2069 priv->staging_rxon.flags = 0;
2070
aa2dc6b5 2071 iwl_set_rxon_channel(priv, channel);
5e2f75b8 2072 iwl_set_rxon_ht(priv, ht_conf);
4808368d 2073
aa2dc6b5 2074 iwl_set_flags_for_band(priv, channel->band, priv->vif);
4808368d 2075 spin_unlock_irqrestore(&priv->lock, flags);
79d07325 2076
278c2f6f
DH		 2077 if (priv->cfg->ops->lib->update_bcast_station)
2078 ret = priv->cfg->ops->lib->update_bcast_station(priv);
2079
4808368d
AK		 2080 set_ch_out:
2081 /* The list of supported rates and rate mask can be different
2082 * for each band; since the band may have changed, reset
2083 * the rate mask to what mac80211 lists */
2084 iwl_set_rate(priv);
2085 }
2086
78f5fb7f
JB		 2087 if (changed & (IEEE80211_CONF_CHANGE_PS |
2088 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2089 ret = iwl_power_update_mode(priv, false);
4808368d 2090 if (ret)
e312c24c 2091 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2092 }
2093
2094 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2095 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2096 priv->tx_power_user_lmt, conf->power_level);
2097
2098 iwl_set_tx_power(priv, conf->power_level, false);
2099 }
2100
0cf4c01e
MA		 2101 if (!iwl_is_ready(priv)) {
2102 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2103 goto out;
2104 }
2105
4808368d
AK		 2106 if (scan_active)
2107 goto out;
2108
2109 if (memcmp(&priv->active_rxon,
2110 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2111 iwlcore_commit_rxon(priv);
2112 else
2113 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2114
2115
2116out:
2117 IWL_DEBUG_MAC80211(priv, "leave\n");
2118 mutex_unlock(&priv->mutex);
2119 return ret;
2120}
2121EXPORT_SYMBOL(iwl_mac_config);
2122
bd564261
AK		 2123void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2124{
2125 struct iwl_priv *priv = hw->priv;
2126 unsigned long flags;
2127
2128 mutex_lock(&priv->mutex);
2129 IWL_DEBUG_MAC80211(priv, "enter\n");
2130
2131 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2132 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2133 spin_unlock_irqrestore(&priv->lock, flags);
2134
bd564261 2135 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK		 2136
2137 /* new association get rid of ibss beacon skb */
2138 if (priv->ibss_beacon)
2139 dev_kfree_skb(priv->ibss_beacon);
2140
2141 priv->ibss_beacon = NULL;
2142
bd564261 2143 priv->timestamp = 0;
bd564261
AK		 2144
2145 spin_unlock_irqrestore(&priv->lock, flags);
2146
2147 if (!iwl_is_ready_rf(priv)) {
2148 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2149 mutex_unlock(&priv->mutex);
2150 return;
2151 }
2152
2153 /* we are restarting association process
2154 * clear RXON_FILTER_ASSOC_MSK bit
2155 */
b4665df4
JB		 2156 iwl_scan_cancel_timeout(priv, 100);
2157 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2158 iwlcore_commit_rxon(priv);
bd564261
AK		 2159
2160 iwl_set_rate(priv);
2161
2162 mutex_unlock(&priv->mutex);
2163
2164 IWL_DEBUG_MAC80211(priv, "leave\n");
2165}
2166EXPORT_SYMBOL(iwl_mac_reset_tsf);
2167
88804e2b
WYG		 2168int iwl_alloc_txq_mem(struct iwl_priv *priv)
2169{
2170 if (!priv->txq)
2171 priv->txq = kzalloc(
2172 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2173 GFP_KERNEL);
2174 if (!priv->txq) {
91dd6c27 2175 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2176 return -ENOMEM;
2177 }
2178 return 0;
2179}
2180EXPORT_SYMBOL(iwl_alloc_txq_mem);
2181
2182void iwl_free_txq_mem(struct iwl_priv *priv)
2183{
2184 kfree(priv->txq);
2185 priv->txq = NULL;
2186}
2187EXPORT_SYMBOL(iwl_free_txq_mem);
2188
20594eb0
WYG		 2189#ifdef CONFIG_IWLWIFI_DEBUGFS
2190
2191#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2192
2193void iwl_reset_traffic_log(struct iwl_priv *priv)
2194{
2195 priv->tx_traffic_idx = 0;
2196 priv->rx_traffic_idx = 0;
2197 if (priv->tx_traffic)
2198 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2199 if (priv->rx_traffic)
2200 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2201}
2202
2203int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2204{
2205 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2206
2207 if (iwl_debug_level & IWL_DL_TX) {
2208 if (!priv->tx_traffic) {
2209 priv->tx_traffic =
2210 kzalloc(traffic_size, GFP_KERNEL);
2211 if (!priv->tx_traffic)
2212 return -ENOMEM;
2213 }
2214 }
2215 if (iwl_debug_level & IWL_DL_RX) {
2216 if (!priv->rx_traffic) {
2217 priv->rx_traffic =
2218 kzalloc(traffic_size, GFP_KERNEL);
2219 if (!priv->rx_traffic)
2220 return -ENOMEM;
2221 }
2222 }
2223 iwl_reset_traffic_log(priv);
2224 return 0;
2225}
2226EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2227
2228void iwl_free_traffic_mem(struct iwl_priv *priv)
2229{
2230 kfree(priv->tx_traffic);
2231 priv->tx_traffic = NULL;
2232
2233 kfree(priv->rx_traffic);
2234 priv->rx_traffic = NULL;
2235}
2236EXPORT_SYMBOL(iwl_free_traffic_mem);
2237
2238void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2239 u16 length, struct ieee80211_hdr *header)
2240{
2241 __le16 fc;
2242 u16 len;
2243
2244 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2245 return;
2246
2247 if (!priv->tx_traffic)
2248 return;
2249
2250 fc = header->frame_control;
2251 if (ieee80211_is_data(fc)) {
2252 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2253 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2254 memcpy((priv->tx_traffic +
2255 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2256 header, len);
2257 priv->tx_traffic_idx =
2258 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2259 }
2260}
2261EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2262
2263void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2264 u16 length, struct ieee80211_hdr *header)
2265{
2266 __le16 fc;
2267 u16 len;
2268
2269 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2270 return;
2271
2272 if (!priv->rx_traffic)
2273 return;
2274
2275 fc = header->frame_control;
2276 if (ieee80211_is_data(fc)) {
2277 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2278 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2279 memcpy((priv->rx_traffic +
2280 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2281 header, len);
2282 priv->rx_traffic_idx =
2283 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2284 }
2285}
2286EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2287
2288const char *get_mgmt_string(int cmd)
2289{
2290 switch (cmd) {
2291 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2292 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2293 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2294 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2295 IWL_CMD(MANAGEMENT_PROBE_REQ);
2296 IWL_CMD(MANAGEMENT_PROBE_RESP);
2297 IWL_CMD(MANAGEMENT_BEACON);
2298 IWL_CMD(MANAGEMENT_ATIM);
2299 IWL_CMD(MANAGEMENT_DISASSOC);
2300 IWL_CMD(MANAGEMENT_AUTH);
2301 IWL_CMD(MANAGEMENT_DEAUTH);
2302 IWL_CMD(MANAGEMENT_ACTION);
2303 default:
2304 return "UNKNOWN";
2305
2306 }
2307}
2308
2309const char *get_ctrl_string(int cmd)
2310{
2311 switch (cmd) {
2312 IWL_CMD(CONTROL_BACK_REQ);
2313 IWL_CMD(CONTROL_BACK);
2314 IWL_CMD(CONTROL_PSPOLL);
2315 IWL_CMD(CONTROL_RTS);
2316 IWL_CMD(CONTROL_CTS);
2317 IWL_CMD(CONTROL_ACK);
2318 IWL_CMD(CONTROL_CFEND);
2319 IWL_CMD(CONTROL_CFENDACK);
2320 default:
2321 return "UNKNOWN";
2322
2323 }
2324}
2325
7163b8a4 2326void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2327{
2328 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2329 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2330 priv->led_tpt = 0;
22fdf3c9
WYG		 2331}
2332
2333/*
2334 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2335 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2336 * Use debugFs to display the rx/rx_statistics
2337 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2338 * information will be recorded, but DATA pkt still will be recorded
2339 * for the reason of iwl_led.c need to control the led blinking based on
2340 * number of tx and rx data.
2341 *
2342 */
2343void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2344{
2345 struct traffic_stats *stats;
2346
2347 if (is_tx)
2348 stats = &priv->tx_stats;
2349 else
2350 stats = &priv->rx_stats;
2351
2352 if (ieee80211_is_mgmt(fc)) {
2353 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2354 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2355 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2356 break;
2357 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2358 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2359 break;
2360 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2361 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2362 break;
2363 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2364 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2365 break;
2366 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2367 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2368 break;
2369 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2370 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2371 break;
2372 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2373 stats->mgmt[MANAGEMENT_BEACON]++;
2374 break;
2375 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2376 stats->mgmt[MANAGEMENT_ATIM]++;
2377 break;
2378 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2379 stats->mgmt[MANAGEMENT_DISASSOC]++;
2380 break;
2381 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2382 stats->mgmt[MANAGEMENT_AUTH]++;
2383 break;
2384 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2385 stats->mgmt[MANAGEMENT_DEAUTH]++;
2386 break;
2387 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2388 stats->mgmt[MANAGEMENT_ACTION]++;
2389 break;
2390 }
2391 } else if (ieee80211_is_ctl(fc)) {
2392 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2393 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2394 stats->ctrl[CONTROL_BACK_REQ]++;
2395 break;
2396 case cpu_to_le16(IEEE80211_STYPE_BACK):
2397 stats->ctrl[CONTROL_BACK]++;
2398 break;
2399 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2400 stats->ctrl[CONTROL_PSPOLL]++;
2401 break;
2402 case cpu_to_le16(IEEE80211_STYPE_RTS):
2403 stats->ctrl[CONTROL_RTS]++;
2404 break;
2405 case cpu_to_le16(IEEE80211_STYPE_CTS):
2406 stats->ctrl[CONTROL_CTS]++;
2407 break;
2408 case cpu_to_le16(IEEE80211_STYPE_ACK):
2409 stats->ctrl[CONTROL_ACK]++;
2410 break;
2411 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2412 stats->ctrl[CONTROL_CFEND]++;
2413 break;
2414 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2415 stats->ctrl[CONTROL_CFENDACK]++;
2416 break;
2417 }
2418 } else {
2419 /* data */
2420 stats->data_cnt++;
2421 stats->data_bytes += len;
2422 }
d5f4cf71 2423 iwl_leds_background(priv);
22fdf3c9
WYG		 2424}
2425EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2426#endif
2427
a0ea9493 2428static const char *get_csr_string(int cmd)
696bdee3
WYG		 2429{
2430 switch (cmd) {
2431 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2432 IWL_CMD(CSR_INT_COALESCING);
2433 IWL_CMD(CSR_INT);
2434 IWL_CMD(CSR_INT_MASK);
2435 IWL_CMD(CSR_FH_INT_STATUS);
2436 IWL_CMD(CSR_GPIO_IN);
2437 IWL_CMD(CSR_RESET);
2438 IWL_CMD(CSR_GP_CNTRL);
2439 IWL_CMD(CSR_HW_REV);
2440 IWL_CMD(CSR_EEPROM_REG);
2441 IWL_CMD(CSR_EEPROM_GP);
2442 IWL_CMD(CSR_OTP_GP_REG);
2443 IWL_CMD(CSR_GIO_REG);
2444 IWL_CMD(CSR_GP_UCODE_REG);
2445 IWL_CMD(CSR_GP_DRIVER_REG);
2446 IWL_CMD(CSR_UCODE_DRV_GP1);
2447 IWL_CMD(CSR_UCODE_DRV_GP2);
2448 IWL_CMD(CSR_LED_REG);
2449 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2450 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2451 IWL_CMD(CSR_ANA_PLL_CFG);
2452 IWL_CMD(CSR_HW_REV_WA_REG);
2453 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2454 default:
2455 return "UNKNOWN";
2456
2457 }
2458}
2459
2460void iwl_dump_csr(struct iwl_priv *priv)
2461{
2462 int i;
2463 u32 csr_tbl[] = {
2464 CSR_HW_IF_CONFIG_REG,
2465 CSR_INT_COALESCING,
2466 CSR_INT,
2467 CSR_INT_MASK,
2468 CSR_FH_INT_STATUS,
2469 CSR_GPIO_IN,
2470 CSR_RESET,
2471 CSR_GP_CNTRL,
2472 CSR_HW_REV,
2473 CSR_EEPROM_REG,
2474 CSR_EEPROM_GP,
2475 CSR_OTP_GP_REG,
2476 CSR_GIO_REG,
2477 CSR_GP_UCODE_REG,
2478 CSR_GP_DRIVER_REG,
2479 CSR_UCODE_DRV_GP1,
2480 CSR_UCODE_DRV_GP2,
2481 CSR_LED_REG,
2482 CSR_DRAM_INT_TBL_REG,
2483 CSR_GIO_CHICKEN_BITS,
2484 CSR_ANA_PLL_CFG,
2485 CSR_HW_REV_WA_REG,
2486 CSR_DBG_HPET_MEM_REG
2487 };
2488 IWL_ERR(priv, "CSR values:\n");
2489 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2490 "CSR_INT_PERIODIC_REG)\n");
2491 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2492 IWL_ERR(priv, " %25s: 0X%08x\n",
2493 get_csr_string(csr_tbl[i]),
2494 iwl_read32(priv, csr_tbl[i]));
2495 }
2496}
2497EXPORT_SYMBOL(iwl_dump_csr);
2498
a0ea9493 2499static const char *get_fh_string(int cmd)
1b3eb823
WYG		 2500{
2501 switch (cmd) {
2502 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2503 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2504 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2505 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2506 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2507 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2508 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2509 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2510 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2511 default:
2512 return "UNKNOWN";
2513
2514 }
2515}
2516
2517int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2518{
2519 int i;
2520#ifdef CONFIG_IWLWIFI_DEBUG
2521 int pos = 0;
2522 size_t bufsz = 0;
2523#endif
2524 u32 fh_tbl[] = {
2525 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2526 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2527 FH_RSCSR_CHNL0_WPTR,
2528 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2529 FH_MEM_RSSR_SHARED_CTRL_REG,
2530 FH_MEM_RSSR_RX_STATUS_REG,
2531 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2532 FH_TSSR_TX_STATUS_REG,
2533 FH_TSSR_TX_ERROR_REG
2534 };
2535#ifdef CONFIG_IWLWIFI_DEBUG
2536 if (display) {
2537 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2538 *buf = kmalloc(bufsz, GFP_KERNEL);
2539 if (!*buf)
2540 return -ENOMEM;
2541 pos += scnprintf(*buf + pos, bufsz - pos,
2542 "FH register values:\n");
2543 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2544 pos += scnprintf(*buf + pos, bufsz - pos,
2545 " %34s: 0X%08x\n",
2546 get_fh_string(fh_tbl[i]),
2547 iwl_read_direct32(priv, fh_tbl[i]));
2548 }
2549 return pos;
2550 }
2551#endif
2552 IWL_ERR(priv, "FH register values:\n");
2553 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2554 IWL_ERR(priv, " %34s: 0X%08x\n",
2555 get_fh_string(fh_tbl[i]),
2556 iwl_read_direct32(priv, fh_tbl[i]));
2557 }
2558 return 0;
2559}
2560EXPORT_SYMBOL(iwl_dump_fh);
2561
a93e7973 2562static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2563{
2564 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2565 return;
2566
2567 if (!iwl_is_associated(priv)) {
2568 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2569 return;
2570 }
2571 /*
2572 * There is no easy and better way to force reset the radio,
2573 * the only known method is switching channel which will force to
2574 * reset and tune the radio.
2575 * Use internal short scan (single channel) operation to should
2576 * achieve this objective.
2577 * Driver should reset the radio when number of consecutive missed
2578 * beacon, or any other uCode error condition detected.
2579 */
2580 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2581 iwl_internal_short_hw_scan(priv);
afbdd69a 2582}
a93e7973 2583
a93e7973 2584
c04f9f22 2585int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 2586{
8a472da4
WYG		 2587 struct iwl_force_reset *force_reset;
2588
a93e7973
WYG		 2589 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2590 return -EINVAL;
2591
8a472da4
WYG		 2592 if (mode >= IWL_MAX_FORCE_RESET) {
2593 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2594 return -EINVAL;
2595 }
2596 force_reset = &priv->force_reset[mode];
2597 force_reset->reset_request_count++;
c04f9f22
WYG		 2598 if (!external) {
2599 if (force_reset->last_force_reset_jiffies &&
2600 time_after(force_reset->last_force_reset_jiffies +
2601 force_reset->reset_duration, jiffies)) {
2602 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2603 force_reset->reset_reject_count++;
2604 return -EAGAIN;
2605 }
a93e7973 2606 }
8a472da4
WYG		 2607 force_reset->reset_success_count++;
2608 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2609 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2610 switch (mode) {
2611 case IWL_RF_RESET:
2612 iwl_force_rf_reset(priv);
2613 break;
2614 case IWL_FW_RESET:
c04f9f22
WYG		 2615 /*
2616 * if the request is from external(ex: debugfs),
2617 * then always perform the request in regardless the module
2618 * parameter setting
2619 * if the request is from internal (uCode error or driver
2620 * detect failure), then fw_restart module parameter
2621 * need to be check before performing firmware reload
2622 */
2623 if (!external && !priv->cfg->mod_params->restart_fw) {
2624 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
2625 "module parameter setting\n");
2626 break;
2627 }
a93e7973
WYG		 2628 IWL_ERR(priv, "On demand firmware reload\n");
2629 /* Set the FW error flag -- cleared on iwl_down */
2630 set_bit(STATUS_FW_ERROR, &priv->status);
2631 wake_up_interruptible(&priv->wait_command_queue);
2632 /*
2633 * Keep the restart process from trying to send host
2634 * commands by clearing the INIT status bit
2635 */
2636 clear_bit(STATUS_READY, &priv->status);
2637 queue_work(priv->workqueue, &priv->restart);
2638 break;
a93e7973 2639 }
a93e7973
WYG		 2640 return 0;
2641}
b74e31a9
WYG		 2642EXPORT_SYMBOL(iwl_force_reset);
2643
2644/**
2645 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2646 *
2647 * During normal condition (no queue is stuck), the timer is continually set to
2648 * execute every monitor_recover_period milliseconds after the last timer
2649 * expired. When the queue read_ptr is at the same place, the timer is
2650 * shorten to 100mSecs. This is
2651 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2652 * 2) to detect the stuck queues quicker before the station and AP can
2653 * disassociate each other.
2654 *
2655 * This function monitors all the tx queues and recover from it if any
2656 * of the queues are stuck.
2657 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2658 * it will recover by resetting the firmware and return.
2659 * 2. Then, it checks for station association. If it associates it will check
2660 * other queues. If any queue is stuck, it will recover by resetting
2661 * the firmware.
2662 * Note: It the number of times the queue read_ptr to be at the same place to
2663 * be MAX_REPEAT+1 in order to consider to be stuck.
2664 */
2665/*
2666 * The maximum number of times the read pointer of the tx queue at the
2667 * same place without considering to be stuck.
2668 */
2669#define MAX_REPEAT (2)
2670static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2671{
2672 struct iwl_tx_queue *txq;
2673 struct iwl_queue *q;
2674
2675 txq = &priv->txq[cnt];
2676 q = &txq->q;
2677 /* queue is empty, skip */
2678 if (q->read_ptr != q->write_ptr) {
2679 if (q->read_ptr == q->last_read_ptr) {
2680 /* a queue has not been read from last time */
2681 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2682 IWL_ERR(priv,
2683 "queue %d stuck %d time. Fw reload.\n",
2684 q->id, q->repeat_same_read_ptr);
2685 q->repeat_same_read_ptr = 0;
c04f9f22 2686 iwl_force_reset(priv, IWL_FW_RESET, false);
b74e31a9
WYG		 2687 } else {
2688 q->repeat_same_read_ptr++;
2689 IWL_DEBUG_RADIO(priv,
2690 "queue %d, not read %d time\n",
2691 q->id,
2692 q->repeat_same_read_ptr);
2693 mod_timer(&priv->monitor_recover, jiffies +
2694 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2695 }
2696 return 1;
2697 } else {
2698 q->last_read_ptr = q->read_ptr;
2699 q->repeat_same_read_ptr = 0;
2700 }
2701 }
2702 return 0;
2703}
2704
2705void iwl_bg_monitor_recover(unsigned long data)
2706{
2707 struct iwl_priv *priv = (struct iwl_priv *)data;
2708 int cnt;
2709
2710 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2711 return;
2712
2713 /* monitor and check for stuck cmd queue */
2714 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2715 return;
2716
2717 /* monitor and check for other stuck queues */
2718 if (iwl_is_associated(priv)) {
2719 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2720 /* skip as we already checked the command queue */
2721 if (cnt == IWL_CMD_QUEUE_NUM)
2722 continue;
2723 if (iwl_check_stuck_queue(priv, cnt))
2724 return;
2725 }
2726 }
2727 /*
2728 * Reschedule the timer to occur in
2729 * priv->cfg->monitor_recover_period
2730 */
2731 mod_timer(&priv->monitor_recover,
2732 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2733}
2734EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2735
a0ee74cf
WYG		 2736
2737/*
2738 * extended beacon time format
2739 * time in usec will be changed into a 32-bit value in extended:internal format
2740 * the extended part is the beacon counts
2741 * the internal part is the time in usec within one beacon interval
2742 */
2743u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2744{
2745 u32 quot;
2746 u32 rem;
2747 u32 interval = beacon_interval * TIME_UNIT;
2748
2749 if (!interval || !usec)
2750 return 0;
2751
2752 quot = (usec / interval) &
2753 (iwl_beacon_time_mask_high(priv,
2754 priv->hw_params.beacon_time_tsf_bits) >>
2755 priv->hw_params.beacon_time_tsf_bits);
2756 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2757 priv->hw_params.beacon_time_tsf_bits);
2758
2759 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2760}
2761EXPORT_SYMBOL(iwl_usecs_to_beacons);
2762
2763/* base is usually what we get from ucode with each received frame,
2764 * the same as HW timer counter counting down
2765 */
2766__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2767 u32 addon, u32 beacon_interval)
2768{
2769 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2770 priv->hw_params.beacon_time_tsf_bits);
2771 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2772 priv->hw_params.beacon_time_tsf_bits);
2773 u32 interval = beacon_interval * TIME_UNIT;
2774 u32 res = (base & iwl_beacon_time_mask_high(priv,
2775 priv->hw_params.beacon_time_tsf_bits)) +
2776 (addon & iwl_beacon_time_mask_high(priv,
2777 priv->hw_params.beacon_time_tsf_bits));
2778
2779 if (base_low > addon_low)
2780 res += base_low - addon_low;
2781 else if (base_low < addon_low) {
2782 res += interval + base_low - addon_low;
2783 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2784 } else
2785 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2786
2787 return cpu_to_le32(res);
2788}
2789EXPORT_SYMBOL(iwl_add_beacon_time);
2790
6da3a13e
WYG		 2791#ifdef CONFIG_PM
2792
2793int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2794{
2795 struct iwl_priv *priv = pci_get_drvdata(pdev);
2796
2797 /*
2798 * This function is called when system goes into suspend state
2799 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2800 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2801 * it will not call apm_ops.stop() to stop the DMA operation.
2802 * Calling apm_ops.stop here to make sure we stop the DMA.
2803 */
2804 priv->cfg->ops->lib->apm_ops.stop(priv);
2805
2806 pci_save_state(pdev);
2807 pci_disable_device(pdev);
2808 pci_set_power_state(pdev, PCI_D3hot);
2809
2810 return 0;
2811}
2812EXPORT_SYMBOL(iwl_pci_suspend);
2813
2814int iwl_pci_resume(struct pci_dev *pdev)
2815{
2816 struct iwl_priv *priv = pci_get_drvdata(pdev);
2817 int ret;
0ab84cff 2818 bool hw_rfkill = false;
6da3a13e 2819
cd398c31
AK		 2820 /*
2821 * We disable the RETRY_TIMEOUT register (0x41) to keep
2822 * PCI Tx retries from interfering with C3 CPU state.
2823 */
2824 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2825
6da3a13e
WYG		 2826 pci_set_power_state(pdev, PCI_D0);
2827 ret = pci_enable_device(pdev);
2828 if (ret)
2829 return ret;
2830 pci_restore_state(pdev);
2831 iwl_enable_interrupts(priv);
2832
0ab84cff
JB		 2833 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
2834 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2835 hw_rfkill = true;
2836
2837 if (hw_rfkill)
2838 set_bit(STATUS_RF_KILL_HW, &priv->status);
2839 else
2840 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2841
2842 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2843
6da3a13e
WYG		 2844 return 0;
2845}
2846EXPORT_SYMBOL(iwl_pci_resume);
2847
2848#endif /* CONFIG_PM */
Linux 6.x block layer and io_uring tree(s)