iwlwifi: add context pointer to station
[linux-2.6-block.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW
2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW
46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG
51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
670245ed
JB
67bool bt_coex_active = true;
68EXPORT_SYMBOL_GPL(bt_coex_active);
06702a73 69module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 70MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 71
c7de35cd
RR
72#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
73 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
74 IWL_RATE_SISO_##s##M_PLCP, \
75 IWL_RATE_MIMO2_##s##M_PLCP,\
76 IWL_RATE_MIMO3_##s##M_PLCP,\
77 IWL_RATE_##r##M_IEEE, \
78 IWL_RATE_##ip##M_INDEX, \
79 IWL_RATE_##in##M_INDEX, \
80 IWL_RATE_##rp##M_INDEX, \
81 IWL_RATE_##rn##M_INDEX, \
82 IWL_RATE_##pp##M_INDEX, \
83 IWL_RATE_##np##M_INDEX }
84
a562a9dd
RC
85u32 iwl_debug_level;
86EXPORT_SYMBOL(iwl_debug_level);
87
c7de35cd
RR
88/*
89 * Parameter order:
90 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
91 *
92 * If there isn't a valid next or previous rate then INV is used which
93 * maps to IWL_RATE_INVALID
94 *
95 */
1826dcc0 96const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR
97 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
98 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
99 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
100 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
101 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
102 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
103 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
104 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
105 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
106 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
107 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
108 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
109 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
110 /* FIXME:RS: ^^ should be INV (legacy) */
111};
1826dcc0 112EXPORT_SYMBOL(iwl_rates);
c7de35cd 113
e7d326ac
TW
114int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
115{
116 int idx = 0;
117
118 /* HT rate format */
119 if (rate_n_flags & RATE_MCS_HT_MSK) {
120 idx = (rate_n_flags & 0xff);
121
60d32215
DH
122 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
123 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
124 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW
125 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
126
127 idx += IWL_FIRST_OFDM_RATE;
128 /* skip 9M not supported in ht*/
129 if (idx >= IWL_RATE_9M_INDEX)
130 idx += 1;
131 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
132 return idx;
133
134 /* legacy rate format, search for match in table */
135 } else {
136 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
137 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
138 return idx;
139 }
140
141 return -1;
142}
143EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
144
0e1654fa 145u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
76eff18b
TW
146{
147 int i;
148 u8 ind = ant;
0e1654fa 149
bd6e2d57
JB
150 if (priv->band == IEEE80211_BAND_2GHZ &&
151 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)
152 return 0;
153
76eff18b
TW
154 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
155 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
0e1654fa 156 if (valid & BIT(ind))
76eff18b
TW
157 return ind;
158 }
159 return ant;
160}
47ff65c4 161EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW
162
163const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
164EXPORT_SYMBOL(iwl_bcast_addr);
165
166
1d0a082d
AK
167/* This function both allocates and initializes hw and priv. */
168struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
169 struct ieee80211_ops *hw_ops)
170{
171 struct iwl_priv *priv;
172
173 /* mac80211 allocates memory for this device instance, including
174 * space for this driver's private structure */
175 struct ieee80211_hw *hw =
176 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
177 if (hw == NULL) {
c96c31e4 178 pr_err("%s: Can not allocate network device\n",
a3139c59 179 cfg->name);
1d0a082d
AK
180 goto out;
181 }
182
183 priv = hw->priv;
184 priv->hw = hw;
185
186out:
187 return hw;
188}
189EXPORT_SYMBOL(iwl_alloc_all);
190
14d2aac5
AK
191/*
192 * QoS support
193*/
8dfdb9d5 194static void iwl_update_qos(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
14d2aac5
AK
195{
196 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
197 return;
198
8dfdb9d5 199 ctx->qos_data.def_qos_parm.qos_flags = 0;
14d2aac5 200
8dfdb9d5
JB
201 if (ctx->qos_data.qos_active)
202 ctx->qos_data.def_qos_parm.qos_flags |=
14d2aac5
AK
203 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
204
205 if (priv->current_ht_config.is_ht)
8dfdb9d5 206 ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
14d2aac5 207
e61146e3 208 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
8dfdb9d5
JB
209 ctx->qos_data.qos_active,
210 ctx->qos_data.def_qos_parm.qos_flags);
14d2aac5 211
8dfdb9d5 212 iwl_send_cmd_pdu_async(priv, ctx->qos_cmd,
e61146e3 213 sizeof(struct iwl_qosparam_cmd),
8dfdb9d5 214 &ctx->qos_data.def_qos_parm, NULL);
14d2aac5 215}
c7de35cd 216
d9fe60de
JB
217#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
218#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 219static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 220 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR
221 enum ieee80211_band band)
222{
39130df3
RR
223 u16 max_bit_rate = 0;
224 u8 rx_chains_num = priv->hw_params.rx_chains_num;
225 u8 tx_chains_num = priv->hw_params.tx_chains_num;
226
c7de35cd 227 ht_info->cap = 0;
d9fe60de 228 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 229
d9fe60de 230 ht_info->ht_supported = true;
c7de35cd 231
b261793d
DH
232 if (priv->cfg->ht_greenfield_support)
233 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 234 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 235 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 236 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB
237 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
238 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
239 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 240 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 241 }
c7de35cd
RR
242
243 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 244 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR
245
246 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
172c1d11
WYG
247 if (priv->cfg->ampdu_factor)
248 ht_info->ampdu_factor = priv->cfg->ampdu_factor;
c7de35cd 249 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
172c1d11
WYG
250 if (priv->cfg->ampdu_density)
251 ht_info->ampdu_density = priv->cfg->ampdu_density;
c7de35cd 252
d9fe60de 253 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 254 if (rx_chains_num >= 2)
d9fe60de 255 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 256 if (rx_chains_num >= 3)
d9fe60de 257 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR
258
259 /* Highest supported Rx data rate */
260 max_bit_rate *= rx_chains_num;
d9fe60de
JB
261 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
262 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR
263
264 /* Tx MCS capabilities */
d9fe60de 265 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 266 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB
267 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
268 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
269 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 270 }
c7de35cd 271}
c7de35cd 272
c7de35cd
RR
273/**
274 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
275 */
534166de 276int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR
277{
278 struct iwl_channel_info *ch;
279 struct ieee80211_supported_band *sband;
280 struct ieee80211_channel *channels;
281 struct ieee80211_channel *geo_ch;
282 struct ieee80211_rate *rates;
283 int i = 0;
284
285 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
286 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 287 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR
288 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
289 return 0;
290 }
291
292 channels = kzalloc(sizeof(struct ieee80211_channel) *
293 priv->channel_count, GFP_KERNEL);
294 if (!channels)
295 return -ENOMEM;
296
5027309b 297 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR
298 GFP_KERNEL);
299 if (!rates) {
300 kfree(channels);
301 return -ENOMEM;
302 }
303
304 /* 5.2GHz channels start after the 2.4GHz channels */
305 sband = &priv->bands[IEEE80211_BAND_5GHZ];
306 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
307 /* just OFDM */
308 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 309 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 310
49779293 311 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 312 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 313 IEEE80211_BAND_5GHZ);
c7de35cd
RR
314
315 sband = &priv->bands[IEEE80211_BAND_2GHZ];
316 sband->channels = channels;
317 /* OFDM & CCK */
318 sband->bitrates = rates;
5027309b 319 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 320
49779293 321 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 322 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 323 IEEE80211_BAND_2GHZ);
c7de35cd
RR
324
325 priv->ieee_channels = channels;
326 priv->ieee_rates = rates;
327
c7de35cd
RR
328 for (i = 0; i < priv->channel_count; i++) {
329 ch = &priv->channel_info[i];
330
331 /* FIXME: might be removed if scan is OK */
332 if (!is_channel_valid(ch))
333 continue;
334
335 if (is_channel_a_band(ch))
336 sband = &priv->bands[IEEE80211_BAND_5GHZ];
337 else
338 sband = &priv->bands[IEEE80211_BAND_2GHZ];
339
340 geo_ch = &sband->channels[sband->n_channels++];
341
342 geo_ch->center_freq =
343 ieee80211_channel_to_frequency(ch->channel);
344 geo_ch->max_power = ch->max_power_avg;
345 geo_ch->max_antenna_gain = 0xff;
346 geo_ch->hw_value = ch->channel;
347
348 if (is_channel_valid(ch)) {
349 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
350 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
351
352 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
353 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
354
355 if (ch->flags & EEPROM_CHANNEL_RADAR)
356 geo_ch->flags |= IEEE80211_CHAN_RADAR;
357
7aafef1c 358 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 359
dc1b0973
WYG
360 if (ch->max_power_avg > priv->tx_power_device_lmt)
361 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR
362 } else {
363 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
364 }
365
e1623446 366 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR
367 ch->channel, geo_ch->center_freq,
368 is_channel_a_band(ch) ? "5.2" : "2.4",
369 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
370 "restricted" : "valid",
371 geo_ch->flags);
372 }
373
374 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
375 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW
376 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
377 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO
378 priv->pci_dev->device,
379 priv->pci_dev->subsystem_device);
c7de35cd
RR
380 priv->cfg->sku &= ~IWL_SKU_A;
381 }
382
978785a3 383 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO
384 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
385 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR
386
387 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
388
389 return 0;
390}
534166de 391EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR
392
393/*
394 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
395 */
534166de 396void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR
397{
398 kfree(priv->ieee_channels);
399 kfree(priv->ieee_rates);
400 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
401}
534166de 402EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 403
37dc70fe 404/*
94597ab2 405 * iwlcore_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
37dc70fe
AK
406 * function.
407 */
94597ab2
JB
408void iwlcore_tx_cmd_protection(struct iwl_priv *priv,
409 struct ieee80211_tx_info *info,
410 __le16 fc, __le32 *tx_flags)
37dc70fe
AK
411{
412 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
413 *tx_flags |= TX_CMD_FLG_RTS_MSK;
414 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
94597ab2
JB
415 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
416
417 if (!ieee80211_is_mgmt(fc))
418 return;
419
420 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
421 case cpu_to_le16(IEEE80211_STYPE_AUTH):
422 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
423 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
424 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
425 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
426 *tx_flags |= TX_CMD_FLG_CTS_MSK;
427 break;
428 }
37dc70fe
AK
429 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
430 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
431 *tx_flags |= TX_CMD_FLG_CTS_MSK;
94597ab2 432 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
37dc70fe
AK
433 }
434}
94597ab2
JB
435EXPORT_SYMBOL(iwlcore_tx_cmd_protection);
436
37dc70fe 437
28a6b07a 438static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 439{
ba37a3d0 440 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 441 priv->current_ht_config.single_chain_sufficient;
c7de35cd 442}
963f5517 443
47c5196e
TW
444static u8 iwl_is_channel_extension(struct iwl_priv *priv,
445 enum ieee80211_band band,
446 u16 channel, u8 extension_chan_offset)
447{
448 const struct iwl_channel_info *ch_info;
449
450 ch_info = iwl_get_channel_info(priv, band, channel);
451 if (!is_channel_valid(ch_info))
452 return 0;
453
d9fe60de 454 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 455 return !(ch_info->ht40_extension_channel &
689da1b3 456 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 457 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 458 return !(ch_info->ht40_extension_channel &
689da1b3 459 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW
460
461 return 0;
462}
463
7aafef1c 464u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 465 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 466{
fad95bf5 467 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
246ed355
JB
468#if !TODO
469 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
470#endif
47c5196e 471
fad95bf5 472 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW
473 return 0;
474
a2b0f02e
WYG
475 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
476 * the bit will not set if it is pure 40MHz case
477 */
47c5196e 478 if (sta_ht_inf) {
a2b0f02e 479 if (!sta_ht_inf->ht_supported)
47c5196e
TW
480 return 0;
481 }
d73e4923 482#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4
WYG
483 if (priv->disable_ht40)
484 return 0;
485#endif
611d3eb7 486 return iwl_is_channel_extension(priv, priv->band,
246ed355 487 le16_to_cpu(ctx->staging.channel),
fad95bf5 488 ht_conf->extension_chan_offset);
47c5196e 489}
7aafef1c 490EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 491
2c2f3b33
TW
492static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
493{
494 u16 new_val = 0;
495 u16 beacon_factor = 0;
496
497 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
498 new_val = beacon_val / beacon_factor;
499
500 if (!new_val)
501 new_val = max_beacon_val;
502
503 return new_val;
504}
505
948f5a2f 506int iwl_send_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
2c2f3b33
TW
507{
508 u64 tsf;
509 s32 interval_tm, rem;
2c2f3b33
TW
510 struct ieee80211_conf *conf = NULL;
511 u16 beacon_int;
246ed355 512 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
2c2f3b33
TW
513
514 conf = ieee80211_get_hw_conf(priv->hw);
515
948f5a2f
JB
516 lockdep_assert_held(&priv->mutex);
517
246ed355 518 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
948f5a2f 519
246ed355
JB
520 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
521 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
2c2f3b33 522
1dda6d28 523 beacon_int = vif->bss_conf.beacon_int;
2c2f3b33 524
1dda6d28 525 if (vif->type == NL80211_IFTYPE_ADHOC) {
2c2f3b33
TW
526 /* TODO: we need to get atim_window from upper stack
527 * for now we set to 0 */
246ed355 528 ctx->timing.atim_window = 0;
1dda6d28 529 } else {
246ed355 530 ctx->timing.atim_window = 0;
2c2f3b33
TW
531 }
532
533 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 534 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
246ed355 535 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
2c2f3b33
TW
536
537 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 538 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33 539 rem = do_div(tsf, interval_tm);
246ed355 540 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
2c2f3b33 541
2c2f3b33
TW
542 IWL_DEBUG_ASSOC(priv,
543 "beacon interval %d beacon timer %d beacon tim %d\n",
246ed355
JB
544 le16_to_cpu(ctx->timing.beacon_interval),
545 le32_to_cpu(ctx->timing.beacon_init_val),
546 le16_to_cpu(ctx->timing.atim_window));
948f5a2f 547
8f2d3d2a 548 return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
246ed355 549 sizeof(ctx->timing), &ctx->timing);
2c2f3b33 550}
948f5a2f 551EXPORT_SYMBOL(iwl_send_rxon_timing);
2c2f3b33 552
246ed355
JB
553void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
554 int hw_decrypt)
8ccde88a 555{
246ed355 556 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO
557
558 if (hw_decrypt)
559 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
560 else
561 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
562
563}
564EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
565
566/**
567 * iwl_check_rxon_cmd - validate RXON structure is valid
568 *
569 * NOTE: This is really only useful during development and can eventually
570 * be #ifdef'd out once the driver is stable and folks aren't actively
571 * making changes
572 */
246ed355 573int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
8ccde88a
SO
574{
575 int error = 0;
576 int counter = 1;
246ed355 577 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a
SO
578
579 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
580 error |= le32_to_cpu(rxon->flags &
581 (RXON_FLG_TGJ_NARROW_BAND_MSK |
582 RXON_FLG_RADAR_DETECT_MSK));
583 if (error)
584 IWL_WARN(priv, "check 24G fields %d | %d\n",
585 counter++, error);
586 } else {
587 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
588 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
589 if (error)
590 IWL_WARN(priv, "check 52 fields %d | %d\n",
591 counter++, error);
592 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
593 if (error)
594 IWL_WARN(priv, "check 52 CCK %d | %d\n",
595 counter++, error);
596 }
597 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
598 if (error)
599 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
600
601 /* make sure basic rates 6Mbps and 1Mbps are supported */
602 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
603 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
604 if (error)
605 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
606
607 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
608 if (error)
609 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
610
611 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
612 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
613 if (error)
614 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
615 counter++, error);
616
617 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
618 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
619 if (error)
620 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
621 counter++, error);
622
623 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
624 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
625 if (error)
626 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
627 counter++, error);
628
629 if (error)
630 IWL_WARN(priv, "Tuning to channel %d\n",
631 le16_to_cpu(rxon->channel));
632
633 if (error) {
634 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
635 return -1;
636 }
637 return 0;
638}
639EXPORT_SYMBOL(iwl_check_rxon_cmd);
640
641/**
642 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
643 * @priv: staging_rxon is compared to active_rxon
644 *
645 * If the RXON structure is changing enough to require a new tune,
646 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
647 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
648 */
246ed355
JB
649int iwl_full_rxon_required(struct iwl_priv *priv,
650 struct iwl_rxon_context *ctx)
8ccde88a 651{
246ed355
JB
652 const struct iwl_rxon_cmd *staging = &ctx->staging;
653 const struct iwl_rxon_cmd *active = &ctx->active;
654
655#define CHK(cond) \
656 if ((cond)) { \
657 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
658 return 1; \
659 }
660
661#define CHK_NEQ(c1, c2) \
662 if ((c1) != (c2)) { \
663 IWL_DEBUG_INFO(priv, "need full RXON - " \
664 #c1 " != " #c2 " - %d != %d\n", \
665 (c1), (c2)); \
666 return 1; \
667 }
8ccde88a
SO
668
669 /* These items are only settable from the full RXON command */
246ed355
JB
670 CHK(!iwl_is_associated_ctx(ctx));
671 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
672 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
673 CHK(compare_ether_addr(staging->wlap_bssid_addr,
674 active->wlap_bssid_addr));
675 CHK_NEQ(staging->dev_type, active->dev_type);
676 CHK_NEQ(staging->channel, active->channel);
677 CHK_NEQ(staging->air_propagation, active->air_propagation);
678 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
679 active->ofdm_ht_single_stream_basic_rates);
680 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
681 active->ofdm_ht_dual_stream_basic_rates);
682 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
683 active->ofdm_ht_triple_stream_basic_rates);
684 CHK_NEQ(staging->assoc_id, active->assoc_id);
8ccde88a
SO
685
686 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
687 * be updated with the RXON_ASSOC command -- however only some
688 * flag transitions are allowed using RXON_ASSOC */
689
690 /* Check if we are not switching bands */
246ed355
JB
691 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
692 active->flags & RXON_FLG_BAND_24G_MSK);
8ccde88a
SO
693
694 /* Check if we are switching association toggle */
246ed355
JB
695 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
696 active->filter_flags & RXON_FILTER_ASSOC_MSK);
697
698#undef CHK
699#undef CHK_NEQ
8ccde88a
SO
700
701 return 0;
702}
703EXPORT_SYMBOL(iwl_full_rxon_required);
704
705u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
706{
246ed355
JB
707#if !TODO
708 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
709#endif
4a02886b
JB
710 /*
711 * Assign the lowest rate -- should really get this from
712 * the beacon skb from mac80211.
713 */
246ed355 714 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
8ccde88a
SO
715 return IWL_RATE_1M_PLCP;
716 else
717 return IWL_RATE_6M_PLCP;
718}
719EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
720
246ed355
JB
721static void _iwl_set_rxon_ht(struct iwl_priv *priv,
722 struct iwl_ht_config *ht_conf,
723 struct iwl_rxon_context *ctx)
47c5196e 724{
246ed355 725 struct iwl_rxon_cmd *rxon = &ctx->staging;
47c5196e 726
fad95bf5 727 if (!ht_conf->is_ht) {
a2b0f02e 728 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 729 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 730 RXON_FLG_HT40_PROT_MSK |
42eb7c64 731 RXON_FLG_HT_PROT_MSK);
47c5196e 732 return;
42eb7c64 733 }
47c5196e 734
a2b0f02e
WYG
735 /* FIXME: if the definition of ht_protection changed, the "translation"
736 * will be needed for rxon->flags
737 */
fad95bf5 738 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG
739
740 /* Set up channel bandwidth:
7aafef1c 741 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG
742 /* clear the HT channel mode before set the mode */
743 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
744 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG
745 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
746 /* pure ht40 */
fad95bf5 747 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 748 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 749 /* Note: control channel is opposite of extension channel */
fad95bf5 750 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG
751 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
752 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
753 break;
754 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
755 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
756 break;
757 }
758 } else {
a2b0f02e 759 /* Note: control channel is opposite of extension channel */
fad95bf5 760 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG
761 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
762 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
763 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
764 break;
765 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
766 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
767 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
768 break;
769 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
770 default:
771 /* channel location only valid if in Mixed mode */
772 IWL_ERR(priv, "invalid extension channel offset\n");
773 break;
774 }
775 }
776 } else {
777 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW
778 }
779
45823531 780 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 781 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
47c5196e 782
02bb1bea 783 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 784 "extension channel offset 0x%x\n",
fad95bf5
JB
785 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
786 ht_conf->extension_chan_offset);
47c5196e 787}
246ed355
JB
788
789void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
790{
791 struct iwl_rxon_context *ctx;
792
793 for_each_context(priv, ctx)
794 _iwl_set_rxon_ht(priv, ht_conf, ctx);
795}
47c5196e
TW
796EXPORT_SYMBOL(iwl_set_rxon_ht);
797
9e5e6c32
TW
798#define IWL_NUM_RX_CHAINS_MULTIPLE 3
799#define IWL_NUM_RX_CHAINS_SINGLE 2
800#define IWL_NUM_IDLE_CHAINS_DUAL 2
801#define IWL_NUM_IDLE_CHAINS_SINGLE 1
802
2b396a12
JB
803/*
804 * Determine how many receiver/antenna chains to use.
805 *
806 * More provides better reception via diversity. Fewer saves power
807 * at the expense of throughput, but only when not in powersave to
808 * start with.
809 *
c7de35cd
RR
810 * MIMO (dual stream) requires at least 2, but works better with 3.
811 * This does not determine *which* chains to use, just how many.
812 */
28a6b07a 813static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 814{
da5dbb97
WYG
815 if (priv->cfg->advanced_bt_coexist && (priv->bt_full_concurrent ||
816 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
817 /*
818 * only use chain 'A' in bt high traffic load or
819 * full concurrency mode
820 */
bee008b7
WYG
821 return IWL_NUM_RX_CHAINS_SINGLE;
822 }
c7de35cd 823 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 824 if (is_single_rx_stream(priv))
9e5e6c32 825 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 826 else
9e5e6c32 827 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 828}
c7de35cd 829
2b396a12 830/*
3f3e0376
WYG
831 * When we are in power saving mode, unless device support spatial
832 * multiplexing power save, use the active count for rx chain count.
2b396a12 833 */
28a6b07a
TW
834static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
835{
ba37a3d0
JB
836 /* # Rx chains when idling, depending on SMPS mode */
837 switch (priv->current_ht_config.smps) {
838 case IEEE80211_SMPS_STATIC:
839 case IEEE80211_SMPS_DYNAMIC:
840 return IWL_NUM_IDLE_CHAINS_SINGLE;
841 case IEEE80211_SMPS_OFF:
842 return active_cnt;
c15d20c1 843 default:
ba37a3d0
JB
844 WARN(1, "invalid SMPS mode %d",
845 priv->current_ht_config.smps);
846 return active_cnt;
3f3e0376 847 }
c7de35cd
RR
848}
849
04816448
GE
850/* up to 4 chains */
851static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
852{
853 u8 res;
854 res = (chain_bitmap & BIT(0)) >> 0;
855 res += (chain_bitmap & BIT(1)) >> 1;
856 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 857 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE
858 return res;
859}
860
c7de35cd
RR
861/**
862 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
863 *
864 * Selects how many and which Rx receivers/antennas/chains to use.
865 * This should not be used for scan command ... it puts data in wrong place.
866 */
246ed355 867void iwl_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
c7de35cd 868{
28a6b07a
TW
869 bool is_single = is_single_rx_stream(priv);
870 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE
871 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
872 u32 active_chains;
28a6b07a 873 u16 rx_chain;
c7de35cd
RR
874
875 /* Tell uCode which antennas are actually connected.
876 * Before first association, we assume all antennas are connected.
877 * Just after first association, iwl_chain_noise_calibration()
878 * checks which antennas actually *are* connected. */
bee008b7 879 if (priv->chain_noise_data.active_chains)
04816448
GE
880 active_chains = priv->chain_noise_data.active_chains;
881 else
882 active_chains = priv->hw_params.valid_rx_ant;
883
da5dbb97
WYG
884 if (priv->cfg->advanced_bt_coexist && (priv->bt_full_concurrent ||
885 priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
886 /*
887 * only use chain 'A' in bt high traffic load or
888 * full concurrency mode
889 */
bee008b7
WYG
890 active_chains = first_antenna(active_chains);
891 }
892
04816448 893 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR
894
895 /* How many receivers should we use? */
28a6b07a
TW
896 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
897 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
898
28a6b07a 899
04816448
GE
900 /* correct rx chain count according hw settings
901 * and chain noise calibration
902 */
903 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
904 if (valid_rx_cnt < active_rx_cnt)
905 active_rx_cnt = valid_rx_cnt;
906
907 if (valid_rx_cnt < idle_rx_cnt)
908 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW
909
910 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
911 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
912
246ed355 913 ctx->staging.rx_chain = cpu_to_le16(rx_chain);
28a6b07a 914
9e5e6c32 915 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
246ed355 916 ctx->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
c7de35cd 917 else
246ed355 918 ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
c7de35cd 919
e1623446 920 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
246ed355 921 ctx->staging.rx_chain,
28a6b07a
TW
922 active_rx_cnt, idle_rx_cnt);
923
924 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
925 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR
926}
927EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f 928
246ed355 929/* Return valid, unused, channel for a passive scan to reset the RF */
14023641 930u8 iwl_get_single_channel_number(struct iwl_priv *priv,
246ed355 931 enum ieee80211_band band)
14023641
AK
932{
933 const struct iwl_channel_info *ch_info;
934 int i;
935 u8 channel = 0;
246ed355
JB
936 u8 min, max;
937 struct iwl_rxon_context *ctx;
14023641 938
14023641 939 if (band == IEEE80211_BAND_5GHZ) {
246ed355
JB
940 min = 14;
941 max = priv->channel_count;
14023641 942 } else {
246ed355
JB
943 min = 0;
944 max = 14;
945 }
946
947 for (i = min; i < max; i++) {
948 bool busy = false;
949
950 for_each_context(priv, ctx) {
951 busy = priv->channel_info[i].channel ==
952 le16_to_cpu(ctx->staging.channel);
953 if (busy)
954 break;
14023641 955 }
246ed355
JB
956
957 if (busy)
958 continue;
959
960 channel = priv->channel_info[i].channel;
961 ch_info = iwl_get_channel_info(priv, band, channel);
962 if (is_channel_valid(ch_info))
963 break;
14023641
AK
964 }
965
966 return channel;
967}
968EXPORT_SYMBOL(iwl_get_single_channel_number);
969
bf85ea4f 970/**
3edb5fd6
SZ
971 * iwl_set_rxon_channel - Set the band and channel values in staging RXON
972 * @ch: requested channel as a pointer to struct ieee80211_channel
bf85ea4f 973
bf85ea4f 974 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3edb5fd6 975 * in the staging RXON flag structure based on the ch->band
bf85ea4f 976 */
246ed355
JB
977int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
978 struct iwl_rxon_context *ctx)
bf85ea4f 979{
17e72782 980 enum ieee80211_band band = ch->band;
81e95430 981 u16 channel = ch->hw_value;
17e72782 982
246ed355 983 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
bf85ea4f
AK
984 (priv->band == band))
985 return 0;
986
246ed355 987 ctx->staging.channel = cpu_to_le16(channel);
bf85ea4f 988 if (band == IEEE80211_BAND_5GHZ)
246ed355 989 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
bf85ea4f 990 else
246ed355 991 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
bf85ea4f
AK
992
993 priv->band = band;
994
e1623446 995 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK
996
997 return 0;
998}
c7de35cd 999EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 1000
79d07325 1001void iwl_set_flags_for_band(struct iwl_priv *priv,
246ed355 1002 struct iwl_rxon_context *ctx,
79d07325
WYG
1003 enum ieee80211_band band,
1004 struct ieee80211_vif *vif)
8ccde88a
SO
1005{
1006 if (band == IEEE80211_BAND_5GHZ) {
246ed355 1007 ctx->staging.flags &=
8ccde88a
SO
1008 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1009 | RXON_FLG_CCK_MSK);
246ed355 1010 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a
SO
1011 } else {
1012 /* Copied from iwl_post_associate() */
c213d745 1013 if (vif && vif->bss_conf.use_short_slot)
246ed355 1014 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 1015 else
246ed355 1016 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
8ccde88a 1017
246ed355
JB
1018 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
1019 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
1020 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
8ccde88a
SO
1021 }
1022}
79d07325 1023EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO
1024
1025/*
1026 * initialize rxon structure with default values from eeprom
1027 */
1dda6d28
JB
1028void iwl_connection_init_rx_config(struct iwl_priv *priv,
1029 struct ieee80211_vif *vif)
8ccde88a
SO
1030{
1031 const struct iwl_channel_info *ch_info;
1dda6d28 1032 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
246ed355 1033 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1dda6d28 1034
246ed355 1035 if (vif) {
1dda6d28 1036 type = vif->type;
246ed355
JB
1037 ctx = iwl_rxon_ctx_from_vif(vif);
1038 }
8ccde88a 1039
246ed355 1040 memset(&ctx->staging, 0, sizeof(ctx->staging));
8ccde88a 1041
1dda6d28 1042 switch (type) {
8ccde88a 1043 case NL80211_IFTYPE_AP:
246ed355 1044 ctx->staging.dev_type = RXON_DEV_TYPE_AP;
8ccde88a
SO
1045 break;
1046
1047 case NL80211_IFTYPE_STATION:
246ed355
JB
1048 ctx->staging.dev_type = RXON_DEV_TYPE_ESS;
1049 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
8ccde88a
SO
1050 break;
1051
1052 case NL80211_IFTYPE_ADHOC:
246ed355
JB
1053 ctx->staging.dev_type = RXON_DEV_TYPE_IBSS;
1054 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1055 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
8ccde88a
SO
1056 RXON_FILTER_ACCEPT_GRP_MSK;
1057 break;
1058
8ccde88a 1059 default:
1dda6d28 1060 IWL_ERR(priv, "Unsupported interface type %d\n", type);
8ccde88a
SO
1061 break;
1062 }
1063
1064#if 0
1065 /* TODO: Figure out when short_preamble would be set and cache from
1066 * that */
1067 if (!hw_to_local(priv->hw)->short_preamble)
246ed355 1068 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a 1069 else
246ed355 1070 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
8ccde88a
SO
1071#endif
1072
1073 ch_info = iwl_get_channel_info(priv, priv->band,
246ed355 1074 le16_to_cpu(ctx->active.channel));
8ccde88a
SO
1075
1076 if (!ch_info)
1077 ch_info = &priv->channel_info[0];
1078
246ed355 1079 ctx->staging.channel = cpu_to_le16(ch_info->channel);
8ccde88a
SO
1080 priv->band = ch_info->band;
1081
246ed355 1082 iwl_set_flags_for_band(priv, ctx, priv->band, vif);
8ccde88a 1083
246ed355 1084 ctx->staging.ofdm_basic_rates =
8ccde88a 1085 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
246ed355 1086 ctx->staging.cck_basic_rates =
8ccde88a
SO
1087 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1088
a2b0f02e 1089 /* clear both MIX and PURE40 mode flag */
246ed355 1090 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
a2b0f02e 1091 RXON_FLG_CHANNEL_MODE_PURE_40);
7684c408 1092 if (vif)
246ed355 1093 memcpy(ctx->staging.node_addr, vif->addr, ETH_ALEN);
7684c408 1094
246ed355
JB
1095 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
1096 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
1097 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO
1098}
1099EXPORT_SYMBOL(iwl_connection_init_rx_config);
1100
79d07325 1101void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO
1102{
1103 const struct ieee80211_supported_band *hw = NULL;
1104 struct ieee80211_rate *rate;
246ed355 1105 struct iwl_rxon_context *ctx;
8ccde88a
SO
1106 int i;
1107
1108 hw = iwl_get_hw_mode(priv, priv->band);
1109 if (!hw) {
1110 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1111 return;
1112 }
1113
1114 priv->active_rate = 0;
8ccde88a
SO
1115
1116 for (i = 0; i < hw->n_bitrates; i++) {
1117 rate = &(hw->bitrates[i]);
5027309b 1118 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO
1119 priv->active_rate |= (1 << rate->hw_value);
1120 }
1121
4a02886b 1122 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1123
246ed355
JB
1124 for_each_context(priv, ctx) {
1125 ctx->staging.cck_basic_rates =
1126 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
4a02886b 1127
246ed355
JB
1128 ctx->staging.ofdm_basic_rates =
1129 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1130 }
8ccde88a 1131}
79d07325
WYG
1132EXPORT_SYMBOL(iwl_set_rate);
1133
1134void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
1135{
8bd413e6
JB
1136 /*
1137 * MULTI-FIXME
1138 * See iwl_mac_channel_switch.
1139 */
1140 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1141
79d07325
WYG
1142 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1143 return;
1144
1145 if (priv->switch_rxon.switch_in_progress) {
8bd413e6 1146 ieee80211_chswitch_done(ctx->vif, is_success);
79d07325
WYG
1147 mutex_lock(&priv->mutex);
1148 priv->switch_rxon.switch_in_progress = false;
1149 mutex_unlock(&priv->mutex);
1150 }
1151}
1152EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO
1153
1154void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1155{
2f301227 1156 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a 1157 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
8bd413e6
JB
1158 /*
1159 * MULTI-FIXME
1160 * See iwl_mac_channel_switch.
1161 */
246ed355 1162 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
246ed355 1163 struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
4a56e965 1164
0924e519
WYG
1165 if (priv->switch_rxon.switch_in_progress) {
1166 if (!le32_to_cpu(csa->status) &&
1167 (csa->channel == priv->switch_rxon.channel)) {
1168 rxon->channel = csa->channel;
246ed355 1169 ctx->staging.channel = csa->channel;
0924e519
WYG
1170 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1171 le16_to_cpu(csa->channel));
79d07325
WYG
1172 iwl_chswitch_done(priv, true);
1173 } else {
0924e519
WYG
1174 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1175 le16_to_cpu(csa->channel));
79d07325
WYG
1176 iwl_chswitch_done(priv, false);
1177 }
0924e519 1178 }
8ccde88a
SO
1179}
1180EXPORT_SYMBOL(iwl_rx_csa);
1181
1182#ifdef CONFIG_IWLWIFI_DEBUG
246ed355
JB
1183void iwl_print_rx_config_cmd(struct iwl_priv *priv,
1184 struct iwl_rxon_context *ctx)
8ccde88a 1185{
246ed355 1186 struct iwl_rxon_cmd *rxon = &ctx->staging;
8ccde88a 1187
e1623446 1188 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1189 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW
1190 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1191 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1192 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1193 le32_to_cpu(rxon->filter_flags));
e1623446
TW
1194 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1195 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1196 rxon->ofdm_basic_rates);
e1623446
TW
1197 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1198 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1199 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1200 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1201}
a643565e 1202EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1203#endif
8ccde88a
SO
1204/**
1205 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1206 */
1207void iwl_irq_handle_error(struct iwl_priv *priv)
1208{
1209 /* Set the FW error flag -- cleared on iwl_down */
1210 set_bit(STATUS_FW_ERROR, &priv->status);
1211
1212 /* Cancel currently queued command. */
1213 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1214
459bc732
SZ
1215 IWL_ERR(priv, "Loaded firmware version: %s\n",
1216 priv->hw->wiphy->fw_version);
1217
3a3ff72c 1218 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG
1219 if (priv->cfg->ops->lib->dump_csr)
1220 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG
1221 if (priv->cfg->ops->lib->dump_fh)
1222 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1223 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1224#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1225 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
246ed355
JB
1226 iwl_print_rx_config_cmd(priv,
1227 &priv->contexts[IWL_RXON_CTX_BSS]);
8ccde88a
SO
1228#endif
1229
1230 wake_up_interruptible(&priv->wait_command_queue);
1231
1232 /* Keep the restart process from trying to send host
1233 * commands by clearing the INIT status bit */
1234 clear_bit(STATUS_READY, &priv->status);
1235
1236 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1237 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO
1238 "Restarting adapter due to uCode error.\n");
1239
8ccde88a
SO
1240 if (priv->cfg->mod_params->restart_fw)
1241 queue_work(priv->workqueue, &priv->restart);
1242 }
1243}
1244EXPORT_SYMBOL(iwl_irq_handle_error);
1245
f8e200de 1246static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1247{
5220af0c 1248 int ret = 0;
d68b603c 1249
5220af0c 1250 /* stop device's busmaster DMA activity */
d68b603c
AK
1251 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1252
5220af0c 1253 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1254 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC
1255 if (ret)
1256 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1257
d68b603c
AK
1258 IWL_DEBUG_INFO(priv, "stop master\n");
1259
5220af0c 1260 return ret;
d68b603c 1261}
d68b603c
AK
1262
1263void iwl_apm_stop(struct iwl_priv *priv)
1264{
fadb3582
BC
1265 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1266
5220af0c 1267 /* Stop device's DMA activity */
d68b603c
AK
1268 iwl_apm_stop_master(priv);
1269
5220af0c 1270 /* Reset the entire device */
d68b603c
AK
1271 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1272
1273 udelay(10);
5220af0c
BC
1274
1275 /*
1276 * Clear "initialization complete" bit to move adapter from
1277 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1278 */
d68b603c 1279 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK
1280}
1281EXPORT_SYMBOL(iwl_apm_stop);
1282
fadb3582
BC
1283
1284/*
1285 * Start up NIC's basic functionality after it has been reset
1286 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1287 * NOTE: This does not load uCode nor start the embedded processor
1288 */
1289int iwl_apm_init(struct iwl_priv *priv)
1290{
1291 int ret = 0;
1292 u16 lctl;
1293
1294 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1295
1296 /*
1297 * Use "set_bit" below rather than "write", to preserve any hardware
1298 * bits already set by default after reset.
1299 */
1300
1301 /* Disable L0S exit timer (platform NMI Work/Around) */
1302 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1303 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1304
1305 /*
1306 * Disable L0s without affecting L1;
1307 * don't wait for ICH L0s (ICH bug W/A)
1308 */
1309 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1310 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1311
1312 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1313 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1314
1315 /*
1316 * Enable HAP INTA (interrupt from management bus) to
1317 * wake device's PCI Express link L1a -> L0s
1318 * NOTE: This is no-op for 3945 (non-existant bit)
1319 */
1320 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1321 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1322
1323 /*
a6c5c731
BC
1324 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1325 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1326 * If so (likely), disable L0S, so device moves directly L0->L1;
1327 * costs negligible amount of power savings.
1328 * If not (unlikely), enable L0S, so there is at least some
1329 * power savings, even without L1.
fadb3582
BC
1330 */
1331 if (priv->cfg->set_l0s) {
1332 lctl = iwl_pcie_link_ctl(priv);
1333 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1334 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1335 /* L1-ASPM enabled; disable(!) L0S */
1336 iwl_set_bit(priv, CSR_GIO_REG,
1337 CSR_GIO_REG_VAL_L0S_ENABLED);
1338 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1339 } else {
1340 /* L1-ASPM disabled; enable(!) L0S */
1341 iwl_clear_bit(priv, CSR_GIO_REG,
1342 CSR_GIO_REG_VAL_L0S_ENABLED);
1343 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1344 }
1345 }
1346
1347 /* Configure analog phase-lock-loop before activating to D0A */
1348 if (priv->cfg->pll_cfg_val)
1349 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1350
1351 /*
1352 * Set "initialization complete" bit to move adapter from
1353 * D0U* --> D0A* (powered-up active) state.
1354 */
1355 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1356
1357 /*
1358 * Wait for clock stabilization; once stabilized, access to
1359 * device-internal resources is supported, e.g. iwl_write_prph()
1360 * and accesses to uCode SRAM.
1361 */
1362 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1363 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1364 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1365 if (ret < 0) {
1366 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1367 goto out;
1368 }
1369
1370 /*
1371 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1372 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1373 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1374 * and don't need BSM to restore data after power-saving sleep.
1375 *
1376 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1377 * do not disable clocks. This preserves any hardware bits already
1378 * set by default in "CLK_CTRL_REG" after reset.
1379 */
1380 if (priv->cfg->use_bsm)
1381 iwl_write_prph(priv, APMG_CLK_EN_REG,
1382 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1383 else
1384 iwl_write_prph(priv, APMG_CLK_EN_REG,
1385 APMG_CLK_VAL_DMA_CLK_RQT);
1386 udelay(20);
1387
1388 /* Disable L1-Active */
1389 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1390 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1391
1392out:
1393 return ret;
1394}
1395EXPORT_SYMBOL(iwl_apm_init);
1396
1397
630fe9b6
TW
1398int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1399{
1400 int ret = 0;
5eadd94b
WYG
1401 s8 prev_tx_power = priv->tx_power_user_lmt;
1402
b744cb79
WYG
1403 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1404 IWL_WARN(priv,
1405 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1406 tx_power,
b744cb79 1407 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW
1408 return -EINVAL;
1409 }
1410
dc1b0973 1411 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG
1412 IWL_WARN(priv,
1413 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1414 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW
1415 return -EINVAL;
1416 }
1417
1418 if (priv->tx_power_user_lmt != tx_power)
1419 force = true;
1420
019fb97d 1421 /* if nic is not up don't send command */
5eadd94b
WYG
1422 if (iwl_is_ready_rf(priv)) {
1423 priv->tx_power_user_lmt = tx_power;
1424 if (force && priv->cfg->ops->lib->send_tx_power)
1425 ret = priv->cfg->ops->lib->send_tx_power(priv);
1426 else if (!priv->cfg->ops->lib->send_tx_power)
1427 ret = -EOPNOTSUPP;
1428 /*
1429 * if fail to set tx_power, restore the orig. tx power
1430 */
1431 if (ret)
1432 priv->tx_power_user_lmt = prev_tx_power;
1433 }
630fe9b6 1434
5eadd94b
WYG
1435 /*
1436 * Even this is an async host command, the command
1437 * will always report success from uCode
1438 * So once driver can placing the command into the queue
1439 * successfully, driver can use priv->tx_power_user_lmt
1440 * to reflect the current tx power
1441 */
630fe9b6
TW
1442 return ret;
1443}
1444EXPORT_SYMBOL(iwl_set_tx_power);
1445
ef850d7c 1446irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK
1447{
1448 struct iwl_priv *priv = data;
1449 u32 inta, inta_mask;
1450 u32 inta_fh;
6e8cc38d 1451 unsigned long flags;
f17d08a6
AK
1452 if (!priv)
1453 return IRQ_NONE;
1454
6e8cc38d 1455 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK
1456
1457 /* Disable (but don't clear!) interrupts here to avoid
1458 * back-to-back ISRs and sporadic interrupts from our NIC.
1459 * If we have something to service, the tasklet will re-enable ints.
1460 * If we *don't* have something, we'll re-enable before leaving here. */
1461 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1462 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1463
1464 /* Discover which interrupts are active/pending */
1465 inta = iwl_read32(priv, CSR_INT);
1466 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1467
1468 /* Ignore interrupt if there's nothing in NIC to service.
1469 * This may be due to IRQ shared with another device,
1470 * or due to sporadic interrupts thrown from our NIC. */
1471 if (!inta && !inta_fh) {
1472 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1473 goto none;
1474 }
1475
1476 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1477 /* Hardware disappeared. It might have already raised
1478 * an interrupt */
1479 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1480 goto unplugged;
1481 }
1482
1483 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1484 inta, inta_mask, inta_fh);
1485
1486 inta &= ~CSR_INT_BIT_SCD;
1487
1488 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1489 if (likely(inta || inta_fh))
1490 tasklet_schedule(&priv->irq_tasklet);
1491
1492 unplugged:
6e8cc38d 1493 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK
1494 return IRQ_HANDLED;
1495
1496 none:
1497 /* re-enable interrupts here since we don't have anything to service. */
1498 /* only Re-enable if diabled by irq */
1499 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1500 iwl_enable_interrupts(priv);
6e8cc38d 1501 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK
1502 return IRQ_NONE;
1503}
ef850d7c 1504EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1505
65b52bde 1506void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO
1507{
1508 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG
1509 .lead_time = BT_LEAD_TIME_DEF,
1510 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO
1511 .kill_ack_mask = 0,
1512 .kill_cts_mask = 0,
1513 };
1514
06702a73
WYG
1515 if (!bt_coex_active)
1516 bt_cmd.flags = BT_COEX_DISABLE;
1517 else
1518 bt_cmd.flags = BT_COEX_ENABLE;
1519
1520 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1521 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1522
65b52bde
JB
1523 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1524 sizeof(struct iwl_bt_cmd), &bt_cmd))
1525 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO
1526}
1527EXPORT_SYMBOL(iwl_send_bt_config);
1528
ef8d5529 1529int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1530{
ef8d5529
WYG
1531 struct iwl_statistics_cmd statistics_cmd = {
1532 .configuration_flags =
1533 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1534 };
ef8d5529
WYG
1535
1536 if (flags & CMD_ASYNC)
1537 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1538 sizeof(struct iwl_statistics_cmd),
1539 &statistics_cmd, NULL);
1540 else
1541 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1542 sizeof(struct iwl_statistics_cmd),
1543 &statistics_cmd);
49ea8596
EG
1544}
1545EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1546
030f05ed
AK
1547void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1548 struct iwl_rx_mem_buffer *rxb)
1549{
1550#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1551 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK
1552 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1553 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1554 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1555#endif
1556}
1557EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1558
1559void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1560 struct iwl_rx_mem_buffer *rxb)
1561{
2f301227 1562 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1563 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1564 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH
1565 "notification for %s:\n", len,
1566 get_cmd_string(pkt->hdr.cmd));
1567 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK
1568}
1569EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK
1570
1571void iwl_rx_reply_error(struct iwl_priv *priv,
1572 struct iwl_rx_mem_buffer *rxb)
1573{
2f301227 1574 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK
1575
1576 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1577 "seq 0x%04X ser 0x%08X\n",
1578 le32_to_cpu(pkt->u.err_resp.error_type),
1579 get_cmd_string(pkt->u.err_resp.cmd_id),
1580 pkt->u.err_resp.cmd_id,
1581 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1582 le32_to_cpu(pkt->u.err_resp.error_info));
1583}
1584EXPORT_SYMBOL(iwl_rx_reply_error);
1585
a83b9141
WYG
1586void iwl_clear_isr_stats(struct iwl_priv *priv)
1587{
1588 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1589}
a83b9141 1590
488829f1
AK
1591int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1592 const struct ieee80211_tx_queue_params *params)
1593{
1594 struct iwl_priv *priv = hw->priv;
8dfdb9d5 1595 struct iwl_rxon_context *ctx;
488829f1
AK
1596 unsigned long flags;
1597 int q;
1598
1599 IWL_DEBUG_MAC80211(priv, "enter\n");
1600
1601 if (!iwl_is_ready_rf(priv)) {
1602 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1603 return -EIO;
1604 }
1605
1606 if (queue >= AC_NUM) {
1607 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1608 return 0;
1609 }
1610
1611 q = AC_NUM - 1 - queue;
1612
1613 spin_lock_irqsave(&priv->lock, flags);
1614
8dfdb9d5
JB
1615 /*
1616 * MULTI-FIXME
1617 * This may need to be done per interface in nl80211/cfg80211/mac80211.
1618 */
1619 for_each_context(priv, ctx) {
1620 ctx->qos_data.def_qos_parm.ac[q].cw_min =
1621 cpu_to_le16(params->cw_min);
1622 ctx->qos_data.def_qos_parm.ac[q].cw_max =
1623 cpu_to_le16(params->cw_max);
1624 ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1625 ctx->qos_data.def_qos_parm.ac[q].edca_txop =
1626 cpu_to_le16((params->txop * 32));
1627
1628 ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
1629 }
488829f1
AK
1630
1631 spin_unlock_irqrestore(&priv->lock, flags);
1632
1633 IWL_DEBUG_MAC80211(priv, "leave\n");
1634 return 0;
1635}
1636EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b 1637
a85d7cca
JB
1638int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
1639{
1640 struct iwl_priv *priv = hw->priv;
1641
1642 return priv->ibss_manager == IWL_IBSS_MANAGER;
1643}
1644EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon);
1645
5bbe233b 1646static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1647 struct ieee80211_vif *vif)
5bbe233b 1648{
fad95bf5 1649 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1650 struct ieee80211_sta *sta;
ca3c1f59 1651 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5bbe233b 1652
91dd6c27 1653 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1654
fad95bf5 1655 if (!ht_conf->is_ht)
5bbe233b
AK
1656 return;
1657
fad95bf5 1658 ht_conf->ht_protection =
9ed6bcce 1659 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1660 ht_conf->non_GF_STA_present =
9ed6bcce 1661 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1662
02bb1bea
JB
1663 ht_conf->single_chain_sufficient = false;
1664
ca3c1f59 1665 switch (vif->type) {
02bb1bea
JB
1666 case NL80211_IFTYPE_STATION:
1667 rcu_read_lock();
ca3c1f59 1668 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB
1669 if (sta) {
1670 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1671 int maxstreams;
1672
1673 maxstreams = (ht_cap->mcs.tx_params &
1674 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1675 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1676 maxstreams += 1;
1677
1678 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1679 (ht_cap->mcs.rx_mask[2] == 0))
1680 ht_conf->single_chain_sufficient = true;
1681 if (maxstreams <= 1)
1682 ht_conf->single_chain_sufficient = true;
1683 } else {
1684 /*
1685 * If at all, this can only happen through a race
1686 * when the AP disconnects us while we're still
1687 * setting up the connection, in that case mac80211
1688 * will soon tell us about that.
1689 */
1690 ht_conf->single_chain_sufficient = true;
1691 }
1692 rcu_read_unlock();
1693 break;
1694 case NL80211_IFTYPE_ADHOC:
1695 ht_conf->single_chain_sufficient = true;
1696 break;
1697 default:
1698 break;
1699 }
5bbe233b
AK
1700
1701 IWL_DEBUG_MAC80211(priv, "leave\n");
1702}
1703
246ed355
JB
1704static inline void iwl_set_no_assoc(struct iwl_priv *priv,
1705 struct ieee80211_vif *vif)
c91c3efc 1706{
246ed355
JB
1707 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1708
c91c3efc
AK
1709 iwl_led_disassociate(priv);
1710 /*
1711 * inform the ucode that there is no longer an
1712 * association and that no more packets should be
1713 * sent
1714 */
246ed355
JB
1715 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1716 ctx->staging.assoc_id = 0;
1717 iwlcore_commit_rxon(priv, ctx);
c91c3efc
AK
1718}
1719
0bc5774f
JB
1720static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1721{
1722 struct iwl_priv *priv = hw->priv;
1723 unsigned long flags;
1724 __le64 timestamp;
1725
1726 IWL_DEBUG_MAC80211(priv, "enter\n");
1727
1728 if (!iwl_is_ready_rf(priv)) {
1729 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1730 return -EIO;
1731 }
1732
1733 spin_lock_irqsave(&priv->lock, flags);
1734
1735 if (priv->ibss_beacon)
1736 dev_kfree_skb(priv->ibss_beacon);
1737
1738 priv->ibss_beacon = skb;
1739
1740 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1741 priv->timestamp = le64_to_cpu(timestamp);
1742
1743 IWL_DEBUG_MAC80211(priv, "leave\n");
1744 spin_unlock_irqrestore(&priv->lock, flags);
1745
8bd413e6
JB
1746#warning "use beacon context?"
1747 priv->cfg->ops->lib->post_associate(
1748 priv, priv->contexts[IWL_RXON_CTX_BSS].vif);
0bc5774f
JB
1749
1750 return 0;
1751}
1752
5bbe233b 1753void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB
1754 struct ieee80211_vif *vif,
1755 struct ieee80211_bss_conf *bss_conf,
1756 u32 changes)
5bbe233b
AK
1757{
1758 struct iwl_priv *priv = hw->priv;
246ed355 1759 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
3a650292 1760 int ret;
5bbe233b
AK
1761
1762 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1763
2d0ddec5
JB
1764 if (!iwl_is_alive(priv))
1765 return;
1766
1767 mutex_lock(&priv->mutex);
1768
4ced3f74
JB
1769 if (changes & BSS_CHANGED_QOS) {
1770 unsigned long flags;
1771
1772 spin_lock_irqsave(&priv->lock, flags);
8dfdb9d5
JB
1773 ctx->qos_data.qos_active = bss_conf->qos;
1774 iwl_update_qos(priv, ctx);
4ced3f74
JB
1775 spin_unlock_irqrestore(&priv->lock, flags);
1776 }
1777
92445c95 1778 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB
1779 dev_kfree_skb(priv->ibss_beacon);
1780 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1781 }
1782
d7129e19 1783 if (changes & BSS_CHANGED_BEACON_INT) {
d7129e19
JB
1784 /* TODO: in AP mode, do something to make this take effect */
1785 }
1786
1787 if (changes & BSS_CHANGED_BSSID) {
1788 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1789
1790 /*
1791 * If there is currently a HW scan going on in the
1792 * background then we need to cancel it else the RXON
1793 * below/in post_associate will fail.
1794 */
2d0ddec5 1795 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1796 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB
1797 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1798 mutex_unlock(&priv->mutex);
1799 return;
1800 }
2d0ddec5 1801
d7129e19 1802 /* mac80211 only sets assoc when in STATION mode */
92445c95 1803 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
246ed355 1804 memcpy(ctx->staging.bssid_addr,
d7129e19 1805 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1806
d7129e19
JB
1807 /* currently needed in a few places */
1808 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1809 } else {
246ed355 1810 ctx->staging.filter_flags &=
d7129e19 1811 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1812 }
d7129e19 1813
2d0ddec5
JB
1814 }
1815
d7129e19
JB
1816 /*
1817 * This needs to be after setting the BSSID in case
1818 * mac80211 decides to do both changes at once because
1819 * it will invoke post_associate.
1820 */
92445c95 1821 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB
1822 changes & BSS_CHANGED_BEACON) {
1823 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1824
1825 if (beacon)
1826 iwl_mac_beacon_update(hw, beacon);
1827 }
1828
5bbe233b
AK
1829 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1830 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1831 bss_conf->use_short_preamble);
1832 if (bss_conf->use_short_preamble)
246ed355 1833 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5bbe233b 1834 else
246ed355 1835 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5bbe233b
AK
1836 }
1837
1838 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1839 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1840 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
246ed355 1841 ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
5bbe233b 1842 else
246ed355 1843 ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
94597ab2 1844 if (bss_conf->use_cts_prot)
246ed355 1845 ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
94597ab2 1846 else
246ed355 1847 ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
5bbe233b
AK
1848 }
1849
d7129e19
JB
1850 if (changes & BSS_CHANGED_BASIC_RATES) {
1851 /* XXX use this information
1852 *
1853 * To do that, remove code from iwl_set_rate() and put something
1854 * like this here:
1855 *
1856 if (A-band)
246ed355 1857 ctx->staging.ofdm_basic_rates =
d7129e19
JB
1858 bss_conf->basic_rates;
1859 else
246ed355 1860 ctx->staging.ofdm_basic_rates =
d7129e19 1861 bss_conf->basic_rates >> 4;
246ed355 1862 ctx->staging.cck_basic_rates =
d7129e19
JB
1863 bss_conf->basic_rates & 0xF;
1864 */
1865 }
1866
5bbe233b 1867 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1868 iwl_ht_conf(priv, vif);
45823531
AK
1869
1870 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1871 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
5bbe233b
AK
1872 }
1873
1874 if (changes & BSS_CHANGED_ASSOC) {
1875 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1876 if (bss_conf->assoc) {
5bbe233b 1877 priv->timestamp = bss_conf->timestamp;
5bbe233b 1878
e932a609
JB
1879 iwl_led_associate(priv);
1880
d7129e19 1881 if (!iwl_is_rfkill(priv))
1dda6d28 1882 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc 1883 } else
246ed355 1884 iwl_set_no_assoc(priv, vif);
d7129e19
JB
1885 }
1886
246ed355 1887 if (changes && iwl_is_associated_ctx(ctx) && bss_conf->aid) {
d7129e19
JB
1888 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1889 changes);
246ed355 1890 ret = iwl_send_rxon_assoc(priv, ctx);
d7129e19
JB
1891 if (!ret) {
1892 /* Sync active_rxon with latest change. */
246ed355
JB
1893 memcpy((void *)&ctx->active,
1894 &ctx->staging,
d7129e19 1895 sizeof(struct iwl_rxon_cmd));
5bbe233b 1896 }
5bbe233b 1897 }
d7129e19 1898
c91c3efc
AK
1899 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1900 if (vif->bss_conf.enable_beacon) {
246ed355 1901 memcpy(ctx->staging.bssid_addr,
c91c3efc
AK
1902 bss_conf->bssid, ETH_ALEN);
1903 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1904 iwlcore_config_ap(priv, vif);
c91c3efc 1905 } else
246ed355 1906 iwl_set_no_assoc(priv, vif);
f513dfff
DH
1907 }
1908
1fa61b2e
JB
1909 if (changes & BSS_CHANGED_IBSS) {
1910 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1911 bss_conf->ibss_joined);
1912 if (ret)
1913 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1914 bss_conf->ibss_joined ? "add" : "remove",
1915 bss_conf->bssid);
1916 }
1917
d7129e19
JB
1918 mutex_unlock(&priv->mutex);
1919
2d0ddec5 1920 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK
1921}
1922EXPORT_SYMBOL(iwl_bss_info_changed);
1923
b55e75ed 1924static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1925{
246ed355
JB
1926 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1927
1dda6d28 1928 iwl_connection_init_rx_config(priv, vif);
727882d6
AK
1929
1930 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355 1931 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
727882d6 1932
246ed355 1933 return iwlcore_commit_rxon(priv, ctx);
727882d6 1934}
727882d6 1935
b55e75ed 1936int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK
1937{
1938 struct iwl_priv *priv = hw->priv;
246ed355 1939 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
8bd413e6 1940 struct iwl_rxon_context *ctx;
47e28f41 1941 int err = 0;
cbb6ab94 1942
3779db10
JB
1943 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
1944 vif->type, vif->addr);
cbb6ab94 1945
47e28f41
JB
1946 mutex_lock(&priv->mutex);
1947
8bd413e6
JB
1948 /* For now always use this context. */
1949 ctx = &priv->contexts[IWL_RXON_CTX_BSS];
1950
1951 vif_priv->ctx = ctx;
246ed355 1952
b55e75ed
JB
1953 if (WARN_ON(!iwl_is_ready_rf(priv))) {
1954 err = -EINVAL;
1955 goto out;
1956 }
1957
8bd413e6 1958 if (ctx->vif) {
cbb6ab94 1959 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB
1960 err = -EOPNOTSUPP;
1961 goto out;
cbb6ab94
AK
1962 }
1963
8bd413e6 1964 ctx->vif = vif;
1ed32e4f 1965 priv->iw_mode = vif->type;
cbb6ab94 1966
b55e75ed
JB
1967 err = iwl_set_mode(priv, vif);
1968 if (err)
1969 goto out_err;
7e246191 1970
59079949
JB
1971 if (priv->cfg->advanced_bt_coexist &&
1972 vif->type == NL80211_IFTYPE_ADHOC) {
1973 /*
1974 * pretend to have high BT traffic as long as we
1975 * are operating in IBSS mode, as this will cause
1976 * the rate scaling etc. to behave as intended.
1977 */
1978 priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
1979 }
1980
b55e75ed 1981 goto out;
cbb6ab94 1982
b55e75ed 1983 out_err:
8bd413e6 1984 ctx->vif = NULL;
b55e75ed 1985 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1986 out:
cbb6ab94
AK
1987 mutex_unlock(&priv->mutex);
1988
1989 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1990 return err;
cbb6ab94
AK
1991}
1992EXPORT_SYMBOL(iwl_mac_add_interface);
1993
d8052319 1994void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 1995 struct ieee80211_vif *vif)
d8052319
AK
1996{
1997 struct iwl_priv *priv = hw->priv;
246ed355 1998 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
02f5ba5b 1999 bool scan_completed = false;
d8052319
AK
2000
2001 IWL_DEBUG_MAC80211(priv, "enter\n");
2002
2003 mutex_lock(&priv->mutex);
2004
2005 if (iwl_is_ready_rf(priv)) {
2006 iwl_scan_cancel_timeout(priv, 100);
246ed355
JB
2007 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2008 iwlcore_commit_rxon(priv, ctx);
d8052319 2009 }
8bd413e6
JB
2010
2011 if (priv->scan_vif == vif) {
2012 scan_completed = true;
2013 priv->scan_vif = NULL;
2014 priv->scan_request = NULL;
d8052319 2015 }
59079949
JB
2016
2017 /*
2018 * When removing the IBSS interface, overwrite the
2019 * BT traffic load with the stored one from the last
2020 * notification, if any. If this is a device that
2021 * doesn't implement this, this has no effect since
2022 * both values are the same and zero.
2023 */
2024 if (vif->type == NL80211_IFTYPE_ADHOC)
2025 priv->bt_traffic_load = priv->notif_bt_traffic_load;
2026
8bd413e6
JB
2027 WARN_ON(ctx->vif != vif);
2028 ctx->vif = NULL;
2029 memset(priv->bssid, 0, ETH_ALEN);
d8052319
AK
2030 mutex_unlock(&priv->mutex);
2031
02f5ba5b
JB
2032 if (scan_completed)
2033 ieee80211_scan_completed(priv->hw, true);
2034
d8052319
AK
2035 IWL_DEBUG_MAC80211(priv, "leave\n");
2036
2037}
2038EXPORT_SYMBOL(iwl_mac_remove_interface);
2039
4808368d
AK
2040/**
2041 * iwl_mac_config - mac80211 config callback
4808368d
AK
2042 */
2043int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2044{
2045 struct iwl_priv *priv = hw->priv;
2046 const struct iwl_channel_info *ch_info;
2047 struct ieee80211_conf *conf = &hw->conf;
aa2dc6b5 2048 struct ieee80211_channel *channel = conf->channel;
fad95bf5 2049 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
246ed355 2050 struct iwl_rxon_context *ctx;
4808368d
AK
2051 unsigned long flags = 0;
2052 int ret = 0;
2053 u16 ch;
2054 int scan_active = 0;
2055
2056 mutex_lock(&priv->mutex);
2057
4808368d 2058 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
aa2dc6b5 2059 channel->hw_value, changed);
4808368d
AK
2060
2061 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2062 test_bit(STATUS_SCANNING, &priv->status))) {
2063 scan_active = 1;
2064 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2065 }
2066
ba37a3d0
JB
2067 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2068 IEEE80211_CONF_CHANGE_CHANNEL)) {
2069 /* mac80211 uses static for non-HT which is what we want */
2070 priv->current_ht_config.smps = conf->smps_mode;
2071
2072 /*
2073 * Recalculate chain counts.
2074 *
2075 * If monitor mode is enabled then mac80211 will
2076 * set up the SM PS mode to OFF if an HT channel is
2077 * configured.
2078 */
2079 if (priv->cfg->ops->hcmd->set_rxon_chain)
246ed355
JB
2080 for_each_context(priv, ctx)
2081 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
ba37a3d0 2082 }
4808368d
AK
2083
2084 /* during scanning mac80211 will delay channel setting until
2085 * scan finish with changed = 0
2086 */
2087 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2088 if (scan_active)
2089 goto set_ch_out;
2090
aa2dc6b5
SZ
2091 ch = channel->hw_value;
2092 ch_info = iwl_get_channel_info(priv, channel->band, ch);
4808368d
AK
2093 if (!is_channel_valid(ch_info)) {
2094 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2095 ret = -EINVAL;
2096 goto set_ch_out;
2097 }
2098
4808368d
AK
2099 spin_lock_irqsave(&priv->lock, flags);
2100
28bd723b
DH
2101 /* Configure HT40 channels */
2102 ht_conf->is_ht = conf_is_ht(conf);
2103 if (ht_conf->is_ht) {
2104 if (conf_is_ht40_minus(conf)) {
2105 ht_conf->extension_chan_offset =
2106 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2107 ht_conf->is_40mhz = true;
28bd723b
DH
2108 } else if (conf_is_ht40_plus(conf)) {
2109 ht_conf->extension_chan_offset =
2110 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2111 ht_conf->is_40mhz = true;
28bd723b
DH
2112 } else {
2113 ht_conf->extension_chan_offset =
2114 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2115 ht_conf->is_40mhz = false;
28bd723b
DH
2116 }
2117 } else
c812ee24 2118 ht_conf->is_40mhz = false;
28bd723b
DH
2119 /* Default to no protection. Protection mode will later be set
2120 * from BSS config in iwl_ht_conf */
2121 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d 2122
246ed355
JB
2123 for_each_context(priv, ctx) {
2124 /* if we are switching from ht to 2.4 clear flags
2125 * from any ht related info since 2.4 does not
2126 * support ht */
2127 if ((le16_to_cpu(ctx->staging.channel) != ch))
2128 ctx->staging.flags = 0;
4808368d 2129
246ed355
JB
2130 iwl_set_rxon_channel(priv, channel, ctx);
2131 iwl_set_rxon_ht(priv, ht_conf);
2132
2133 iwl_set_flags_for_band(priv, ctx, channel->band,
8bd413e6 2134 ctx->vif);
246ed355 2135 }
4808368d 2136
4808368d 2137 spin_unlock_irqrestore(&priv->lock, flags);
79d07325 2138
a194e324
JB
2139 if (priv->cfg->ops->lib->update_bcast_stations)
2140 ret = priv->cfg->ops->lib->update_bcast_stations(priv);
278c2f6f 2141
4808368d
AK
2142 set_ch_out:
2143 /* The list of supported rates and rate mask can be different
2144 * for each band; since the band may have changed, reset
2145 * the rate mask to what mac80211 lists */
2146 iwl_set_rate(priv);
2147 }
2148
78f5fb7f
JB
2149 if (changed & (IEEE80211_CONF_CHANGE_PS |
2150 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2151 ret = iwl_power_update_mode(priv, false);
4808368d 2152 if (ret)
e312c24c 2153 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK
2154 }
2155
2156 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2157 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2158 priv->tx_power_user_lmt, conf->power_level);
2159
2160 iwl_set_tx_power(priv, conf->power_level, false);
2161 }
2162
0cf4c01e
MA
2163 if (!iwl_is_ready(priv)) {
2164 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2165 goto out;
2166 }
2167
4808368d
AK
2168 if (scan_active)
2169 goto out;
2170
246ed355
JB
2171 for_each_context(priv, ctx) {
2172 if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
2173 iwlcore_commit_rxon(priv, ctx);
2174 else
2175 IWL_DEBUG_INFO(priv,
2176 "Not re-sending same RXON configuration.\n");
2177 }
4808368d
AK
2178
2179out:
2180 IWL_DEBUG_MAC80211(priv, "leave\n");
2181 mutex_unlock(&priv->mutex);
2182 return ret;
2183}
2184EXPORT_SYMBOL(iwl_mac_config);
2185
bd564261
AK
2186void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2187{
2188 struct iwl_priv *priv = hw->priv;
2189 unsigned long flags;
246ed355
JB
2190 /* IBSS can only be the IWL_RXON_CTX_BSS context */
2191 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
bd564261
AK
2192
2193 mutex_lock(&priv->mutex);
2194 IWL_DEBUG_MAC80211(priv, "enter\n");
2195
2196 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2197 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK
2198 spin_unlock_irqrestore(&priv->lock, flags);
2199
bd564261 2200 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK
2201
2202 /* new association get rid of ibss beacon skb */
2203 if (priv->ibss_beacon)
2204 dev_kfree_skb(priv->ibss_beacon);
2205
2206 priv->ibss_beacon = NULL;
2207
bd564261 2208 priv->timestamp = 0;
bd564261
AK
2209
2210 spin_unlock_irqrestore(&priv->lock, flags);
2211
2212 if (!iwl_is_ready_rf(priv)) {
2213 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2214 mutex_unlock(&priv->mutex);
2215 return;
2216 }
2217
2218 /* we are restarting association process
2219 * clear RXON_FILTER_ASSOC_MSK bit
2220 */
b4665df4 2221 iwl_scan_cancel_timeout(priv, 100);
246ed355
JB
2222 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2223 iwlcore_commit_rxon(priv, ctx);
bd564261
AK
2224
2225 iwl_set_rate(priv);
2226
2227 mutex_unlock(&priv->mutex);
2228
2229 IWL_DEBUG_MAC80211(priv, "leave\n");
2230}
2231EXPORT_SYMBOL(iwl_mac_reset_tsf);
2232
88804e2b
WYG
2233int iwl_alloc_txq_mem(struct iwl_priv *priv)
2234{
2235 if (!priv->txq)
2236 priv->txq = kzalloc(
2237 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2238 GFP_KERNEL);
2239 if (!priv->txq) {
91dd6c27 2240 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG
2241 return -ENOMEM;
2242 }
2243 return 0;
2244}
2245EXPORT_SYMBOL(iwl_alloc_txq_mem);
2246
2247void iwl_free_txq_mem(struct iwl_priv *priv)
2248{
2249 kfree(priv->txq);
2250 priv->txq = NULL;
2251}
2252EXPORT_SYMBOL(iwl_free_txq_mem);
2253
20594eb0
WYG
2254#ifdef CONFIG_IWLWIFI_DEBUGFS
2255
2256#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2257
2258void iwl_reset_traffic_log(struct iwl_priv *priv)
2259{
2260 priv->tx_traffic_idx = 0;
2261 priv->rx_traffic_idx = 0;
2262 if (priv->tx_traffic)
2263 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2264 if (priv->rx_traffic)
2265 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2266}
2267
2268int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2269{
2270 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2271
2272 if (iwl_debug_level & IWL_DL_TX) {
2273 if (!priv->tx_traffic) {
2274 priv->tx_traffic =
2275 kzalloc(traffic_size, GFP_KERNEL);
2276 if (!priv->tx_traffic)
2277 return -ENOMEM;
2278 }
2279 }
2280 if (iwl_debug_level & IWL_DL_RX) {
2281 if (!priv->rx_traffic) {
2282 priv->rx_traffic =
2283 kzalloc(traffic_size, GFP_KERNEL);
2284 if (!priv->rx_traffic)
2285 return -ENOMEM;
2286 }
2287 }
2288 iwl_reset_traffic_log(priv);
2289 return 0;
2290}
2291EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2292
2293void iwl_free_traffic_mem(struct iwl_priv *priv)
2294{
2295 kfree(priv->tx_traffic);
2296 priv->tx_traffic = NULL;
2297
2298 kfree(priv->rx_traffic);
2299 priv->rx_traffic = NULL;
2300}
2301EXPORT_SYMBOL(iwl_free_traffic_mem);
2302
2303void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2304 u16 length, struct ieee80211_hdr *header)
2305{
2306 __le16 fc;
2307 u16 len;
2308
2309 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2310 return;
2311
2312 if (!priv->tx_traffic)
2313 return;
2314
2315 fc = header->frame_control;
2316 if (ieee80211_is_data(fc)) {
2317 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2318 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2319 memcpy((priv->tx_traffic +
2320 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2321 header, len);
2322 priv->tx_traffic_idx =
2323 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2324 }
2325}
2326EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2327
2328void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2329 u16 length, struct ieee80211_hdr *header)
2330{
2331 __le16 fc;
2332 u16 len;
2333
2334 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2335 return;
2336
2337 if (!priv->rx_traffic)
2338 return;
2339
2340 fc = header->frame_control;
2341 if (ieee80211_is_data(fc)) {
2342 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2343 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2344 memcpy((priv->rx_traffic +
2345 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2346 header, len);
2347 priv->rx_traffic_idx =
2348 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2349 }
2350}
2351EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG
2352
2353const char *get_mgmt_string(int cmd)
2354{
2355 switch (cmd) {
2356 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2357 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2358 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2359 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2360 IWL_CMD(MANAGEMENT_PROBE_REQ);
2361 IWL_CMD(MANAGEMENT_PROBE_RESP);
2362 IWL_CMD(MANAGEMENT_BEACON);
2363 IWL_CMD(MANAGEMENT_ATIM);
2364 IWL_CMD(MANAGEMENT_DISASSOC);
2365 IWL_CMD(MANAGEMENT_AUTH);
2366 IWL_CMD(MANAGEMENT_DEAUTH);
2367 IWL_CMD(MANAGEMENT_ACTION);
2368 default:
2369 return "UNKNOWN";
2370
2371 }
2372}
2373
2374const char *get_ctrl_string(int cmd)
2375{
2376 switch (cmd) {
2377 IWL_CMD(CONTROL_BACK_REQ);
2378 IWL_CMD(CONTROL_BACK);
2379 IWL_CMD(CONTROL_PSPOLL);
2380 IWL_CMD(CONTROL_RTS);
2381 IWL_CMD(CONTROL_CTS);
2382 IWL_CMD(CONTROL_ACK);
2383 IWL_CMD(CONTROL_CFEND);
2384 IWL_CMD(CONTROL_CFENDACK);
2385 default:
2386 return "UNKNOWN";
2387
2388 }
2389}
2390
7163b8a4 2391void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG
2392{
2393 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2394 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2395 priv->led_tpt = 0;
22fdf3c9
WYG
2396}
2397
2398/*
2399 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2400 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2401 * Use debugFs to display the rx/rx_statistics
2402 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2403 * information will be recorded, but DATA pkt still will be recorded
2404 * for the reason of iwl_led.c need to control the led blinking based on
2405 * number of tx and rx data.
2406 *
2407 */
2408void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2409{
2410 struct traffic_stats *stats;
2411
2412 if (is_tx)
2413 stats = &priv->tx_stats;
2414 else
2415 stats = &priv->rx_stats;
2416
2417 if (ieee80211_is_mgmt(fc)) {
2418 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2419 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2420 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2421 break;
2422 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2423 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2424 break;
2425 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2426 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2427 break;
2428 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2429 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2430 break;
2431 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2432 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2433 break;
2434 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2435 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2436 break;
2437 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2438 stats->mgmt[MANAGEMENT_BEACON]++;
2439 break;
2440 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2441 stats->mgmt[MANAGEMENT_ATIM]++;
2442 break;
2443 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2444 stats->mgmt[MANAGEMENT_DISASSOC]++;
2445 break;
2446 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2447 stats->mgmt[MANAGEMENT_AUTH]++;
2448 break;
2449 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2450 stats->mgmt[MANAGEMENT_DEAUTH]++;
2451 break;
2452 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2453 stats->mgmt[MANAGEMENT_ACTION]++;
2454 break;
2455 }
2456 } else if (ieee80211_is_ctl(fc)) {
2457 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2458 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2459 stats->ctrl[CONTROL_BACK_REQ]++;
2460 break;
2461 case cpu_to_le16(IEEE80211_STYPE_BACK):
2462 stats->ctrl[CONTROL_BACK]++;
2463 break;
2464 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2465 stats->ctrl[CONTROL_PSPOLL]++;
2466 break;
2467 case cpu_to_le16(IEEE80211_STYPE_RTS):
2468 stats->ctrl[CONTROL_RTS]++;
2469 break;
2470 case cpu_to_le16(IEEE80211_STYPE_CTS):
2471 stats->ctrl[CONTROL_CTS]++;
2472 break;
2473 case cpu_to_le16(IEEE80211_STYPE_ACK):
2474 stats->ctrl[CONTROL_ACK]++;
2475 break;
2476 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2477 stats->ctrl[CONTROL_CFEND]++;
2478 break;
2479 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2480 stats->ctrl[CONTROL_CFENDACK]++;
2481 break;
2482 }
2483 } else {
2484 /* data */
2485 stats->data_cnt++;
2486 stats->data_bytes += len;
2487 }
d5f4cf71 2488 iwl_leds_background(priv);
22fdf3c9
WYG
2489}
2490EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG
2491#endif
2492
a0ea9493 2493static const char *get_csr_string(int cmd)
696bdee3
WYG
2494{
2495 switch (cmd) {
2496 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2497 IWL_CMD(CSR_INT_COALESCING);
2498 IWL_CMD(CSR_INT);
2499 IWL_CMD(CSR_INT_MASK);
2500 IWL_CMD(CSR_FH_INT_STATUS);
2501 IWL_CMD(CSR_GPIO_IN);
2502 IWL_CMD(CSR_RESET);
2503 IWL_CMD(CSR_GP_CNTRL);
2504 IWL_CMD(CSR_HW_REV);
2505 IWL_CMD(CSR_EEPROM_REG);
2506 IWL_CMD(CSR_EEPROM_GP);
2507 IWL_CMD(CSR_OTP_GP_REG);
2508 IWL_CMD(CSR_GIO_REG);
2509 IWL_CMD(CSR_GP_UCODE_REG);
2510 IWL_CMD(CSR_GP_DRIVER_REG);
2511 IWL_CMD(CSR_UCODE_DRV_GP1);
2512 IWL_CMD(CSR_UCODE_DRV_GP2);
2513 IWL_CMD(CSR_LED_REG);
2514 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2515 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2516 IWL_CMD(CSR_ANA_PLL_CFG);
2517 IWL_CMD(CSR_HW_REV_WA_REG);
2518 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2519 default:
2520 return "UNKNOWN";
2521
2522 }
2523}
2524
2525void iwl_dump_csr(struct iwl_priv *priv)
2526{
2527 int i;
2528 u32 csr_tbl[] = {
2529 CSR_HW_IF_CONFIG_REG,
2530 CSR_INT_COALESCING,
2531 CSR_INT,
2532 CSR_INT_MASK,
2533 CSR_FH_INT_STATUS,
2534 CSR_GPIO_IN,
2535 CSR_RESET,
2536 CSR_GP_CNTRL,
2537 CSR_HW_REV,
2538 CSR_EEPROM_REG,
2539 CSR_EEPROM_GP,
2540 CSR_OTP_GP_REG,
2541 CSR_GIO_REG,
2542 CSR_GP_UCODE_REG,
2543 CSR_GP_DRIVER_REG,
2544 CSR_UCODE_DRV_GP1,
2545 CSR_UCODE_DRV_GP2,
2546 CSR_LED_REG,
2547 CSR_DRAM_INT_TBL_REG,
2548 CSR_GIO_CHICKEN_BITS,
2549 CSR_ANA_PLL_CFG,
2550 CSR_HW_REV_WA_REG,
2551 CSR_DBG_HPET_MEM_REG
2552 };
2553 IWL_ERR(priv, "CSR values:\n");
2554 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2555 "CSR_INT_PERIODIC_REG)\n");
2556 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2557 IWL_ERR(priv, " %25s: 0X%08x\n",
2558 get_csr_string(csr_tbl[i]),
2559 iwl_read32(priv, csr_tbl[i]));
2560 }
2561}
2562EXPORT_SYMBOL(iwl_dump_csr);
2563
a0ea9493 2564static const char *get_fh_string(int cmd)
1b3eb823
WYG
2565{
2566 switch (cmd) {
2567 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2568 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2569 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2570 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2571 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2572 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2573 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2574 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2575 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2576 default:
2577 return "UNKNOWN";
2578
2579 }
2580}
2581
2582int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2583{
2584 int i;
2585#ifdef CONFIG_IWLWIFI_DEBUG
2586 int pos = 0;
2587 size_t bufsz = 0;
2588#endif
2589 u32 fh_tbl[] = {
2590 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2591 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2592 FH_RSCSR_CHNL0_WPTR,
2593 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2594 FH_MEM_RSSR_SHARED_CTRL_REG,
2595 FH_MEM_RSSR_RX_STATUS_REG,
2596 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2597 FH_TSSR_TX_STATUS_REG,
2598 FH_TSSR_TX_ERROR_REG
2599 };
2600#ifdef CONFIG_IWLWIFI_DEBUG
2601 if (display) {
2602 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2603 *buf = kmalloc(bufsz, GFP_KERNEL);
2604 if (!*buf)
2605 return -ENOMEM;
2606 pos += scnprintf(*buf + pos, bufsz - pos,
2607 "FH register values:\n");
2608 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2609 pos += scnprintf(*buf + pos, bufsz - pos,
2610 " %34s: 0X%08x\n",
2611 get_fh_string(fh_tbl[i]),
2612 iwl_read_direct32(priv, fh_tbl[i]));
2613 }
2614 return pos;
2615 }
2616#endif
2617 IWL_ERR(priv, "FH register values:\n");
2618 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2619 IWL_ERR(priv, " %34s: 0X%08x\n",
2620 get_fh_string(fh_tbl[i]),
2621 iwl_read_direct32(priv, fh_tbl[i]));
2622 }
2623 return 0;
2624}
2625EXPORT_SYMBOL(iwl_dump_fh);
2626
a93e7973 2627static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG
2628{
2629 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2630 return;
2631
246ed355 2632 if (!iwl_is_any_associated(priv)) {
afbdd69a
WYG
2633 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2634 return;
2635 }
2636 /*
2637 * There is no easy and better way to force reset the radio,
2638 * the only known method is switching channel which will force to
2639 * reset and tune the radio.
2640 * Use internal short scan (single channel) operation to should
2641 * achieve this objective.
2642 * Driver should reset the radio when number of consecutive missed
2643 * beacon, or any other uCode error condition detected.
2644 */
2645 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2646 iwl_internal_short_hw_scan(priv);
afbdd69a 2647}
a93e7973 2648
a93e7973 2649
c04f9f22 2650int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 2651{
8a472da4
WYG
2652 struct iwl_force_reset *force_reset;
2653
a93e7973
WYG
2654 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2655 return -EINVAL;
2656
8a472da4
WYG
2657 if (mode >= IWL_MAX_FORCE_RESET) {
2658 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2659 return -EINVAL;
2660 }
2661 force_reset = &priv->force_reset[mode];
2662 force_reset->reset_request_count++;
c04f9f22
WYG
2663 if (!external) {
2664 if (force_reset->last_force_reset_jiffies &&
2665 time_after(force_reset->last_force_reset_jiffies +
2666 force_reset->reset_duration, jiffies)) {
2667 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2668 force_reset->reset_reject_count++;
2669 return -EAGAIN;
2670 }
a93e7973 2671 }
8a472da4
WYG
2672 force_reset->reset_success_count++;
2673 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2674 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG
2675 switch (mode) {
2676 case IWL_RF_RESET:
2677 iwl_force_rf_reset(priv);
2678 break;
2679 case IWL_FW_RESET:
c04f9f22
WYG
2680 /*
2681 * if the request is from external(ex: debugfs),
2682 * then always perform the request in regardless the module
2683 * parameter setting
2684 * if the request is from internal (uCode error or driver
2685 * detect failure), then fw_restart module parameter
2686 * need to be check before performing firmware reload
2687 */
2688 if (!external && !priv->cfg->mod_params->restart_fw) {
2689 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
2690 "module parameter setting\n");
2691 break;
2692 }
a93e7973
WYG
2693 IWL_ERR(priv, "On demand firmware reload\n");
2694 /* Set the FW error flag -- cleared on iwl_down */
2695 set_bit(STATUS_FW_ERROR, &priv->status);
2696 wake_up_interruptible(&priv->wait_command_queue);
2697 /*
2698 * Keep the restart process from trying to send host
2699 * commands by clearing the INIT status bit
2700 */
2701 clear_bit(STATUS_READY, &priv->status);
2702 queue_work(priv->workqueue, &priv->restart);
2703 break;
a93e7973 2704 }
a93e7973
WYG
2705 return 0;
2706}
b74e31a9
WYG
2707EXPORT_SYMBOL(iwl_force_reset);
2708
2709/**
2710 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2711 *
2712 * During normal condition (no queue is stuck), the timer is continually set to
2713 * execute every monitor_recover_period milliseconds after the last timer
2714 * expired. When the queue read_ptr is at the same place, the timer is
2715 * shorten to 100mSecs. This is
2716 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2717 * 2) to detect the stuck queues quicker before the station and AP can
2718 * disassociate each other.
2719 *
2720 * This function monitors all the tx queues and recover from it if any
2721 * of the queues are stuck.
2722 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2723 * it will recover by resetting the firmware and return.
2724 * 2. Then, it checks for station association. If it associates it will check
2725 * other queues. If any queue is stuck, it will recover by resetting
2726 * the firmware.
2727 * Note: It the number of times the queue read_ptr to be at the same place to
2728 * be MAX_REPEAT+1 in order to consider to be stuck.
2729 */
2730/*
2731 * The maximum number of times the read pointer of the tx queue at the
2732 * same place without considering to be stuck.
2733 */
2734#define MAX_REPEAT (2)
2735static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2736{
2737 struct iwl_tx_queue *txq;
2738 struct iwl_queue *q;
2739
2740 txq = &priv->txq[cnt];
2741 q = &txq->q;
2742 /* queue is empty, skip */
2743 if (q->read_ptr != q->write_ptr) {
2744 if (q->read_ptr == q->last_read_ptr) {
2745 /* a queue has not been read from last time */
2746 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2747 IWL_ERR(priv,
2748 "queue %d stuck %d time. Fw reload.\n",
2749 q->id, q->repeat_same_read_ptr);
2750 q->repeat_same_read_ptr = 0;
c04f9f22 2751 iwl_force_reset(priv, IWL_FW_RESET, false);
b74e31a9
WYG
2752 } else {
2753 q->repeat_same_read_ptr++;
2754 IWL_DEBUG_RADIO(priv,
2755 "queue %d, not read %d time\n",
2756 q->id,
2757 q->repeat_same_read_ptr);
74e5c41b
WYG
2758 if (!priv->cfg->advanced_bt_coexist) {
2759 mod_timer(&priv->monitor_recover,
2760 jiffies + msecs_to_jiffies(
2761 IWL_ONE_HUNDRED_MSECS));
2762 return 1;
2763 }
b74e31a9 2764 }
74e5c41b 2765 return 0;
b74e31a9
WYG
2766 } else {
2767 q->last_read_ptr = q->read_ptr;
2768 q->repeat_same_read_ptr = 0;
2769 }
2770 }
2771 return 0;
2772}
2773
2774void iwl_bg_monitor_recover(unsigned long data)
2775{
2776 struct iwl_priv *priv = (struct iwl_priv *)data;
2777 int cnt;
2778
2779 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2780 return;
2781
2782 /* monitor and check for stuck cmd queue */
13bb9483 2783 if (iwl_check_stuck_queue(priv, priv->cmd_queue))
b74e31a9
WYG
2784 return;
2785
2786 /* monitor and check for other stuck queues */
246ed355 2787 if (iwl_is_any_associated(priv)) {
b74e31a9
WYG
2788 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2789 /* skip as we already checked the command queue */
13bb9483 2790 if (cnt == priv->cmd_queue)
b74e31a9
WYG
2791 continue;
2792 if (iwl_check_stuck_queue(priv, cnt))
2793 return;
2794 }
2795 }
7bdc473c
WYG
2796 if (priv->cfg->monitor_recover_period) {
2797 /*
2798 * Reschedule the timer to occur in
2799 * priv->cfg->monitor_recover_period
2800 */
2801 mod_timer(&priv->monitor_recover, jiffies + msecs_to_jiffies(
2802 priv->cfg->monitor_recover_period));
2803 }
b74e31a9
WYG
2804}
2805EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2806
a0ee74cf
WYG
2807
2808/*
2809 * extended beacon time format
2810 * time in usec will be changed into a 32-bit value in extended:internal format
2811 * the extended part is the beacon counts
2812 * the internal part is the time in usec within one beacon interval
2813 */
2814u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2815{
2816 u32 quot;
2817 u32 rem;
2818 u32 interval = beacon_interval * TIME_UNIT;
2819
2820 if (!interval || !usec)
2821 return 0;
2822
2823 quot = (usec / interval) &
2824 (iwl_beacon_time_mask_high(priv,
2825 priv->hw_params.beacon_time_tsf_bits) >>
2826 priv->hw_params.beacon_time_tsf_bits);
2827 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2828 priv->hw_params.beacon_time_tsf_bits);
2829
2830 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2831}
2832EXPORT_SYMBOL(iwl_usecs_to_beacons);
2833
2834/* base is usually what we get from ucode with each received frame,
2835 * the same as HW timer counter counting down
2836 */
2837__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2838 u32 addon, u32 beacon_interval)
2839{
2840 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2841 priv->hw_params.beacon_time_tsf_bits);
2842 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2843 priv->hw_params.beacon_time_tsf_bits);
2844 u32 interval = beacon_interval * TIME_UNIT;
2845 u32 res = (base & iwl_beacon_time_mask_high(priv,
2846 priv->hw_params.beacon_time_tsf_bits)) +
2847 (addon & iwl_beacon_time_mask_high(priv,
2848 priv->hw_params.beacon_time_tsf_bits));
2849
2850 if (base_low > addon_low)
2851 res += base_low - addon_low;
2852 else if (base_low < addon_low) {
2853 res += interval + base_low - addon_low;
2854 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2855 } else
2856 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2857
2858 return cpu_to_le32(res);
2859}
2860EXPORT_SYMBOL(iwl_add_beacon_time);
2861
6da3a13e
WYG
2862#ifdef CONFIG_PM
2863
2864int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2865{
2866 struct iwl_priv *priv = pci_get_drvdata(pdev);
2867
2868 /*
2869 * This function is called when system goes into suspend state
2870 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2871 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2872 * it will not call apm_ops.stop() to stop the DMA operation.
2873 * Calling apm_ops.stop here to make sure we stop the DMA.
2874 */
2875 priv->cfg->ops->lib->apm_ops.stop(priv);
2876
2877 pci_save_state(pdev);
2878 pci_disable_device(pdev);
2879 pci_set_power_state(pdev, PCI_D3hot);
2880
2881 return 0;
2882}
2883EXPORT_SYMBOL(iwl_pci_suspend);
2884
2885int iwl_pci_resume(struct pci_dev *pdev)
2886{
2887 struct iwl_priv *priv = pci_get_drvdata(pdev);
2888 int ret;
0ab84cff 2889 bool hw_rfkill = false;
6da3a13e 2890
cd398c31
AK
2891 /*
2892 * We disable the RETRY_TIMEOUT register (0x41) to keep
2893 * PCI Tx retries from interfering with C3 CPU state.
2894 */
2895 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2896
6da3a13e
WYG
2897 pci_set_power_state(pdev, PCI_D0);
2898 ret = pci_enable_device(pdev);
2899 if (ret)
2900 return ret;
2901 pci_restore_state(pdev);
2902 iwl_enable_interrupts(priv);
2903
0ab84cff
JB
2904 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
2905 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2906 hw_rfkill = true;
2907
2908 if (hw_rfkill)
2909 set_bit(STATUS_RF_KILL_HW, &priv->status);
2910 else
2911 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2912
2913 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2914
6da3a13e
WYG
2915 return 0;
2916}
2917EXPORT_SYMBOL(iwl_pci_resume);
2918
2919#endif /* CONFIG_PM */