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1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
8 | * Copyright(c) 2007 - 2008 Intel Corporation. All rights reserved. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of version 2 of the GNU General Public License as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
22 | * USA | |
23 | * | |
24 | * The full GNU General Public License is included in this distribution | |
25 | * in the file called LICENSE.GPL. | |
26 | * | |
27 | * Contact Information: | |
28 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
30 | * | |
31 | * BSD LICENSE | |
32 | * | |
33 | * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved. | |
34 | * All rights reserved. | |
35 | * | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * | |
40 | * * Redistributions of source code must retain the above copyright | |
41 | * notice, this list of conditions and the following disclaimer. | |
42 | * * Redistributions in binary form must reproduce the above copyright | |
43 | * notice, this list of conditions and the following disclaimer in | |
44 | * the documentation and/or other materials provided with the | |
45 | * distribution. | |
46 | * * Neither the name Intel Corporation nor the names of its | |
47 | * contributors may be used to endorse or promote products derived | |
48 | * from this software without specific prior written permission. | |
49 | * | |
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
61 | * | |
62 | *****************************************************************************/ | |
63 | /* | |
64 | * Please use this file (iwl-5000-hw.h) only for hardware-related definitions. | |
65 | * Use iwl-5000-commands.h for uCode API definitions. | |
66 | */ | |
67 | ||
68 | #ifndef __iwl_5000_hw_h__ | |
69 | #define __iwl_5000_hw_h__ | |
70 | ||
fdd3e8a4 TW |
71 | #define IWL50_RTC_INST_UPPER_BOUND (0x020000) |
72 | #define IWL50_RTC_DATA_UPPER_BOUND (0x80C000) | |
73 | #define IWL50_RTC_INST_SIZE (IWL50_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND) | |
74 | #define IWL50_RTC_DATA_SIZE (IWL50_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND) | |
75 | ||
25ae3986 TW |
76 | /* EERPROM */ |
77 | #define IWL_5000_EEPROM_IMG_SIZE 2048 | |
78 | ||
5a6a256e TW |
79 | |
80 | #define IWL50_MAX_WIN_SIZE 64 | |
81 | #define IWL50_QUEUE_SIZE 256 | |
82 | #define IWL50_CMD_FIFO_NUM 7 | |
83 | #define IWL50_NUM_QUEUES 20 | |
9f17b318 | 84 | #define IWL50_NUM_AMPDU_QUEUES 10 |
7f3e4bb6 | 85 | #define IWL50_FIRST_AMPDU_QUEUE 10 |
5a6a256e | 86 | |
7839fc03 EG |
87 | #define IWL_sta_id_POS 12 |
88 | #define IWL_sta_id_LEN 4 | |
89 | #define IWL_sta_id_SYM val | |
90 | ||
fdd3e8a4 TW |
91 | /* Fixed (non-configurable) rx data from phy */ |
92 | ||
93 | /* Base physical address of iwl5000_shared is provided to SCD_DRAM_BASE_ADDR | |
94 | * and &iwl5000_shared.val0 is provided to FH_RSCSR_CHNL0_STTS_WPTR_REG */ | |
95 | struct iwl5000_sched_queue_byte_cnt_tbl { | |
96 | struct iwl4965_queue_byte_cnt_entry tfd_offset[IWL50_QUEUE_SIZE + | |
97 | IWL50_MAX_WIN_SIZE]; | |
98 | } __attribute__ ((packed)); | |
99 | ||
100 | struct iwl5000_shared { | |
101 | struct iwl5000_sched_queue_byte_cnt_tbl | |
102 | queues_byte_cnt_tbls[IWL50_NUM_QUEUES]; | |
103 | __le32 rb_closed; | |
104 | ||
105 | /* __le32 rb_closed_stts_rb_num:12; */ | |
106 | #define IWL_rb_closed_stts_rb_num_POS 0 | |
107 | #define IWL_rb_closed_stts_rb_num_LEN 12 | |
108 | #define IWL_rb_closed_stts_rb_num_SYM rb_closed | |
109 | /* __le32 rsrv1:4; */ | |
110 | /* __le32 rb_closed_stts_rx_frame_num:12; */ | |
111 | #define IWL_rb_closed_stts_rx_frame_num_POS 16 | |
112 | #define IWL_rb_closed_stts_rx_frame_num_LEN 12 | |
113 | #define IWL_rb_closed_stts_rx_frame_num_SYM rb_closed | |
114 | /* __le32 rsrv2:4; */ | |
115 | ||
116 | __le32 frm_finished; | |
117 | /* __le32 frame_finished_stts_rb_num:12; */ | |
118 | #define IWL_frame_finished_stts_rb_num_POS 0 | |
119 | #define IWL_frame_finished_stts_rb_num_LEN 12 | |
120 | #define IWL_frame_finished_stts_rb_num_SYM frm_finished | |
121 | /* __le32 rsrv3:4; */ | |
122 | /* __le32 frame_finished_stts_rx_frame_num:12; */ | |
123 | #define IWL_frame_finished_stts_rx_frame_num_POS 16 | |
124 | #define IWL_frame_finished_stts_rx_frame_num_LEN 12 | |
125 | #define IWL_frame_finished_stts_rx_frame_num_SYM frm_finished | |
126 | /* __le32 rsrv4:4; */ | |
127 | ||
128 | __le32 padding1; /* so that allocation will be aligned to 16B */ | |
129 | __le32 padding2; | |
130 | } __attribute__ ((packed)); | |
131 | ||
5a6a256e TW |
132 | #endif /* __iwl_5000_hw_h__ */ |
133 |