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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
3 | * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called LICENSE. | |
20 | * | |
21 | * Contact Information: | |
22 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | *****************************************************************************/ | |
fcd427bb BC |
26 | /* |
27 | * Please use this file (iwl-4965.h) for driver implementation definitions. | |
28 | * Please use iwl-4965-commands.h for uCode API definitions. | |
29 | * Please use iwl-4965-hw.h for hardware-related definitions. | |
30 | */ | |
31 | ||
b481de9c ZY |
32 | #ifndef __iwl_4965_h__ |
33 | #define __iwl_4965_h__ | |
34 | ||
5d08cd1d CH |
35 | #include <linux/pci.h> /* for struct pci_device_id */ |
36 | #include <linux/kernel.h> | |
37 | #include <net/ieee80211_radiotap.h> | |
38 | ||
5d08cd1d | 39 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
bb8c093b | 40 | extern struct pci_device_id iwl4965_hw_card_ids[]; |
5d08cd1d CH |
41 | |
42 | #define DRV_NAME "iwl4965" | |
43 | #include "iwl-4965-hw.h" | |
44 | #include "iwl-prph.h" | |
45 | #include "iwl-4965-debug.h" | |
46 | ||
47 | /* Default noise level to report when noise measurement is not available. | |
48 | * This may be because we're: | |
49 | * 1) Not associated (4965, no beacon statistics being sent to driver) | |
50 | * 2) Scanning (noise measurement does not apply to associated channel) | |
51 | * 3) Receiving CCK (3945 delivers noise info only for OFDM frames) | |
52 | * Use default noise value of -127 ... this is below the range of measurable | |
53 | * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user. | |
54 | * Also, -127 works better than 0 when averaging frames with/without | |
55 | * noise info (e.g. averaging might be done in app); measured dBm values are | |
56 | * always negative ... using a negative value as the default keeps all | |
57 | * averages within an s8's (used in some apps) range of negative values. */ | |
58 | #define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) | |
59 | ||
60 | /* Module parameters accessible from iwl-*.c */ | |
bb8c093b CH |
61 | extern int iwl4965_param_hwcrypto; |
62 | extern int iwl4965_param_queues_num; | |
5d08cd1d | 63 | |
bb8c093b | 64 | enum iwl4965_antenna { |
5d08cd1d CH |
65 | IWL_ANTENNA_DIVERSITY, |
66 | IWL_ANTENNA_MAIN, | |
67 | IWL_ANTENNA_AUX | |
68 | }; | |
69 | ||
70 | /* | |
71 | * RTS threshold here is total size [2347] minus 4 FCS bytes | |
72 | * Per spec: | |
73 | * a value of 0 means RTS on all data/management packets | |
74 | * a value > max MSDU size means no RTS | |
75 | * else RTS for data/management frames where MPDU is larger | |
76 | * than RTS value. | |
77 | */ | |
78 | #define DEFAULT_RTS_THRESHOLD 2347U | |
79 | #define MIN_RTS_THRESHOLD 0U | |
80 | #define MAX_RTS_THRESHOLD 2347U | |
81 | #define MAX_MSDU_SIZE 2304U | |
82 | #define MAX_MPDU_SIZE 2346U | |
83 | #define DEFAULT_BEACON_INTERVAL 100U | |
84 | #define DEFAULT_SHORT_RETRY_LIMIT 7U | |
85 | #define DEFAULT_LONG_RETRY_LIMIT 4U | |
86 | ||
bb8c093b | 87 | struct iwl4965_rx_mem_buffer { |
5d08cd1d CH |
88 | dma_addr_t dma_addr; |
89 | struct sk_buff *skb; | |
90 | struct list_head list; | |
91 | }; | |
92 | ||
bb8c093b | 93 | struct iwl4965_rt_rx_hdr { |
5d08cd1d CH |
94 | struct ieee80211_radiotap_header rt_hdr; |
95 | __le64 rt_tsf; /* TSF */ | |
96 | u8 rt_flags; /* radiotap packet flags */ | |
97 | u8 rt_rate; /* rate in 500kb/s */ | |
98 | __le16 rt_channelMHz; /* channel in MHz */ | |
99 | __le16 rt_chbitmask; /* channel bitfield */ | |
100 | s8 rt_dbmsignal; /* signal in dBm, kluged to signed */ | |
101 | s8 rt_dbmnoise; | |
102 | u8 rt_antenna; /* antenna number */ | |
103 | u8 payload[0]; /* payload... */ | |
104 | } __attribute__ ((packed)); | |
105 | ||
bb8c093b | 106 | struct iwl4965_rt_tx_hdr { |
5d08cd1d CH |
107 | struct ieee80211_radiotap_header rt_hdr; |
108 | u8 rt_rate; /* rate in 500kb/s */ | |
109 | __le16 rt_channel; /* channel in mHz */ | |
110 | __le16 rt_chbitmask; /* channel bitfield */ | |
111 | s8 rt_dbmsignal; /* signal in dBm, kluged to signed */ | |
112 | u8 rt_antenna; /* antenna number */ | |
113 | u8 payload[0]; /* payload... */ | |
114 | } __attribute__ ((packed)); | |
115 | ||
116 | /* | |
117 | * Generic queue structure | |
118 | * | |
119 | * Contains common data for Rx and Tx queues | |
120 | */ | |
bb8c093b | 121 | struct iwl4965_queue { |
5d08cd1d CH |
122 | int n_bd; /* number of BDs in this queue */ |
123 | int write_ptr; /* 1-st empty entry (index) host_w*/ | |
124 | int read_ptr; /* last used entry (index) host_r*/ | |
125 | dma_addr_t dma_addr; /* physical addr for BD's */ | |
126 | int n_window; /* safe queue window */ | |
127 | u32 id; | |
128 | int low_mark; /* low watermark, resume queue if free | |
129 | * space more than this */ | |
130 | int high_mark; /* high watermark, stop queue if free | |
131 | * space less than this */ | |
132 | } __attribute__ ((packed)); | |
133 | ||
134 | #define MAX_NUM_OF_TBS (20) | |
135 | ||
bc47279f | 136 | /* One for each TFD */ |
bb8c093b | 137 | struct iwl4965_tx_info { |
5d08cd1d CH |
138 | struct ieee80211_tx_status status; |
139 | struct sk_buff *skb[MAX_NUM_OF_TBS]; | |
140 | }; | |
141 | ||
142 | /** | |
bb8c093b | 143 | * struct iwl4965_tx_queue - Tx Queue for DMA |
bc47279f BC |
144 | * @q: generic Rx/Tx queue descriptor |
145 | * @bd: base of circular buffer of TFDs | |
146 | * @cmd: array of command/Tx buffers | |
147 | * @dma_addr_cmd: physical address of cmd/tx buffer array | |
148 | * @txb: array of per-TFD driver data | |
149 | * @need_update: indicates need to update read/write index | |
150 | * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled | |
5d08cd1d | 151 | * |
bc47279f BC |
152 | * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame |
153 | * descriptors) and required locking structures. | |
5d08cd1d | 154 | */ |
bb8c093b CH |
155 | struct iwl4965_tx_queue { |
156 | struct iwl4965_queue q; | |
157 | struct iwl4965_tfd_frame *bd; | |
158 | struct iwl4965_cmd *cmd; | |
5d08cd1d | 159 | dma_addr_t dma_addr_cmd; |
bb8c093b | 160 | struct iwl4965_tx_info *txb; |
5d08cd1d CH |
161 | int need_update; |
162 | int sched_retry; | |
163 | int active; | |
164 | }; | |
165 | ||
166 | #define IWL_NUM_SCAN_RATES (2) | |
167 | ||
bb8c093b | 168 | struct iwl4965_channel_tgd_info { |
5d08cd1d CH |
169 | u8 type; |
170 | s8 max_power; | |
171 | }; | |
172 | ||
bb8c093b | 173 | struct iwl4965_channel_tgh_info { |
5d08cd1d CH |
174 | s64 last_radar_time; |
175 | }; | |
176 | ||
177 | /* current Tx power values to use, one for each rate for each channel. | |
178 | * requested power is limited by: | |
179 | * -- regulatory EEPROM limits for this channel | |
180 | * -- hardware capabilities (clip-powers) | |
181 | * -- spectrum management | |
182 | * -- user preference (e.g. iwconfig) | |
183 | * when requested power is set, base power index must also be set. */ | |
bb8c093b CH |
184 | struct iwl4965_channel_power_info { |
185 | struct iwl4965_tx_power tpc; /* actual radio and DSP gain settings */ | |
5d08cd1d CH |
186 | s8 power_table_index; /* actual (compenst'd) index into gain table */ |
187 | s8 base_power_index; /* gain index for power at factory temp. */ | |
188 | s8 requested_power; /* power (dBm) requested for this chnl/rate */ | |
189 | }; | |
190 | ||
191 | /* current scan Tx power values to use, one for each scan rate for each | |
192 | * channel. */ | |
bb8c093b CH |
193 | struct iwl4965_scan_power_info { |
194 | struct iwl4965_tx_power tpc; /* actual radio and DSP gain settings */ | |
5d08cd1d CH |
195 | s8 power_table_index; /* actual (compenst'd) index into gain table */ |
196 | s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ | |
197 | }; | |
198 | ||
fcd427bb BC |
199 | /* For fat_extension_channel */ |
200 | enum { | |
201 | HT_IE_EXT_CHANNEL_NONE = 0, | |
202 | HT_IE_EXT_CHANNEL_ABOVE, | |
203 | HT_IE_EXT_CHANNEL_INVALID, | |
204 | HT_IE_EXT_CHANNEL_BELOW, | |
205 | HT_IE_EXT_CHANNEL_MAX | |
206 | }; | |
207 | ||
5d08cd1d CH |
208 | /* |
209 | * One for each channel, holds all channel setup data | |
210 | * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant | |
211 | * with one another! | |
212 | */ | |
213 | #define IWL4965_MAX_RATE (33) | |
214 | ||
bb8c093b CH |
215 | struct iwl4965_channel_info { |
216 | struct iwl4965_channel_tgd_info tgd; | |
217 | struct iwl4965_channel_tgh_info tgh; | |
fcd427bb BC |
218 | struct iwl4965_eeprom_channel eeprom; /* EEPROM regulatory limit */ |
219 | struct iwl4965_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for | |
220 | * FAT channel */ | |
5d08cd1d CH |
221 | |
222 | u8 channel; /* channel number */ | |
223 | u8 flags; /* flags copied from EEPROM */ | |
224 | s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | |
fcd427bb | 225 | s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */ |
5d08cd1d CH |
226 | s8 min_power; /* always 0 */ |
227 | s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ | |
228 | ||
229 | u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */ | |
230 | u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */ | |
231 | u8 phymode; /* MODE_IEEE80211{A,B,G} */ | |
232 | ||
233 | /* Radio/DSP gain settings for each "normal" data Tx rate. | |
234 | * These include, in addition to RF and DSP gain, a few fields for | |
235 | * remembering/modifying gain settings (indexes). */ | |
bb8c093b | 236 | struct iwl4965_channel_power_info power_info[IWL4965_MAX_RATE]; |
5d08cd1d CH |
237 | |
238 | /* FAT channel info */ | |
239 | s8 fat_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | |
240 | s8 fat_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */ | |
241 | s8 fat_min_power; /* always 0 */ | |
242 | s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */ | |
243 | u8 fat_flags; /* flags copied from EEPROM */ | |
fcd427bb | 244 | u8 fat_extension_channel; /* HT_IE_EXT_CHANNEL_* */ |
5d08cd1d CH |
245 | |
246 | /* Radio/DSP gain settings for each scan rate, for directed scans. */ | |
bb8c093b | 247 | struct iwl4965_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; |
5d08cd1d CH |
248 | }; |
249 | ||
bb8c093b | 250 | struct iwl4965_clip_group { |
5d08cd1d CH |
251 | /* maximum power level to prevent clipping for each rate, derived by |
252 | * us from this band's saturation power in EEPROM */ | |
253 | const s8 clip_powers[IWL_MAX_RATES]; | |
254 | }; | |
255 | ||
256 | #include "iwl-4965-rs.h" | |
257 | ||
258 | #define IWL_TX_FIFO_AC0 0 | |
259 | #define IWL_TX_FIFO_AC1 1 | |
260 | #define IWL_TX_FIFO_AC2 2 | |
261 | #define IWL_TX_FIFO_AC3 3 | |
262 | #define IWL_TX_FIFO_HCCA_1 5 | |
263 | #define IWL_TX_FIFO_HCCA_2 6 | |
264 | #define IWL_TX_FIFO_NONE 7 | |
265 | ||
266 | /* Minimum number of queues. MAX_NUM is defined in hw specific files */ | |
267 | #define IWL_MIN_NUM_QUEUES 4 | |
268 | ||
269 | /* Power management (not Tx power) structures */ | |
270 | ||
bb8c093b CH |
271 | struct iwl4965_power_vec_entry { |
272 | struct iwl4965_powertable_cmd cmd; | |
5d08cd1d CH |
273 | u8 no_dtim; |
274 | }; | |
275 | #define IWL_POWER_RANGE_0 (0) | |
276 | #define IWL_POWER_RANGE_1 (1) | |
277 | ||
278 | #define IWL_POWER_MODE_CAM 0x00 /* Continuously Aware Mode, always on */ | |
279 | #define IWL_POWER_INDEX_3 0x03 | |
280 | #define IWL_POWER_INDEX_5 0x05 | |
281 | #define IWL_POWER_AC 0x06 | |
282 | #define IWL_POWER_BATTERY 0x07 | |
283 | #define IWL_POWER_LIMIT 0x07 | |
284 | #define IWL_POWER_MASK 0x0F | |
285 | #define IWL_POWER_ENABLED 0x10 | |
286 | #define IWL_POWER_LEVEL(x) ((x) & IWL_POWER_MASK) | |
287 | ||
bb8c093b | 288 | struct iwl4965_power_mgr { |
5d08cd1d | 289 | spinlock_t lock; |
bb8c093b CH |
290 | struct iwl4965_power_vec_entry pwr_range_0[IWL_POWER_AC]; |
291 | struct iwl4965_power_vec_entry pwr_range_1[IWL_POWER_AC]; | |
5d08cd1d CH |
292 | u8 active_index; |
293 | u32 dtim_val; | |
294 | }; | |
295 | ||
296 | #define IEEE80211_DATA_LEN 2304 | |
297 | #define IEEE80211_4ADDR_LEN 30 | |
298 | #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) | |
299 | #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) | |
300 | ||
bb8c093b | 301 | struct iwl4965_frame { |
5d08cd1d CH |
302 | union { |
303 | struct ieee80211_hdr frame; | |
bb8c093b | 304 | struct iwl4965_tx_beacon_cmd beacon; |
5d08cd1d CH |
305 | u8 raw[IEEE80211_FRAME_LEN]; |
306 | u8 cmd[360]; | |
307 | } u; | |
308 | struct list_head list; | |
309 | }; | |
310 | ||
311 | #define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf) | |
312 | #define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8) | |
313 | #define SEQ_TO_INDEX(x) (x & 0xff) | |
314 | #define INDEX_TO_SEQ(x) (x & 0xff) | |
315 | #define SEQ_HUGE_FRAME (0x4000) | |
316 | #define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000) | |
317 | #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) | |
318 | #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) | |
319 | #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) | |
320 | ||
321 | enum { | |
322 | /* CMD_SIZE_NORMAL = 0, */ | |
323 | CMD_SIZE_HUGE = (1 << 0), | |
324 | /* CMD_SYNC = 0, */ | |
325 | CMD_ASYNC = (1 << 1), | |
326 | /* CMD_NO_SKB = 0, */ | |
327 | CMD_WANT_SKB = (1 << 2), | |
328 | }; | |
329 | ||
bb8c093b CH |
330 | struct iwl4965_cmd; |
331 | struct iwl4965_priv; | |
5d08cd1d | 332 | |
bb8c093b CH |
333 | struct iwl4965_cmd_meta { |
334 | struct iwl4965_cmd_meta *source; | |
5d08cd1d CH |
335 | union { |
336 | struct sk_buff *skb; | |
bb8c093b CH |
337 | int (*callback)(struct iwl4965_priv *priv, |
338 | struct iwl4965_cmd *cmd, struct sk_buff *skb); | |
5d08cd1d CH |
339 | } __attribute__ ((packed)) u; |
340 | ||
341 | /* The CMD_SIZE_HUGE flag bit indicates that the command | |
342 | * structure is stored at the end of the shared queue memory. */ | |
343 | u32 flags; | |
344 | ||
345 | } __attribute__ ((packed)); | |
346 | ||
bc47279f BC |
347 | /** |
348 | * struct iwl4965_cmd | |
349 | * | |
350 | * For allocation of the command and tx queues, this establishes the overall | |
351 | * size of the largest command we send to uCode, except for a scan command | |
352 | * (which is relatively huge; space is allocated separately). | |
353 | */ | |
bb8c093b | 354 | struct iwl4965_cmd { |
bc47279f BC |
355 | struct iwl4965_cmd_meta meta; /* driver data */ |
356 | struct iwl4965_cmd_header hdr; /* uCode API */ | |
5d08cd1d | 357 | union { |
bb8c093b CH |
358 | struct iwl4965_addsta_cmd addsta; |
359 | struct iwl4965_led_cmd led; | |
5d08cd1d CH |
360 | u32 flags; |
361 | u8 val8; | |
362 | u16 val16; | |
363 | u32 val32; | |
bb8c093b CH |
364 | struct iwl4965_bt_cmd bt; |
365 | struct iwl4965_rxon_time_cmd rxon_time; | |
366 | struct iwl4965_powertable_cmd powertable; | |
367 | struct iwl4965_qosparam_cmd qosparam; | |
368 | struct iwl4965_tx_cmd tx; | |
369 | struct iwl4965_tx_beacon_cmd tx_beacon; | |
370 | struct iwl4965_rxon_assoc_cmd rxon_assoc; | |
5d08cd1d CH |
371 | u8 *indirect; |
372 | u8 payload[360]; | |
373 | } __attribute__ ((packed)) cmd; | |
374 | } __attribute__ ((packed)); | |
375 | ||
bb8c093b | 376 | struct iwl4965_host_cmd { |
5d08cd1d CH |
377 | u8 id; |
378 | u16 len; | |
bb8c093b | 379 | struct iwl4965_cmd_meta meta; |
5d08cd1d CH |
380 | const void *data; |
381 | }; | |
382 | ||
bb8c093b CH |
383 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl4965_cmd) - \ |
384 | sizeof(struct iwl4965_cmd_meta)) | |
5d08cd1d CH |
385 | |
386 | /* | |
387 | * RX related structures and functions | |
388 | */ | |
389 | #define RX_FREE_BUFFERS 64 | |
390 | #define RX_LOW_WATERMARK 8 | |
391 | ||
392 | #define SUP_RATE_11A_MAX_NUM_CHANNELS 8 | |
393 | #define SUP_RATE_11B_MAX_NUM_CHANNELS 4 | |
394 | #define SUP_RATE_11G_MAX_NUM_CHANNELS 12 | |
395 | ||
396 | /** | |
bb8c093b | 397 | * struct iwl4965_rx_queue - Rx queue |
5d08cd1d CH |
398 | * @processed: Internal index to last handled Rx packet |
399 | * @read: Shared index to newest available Rx buffer | |
400 | * @write: Shared index to oldest written Rx packet | |
401 | * @free_count: Number of pre-allocated buffers in rx_free | |
402 | * @rx_free: list of free SKBs for use | |
403 | * @rx_used: List of Rx buffers with no SKB | |
404 | * @need_update: flag to indicate we need to update read/write index | |
405 | * | |
bb8c093b | 406 | * NOTE: rx_free and rx_used are used as a FIFO for iwl4965_rx_mem_buffers |
5d08cd1d | 407 | */ |
bb8c093b | 408 | struct iwl4965_rx_queue { |
5d08cd1d CH |
409 | __le32 *bd; |
410 | dma_addr_t dma_addr; | |
bb8c093b CH |
411 | struct iwl4965_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; |
412 | struct iwl4965_rx_mem_buffer *queue[RX_QUEUE_SIZE]; | |
5d08cd1d CH |
413 | u32 processed; |
414 | u32 read; | |
415 | u32 write; | |
416 | u32 free_count; | |
417 | struct list_head rx_free; | |
418 | struct list_head rx_used; | |
419 | int need_update; | |
420 | spinlock_t lock; | |
421 | }; | |
422 | ||
423 | #define IWL_SUPPORTED_RATES_IE_LEN 8 | |
424 | ||
425 | #define SCAN_INTERVAL 100 | |
426 | ||
427 | #define MAX_A_CHANNELS 252 | |
428 | #define MIN_A_CHANNELS 7 | |
429 | ||
430 | #define MAX_B_CHANNELS 14 | |
431 | #define MIN_B_CHANNELS 1 | |
432 | ||
433 | #define STATUS_HCMD_ACTIVE 0 /* host command in progress */ | |
434 | #define STATUS_INT_ENABLED 1 | |
435 | #define STATUS_RF_KILL_HW 2 | |
436 | #define STATUS_RF_KILL_SW 3 | |
437 | #define STATUS_INIT 4 | |
438 | #define STATUS_ALIVE 5 | |
439 | #define STATUS_READY 6 | |
440 | #define STATUS_TEMPERATURE 7 | |
441 | #define STATUS_GEO_CONFIGURED 8 | |
442 | #define STATUS_EXIT_PENDING 9 | |
443 | #define STATUS_IN_SUSPEND 10 | |
444 | #define STATUS_STATISTICS 11 | |
445 | #define STATUS_SCANNING 12 | |
446 | #define STATUS_SCAN_ABORTING 13 | |
447 | #define STATUS_SCAN_HW 14 | |
448 | #define STATUS_POWER_PMI 15 | |
449 | #define STATUS_FW_ERROR 16 | |
450 | ||
451 | #define MAX_TID_COUNT 9 | |
452 | ||
453 | #define IWL_INVALID_RATE 0xFF | |
454 | #define IWL_INVALID_VALUE -1 | |
455 | ||
c8b0e6e1 CH |
456 | #ifdef CONFIG_IWL4965_HT |
457 | #ifdef CONFIG_IWL4965_HT_AGG | |
bc47279f BC |
458 | /** |
459 | * struct iwl4965_ht_agg -- aggregation status while waiting for block-ack | |
460 | * @txq_id: Tx queue used for Tx attempt | |
461 | * @frame_count: # frames attempted by Tx command | |
462 | * @wait_for_ba: Expect block-ack before next Tx reply | |
463 | * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window | |
464 | * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window | |
465 | * @bitmap1: High order, one bit for each frame pending ACK in Tx window | |
466 | * @rate_n_flags: Rate at which Tx was attempted | |
467 | * | |
468 | * If REPLY_TX indicates that aggregation was attempted, driver must wait | |
469 | * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info | |
470 | * until block ack arrives. | |
471 | */ | |
bb8c093b | 472 | struct iwl4965_ht_agg { |
5d08cd1d CH |
473 | u16 txq_id; |
474 | u16 frame_count; | |
475 | u16 wait_for_ba; | |
476 | u16 start_idx; | |
477 | u32 bitmap0; | |
478 | u32 bitmap1; | |
479 | u32 rate_n_flags; | |
480 | }; | |
c8b0e6e1 CH |
481 | #endif /* CONFIG_IWL4965_HT_AGG */ |
482 | #endif /* CONFIG_IWL4965_HT */ | |
5d08cd1d | 483 | |
bb8c093b | 484 | struct iwl4965_tid_data { |
5d08cd1d | 485 | u16 seq_number; |
c8b0e6e1 CH |
486 | #ifdef CONFIG_IWL4965_HT |
487 | #ifdef CONFIG_IWL4965_HT_AGG | |
bb8c093b | 488 | struct iwl4965_ht_agg agg; |
c8b0e6e1 CH |
489 | #endif /* CONFIG_IWL4965_HT_AGG */ |
490 | #endif /* CONFIG_IWL4965_HT */ | |
5d08cd1d CH |
491 | }; |
492 | ||
bb8c093b | 493 | struct iwl4965_hw_key { |
5d08cd1d CH |
494 | enum ieee80211_key_alg alg; |
495 | int keylen; | |
496 | u8 key[32]; | |
497 | }; | |
498 | ||
bb8c093b | 499 | union iwl4965_ht_rate_supp { |
5d08cd1d CH |
500 | u16 rates; |
501 | struct { | |
502 | u8 siso_rate; | |
503 | u8 mimo_rate; | |
504 | }; | |
505 | }; | |
506 | ||
c8b0e6e1 | 507 | #ifdef CONFIG_IWL4965_HT |
5d08cd1d CH |
508 | #define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3) |
509 | #define HT_IE_MAX_AMSDU_SIZE_4K (0) | |
510 | #define CFG_HT_MPDU_DENSITY_2USEC (0x5) | |
511 | #define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_2USEC | |
512 | ||
9e0cc6de RR |
513 | struct iwl_ht_info { |
514 | /* self configuration data */ | |
5d08cd1d | 515 | u8 is_ht; |
9e0cc6de | 516 | u8 supported_chan_width; |
5d08cd1d | 517 | u16 tx_mimo_ps_mode; |
9e0cc6de RR |
518 | u8 is_green_field; |
519 | u8 sgf; | |
5d08cd1d CH |
520 | u8 max_amsdu_size; |
521 | u8 ampdu_factor; | |
522 | u8 mpdu_density; | |
9e0cc6de RR |
523 | u8 supp_mcs_set[16]; |
524 | /* BSS related data */ | |
525 | u8 control_channel; | |
5d08cd1d | 526 | u8 extension_chan_offset; |
5d08cd1d | 527 | u8 tx_chan_width; |
9e0cc6de RR |
528 | u8 ht_protection; |
529 | u8 non_GF_STA_present; | |
5d08cd1d | 530 | }; |
c8b0e6e1 | 531 | #endif /*CONFIG_IWL4965_HT */ |
5d08cd1d | 532 | |
c8b0e6e1 | 533 | #ifdef CONFIG_IWL4965_QOS |
5d08cd1d | 534 | |
bb8c093b | 535 | union iwl4965_qos_capabity { |
5d08cd1d CH |
536 | struct { |
537 | u8 edca_count:4; /* bit 0-3 */ | |
538 | u8 q_ack:1; /* bit 4 */ | |
539 | u8 queue_request:1; /* bit 5 */ | |
540 | u8 txop_request:1; /* bit 6 */ | |
541 | u8 reserved:1; /* bit 7 */ | |
542 | } q_AP; | |
543 | struct { | |
544 | u8 acvo_APSD:1; /* bit 0 */ | |
545 | u8 acvi_APSD:1; /* bit 1 */ | |
546 | u8 ac_bk_APSD:1; /* bit 2 */ | |
547 | u8 ac_be_APSD:1; /* bit 3 */ | |
548 | u8 q_ack:1; /* bit 4 */ | |
549 | u8 max_len:2; /* bit 5-6 */ | |
550 | u8 more_data_ack:1; /* bit 7 */ | |
551 | } q_STA; | |
552 | u8 val; | |
553 | }; | |
554 | ||
555 | /* QoS structures */ | |
bb8c093b | 556 | struct iwl4965_qos_info { |
5d08cd1d CH |
557 | int qos_enable; |
558 | int qos_active; | |
bb8c093b CH |
559 | union iwl4965_qos_capabity qos_cap; |
560 | struct iwl4965_qosparam_cmd def_qos_parm; | |
5d08cd1d | 561 | }; |
c8b0e6e1 | 562 | #endif /*CONFIG_IWL4965_QOS */ |
5d08cd1d CH |
563 | |
564 | #define STA_PS_STATUS_WAKE 0 | |
565 | #define STA_PS_STATUS_SLEEP 1 | |
566 | ||
bb8c093b CH |
567 | struct iwl4965_station_entry { |
568 | struct iwl4965_addsta_cmd sta; | |
569 | struct iwl4965_tid_data tid[MAX_TID_COUNT]; | |
5d08cd1d CH |
570 | u8 used; |
571 | u8 ps_status; | |
bb8c093b | 572 | struct iwl4965_hw_key keyinfo; |
5d08cd1d CH |
573 | }; |
574 | ||
575 | /* one for each uCode image (inst/data, boot/init/runtime) */ | |
576 | struct fw_desc { | |
577 | void *v_addr; /* access by driver */ | |
578 | dma_addr_t p_addr; /* access by card's busmaster DMA */ | |
579 | u32 len; /* bytes */ | |
580 | }; | |
581 | ||
582 | /* uCode file layout */ | |
bb8c093b | 583 | struct iwl4965_ucode { |
5d08cd1d CH |
584 | __le32 ver; /* major/minor/subminor */ |
585 | __le32 inst_size; /* bytes of runtime instructions */ | |
586 | __le32 data_size; /* bytes of runtime data */ | |
587 | __le32 init_size; /* bytes of initialization instructions */ | |
588 | __le32 init_data_size; /* bytes of initialization data */ | |
589 | __le32 boot_size; /* bytes of bootstrap instructions */ | |
590 | u8 data[0]; /* data in same order as "size" elements */ | |
591 | }; | |
592 | ||
593 | #define IWL_IBSS_MAC_HASH_SIZE 32 | |
594 | ||
bb8c093b | 595 | struct iwl4965_ibss_seq { |
5d08cd1d CH |
596 | u8 mac[ETH_ALEN]; |
597 | u16 seq_num; | |
598 | u16 frag_num; | |
599 | unsigned long packet_time; | |
600 | struct list_head list; | |
601 | }; | |
602 | ||
bc47279f BC |
603 | /** |
604 | * struct iwl4965_driver_hw_info | |
605 | * @max_txq_num: Max # Tx queues supported | |
606 | * @ac_queue_count: # Tx queues for EDCA Access Categories (AC) | |
607 | * @tx_cmd_len: Size of Tx command (but not including frame itself) | |
608 | * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) | |
609 | * @rx_buffer_size: | |
610 | * @max_rxq_log: Log-base-2 of max_rxq_size | |
611 | * @max_stations: | |
612 | * @bcast_sta_id: | |
613 | * @shared_virt: Pointer to driver/uCode shared Tx Byte Counts and Rx status | |
614 | * @shared_phys: Physical Pointer to Tx Byte Counts and Rx status | |
615 | */ | |
bb8c093b | 616 | struct iwl4965_driver_hw_info { |
5d08cd1d CH |
617 | u16 max_txq_num; |
618 | u16 ac_queue_count; | |
619 | u16 tx_cmd_len; | |
620 | u16 max_rxq_size; | |
621 | u32 rx_buffer_size; | |
622 | u16 max_rxq_log; | |
623 | u8 max_stations; | |
624 | u8 bcast_sta_id; | |
625 | void *shared_virt; | |
626 | dma_addr_t shared_phys; | |
627 | }; | |
628 | ||
5d08cd1d CH |
629 | #define HT_SHORT_GI_20MHZ_ONLY (1 << 0) |
630 | #define HT_SHORT_GI_40MHZ_ONLY (1 << 1) | |
631 | ||
632 | ||
bb8c093b | 633 | #define IWL_RX_HDR(x) ((struct iwl4965_rx_frame_hdr *)(\ |
5d08cd1d CH |
634 | x->u.rx_frame.stats.payload + \ |
635 | x->u.rx_frame.stats.phy_count)) | |
bb8c093b | 636 | #define IWL_RX_END(x) ((struct iwl4965_rx_frame_end *)(\ |
5d08cd1d CH |
637 | IWL_RX_HDR(x)->payload + \ |
638 | le16_to_cpu(IWL_RX_HDR(x)->len))) | |
639 | #define IWL_RX_STATS(x) (&x->u.rx_frame.stats) | |
640 | #define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload) | |
641 | ||
642 | ||
643 | /****************************************************************************** | |
644 | * | |
645 | * Functions implemented in iwl-base.c which are forward declared here | |
646 | * for use by iwl-*.c | |
647 | * | |
648 | *****************************************************************************/ | |
bb8c093b CH |
649 | struct iwl4965_addsta_cmd; |
650 | extern int iwl4965_send_add_station(struct iwl4965_priv *priv, | |
651 | struct iwl4965_addsta_cmd *sta, u8 flags); | |
652 | extern u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *bssid, | |
5d08cd1d | 653 | int is_ap, u8 flags); |
bb8c093b | 654 | extern int iwl4965_is_network_packet(struct iwl4965_priv *priv, |
5d08cd1d | 655 | struct ieee80211_hdr *header); |
bb8c093b CH |
656 | extern int iwl4965_power_init_handle(struct iwl4965_priv *priv); |
657 | extern int iwl4965_eeprom_init(struct iwl4965_priv *priv); | |
c8b0e6e1 | 658 | #ifdef CONFIG_IWL4965_DEBUG |
bb8c093b CH |
659 | extern void iwl4965_report_frame(struct iwl4965_priv *priv, |
660 | struct iwl4965_rx_packet *pkt, | |
5d08cd1d CH |
661 | struct ieee80211_hdr *header, int group100); |
662 | #else | |
bb8c093b CH |
663 | static inline void iwl4965_report_frame(struct iwl4965_priv *priv, |
664 | struct iwl4965_rx_packet *pkt, | |
5d08cd1d CH |
665 | struct ieee80211_hdr *header, |
666 | int group100) {} | |
667 | #endif | |
bb8c093b CH |
668 | extern void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv, |
669 | struct iwl4965_rx_mem_buffer *rxb, | |
5d08cd1d CH |
670 | void *data, short len, |
671 | struct ieee80211_rx_status *stats, | |
672 | u16 phy_flags); | |
bb8c093b CH |
673 | extern int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, |
674 | struct ieee80211_hdr *header); | |
675 | extern int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv); | |
676 | extern void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, | |
677 | struct iwl4965_rx_queue *rxq); | |
678 | extern int iwl4965_calc_db_from_ratio(int sig_ratio); | |
679 | extern int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm); | |
680 | extern int iwl4965_tx_queue_init(struct iwl4965_priv *priv, | |
681 | struct iwl4965_tx_queue *txq, int count, u32 id); | |
682 | extern void iwl4965_rx_replenish(void *data); | |
683 | extern void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq); | |
684 | extern int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, | |
5d08cd1d | 685 | const void *data); |
bb8c093b CH |
686 | extern int __must_check iwl4965_send_cmd(struct iwl4965_priv *priv, |
687 | struct iwl4965_host_cmd *cmd); | |
688 | extern unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv, | |
5d08cd1d CH |
689 | struct ieee80211_hdr *hdr, |
690 | const u8 *dest, int left); | |
bb8c093b CH |
691 | extern int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, |
692 | struct iwl4965_rx_queue *q); | |
693 | extern int iwl4965_send_statistics_request(struct iwl4965_priv *priv); | |
694 | extern void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb, | |
5d08cd1d CH |
695 | u32 decrypt_res, |
696 | struct ieee80211_rx_status *stats); | |
697 | extern __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr); | |
698 | ||
bb8c093b | 699 | extern const u8 iwl4965_broadcast_addr[ETH_ALEN]; |
5d08cd1d CH |
700 | |
701 | /* | |
702 | * Currently used by iwl-3945-rs... look at restructuring so that it doesn't | |
703 | * call this... todo... fix that. | |
704 | */ | |
bb8c093b | 705 | extern u8 iwl4965_sync_station(struct iwl4965_priv *priv, int sta_id, |
5d08cd1d CH |
706 | u16 tx_rate, u8 flags); |
707 | ||
708 | /****************************************************************************** | |
709 | * | |
710 | * Functions implemented in iwl-[34]*.c which are forward declared here | |
711 | * for use by iwl-base.c | |
712 | * | |
713 | * NOTE: The implementation of these functions are hardware specific | |
714 | * which is why they are in the hardware specific files (vs. iwl-base.c) | |
715 | * | |
716 | * Naming convention -- | |
bb8c093b CH |
717 | * iwl4965_ <-- Its part of iwlwifi (should be changed to iwl4965_) |
718 | * iwl4965_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW) | |
5d08cd1d | 719 | * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) |
bb8c093b CH |
720 | * iwl4965_bg_ <-- Called from work queue context |
721 | * iwl4965_mac_ <-- mac80211 callback | |
5d08cd1d CH |
722 | * |
723 | ****************************************************************************/ | |
bb8c093b CH |
724 | extern void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv); |
725 | extern void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv); | |
726 | extern void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv); | |
727 | extern int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv); | |
728 | extern int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv); | |
729 | extern int iwl4965_hw_nic_init(struct iwl4965_priv *priv); | |
730 | extern int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv); | |
731 | extern void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv); | |
732 | extern void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv); | |
733 | extern int iwl4965_hw_nic_reset(struct iwl4965_priv *priv); | |
734 | extern int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *tfd, | |
5d08cd1d | 735 | dma_addr_t addr, u16 len); |
bb8c093b CH |
736 | extern int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq); |
737 | extern int iwl4965_hw_get_temperature(struct iwl4965_priv *priv); | |
738 | extern int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, | |
739 | struct iwl4965_tx_queue *txq); | |
740 | extern unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv, | |
741 | struct iwl4965_frame *frame, u8 rate); | |
742 | extern int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv); | |
743 | extern void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv, | |
744 | struct iwl4965_cmd *cmd, | |
5d08cd1d CH |
745 | struct ieee80211_tx_control *ctrl, |
746 | struct ieee80211_hdr *hdr, | |
747 | int sta_id, int tx_id); | |
bb8c093b CH |
748 | extern int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv); |
749 | extern int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power); | |
750 | extern void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv, | |
751 | struct iwl4965_rx_mem_buffer *rxb); | |
752 | extern void iwl4965_disable_events(struct iwl4965_priv *priv); | |
753 | extern int iwl4965_get_temperature(const struct iwl4965_priv *priv); | |
5d08cd1d CH |
754 | |
755 | /** | |
bb8c093b | 756 | * iwl4965_hw_find_station - Find station id for a given BSSID |
5d08cd1d CH |
757 | * @bssid: MAC address of station ID to find |
758 | * | |
759 | * NOTE: This should not be hardware specific but the code has | |
760 | * not yet been merged into a single common layer for managing the | |
761 | * station tables. | |
762 | */ | |
bb8c093b | 763 | extern u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *bssid); |
5d08cd1d | 764 | |
bb8c093b CH |
765 | extern int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel); |
766 | extern int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index); | |
5d08cd1d | 767 | |
bb8c093b | 768 | struct iwl4965_priv; |
b481de9c ZY |
769 | |
770 | /* | |
771 | * Forward declare iwl-4965.c functions for iwl-base.c | |
772 | */ | |
bb8c093b CH |
773 | extern int iwl4965_eeprom_acquire_semaphore(struct iwl4965_priv *priv); |
774 | extern void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv); | |
b481de9c | 775 | |
bb8c093b CH |
776 | extern int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv, |
777 | struct iwl4965_tx_queue *txq, | |
b481de9c | 778 | u16 byte_cnt); |
bb8c093b | 779 | extern void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr, |
b481de9c | 780 | int is_ap); |
bb8c093b CH |
781 | extern void iwl4965_set_rxon_chain(struct iwl4965_priv *priv); |
782 | extern int iwl4965_tx_cmd(struct iwl4965_priv *priv, struct iwl4965_cmd *out_cmd, | |
b481de9c ZY |
783 | u8 sta_id, dma_addr_t txcmd_phys, |
784 | struct ieee80211_hdr *hdr, u8 hdr_len, | |
785 | struct ieee80211_tx_control *ctrl, void *sta_in); | |
bb8c093b CH |
786 | extern int iwl4965_alive_notify(struct iwl4965_priv *priv); |
787 | extern void iwl4965_update_rate_scaling(struct iwl4965_priv *priv, u8 mode); | |
788 | extern void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index); | |
789 | ||
790 | extern void iwl4965_chain_noise_reset(struct iwl4965_priv *priv); | |
791 | extern void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, | |
b481de9c | 792 | u8 force); |
bb8c093b | 793 | extern int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv, int phymode, |
b481de9c | 794 | u16 channel, |
bb8c093b | 795 | const struct iwl4965_eeprom_channel *eeprom_ch, |
b481de9c | 796 | u8 fat_extension_channel); |
bb8c093b | 797 | extern void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv); |
b481de9c | 798 | |
c8b0e6e1 | 799 | #ifdef CONFIG_IWL4965_HT |
326eeee8 RR |
800 | extern void iwl4965_init_ht_hw_capab(struct ieee80211_ht_info *ht_info, |
801 | int mode); | |
fd105e79 RR |
802 | extern void iwl4965_set_rxon_ht(struct iwl4965_priv *priv, |
803 | struct iwl_ht_info *ht_info); | |
c8b0e6e1 | 804 | #ifdef CONFIG_IWL4965_HT_AGG |
bb8c093b | 805 | extern int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, u8 *da, |
b481de9c | 806 | u16 tid, u16 *start_seq_num); |
bb8c093b | 807 | extern int iwl4965_mac_ht_rx_agg_start(struct ieee80211_hw *hw, u8 *da, |
b481de9c | 808 | u16 tid, u16 start_seq_num); |
bb8c093b | 809 | extern int iwl4965_mac_ht_rx_agg_stop(struct ieee80211_hw *hw, u8 *da, |
b481de9c | 810 | u16 tid, int generator); |
bb8c093b | 811 | extern int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, u8 *da, |
b481de9c | 812 | u16 tid, int generator); |
bb8c093b | 813 | extern void iwl4965_turn_off_agg(struct iwl4965_priv *priv, u8 tid); |
c8b0e6e1 CH |
814 | #endif /* CONFIG_IWL4965_HT_AGG */ |
815 | #endif /*CONFIG_IWL4965_HT */ | |
b481de9c ZY |
816 | /* Structures, enum, and defines specific to the 4965 */ |
817 | ||
818 | #define IWL4965_KW_SIZE 0x1000 /*4k */ | |
819 | ||
bb8c093b | 820 | struct iwl4965_kw { |
b481de9c ZY |
821 | dma_addr_t dma_addr; |
822 | void *v_addr; | |
823 | size_t size; | |
824 | }; | |
825 | ||
826 | #define TID_QUEUE_CELL_SPACING 50 /*mS */ | |
827 | #define TID_QUEUE_MAX_SIZE 20 | |
828 | #define TID_ROUND_VALUE 5 /* mS */ | |
829 | #define TID_MAX_LOAD_COUNT 8 | |
830 | ||
831 | #define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING) | |
832 | #define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y)) | |
833 | ||
834 | #define TID_ALL_ENABLED 0x7f | |
835 | #define TID_ALL_SPECIFIED 0xff | |
836 | #define TID_AGG_TPT_THREHOLD 0x0 | |
837 | ||
838 | #define IWL_CHANNEL_WIDTH_20MHZ 0 | |
839 | #define IWL_CHANNEL_WIDTH_40MHZ 1 | |
840 | ||
841 | #define IWL_MIMO_PS_STATIC 0 | |
842 | #define IWL_MIMO_PS_NONE 3 | |
843 | #define IWL_MIMO_PS_DYNAMIC 1 | |
844 | #define IWL_MIMO_PS_INVALID 2 | |
845 | ||
846 | #define IWL_OPERATION_MODE_AUTO 0 | |
847 | #define IWL_OPERATION_MODE_HT_ONLY 1 | |
848 | #define IWL_OPERATION_MODE_MIXED 2 | |
849 | #define IWL_OPERATION_MODE_20MHZ 3 | |
850 | ||
851 | #define IWL_EXT_CHANNEL_OFFSET_AUTO 0 | |
852 | #define IWL_EXT_CHANNEL_OFFSET_ABOVE 1 | |
853 | #define IWL_EXT_CHANNEL_OFFSET_ 2 | |
854 | #define IWL_EXT_CHANNEL_OFFSET_BELOW 3 | |
855 | #define IWL_EXT_CHANNEL_OFFSET_MAX 4 | |
856 | ||
857 | #define NRG_NUM_PREV_STAT_L 20 | |
858 | #define NUM_RX_CHAINS (3) | |
859 | ||
b481de9c | 860 | #define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000 |
b481de9c | 861 | |
bb8c093b | 862 | struct iwl4965_traffic_load { |
b481de9c ZY |
863 | unsigned long time_stamp; |
864 | u32 packet_count[TID_QUEUE_MAX_SIZE]; | |
865 | u8 queue_count; | |
866 | u8 head; | |
867 | u32 total; | |
868 | }; | |
869 | ||
c8b0e6e1 | 870 | #ifdef CONFIG_IWL4965_HT_AGG |
abceddb4 BC |
871 | /** |
872 | * struct iwl4965_agg_control | |
873 | * @requested_ba: bit map of tids requesting aggregation/block-ack | |
874 | * @granted_ba: bit map of tids granted aggregation/block-ack | |
875 | */ | |
bb8c093b | 876 | struct iwl4965_agg_control { |
b481de9c ZY |
877 | unsigned long next_retry; |
878 | u32 wait_for_agg_status; | |
879 | u32 tid_retry; | |
880 | u32 requested_ba; | |
881 | u32 granted_ba; | |
882 | u8 auto_agg; | |
883 | u32 tid_traffic_load_threshold; | |
884 | u32 ba_timeout; | |
bb8c093b | 885 | struct iwl4965_traffic_load traffic_load[TID_MAX_LOAD_COUNT]; |
b481de9c | 886 | }; |
c8b0e6e1 | 887 | #endif /*CONFIG_IWL4965_HT_AGG */ |
b481de9c | 888 | |
bb8c093b | 889 | struct iwl4965_lq_mngr { |
c8b0e6e1 | 890 | #ifdef CONFIG_IWL4965_HT_AGG |
bb8c093b | 891 | struct iwl4965_agg_control agg_ctrl; |
b481de9c ZY |
892 | #endif |
893 | spinlock_t lock; | |
894 | s32 max_window_size; | |
895 | s32 *expected_tpt; | |
896 | u8 *next_higher_rate; | |
897 | u8 *next_lower_rate; | |
898 | unsigned long stamp; | |
899 | unsigned long stamp_last; | |
900 | u32 flush_time; | |
901 | u32 tx_packets; | |
902 | u8 lq_ready; | |
903 | }; | |
904 | ||
905 | ||
906 | /* Sensitivity and chain noise calibration */ | |
907 | #define INTERFERENCE_DATA_AVAILABLE __constant_cpu_to_le32(1) | |
908 | #define INITIALIZATION_VALUE 0xFFFF | |
909 | #define CAL_NUM_OF_BEACONS 20 | |
910 | #define MAXIMUM_ALLOWED_PATHLOSS 15 | |
911 | ||
b481de9c ZY |
912 | #define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3 |
913 | ||
914 | #define MAX_FA_OFDM 50 | |
915 | #define MIN_FA_OFDM 5 | |
916 | #define MAX_FA_CCK 50 | |
917 | #define MIN_FA_CCK 5 | |
918 | ||
919 | #define NRG_MIN_CCK 97 | |
920 | #define NRG_MAX_CCK 0 | |
921 | ||
922 | #define AUTO_CORR_MIN_OFDM 85 | |
923 | #define AUTO_CORR_MIN_OFDM_MRC 170 | |
924 | #define AUTO_CORR_MIN_OFDM_X1 105 | |
925 | #define AUTO_CORR_MIN_OFDM_MRC_X1 220 | |
926 | #define AUTO_CORR_MAX_OFDM 120 | |
927 | #define AUTO_CORR_MAX_OFDM_MRC 210 | |
928 | #define AUTO_CORR_MAX_OFDM_X1 140 | |
929 | #define AUTO_CORR_MAX_OFDM_MRC_X1 270 | |
930 | #define AUTO_CORR_STEP_OFDM 1 | |
931 | ||
932 | #define AUTO_CORR_MIN_CCK (125) | |
933 | #define AUTO_CORR_MAX_CCK (200) | |
934 | #define AUTO_CORR_MIN_CCK_MRC 200 | |
935 | #define AUTO_CORR_MAX_CCK_MRC 400 | |
936 | #define AUTO_CORR_STEP_CCK 3 | |
937 | #define AUTO_CORR_MAX_TH_CCK 160 | |
938 | ||
b481de9c ZY |
939 | #define NRG_DIFF 2 |
940 | #define NRG_STEP_CCK 2 | |
941 | #define NRG_MARGIN 8 | |
942 | #define MAX_NUMBER_CCK_NO_FA 100 | |
943 | ||
944 | #define AUTO_CORR_CCK_MIN_VAL_DEF (125) | |
945 | ||
946 | #define CHAIN_A 0 | |
947 | #define CHAIN_B 1 | |
948 | #define CHAIN_C 2 | |
949 | #define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4 | |
950 | #define ALL_BAND_FILTER 0xFF00 | |
951 | #define IN_BAND_FILTER 0xFF | |
952 | #define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF | |
953 | ||
bb8c093b | 954 | enum iwl4965_false_alarm_state { |
b481de9c ZY |
955 | IWL_FA_TOO_MANY = 0, |
956 | IWL_FA_TOO_FEW = 1, | |
957 | IWL_FA_GOOD_RANGE = 2, | |
958 | }; | |
959 | ||
bb8c093b | 960 | enum iwl4965_chain_noise_state { |
b481de9c ZY |
961 | IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ |
962 | IWL_CHAIN_NOISE_ACCUMULATE = 1, | |
963 | IWL_CHAIN_NOISE_CALIBRATED = 2, | |
964 | }; | |
965 | ||
bb8c093b | 966 | enum iwl4965_sensitivity_state { |
b481de9c ZY |
967 | IWL_SENS_CALIB_ALLOWED = 0, |
968 | IWL_SENS_CALIB_NEED_REINIT = 1, | |
969 | }; | |
970 | ||
bb8c093b | 971 | enum iwl4965_calib_enabled_state { |
b481de9c ZY |
972 | IWL_CALIB_DISABLED = 0, /* must be 0 */ |
973 | IWL_CALIB_ENABLED = 1, | |
974 | }; | |
975 | ||
976 | struct statistics_general_data { | |
977 | u32 beacon_silence_rssi_a; | |
978 | u32 beacon_silence_rssi_b; | |
979 | u32 beacon_silence_rssi_c; | |
980 | u32 beacon_energy_a; | |
981 | u32 beacon_energy_b; | |
982 | u32 beacon_energy_c; | |
983 | }; | |
984 | ||
985 | /* Sensitivity calib data */ | |
bb8c093b | 986 | struct iwl4965_sensitivity_data { |
b481de9c ZY |
987 | u32 auto_corr_ofdm; |
988 | u32 auto_corr_ofdm_mrc; | |
989 | u32 auto_corr_ofdm_x1; | |
990 | u32 auto_corr_ofdm_mrc_x1; | |
991 | u32 auto_corr_cck; | |
992 | u32 auto_corr_cck_mrc; | |
993 | ||
994 | u32 last_bad_plcp_cnt_ofdm; | |
995 | u32 last_fa_cnt_ofdm; | |
996 | u32 last_bad_plcp_cnt_cck; | |
997 | u32 last_fa_cnt_cck; | |
998 | ||
999 | u32 nrg_curr_state; | |
1000 | u32 nrg_prev_state; | |
1001 | u32 nrg_value[10]; | |
1002 | u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L]; | |
1003 | u32 nrg_silence_ref; | |
1004 | u32 nrg_energy_idx; | |
1005 | u32 nrg_silence_idx; | |
1006 | u32 nrg_th_cck; | |
1007 | s32 nrg_auto_corr_silence_diff; | |
1008 | u32 num_in_cck_no_fa; | |
1009 | u32 nrg_th_ofdm; | |
1010 | ||
1011 | u8 state; | |
1012 | }; | |
1013 | ||
1014 | /* Chain noise (differential Rx gain) calib data */ | |
bb8c093b | 1015 | struct iwl4965_chain_noise_data { |
b481de9c ZY |
1016 | u8 state; |
1017 | u16 beacon_count; | |
1018 | u32 chain_noise_a; | |
1019 | u32 chain_noise_b; | |
1020 | u32 chain_noise_c; | |
1021 | u32 chain_signal_a; | |
1022 | u32 chain_signal_b; | |
1023 | u32 chain_signal_c; | |
1024 | u8 disconn_array[NUM_RX_CHAINS]; | |
1025 | u8 delta_gain_code[NUM_RX_CHAINS]; | |
1026 | u8 radio_write; | |
1027 | }; | |
1028 | ||
abceddb4 BC |
1029 | #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ |
1030 | #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ | |
b481de9c | 1031 | |
5d08cd1d | 1032 | |
c8b0e6e1 | 1033 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
5d08cd1d CH |
1034 | |
1035 | enum { | |
1036 | MEASUREMENT_READY = (1 << 0), | |
1037 | MEASUREMENT_ACTIVE = (1 << 1), | |
1038 | }; | |
1039 | ||
1040 | #endif | |
1041 | ||
bb8c093b | 1042 | struct iwl4965_priv { |
5d08cd1d CH |
1043 | |
1044 | /* ieee device used by generic ieee processing code */ | |
1045 | struct ieee80211_hw *hw; | |
1046 | struct ieee80211_channel *ieee_channels; | |
1047 | struct ieee80211_rate *ieee_rates; | |
76bb77e0 | 1048 | struct ieee80211_conf *cache_conf; |
5d08cd1d CH |
1049 | |
1050 | /* temporary frame storage list */ | |
1051 | struct list_head free_frames; | |
1052 | int frames_count; | |
1053 | ||
1054 | u8 phymode; | |
1055 | int alloc_rxb_skb; | |
1056 | ||
bb8c093b CH |
1057 | void (*rx_handlers[REPLY_MAX])(struct iwl4965_priv *priv, |
1058 | struct iwl4965_rx_mem_buffer *rxb); | |
5d08cd1d CH |
1059 | |
1060 | const struct ieee80211_hw_mode *modes; | |
1061 | ||
c8b0e6e1 | 1062 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
5d08cd1d | 1063 | /* spectrum measurement report caching */ |
bb8c093b | 1064 | struct iwl4965_spectrum_notification measure_report; |
5d08cd1d CH |
1065 | u8 measurement_status; |
1066 | #endif | |
1067 | /* ucode beacon time */ | |
1068 | u32 ucode_beacon_time; | |
1069 | ||
bb8c093b | 1070 | /* we allocate array of iwl4965_channel_info for NIC's valid channels. |
5d08cd1d | 1071 | * Access via channel # using indirect index array */ |
bb8c093b | 1072 | struct iwl4965_channel_info *channel_info; /* channel info array */ |
5d08cd1d CH |
1073 | u8 channel_count; /* # of channels */ |
1074 | ||
1075 | /* each calibration channel group in the EEPROM has a derived | |
1076 | * clip setting for each rate. */ | |
bb8c093b | 1077 | const struct iwl4965_clip_group clip_groups[5]; |
5d08cd1d CH |
1078 | |
1079 | /* thermal calibration */ | |
1080 | s32 temperature; /* degrees Kelvin */ | |
1081 | s32 last_temperature; | |
1082 | ||
1083 | /* Scan related variables */ | |
1084 | unsigned long last_scan_jiffies; | |
7878a5a4 | 1085 | unsigned long next_scan_jiffies; |
5d08cd1d CH |
1086 | unsigned long scan_start; |
1087 | unsigned long scan_pass_start; | |
1088 | unsigned long scan_start_tsf; | |
1089 | int scan_bands; | |
1090 | int one_direct_scan; | |
1091 | u8 direct_ssid_len; | |
1092 | u8 direct_ssid[IW_ESSID_MAX_SIZE]; | |
bb8c093b | 1093 | struct iwl4965_scan_cmd *scan; |
5d08cd1d CH |
1094 | u8 only_active_channel; |
1095 | ||
1096 | /* spinlock */ | |
1097 | spinlock_t lock; /* protect general shared data */ | |
1098 | spinlock_t hcmd_lock; /* protect hcmd */ | |
1099 | struct mutex mutex; | |
1100 | ||
1101 | /* basic pci-network driver stuff */ | |
1102 | struct pci_dev *pci_dev; | |
1103 | ||
1104 | /* pci hardware address support */ | |
1105 | void __iomem *hw_base; | |
1106 | ||
1107 | /* uCode images, save to reload in case of failure */ | |
1108 | struct fw_desc ucode_code; /* runtime inst */ | |
1109 | struct fw_desc ucode_data; /* runtime data original */ | |
1110 | struct fw_desc ucode_data_backup; /* runtime data save/restore */ | |
1111 | struct fw_desc ucode_init; /* initialization inst */ | |
1112 | struct fw_desc ucode_init_data; /* initialization data */ | |
1113 | struct fw_desc ucode_boot; /* bootstrap inst */ | |
1114 | ||
1115 | ||
bb8c093b | 1116 | struct iwl4965_rxon_time_cmd rxon_timing; |
5d08cd1d CH |
1117 | |
1118 | /* We declare this const so it can only be | |
1119 | * changed via explicit cast within the | |
1120 | * routines that actually update the physical | |
1121 | * hardware */ | |
bb8c093b CH |
1122 | const struct iwl4965_rxon_cmd active_rxon; |
1123 | struct iwl4965_rxon_cmd staging_rxon; | |
5d08cd1d CH |
1124 | |
1125 | int error_recovering; | |
bb8c093b | 1126 | struct iwl4965_rxon_cmd recovery_rxon; |
5d08cd1d CH |
1127 | |
1128 | /* 1st responses from initialize and runtime uCode images. | |
1129 | * 4965's initialize alive response contains some calibration data. */ | |
bb8c093b CH |
1130 | struct iwl4965_init_alive_resp card_alive_init; |
1131 | struct iwl4965_alive_resp card_alive; | |
5d08cd1d CH |
1132 | |
1133 | #ifdef LED | |
1134 | /* LED related variables */ | |
bb8c093b | 1135 | struct iwl4965_activity_blink activity; |
5d08cd1d CH |
1136 | unsigned long led_packets; |
1137 | int led_state; | |
1138 | #endif | |
1139 | ||
1140 | u16 active_rate; | |
1141 | u16 active_rate_basic; | |
1142 | ||
1143 | u8 call_post_assoc_from_beacon; | |
1144 | u8 assoc_station_added; | |
1145 | u8 use_ant_b_for_management_frame; /* Tx antenna selection */ | |
5d08cd1d | 1146 | u8 valid_antenna; /* Bit mask of antennas actually connected */ |
c8b0e6e1 | 1147 | #ifdef CONFIG_IWL4965_SENSITIVITY |
bb8c093b CH |
1148 | struct iwl4965_sensitivity_data sensitivity_data; |
1149 | struct iwl4965_chain_noise_data chain_noise_data; | |
5d08cd1d CH |
1150 | u8 start_calib; |
1151 | __le16 sensitivity_tbl[HD_TABLE_SIZE]; | |
c8b0e6e1 | 1152 | #endif /*CONFIG_IWL4965_SENSITIVITY*/ |
5d08cd1d | 1153 | |
c8b0e6e1 | 1154 | #ifdef CONFIG_IWL4965_HT |
9e0cc6de | 1155 | struct iwl_ht_info current_ht_config; |
5d08cd1d | 1156 | #endif |
5d08cd1d CH |
1157 | u8 last_phy_res[100]; |
1158 | ||
1159 | /* Rate scaling data */ | |
bb8c093b | 1160 | struct iwl4965_lq_mngr lq_mngr; |
5d08cd1d CH |
1161 | |
1162 | /* Rate scaling data */ | |
1163 | s8 data_retry_limit; | |
1164 | u8 retry_rate; | |
1165 | ||
1166 | wait_queue_head_t wait_command_queue; | |
1167 | ||
1168 | int activity_timer_active; | |
1169 | ||
1170 | /* Rx and Tx DMA processing queues */ | |
bb8c093b CH |
1171 | struct iwl4965_rx_queue rxq; |
1172 | struct iwl4965_tx_queue txq[IWL_MAX_NUM_QUEUES]; | |
5d08cd1d | 1173 | unsigned long txq_ctx_active_msk; |
bb8c093b | 1174 | struct iwl4965_kw kw; /* keep warm address */ |
5d08cd1d CH |
1175 | u32 scd_base_addr; /* scheduler sram base address */ |
1176 | ||
1177 | unsigned long status; | |
1178 | u32 config; | |
1179 | ||
1180 | int last_rx_rssi; /* From Rx packet statisitics */ | |
1181 | int last_rx_noise; /* From beacon statistics */ | |
1182 | ||
bb8c093b | 1183 | struct iwl4965_power_mgr power_data; |
5d08cd1d | 1184 | |
bb8c093b | 1185 | struct iwl4965_notif_statistics statistics; |
5d08cd1d CH |
1186 | unsigned long last_statistics_time; |
1187 | ||
1188 | /* context information */ | |
1189 | u8 essid[IW_ESSID_MAX_SIZE]; | |
1190 | u8 essid_len; | |
1191 | u16 rates_mask; | |
1192 | ||
1193 | u32 power_mode; | |
1194 | u32 antenna; | |
1195 | u8 bssid[ETH_ALEN]; | |
1196 | u16 rts_threshold; | |
1197 | u8 mac_addr[ETH_ALEN]; | |
1198 | ||
1199 | /*station table variables */ | |
1200 | spinlock_t sta_lock; | |
1201 | int num_stations; | |
bb8c093b | 1202 | struct iwl4965_station_entry stations[IWL_STATION_COUNT]; |
5d08cd1d CH |
1203 | |
1204 | /* Indication if ieee80211_ops->open has been called */ | |
1205 | int is_open; | |
1206 | ||
1207 | u8 mac80211_registered; | |
1208 | int is_abg; | |
1209 | ||
1210 | u32 notif_missed_beacons; | |
1211 | ||
1212 | /* Rx'd packet timing information */ | |
1213 | u32 last_beacon_time; | |
1214 | u64 last_tsf; | |
1215 | ||
1216 | /* Duplicate packet detection */ | |
1217 | u16 last_seq_num; | |
1218 | u16 last_frag_num; | |
1219 | unsigned long last_packet_time; | |
bc47279f BC |
1220 | |
1221 | /* Hash table for finding stations in IBSS network */ | |
5d08cd1d CH |
1222 | struct list_head ibss_mac_hash[IWL_IBSS_MAC_HASH_SIZE]; |
1223 | ||
1224 | /* eeprom */ | |
bb8c093b | 1225 | struct iwl4965_eeprom eeprom; |
5d08cd1d CH |
1226 | |
1227 | int iw_mode; | |
1228 | ||
1229 | struct sk_buff *ibss_beacon; | |
1230 | ||
1231 | /* Last Rx'd beacon timestamp */ | |
1232 | u32 timestamp0; | |
1233 | u32 timestamp1; | |
1234 | u16 beacon_int; | |
bb8c093b | 1235 | struct iwl4965_driver_hw_info hw_setting; |
5d08cd1d CH |
1236 | int interface_id; |
1237 | ||
1238 | /* Current association information needed to configure the | |
1239 | * hardware */ | |
1240 | u16 assoc_id; | |
1241 | u16 assoc_capability; | |
1242 | u8 ps_mode; | |
1243 | ||
c8b0e6e1 | 1244 | #ifdef CONFIG_IWL4965_QOS |
bb8c093b | 1245 | struct iwl4965_qos_info qos_data; |
c8b0e6e1 | 1246 | #endif /*CONFIG_IWL4965_QOS */ |
5d08cd1d CH |
1247 | |
1248 | struct workqueue_struct *workqueue; | |
1249 | ||
1250 | struct work_struct up; | |
1251 | struct work_struct restart; | |
1252 | struct work_struct calibrated_work; | |
1253 | struct work_struct scan_completed; | |
1254 | struct work_struct rx_replenish; | |
1255 | struct work_struct rf_kill; | |
1256 | struct work_struct abort_scan; | |
1257 | struct work_struct update_link_led; | |
1258 | struct work_struct auth_work; | |
1259 | struct work_struct report_work; | |
1260 | struct work_struct request_scan; | |
1261 | struct work_struct beacon_update; | |
1262 | ||
1263 | struct tasklet_struct irq_tasklet; | |
1264 | ||
1265 | struct delayed_work init_alive_start; | |
1266 | struct delayed_work alive_start; | |
1267 | struct delayed_work activity_timer; | |
1268 | struct delayed_work thermal_periodic; | |
1269 | struct delayed_work gather_stats; | |
1270 | struct delayed_work scan_check; | |
1271 | struct delayed_work post_associate; | |
1272 | ||
1273 | #define IWL_DEFAULT_TX_POWER 0x0F | |
1274 | s8 user_txpower_limit; | |
1275 | s8 max_channel_txpower_limit; | |
1276 | ||
1277 | #ifdef CONFIG_PM | |
1278 | u32 pm_state[16]; | |
1279 | #endif | |
1280 | ||
c8b0e6e1 | 1281 | #ifdef CONFIG_IWL4965_DEBUG |
5d08cd1d CH |
1282 | /* debugging info */ |
1283 | u32 framecnt_to_us; | |
1284 | atomic_t restrict_refcnt; | |
1285 | #endif | |
1286 | ||
1287 | struct work_struct txpower_work; | |
c8b0e6e1 | 1288 | #ifdef CONFIG_IWL4965_SENSITIVITY |
5d08cd1d CH |
1289 | struct work_struct sensitivity_work; |
1290 | #endif | |
1291 | struct work_struct statistics_work; | |
1292 | struct timer_list statistics_periodic; | |
1293 | ||
c8b0e6e1 | 1294 | #ifdef CONFIG_IWL4965_HT_AGG |
5d08cd1d CH |
1295 | struct work_struct agg_work; |
1296 | #endif | |
bb8c093b | 1297 | }; /*iwl4965_priv */ |
5d08cd1d | 1298 | |
bb8c093b | 1299 | static inline int iwl4965_is_associated(struct iwl4965_priv *priv) |
5d08cd1d CH |
1300 | { |
1301 | return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; | |
1302 | } | |
1303 | ||
bb8c093b | 1304 | static inline int is_channel_valid(const struct iwl4965_channel_info *ch_info) |
5d08cd1d CH |
1305 | { |
1306 | if (ch_info == NULL) | |
1307 | return 0; | |
1308 | return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; | |
1309 | } | |
1310 | ||
bb8c093b | 1311 | static inline int is_channel_narrow(const struct iwl4965_channel_info *ch_info) |
5d08cd1d CH |
1312 | { |
1313 | return (ch_info->flags & EEPROM_CHANNEL_NARROW) ? 1 : 0; | |
1314 | } | |
1315 | ||
bb8c093b | 1316 | static inline int is_channel_radar(const struct iwl4965_channel_info *ch_info) |
5d08cd1d CH |
1317 | { |
1318 | return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; | |
1319 | } | |
1320 | ||
bb8c093b | 1321 | static inline u8 is_channel_a_band(const struct iwl4965_channel_info *ch_info) |
5d08cd1d CH |
1322 | { |
1323 | return ch_info->phymode == MODE_IEEE80211A; | |
1324 | } | |
1325 | ||
bb8c093b | 1326 | static inline u8 is_channel_bg_band(const struct iwl4965_channel_info *ch_info) |
5d08cd1d CH |
1327 | { |
1328 | return ((ch_info->phymode == MODE_IEEE80211B) || | |
1329 | (ch_info->phymode == MODE_IEEE80211G)); | |
1330 | } | |
1331 | ||
bb8c093b | 1332 | static inline int is_channel_passive(const struct iwl4965_channel_info *ch) |
5d08cd1d CH |
1333 | { |
1334 | return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0; | |
1335 | } | |
1336 | ||
bb8c093b | 1337 | static inline int is_channel_ibss(const struct iwl4965_channel_info *ch) |
5d08cd1d CH |
1338 | { |
1339 | return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; | |
1340 | } | |
1341 | ||
bb8c093b CH |
1342 | extern const struct iwl4965_channel_info *iwl4965_get_channel_info( |
1343 | const struct iwl4965_priv *priv, int phymode, u16 channel); | |
5d08cd1d | 1344 | |
bb8c093b | 1345 | /* Requires full declaration of iwl4965_priv before including */ |
5d08cd1d CH |
1346 | #include "iwl-4965-io.h" |
1347 | ||
bb8c093b | 1348 | #endif /* __iwl4965_4965_h__ */ |