iwlwifi: d3: disable dbg recording before entering D3
[linux-block.git] / drivers / net / wireless / intel / iwlwifi / mvm / ops.c
CommitLineData
8ca151b5
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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
4fb06283 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
de8ba41b 10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
8745f12a 11 * Copyright(c) 2018 Intel Corporation
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
25 * USA
26 *
27 * The full GNU General Public License is included in this distribution
410dc5aa 28 * in the file called COPYING.
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29 *
30 * Contact Information:
cb2f8277 31 * Intel Linux Wireless <linuxwifi@intel.com>
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32 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 *
34 * BSD LICENSE
35 *
51368bf7 36 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
4fb06283 37 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
de8ba41b 38 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
8745f12a 39 * Copyright(c) 2018 Intel Corporation
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40 * All rights reserved.
41 *
42 * Redistribution and use in source and binary forms, with or without
43 * modification, are permitted provided that the following conditions
44 * are met:
45 *
46 * * Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * * Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in
50 * the documentation and/or other materials provided with the
51 * distribution.
52 * * Neither the name Intel Corporation nor the names of its
53 * contributors may be used to endorse or promote products derived
54 * from this software without specific prior written permission.
55 *
56 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
57 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
58 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
59 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
60 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
62 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
66 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 *
68 *****************************************************************************/
69#include <linux/module.h>
1bd3cbc1 70#include <linux/vmalloc.h>
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71#include <net/mac80211.h>
72
9fca9d5c 73#include "fw/notif-wait.h"
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74#include "iwl-trans.h"
75#include "iwl-op-mode.h"
d962f9b1 76#include "fw/img.h"
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77#include "iwl-debug.h"
78#include "iwl-drv.h"
79#include "iwl-modparams.h"
80#include "mvm.h"
81#include "iwl-phy-db.h"
82#include "iwl-eeprom-parse.h"
83#include "iwl-csr.h"
84#include "iwl-io.h"
85#include "iwl-prph.h"
86#include "rs.h"
d172a5ef 87#include "fw/api/scan.h"
8ca151b5 88#include "time-event.h"
39bdb17e 89#include "fw-api.h"
d172a5ef 90#include "fw/api/scan.h"
f2abcfa6 91#include "fw/acpi.h"
8ca151b5 92
8ca151b5 93#define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux"
8ca151b5 94MODULE_DESCRIPTION(DRV_DESCRIPTION);
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95MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
96MODULE_LICENSE("GPL");
97
98static const struct iwl_op_mode_ops iwl_mvm_ops;
0316d30e 99static const struct iwl_op_mode_ops iwl_mvm_ops_mq;
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100
101struct iwl_mvm_mod_params iwlmvm_mod_params = {
102 .power_scheme = IWL_POWER_SCHEME_BPS,
ce71c2f7 103 .tfd_q_hang_detect = true
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104 /* rest of fields are 0 by default */
105};
106
2ef00c53 107module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, 0444);
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108MODULE_PARM_DESC(init_dbg,
109 "set to true to debug an ASSERT in INIT fw (default: false");
2ef00c53 110module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, 0444);
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111MODULE_PARM_DESC(power_scheme,
112 "power management scheme: 1-active, 2-balanced, 3-low power, default: 2");
ce71c2f7 113module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect,
2ef00c53 114 bool, 0444);
ce71c2f7
EG
115MODULE_PARM_DESC(tfd_q_hang_detect,
116 "TFD queues hang detection (default: true");
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117
118/*
119 * module init and exit functions
120 */
121static int __init iwl_mvm_init(void)
122{
123 int ret;
124
125 ret = iwl_mvm_rate_control_register();
126 if (ret) {
127 pr_err("Unable to register rate control algorithm: %d\n", ret);
128 return ret;
129 }
130
131 ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops);
9f66a397 132 if (ret)
8ca151b5 133 pr_err("Unable to register MVM op_mode: %d\n", ret);
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134
135 return ret;
136}
137module_init(iwl_mvm_init);
138
139static void __exit iwl_mvm_exit(void)
140{
141 iwl_opmode_deregister("iwlmvm");
142 iwl_mvm_rate_control_unregister();
143}
144module_exit(iwl_mvm_exit);
145
146static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode)
147{
148 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
149 u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash;
150 u32 reg_val = 0;
a0544272
MH
151 u32 phy_config = iwl_mvm_get_phy_config(mvm);
152
153 radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >>
154 FW_PHY_CFG_RADIO_TYPE_POS;
155 radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >>
156 FW_PHY_CFG_RADIO_STEP_POS;
157 radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >>
158 FW_PHY_CFG_RADIO_DASH_POS;
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159
160 /* SKU control */
161 reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) <<
162 CSR_HW_IF_CONFIG_REG_POS_MAC_STEP;
163 reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) <<
164 CSR_HW_IF_CONFIG_REG_POS_MAC_DASH;
165
166 /* radio configuration */
167 reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE;
168 reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP;
169 reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
170
171 WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) &
172 ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE);
173
9b1fcc11 174 /*
6e584873
SS
175 * TODO: Bits 7-8 of CSR in 8000 HW family and higher set the ADC
176 * sampling, and shouldn't be set to any non-zero value.
177 * The same is supposed to be true of the other HW, but unsetting
178 * them (such as the 7260) causes automatic tests to fail on seemingly
179 * unrelated errors. Need to further investigate this, but for now
180 * we'll separate cases.
9b1fcc11 181 */
6e584873 182 if (mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_8000)
9b1fcc11 183 reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI;
8ca151b5 184
e139dc4a
LE
185 iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG,
186 CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH |
187 CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP |
188 CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE |
189 CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP |
190 CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH |
191 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
192 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI,
193 reg_val);
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194
195 IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type,
196 radio_cfg_step, radio_cfg_dash);
197
198 /*
199 * W/A : NIC is stuck in a reset state after Early PCIe power off
200 * (PCIe power is lost before PERST# is asserted), causing ME FW
201 * to lose ownership and not being able to obtain it back.
202 */
95411d04 203 if (!mvm->trans->cfg->apmg_not_supported)
3073d8c0
EH
204 iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG,
205 APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
206 ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
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JB
207}
208
c9cb14a6
CRI
209/**
210 * enum iwl_rx_handler_context context for Rx handler
211 * @RX_HANDLER_SYNC : this means that it will be called in the Rx path
212 * which can't acquire mvm->mutex.
213 * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex
214 * (and only in this case!), it should be set as ASYNC. In that case,
215 * it will be called from a worker with mvm->mutex held.
216 * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the
217 * mutex itself, it will be called from a worker without mvm->mutex held.
218 */
219enum iwl_rx_handler_context {
220 RX_HANDLER_SYNC,
221 RX_HANDLER_ASYNC_LOCKED,
222 RX_HANDLER_ASYNC_UNLOCKED,
223};
224
225/**
226 * struct iwl_rx_handlers handler for FW notification
227 * @cmd_id: command id
228 * @context: see &iwl_rx_handler_context
229 * @fn: the function is called when notification is received
230 */
8ca151b5 231struct iwl_rx_handlers {
1230b16b 232 u16 cmd_id;
c9cb14a6 233 enum iwl_rx_handler_context context;
0416841d 234 void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb);
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235};
236
c9cb14a6
CRI
237#define RX_HANDLER(_cmd_id, _fn, _context) \
238 { .cmd_id = _cmd_id, .fn = _fn, .context = _context }
239#define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \
240 { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context }
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241
242/*
243 * Handlers for fw notifications
244 * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME
245 * This list should be in order of frequency for performance purposes.
246 *
c9cb14a6 247 * The handler can be one from three contexts, see &iwl_rx_handler_context
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248 */
249static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = {
c9cb14a6
CRI
250 RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC),
251 RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC),
252
84226ca1
GG
253 RX_HANDLER_GRP(DATA_PATH_GROUP, TLC_MNG_UPDATE_NOTIF,
254 iwl_mvm_tlc_update_notif, RX_HANDLER_SYNC),
255
c9cb14a6
CRI
256 RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif,
257 RX_HANDLER_ASYNC_LOCKED),
258 RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif,
259 RX_HANDLER_ASYNC_LOCKED),
260 RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics,
261 RX_HANDLER_ASYNC_LOCKED),
f421f9c3 262
3af512d6 263 RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID,
c9cb14a6 264 iwl_mvm_window_status_notif, RX_HANDLER_SYNC),
3af512d6 265
c9cb14a6
CRI
266 RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif,
267 RX_HANDLER_SYNC),
268 RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc,
269 RX_HANDLER_ASYNC_LOCKED),
497b49d2 270
c9cb14a6 271 RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC),
3e56eadf 272
e5d74646 273 RX_HANDLER(SCAN_ITERATION_COMPLETE,
c9cb14a6 274 iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC),
35a000b7 275 RX_HANDLER(SCAN_OFFLOAD_COMPLETE,
c9cb14a6
CRI
276 iwl_mvm_rx_lmac_scan_complete_notif,
277 RX_HANDLER_ASYNC_LOCKED),
6e56f01d 278 RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found,
c9cb14a6 279 RX_HANDLER_SYNC),
d2496221 280 RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif,
c9cb14a6 281 RX_HANDLER_ASYNC_LOCKED),
ee9219b2 282 RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC,
c9cb14a6 283 iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC),
497b49d2 284
c9cb14a6
CRI
285 RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif,
286 RX_HANDLER_SYNC),
8ca151b5 287
d64048ed 288 RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif,
c9cb14a6 289 RX_HANDLER_SYNC),
d64048ed 290
c9cb14a6 291 RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC),
175a70b7 292 RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION,
c9cb14a6
CRI
293 iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC),
294 RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif,
295 RX_HANDLER_ASYNC_LOCKED),
09eef330 296 RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE,
ec77a33e 297 iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED),
0a3b7119 298 RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION,
c9cb14a6 299 iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC),
ea9af24d 300
1d3c3f63 301 RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif,
c9cb14a6
CRI
302 RX_HANDLER_ASYNC_LOCKED),
303 RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif,
304 RX_HANDLER_SYNC),
305 RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler,
306 RX_HANDLER_ASYNC_LOCKED),
bdccdb85
GBA
307 RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF,
308 iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC),
0db056d3 309 RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF,
c9cb14a6 310 iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC),
f92659a1 311 RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF,
c9cb14a6 312 iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC),
65e25482
JB
313 RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF,
314 iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC),
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JB
315};
316#undef RX_HANDLER
1230b16b 317#undef RX_HANDLER_GRP
39bdb17e
SD
318
319/* Please keep this array *SORTED* by hex value.
320 * Access is done through binary search
321 */
322static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = {
323 HCMD_NAME(MVM_ALIVE),
324 HCMD_NAME(REPLY_ERROR),
325 HCMD_NAME(ECHO_CMD),
326 HCMD_NAME(INIT_COMPLETE_NOTIF),
327 HCMD_NAME(PHY_CONTEXT_CMD),
328 HCMD_NAME(DBG_CFG),
39bdb17e
SD
329 HCMD_NAME(SCAN_CFG_CMD),
330 HCMD_NAME(SCAN_REQ_UMAC),
331 HCMD_NAME(SCAN_ABORT_UMAC),
332 HCMD_NAME(SCAN_COMPLETE_UMAC),
333 HCMD_NAME(TOF_CMD),
334 HCMD_NAME(TOF_NOTIFICATION),
3af512d6 335 HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID),
39bdb17e
SD
336 HCMD_NAME(ADD_STA_KEY),
337 HCMD_NAME(ADD_STA),
338 HCMD_NAME(REMOVE_STA),
339 HCMD_NAME(FW_GET_ITEM_CMD),
340 HCMD_NAME(TX_CMD),
341 HCMD_NAME(SCD_QUEUE_CFG),
342 HCMD_NAME(TXPATH_FLUSH),
343 HCMD_NAME(MGMT_MCAST_KEY),
344 HCMD_NAME(WEP_KEY),
345 HCMD_NAME(SHARED_MEM_CFG),
346 HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD),
347 HCMD_NAME(MAC_CONTEXT_CMD),
348 HCMD_NAME(TIME_EVENT_CMD),
349 HCMD_NAME(TIME_EVENT_NOTIFICATION),
350 HCMD_NAME(BINDING_CONTEXT_CMD),
351 HCMD_NAME(TIME_QUOTA_CMD),
352 HCMD_NAME(NON_QOS_TX_COUNTER_CMD),
7089ae63 353 HCMD_NAME(LEDS_CMD),
39bdb17e
SD
354 HCMD_NAME(LQ_CMD),
355 HCMD_NAME(FW_PAGING_BLOCK_CMD),
356 HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD),
357 HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD),
358 HCMD_NAME(HOT_SPOT_CMD),
359 HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD),
39bdb17e
SD
360 HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP),
361 HCMD_NAME(BT_COEX_CI),
362 HCMD_NAME(PHY_CONFIGURATION_CMD),
363 HCMD_NAME(CALIB_RES_NOTIF_PHY_DB),
176aa60b 364 HCMD_NAME(PHY_DB_CMD),
39bdb17e
SD
365 HCMD_NAME(SCAN_OFFLOAD_COMPLETE),
366 HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD),
39bdb17e
SD
367 HCMD_NAME(POWER_TABLE_CMD),
368 HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION),
369 HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF),
370 HCMD_NAME(DC2DC_CONFIG_CMD),
371 HCMD_NAME(NVM_ACCESS_CMD),
39bdb17e
SD
372 HCMD_NAME(BEACON_NOTIFICATION),
373 HCMD_NAME(BEACON_TEMPLATE_CMD),
374 HCMD_NAME(TX_ANT_CONFIGURATION_CMD),
375 HCMD_NAME(BT_CONFIG),
376 HCMD_NAME(STATISTICS_CMD),
377 HCMD_NAME(STATISTICS_NOTIFICATION),
378 HCMD_NAME(EOSP_NOTIFICATION),
379 HCMD_NAME(REDUCE_TX_POWER_CMD),
39bdb17e
SD
380 HCMD_NAME(CARD_STATE_NOTIFICATION),
381 HCMD_NAME(MISSED_BEACONS_NOTIFICATION),
382 HCMD_NAME(TDLS_CONFIG_CMD),
383 HCMD_NAME(MAC_PM_POWER_TABLE),
384 HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION),
385 HCMD_NAME(MFUART_LOAD_NOTIFICATION),
43413a97 386 HCMD_NAME(RSS_CONFIG_CMD),
39bdb17e
SD
387 HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC),
388 HCMD_NAME(REPLY_RX_PHY_CMD),
389 HCMD_NAME(REPLY_RX_MPDU_CMD),
3e73aa3b 390 HCMD_NAME(FRAME_RELEASE),
39bdb17e
SD
391 HCMD_NAME(BA_NOTIF),
392 HCMD_NAME(MCC_UPDATE_CMD),
393 HCMD_NAME(MCC_CHUB_UPDATE_CMD),
394 HCMD_NAME(MARKER_CMD),
39bdb17e
SD
395 HCMD_NAME(BT_PROFILE_NOTIFICATION),
396 HCMD_NAME(BCAST_FILTER_CMD),
397 HCMD_NAME(MCAST_FILTER_CMD),
398 HCMD_NAME(REPLY_SF_CFG_CMD),
399 HCMD_NAME(REPLY_BEACON_FILTERING_CMD),
400 HCMD_NAME(D3_CONFIG_CMD),
401 HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD),
402 HCMD_NAME(OFFLOADS_QUERY_CMD),
403 HCMD_NAME(REMOTE_WAKE_CONFIG_CMD),
404 HCMD_NAME(MATCH_FOUND_NOTIFICATION),
39bdb17e
SD
405 HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION),
406 HCMD_NAME(WOWLAN_PATTERNS),
407 HCMD_NAME(WOWLAN_CONFIGURATION),
408 HCMD_NAME(WOWLAN_TSC_RSC_PARAM),
409 HCMD_NAME(WOWLAN_TKIP_PARAM),
410 HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL),
411 HCMD_NAME(WOWLAN_GET_STATUSES),
39bdb17e
SD
412 HCMD_NAME(SCAN_ITERATION_COMPLETE),
413 HCMD_NAME(D0I3_END_CMD),
414 HCMD_NAME(LTR_CONFIG),
8ca151b5 415};
39bdb17e 416
5b086414
GBA
417/* Please keep this array *SORTED* by hex value.
418 * Access is done through binary search
419 */
420static const struct iwl_hcmd_names iwl_mvm_system_names[] = {
421 HCMD_NAME(SHARED_MEM_CFG_CMD),
4399caaa 422 HCMD_NAME(INIT_EXTENDED_CFG_CMD),
5b086414
GBA
423};
424
03098268
AE
425/* Please keep this array *SORTED* by hex value.
426 * Access is done through binary search
427 */
428static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = {
d3a108a4 429 HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF),
03098268
AE
430};
431
39bdb17e
SD
432/* Please keep this array *SORTED* by hex value.
433 * Access is done through binary search
434 */
435static const struct iwl_hcmd_names iwl_mvm_phy_names[] = {
436 HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE),
5c89e7bc 437 HCMD_NAME(CTDP_CONFIG_CMD),
c221daf2 438 HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD),
a6bff3cb 439 HCMD_NAME(GEO_TX_POWER_LIMIT),
0a3b7119 440 HCMD_NAME(CT_KILL_NOTIFICATION),
39bdb17e
SD
441 HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE),
442};
443
e0d8fdec
SS
444/* Please keep this array *SORTED* by hex value.
445 * Access is done through binary search
446 */
447static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = {
ddef2f98 448 HCMD_NAME(DQA_ENABLE_CMD),
e0d8fdec 449 HCMD_NAME(UPDATE_MU_GROUPS_CMD),
94bb4481 450 HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD),
514c3069 451 HCMD_NAME(STA_HE_CTXT_CMD),
65e25482 452 HCMD_NAME(STA_PM_NOTIF),
f92659a1 453 HCMD_NAME(MU_GROUP_MGMT_NOTIF),
94bb4481 454 HCMD_NAME(RX_QUEUES_NOTIFICATION),
e0d8fdec
SS
455};
456
bdccdb85
GBA
457/* Please keep this array *SORTED* by hex value.
458 * Access is done through binary search
459 */
460static const struct iwl_hcmd_names iwl_mvm_debug_names[] = {
461 HCMD_NAME(MFU_ASSERT_DUMP_NTF),
462};
463
0db056d3
SS
464/* Please keep this array *SORTED* by hex value.
465 * Access is done through binary search
466 */
467static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = {
468 HCMD_NAME(STORED_BEACON_NTF),
469};
470
1f370650
SS
471/* Please keep this array *SORTED* by hex value.
472 * Access is done through binary search
473 */
474static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = {
475 HCMD_NAME(NVM_ACCESS_COMPLETE),
e9e1ba3d 476 HCMD_NAME(NVM_GET_INFO),
1f370650
SS
477};
478
39bdb17e
SD
479static const struct iwl_hcmd_arr iwl_mvm_groups[] = {
480 [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names),
481 [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names),
5b086414 482 [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names),
03098268 483 [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names),
39bdb17e 484 [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names),
e0d8fdec 485 [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names),
0db056d3 486 [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names),
1f370650
SS
487 [REGULATORY_AND_NVM_GROUP] =
488 HCMD_ARR(iwl_mvm_regulatory_and_nvm_names),
39bdb17e
SD
489};
490
8ca151b5
JB
491/* this forward declaration can avoid to export the function */
492static void iwl_mvm_async_handlers_wk(struct work_struct *wk);
37577fe2 493static void iwl_mvm_d0i3_exit_work(struct work_struct *wk);
8ca151b5 494
f2abcfa6 495static u32 iwl_mvm_min_backoff(struct iwl_mvm *mvm)
0c0e2c71 496{
f2abcfa6
LC
497 const struct iwl_pwr_tx_backoff *backoff = mvm->cfg->pwr_tx_backoffs;
498 u64 dflt_pwr_limit;
0c0e2c71 499
f2abcfa6 500 if (!backoff)
0c0e2c71
IY
501 return 0;
502
f2abcfa6 503 dflt_pwr_limit = iwl_acpi_get_pwr_limit(mvm->dev);
0c0e2c71 504
f2abcfa6
LC
505 while (backoff->pwr) {
506 if (dflt_pwr_limit >= backoff->pwr)
507 return backoff->backoff;
508
509 backoff++;
0c0e2c71
IY
510 }
511
512 return 0;
513}
514
d3a108a4
AO
515static void iwl_mvm_tx_unblock_dwork(struct work_struct *work)
516{
517 struct iwl_mvm *mvm =
518 container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work);
519 struct ieee80211_vif *tx_blocked_vif;
520 struct iwl_mvm_vif *mvmvif;
521
522 mutex_lock(&mvm->mutex);
523
524 tx_blocked_vif =
525 rcu_dereference_protected(mvm->csa_tx_blocked_vif,
526 lockdep_is_held(&mvm->mutex));
527
528 if (!tx_blocked_vif)
529 goto unlock;
530
531 mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif);
532 iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false);
533 RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL);
534unlock:
535 mutex_unlock(&mvm->mutex);
536}
537
7174beb6
JB
538static int iwl_mvm_fwrt_dump_start(void *ctx)
539{
540 struct iwl_mvm *mvm = ctx;
541 int ret;
542
543 ret = iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT);
544 if (ret)
545 return ret;
546
547 mutex_lock(&mvm->mutex);
548
549 return 0;
550}
551
552static void iwl_mvm_fwrt_dump_end(void *ctx)
553{
554 struct iwl_mvm *mvm = ctx;
555
556 mutex_unlock(&mvm->mutex);
557
558 iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT);
559}
560
8745f12a
ST
561static bool iwl_mvm_fwrt_fw_running(void *ctx)
562{
563 return iwl_mvm_firmware_running(ctx);
564}
565
7174beb6
JB
566static const struct iwl_fw_runtime_ops iwl_mvm_fwrt_ops = {
567 .dump_start = iwl_mvm_fwrt_dump_start,
568 .dump_end = iwl_mvm_fwrt_dump_end,
8745f12a 569 .fw_running = iwl_mvm_fwrt_fw_running,
7174beb6
JB
570};
571
8ca151b5
JB
572static struct iwl_op_mode *
573iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
574 const struct iwl_fw *fw, struct dentry *dbgfs_dir)
575{
576 struct ieee80211_hw *hw;
577 struct iwl_op_mode *op_mode;
578 struct iwl_mvm *mvm;
579 struct iwl_trans_config trans_cfg = {};
580 static const u8 no_reclaim_cmds[] = {
581 TX_CMD,
582 };
583 int err, scan_size;
0c0e2c71 584 u32 min_backoff;
8ca151b5 585
c4d83271
EG
586 /*
587 * We use IWL_MVM_STATION_COUNT to check the validity of the station
588 * index all over the driver - check that its value corresponds to the
589 * array size.
590 */
591 BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT);
592
8ca151b5
JB
593 /********************************
594 * 1. Allocating and configuring HW data
595 ********************************/
596 hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) +
597 sizeof(struct iwl_mvm),
598 &iwl_mvm_hw_ops);
599 if (!hw)
600 return NULL;
601
745160ee
OG
602 if (cfg->max_rx_agg_size)
603 hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size;
604
77d96730
GG
605 if (cfg->max_tx_agg_size)
606 hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size;
607
8ca151b5 608 op_mode = hw->priv;
8ca151b5
JB
609
610 mvm = IWL_OP_MODE_GET_MVM(op_mode);
611 mvm->dev = trans->dev;
612 mvm->trans = trans;
613 mvm->cfg = cfg;
614 mvm->fw = fw;
615 mvm->hw = hw;
616
93b167c1
MG
617 iwl_fw_runtime_init(&mvm->fwrt, trans, fw, &iwl_mvm_fwrt_ops, mvm,
618 dbgfs_dir);
235acb18 619
de8ba41b
LK
620 mvm->init_status = 0;
621
0316d30e
JB
622 if (iwl_mvm_has_new_rx_api(mvm)) {
623 op_mode->ops = &iwl_mvm_ops_mq;
18ead597
GBA
624 trans->rx_mpdu_cmd_hdr_size =
625 (trans->cfg->device_family >=
626 IWL_DEVICE_FAMILY_22560) ?
627 sizeof(struct iwl_rx_mpdu_desc) :
628 IWL_RX_DESC_SIZE_V1;
0316d30e
JB
629 } else {
630 op_mode->ops = &iwl_mvm_ops;
25c2b22c
SS
631 trans->rx_mpdu_cmd_hdr_size =
632 sizeof(struct iwl_rx_mpdu_res_start);
0316d30e
JB
633
634 if (WARN_ON(trans->num_rx_queues > 1))
635 goto out_free;
636 }
637
3b37f4c9 638 mvm->fw_restart = iwlwifi_mod_params.fw_restart ? -1 : 0;
291aa7c4 639
c8f54701 640 mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE;
b13f43a4 641 mvm->snif_queue = IWL_MVM_DQA_INJECT_MONITOR_QUEUE;
c8f54701
JB
642 mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE;
643 mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE;
644
1f3b0ff8 645 mvm->sf_state = SF_UNINIT;
7d6222e2 646 if (iwl_mvm_has_unified_ucode(mvm))
702e975d 647 iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_REGULAR);
1f370650 648 else
702e975d 649 iwl_fw_set_current_image(&mvm->fwrt, IWL_UCODE_INIT);
c89e333d 650 mvm->drop_bcn_ap_mode = true;
19e737c9 651
8ca151b5 652 mutex_init(&mvm->mutex);
d15a747f 653 mutex_init(&mvm->d0i3_suspend_mutex);
8ca151b5
JB
654 spin_lock_init(&mvm->async_handlers_lock);
655 INIT_LIST_HEAD(&mvm->time_event_list);
b112889c 656 INIT_LIST_HEAD(&mvm->aux_roc_te_list);
8ca151b5
JB
657 INIT_LIST_HEAD(&mvm->async_handlers_list);
658 spin_lock_init(&mvm->time_event_lock);
4ecafae9 659 spin_lock_init(&mvm->queue_info_lock);
8ca151b5
JB
660
661 INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk);
662 INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk);
37577fe2 663 INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work);
1d3c3f63 664 INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work);
69e04642 665 INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk);
24afba76 666 INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk);
8ca151b5 667
b2492501 668 spin_lock_init(&mvm->d0i3_tx_lock);
576eeee9 669 spin_lock_init(&mvm->refs_lock);
b2492501
AN
670 skb_queue_head_init(&mvm->d0i3_tx);
671 init_waitqueue_head(&mvm->d0i3_exit_waitq);
3a732c65 672 init_waitqueue_head(&mvm->rx_sync_waitq);
b2492501 673
0636b938
SS
674 atomic_set(&mvm->queue_sync_counter, 0);
675
8ca151b5
JB
676 SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev);
677
7d9d0d56
LC
678 spin_lock_init(&mvm->tcm.lock);
679 INIT_DELAYED_WORK(&mvm->tcm.work, iwl_mvm_tcm_work);
680 mvm->tcm.ts = jiffies;
681 mvm->tcm.ll_ts = jiffies;
682 mvm->tcm.uapsd_nonagg_ts = jiffies;
683
d3a108a4
AO
684 INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork);
685
8ca151b5
JB
686 /*
687 * Populate the state variables that the transport layer needs
688 * to know about.
689 */
690 trans_cfg.op_mode = op_mode;
691 trans_cfg.no_reclaim_cmds = no_reclaim_cmds;
692 trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds);
6c4fbcbc 693 switch (iwlwifi_mod_params.amsdu_size) {
4bdd4dfe 694 case IWL_AMSDU_DEF:
6c4fbcbc
EG
695 case IWL_AMSDU_4K:
696 trans_cfg.rx_buf_size = IWL_AMSDU_4K;
697 break;
698 case IWL_AMSDU_8K:
699 trans_cfg.rx_buf_size = IWL_AMSDU_8K;
700 break;
701 case IWL_AMSDU_12K:
702 trans_cfg.rx_buf_size = IWL_AMSDU_12K;
703 break;
704 default:
705 pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME,
706 iwlwifi_mod_params.amsdu_size);
707 trans_cfg.rx_buf_size = IWL_AMSDU_4K;
708 }
4bdd4dfe
EG
709
710 /* the hardware splits the A-MSDU */
18ead597 711 if (mvm->trans->cfg->device_family >= IWL_DEVICE_FAMILY_22560)
1a4968d1
GBA
712 trans_cfg.rx_buf_size = IWL_AMSDU_2K;
713 else if (mvm->cfg->mq_rx_supported)
4bdd4dfe 714 trans_cfg.rx_buf_size = IWL_AMSDU_4K;
8ca151b5 715
4b87e5af 716 trans->wide_cmd_header = true;
2a182fbb
GBA
717 trans_cfg.bc_table_dword =
718 mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_22560;
8ca151b5 719
39bdb17e
SD
720 trans_cfg.command_groups = iwl_mvm_groups;
721 trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups);
8ca151b5 722
c8f54701 723 trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE;
b2d81db7 724 trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD;
3a736bcb 725 trans_cfg.scd_set_active = true;
8ca151b5 726
21cb3222
JB
727 trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info,
728 driver_data[2]);
729
41837ca9 730 trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD;
b4821767 731
4cf677fd
EG
732 /* Set a short watchdog for the command queue */
733 trans_cfg.cmd_q_wdg_timeout =
5d42e7b2 734 iwl_mvm_get_wd_timeout(mvm, NULL, false, true);
4cf677fd 735
8ca151b5
JB
736 snprintf(mvm->hw->wiphy->fw_version,
737 sizeof(mvm->hw->wiphy->fw_version),
738 "%s", fw->fw_version);
739
740 /* Configure transport layer */
741 iwl_trans_configure(mvm->trans, &trans_cfg);
742
743 trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD;
09e350f7
LK
744 trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv;
745 trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num;
746 memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv,
747 sizeof(trans->dbg_conf_tlv));
d2709ad7 748 trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv;
520f03ea 749 trans->dbg_dump_mask = mvm->fw->dbg_dump_mask;
8ca151b5 750
132db31c
GBA
751 trans->iml = mvm->fw->iml;
752 trans->iml_len = mvm->fw->iml_len;
753
8ca151b5
JB
754 /* set up notification wait support */
755 iwl_notification_wait_init(&mvm->notif_wait);
756
757 /* Init phy db */
758 mvm->phy_db = iwl_phy_db_init(trans);
759 if (!mvm->phy_db) {
760 IWL_ERR(mvm, "Cannot init phy_db\n");
761 goto out_free;
762 }
763
764 IWL_INFO(mvm, "Detected %s, REV=0x%X\n",
765 mvm->cfg->name, mvm->trans->hw_rev);
766
4fb06283 767 if (iwlwifi_mod_params.nvm_file)
e02a9d60 768 mvm->nvm_file_name = iwlwifi_mod_params.nvm_file;
4fb06283
EH
769 else
770 IWL_DEBUG_EEPROM(mvm->trans->dev,
771 "working without external nvm file\n");
9ee718aa 772
56f2929b
SS
773 err = iwl_trans_start_hw(mvm->trans);
774 if (err)
14b485f0
EH
775 goto out_free;
776
56f2929b
SS
777 mutex_lock(&mvm->mutex);
778 iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE);
8c5f47b1 779 err = iwl_run_init_mvm_ucode(mvm, true);
f4744258 780 if (!iwlmvm_mod_params.init_dbg || !err)
56f2929b
SS
781 iwl_mvm_stop_device(mvm);
782 iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE);
783 mutex_unlock(&mvm->mutex);
de8ba41b 784 if (err < 0) {
56f2929b
SS
785 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err);
786 goto out_free;
8ca151b5
JB
787 }
788
d2496221 789 scan_size = iwl_mvm_scan_size(mvm);
fb98be5e 790
8ca151b5
JB
791 mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL);
792 if (!mvm->scan_cmd)
793 goto out_free;
794
5a4b2afa
HD
795 /* Set EBS as successful as long as not stated otherwise by the FW. */
796 mvm->last_ebs_successful = true;
797
8ca151b5
JB
798 err = iwl_mvm_mac_setup_register(mvm);
799 if (err)
800 goto out_free;
1f370650 801 mvm->hw_registered = true;
8ca151b5 802
f2abcfa6 803 min_backoff = iwl_mvm_min_backoff(mvm);
04ddc2aa
CRI
804 iwl_mvm_thermal_initialize(mvm, min_backoff);
805
8ca151b5
JB
806 err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir);
807 if (err)
808 goto out_unregister;
809
678d9b6d
LK
810 if (!iwl_mvm_has_new_rx_stats_api(mvm))
811 memset(&mvm->rx_stats_v3, 0,
812 sizeof(struct mvm_statistics_rx_v3));
813 else
814 memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx));
3848ab66 815
33c85ead
LC
816 /* The transport always starts with a taken reference, we can
817 * release it now if d0i3 is supported */
818 if (iwl_mvm_is_d0i3_supported(mvm))
819 iwl_trans_unref(mvm->trans);
7498cf4c 820
ce792918
GG
821 iwl_mvm_tof_init(mvm);
822
8ca151b5
JB
823 return op_mode;
824
825 out_unregister:
de8ba41b
LK
826 if (iwlmvm_mod_params.init_dbg)
827 return op_mode;
828
8ca151b5 829 ieee80211_unregister_hw(mvm->hw);
1f370650 830 mvm->hw_registered = false;
91b0d119 831 iwl_mvm_leds_exit(mvm);
c221daf2 832 iwl_mvm_thermal_exit(mvm);
8ca151b5 833 out_free:
7174beb6 834 iwl_fw_flush_dump(&mvm->fwrt);
de8ba41b
LK
835
836 if (iwlmvm_mod_params.init_dbg)
837 return op_mode;
8ca151b5
JB
838 iwl_phy_db_free(mvm->phy_db);
839 kfree(mvm->scan_cmd);
56f2929b
SS
840 iwl_trans_op_mode_leave(trans);
841
8ca151b5
JB
842 ieee80211_free_hw(mvm->hw);
843 return NULL;
844}
845
846static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode)
847{
848 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
849 int i;
850
e27deb45
LC
851 /* If d0i3 is supported, we have released the reference that
852 * the transport started with, so we should take it back now
853 * that we are leaving.
854 */
855 if (iwl_mvm_is_d0i3_supported(mvm))
856 iwl_trans_ref(mvm->trans);
857
8ca151b5
JB
858 iwl_mvm_leds_exit(mvm);
859
c221daf2 860 iwl_mvm_thermal_exit(mvm);
9ee718aa 861
de8ba41b
LK
862 if (mvm->init_status & IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE) {
863 ieee80211_unregister_hw(mvm->hw);
864 mvm->init_status &= ~IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE;
865 }
8ca151b5
JB
866
867 kfree(mvm->scan_cmd);
e59647ea
EP
868 kfree(mvm->mcast_filter_cmd);
869 mvm->mcast_filter_cmd = NULL;
8ca151b5 870
afc66bb7
JB
871#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS)
872 kfree(mvm->d3_resume_sram);
873#endif
a4082843 874 iwl_trans_op_mode_leave(mvm->trans);
8ca151b5
JB
875
876 iwl_phy_db_free(mvm->phy_db);
877 mvm->phy_db = NULL;
878
1dad3e0a 879 kfree(mvm->nvm_data);
ae2b21b0 880 for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++)
8ca151b5
JB
881 kfree(mvm->nvm_sections[i].data);
882
7d9d0d56
LC
883 cancel_delayed_work_sync(&mvm->tcm.work);
884
ce792918
GG
885 iwl_mvm_tof_clean(mvm);
886
a2a57a35
EG
887 mutex_destroy(&mvm->mutex);
888 mutex_destroy(&mvm->d0i3_suspend_mutex);
889
8ca151b5
JB
890 ieee80211_free_hw(mvm->hw);
891}
892
893struct iwl_async_handler_entry {
894 struct list_head list;
895 struct iwl_rx_cmd_buffer rxb;
c9cb14a6 896 enum iwl_rx_handler_context context;
0416841d 897 void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb);
8ca151b5
JB
898};
899
900void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm)
901{
902 struct iwl_async_handler_entry *entry, *tmp;
903
904 spin_lock_bh(&mvm->async_handlers_lock);
905 list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) {
906 iwl_free_rxb(&entry->rxb);
907 list_del(&entry->list);
908 kfree(entry);
909 }
910 spin_unlock_bh(&mvm->async_handlers_lock);
911}
912
913static void iwl_mvm_async_handlers_wk(struct work_struct *wk)
914{
915 struct iwl_mvm *mvm =
916 container_of(wk, struct iwl_mvm, async_handlers_wk);
917 struct iwl_async_handler_entry *entry, *tmp;
8098203f 918 LIST_HEAD(local_list);
8ca151b5
JB
919
920 /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */
8ca151b5
JB
921
922 /*
923 * Sync with Rx path with a lock. Remove all the entries from this list,
924 * add them to a local one (lock free), and then handle them.
925 */
926 spin_lock_bh(&mvm->async_handlers_lock);
927 list_splice_init(&mvm->async_handlers_list, &local_list);
928 spin_unlock_bh(&mvm->async_handlers_lock);
929
930 list_for_each_entry_safe(entry, tmp, &local_list, list) {
c9cb14a6
CRI
931 if (entry->context == RX_HANDLER_ASYNC_LOCKED)
932 mutex_lock(&mvm->mutex);
0416841d 933 entry->fn(mvm, &entry->rxb);
8ca151b5
JB
934 iwl_free_rxb(&entry->rxb);
935 list_del(&entry->list);
c9cb14a6
CRI
936 if (entry->context == RX_HANDLER_ASYNC_LOCKED)
937 mutex_unlock(&mvm->mutex);
8ca151b5
JB
938 kfree(entry);
939 }
8ca151b5
JB
940}
941
917f39bb
EG
942static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm,
943 struct iwl_rx_packet *pkt)
944{
945 struct iwl_fw_dbg_trigger_tlv *trig;
946 struct iwl_fw_dbg_trigger_cmd *cmds_trig;
917f39bb
EG
947 int i;
948
949 if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF))
950 return;
951
952 trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF);
953 cmds_trig = (void *)trig->data;
954
7174beb6 955 if (!iwl_fw_dbg_trigger_check_stop(&mvm->fwrt, NULL, trig))
917f39bb
EG
956 return;
957
958 for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) {
959 /* don't collect on CMD 0 */
960 if (!cmds_trig->cmds[i].cmd_id)
961 break;
962
0ab66e6d
SS
963 if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd ||
964 cmds_trig->cmds[i].group_id != pkt->hdr.group_id)
917f39bb
EG
965 continue;
966
7174beb6
JB
967 iwl_fw_dbg_collect_trig(&mvm->fwrt, trig,
968 "CMD 0x%02x.%02x received",
969 pkt->hdr.group_id, pkt->hdr.cmd);
917f39bb
EG
970 break;
971 }
972}
973
0316d30e
JB
974static void iwl_mvm_rx_common(struct iwl_mvm *mvm,
975 struct iwl_rx_cmd_buffer *rxb,
976 struct iwl_rx_packet *pkt)
8ca151b5 977{
0316d30e 978 int i;
1738d60b 979
917f39bb
EG
980 iwl_mvm_rx_check_trigger(mvm, pkt);
981
8ca151b5
JB
982 /*
983 * Do the notification wait before RX handlers so
984 * even if the RX handler consumes the RXB we have
985 * access to it in the notification wait entry.
986 */
987 iwl_notification_wait_notify(&mvm->notif_wait, pkt);
988
989 for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) {
990 const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i];
36eed56a
EG
991 struct iwl_async_handler_entry *entry;
992
1230b16b 993 if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd))
36eed56a
EG
994 continue;
995
c9cb14a6 996 if (rx_h->context == RX_HANDLER_SYNC) {
0416841d 997 rx_h->fn(mvm, rxb);
f7e6469f 998 return;
0416841d 999 }
36eed56a
EG
1000
1001 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
1002 /* we can't do much... */
1003 if (!entry)
f7e6469f 1004 return;
36eed56a
EG
1005
1006 entry->rxb._page = rxb_steal_page(rxb);
1007 entry->rxb._offset = rxb->_offset;
1008 entry->rxb._rx_page_order = rxb->_rx_page_order;
1009 entry->fn = rx_h->fn;
c9cb14a6 1010 entry->context = rx_h->context;
36eed56a
EG
1011 spin_lock(&mvm->async_handlers_lock);
1012 list_add_tail(&entry->list, &mvm->async_handlers_list);
1013 spin_unlock(&mvm->async_handlers_lock);
1014 schedule_work(&mvm->async_handlers_wk);
f2e66c8d 1015 return;
8ca151b5 1016 }
f2e66c8d
MG
1017
1018 iwl_fwrt_handle_notification(&mvm->fwrt, rxb);
8ca151b5
JB
1019}
1020
0316d30e
JB
1021static void iwl_mvm_rx(struct iwl_op_mode *op_mode,
1022 struct napi_struct *napi,
1023 struct iwl_rx_cmd_buffer *rxb)
1024{
1025 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1026 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
61b0f5d7 1027 u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
0316d30e 1028
61b0f5d7 1029 if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
0316d30e 1030 iwl_mvm_rx_rx_mpdu(mvm, napi, rxb);
61b0f5d7 1031 else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD))
0316d30e
JB
1032 iwl_mvm_rx_rx_phy_cmd(mvm, rxb);
1033 else
1034 iwl_mvm_rx_common(mvm, rxb, pkt);
1035}
1036
1037static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode,
1038 struct napi_struct *napi,
1039 struct iwl_rx_cmd_buffer *rxb)
1040{
1041 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1042 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
61b0f5d7 1043 u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
0316d30e 1044
61b0f5d7 1045 if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
780e87c2 1046 iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0);
61b0f5d7
JB
1047 else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
1048 RX_QUEUES_NOTIFICATION)))
94bb4481 1049 iwl_mvm_rx_queue_notif(mvm, rxb, 0);
61b0f5d7 1050 else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))
58035432 1051 iwl_mvm_rx_frame_release(mvm, napi, rxb, 0);
0316d30e
JB
1052 else
1053 iwl_mvm_rx_common(mvm, rxb, pkt);
1054}
1055
b4f7a9d1 1056void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq)
8ca151b5 1057{
4ecafae9 1058 int q;
8ca151b5 1059
4ecafae9 1060 if (WARN_ON_ONCE(!mq))
8ca151b5 1061 return;
8ca151b5 1062
4ecafae9
LK
1063 for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
1064 if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) {
1065 IWL_DEBUG_TX_QUEUES(mvm,
b4f7a9d1 1066 "mac80211 %d already stopped\n", q);
4ecafae9
LK
1067 continue;
1068 }
1069
1070 ieee80211_stop_queue(mvm->hw, q);
1071 }
8ca151b5
JB
1072}
1073
156f92f2
EG
1074static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode,
1075 const struct iwl_device_cmd *cmd)
1076{
1077 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1078
1079 /*
1080 * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA
1081 * commands that need to block the Tx queues.
1082 */
1083 iwl_trans_block_txq_ptrs(mvm->trans, false);
1084}
1085
b4f7a9d1 1086static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue)
8ca151b5
JB
1087{
1088 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
4ecafae9 1089 unsigned long mq;
8ca151b5 1090
4ecafae9 1091 spin_lock_bh(&mvm->queue_info_lock);
34e10860 1092 mq = mvm->hw_queue_to_mac80211[hw_queue];
4ecafae9 1093 spin_unlock_bh(&mvm->queue_info_lock);
8ca151b5 1094
b4f7a9d1
LK
1095 iwl_mvm_stop_mac_queues(mvm, mq);
1096}
1097
1098void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq)
1099{
1100 int q;
1101
4ecafae9 1102 if (WARN_ON_ONCE(!mq))
8ca151b5 1103 return;
8ca151b5 1104
4ecafae9
LK
1105 for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
1106 if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) {
1107 IWL_DEBUG_TX_QUEUES(mvm,
b4f7a9d1 1108 "mac80211 %d still stopped\n", q);
4ecafae9
LK
1109 continue;
1110 }
1111
1112 ieee80211_wake_queue(mvm->hw, q);
1113 }
8ca151b5
JB
1114}
1115
b4f7a9d1
LK
1116static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue)
1117{
1118 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1119 unsigned long mq;
1120
1121 spin_lock_bh(&mvm->queue_info_lock);
34e10860 1122 mq = mvm->hw_queue_to_mac80211[hw_queue];
b4f7a9d1
LK
1123 spin_unlock_bh(&mvm->queue_info_lock);
1124
1125 iwl_mvm_start_mac_queues(mvm, mq);
1126}
1127
6ad04359
JB
1128static void iwl_mvm_set_rfkill_state(struct iwl_mvm *mvm)
1129{
1130 bool state = iwl_mvm_is_radio_killed(mvm);
1131
1132 if (state)
1133 wake_up(&mvm->rx_sync_waitq);
1134
1135 wiphy_rfkill_set_hw_state(mvm->hw->wiphy, state);
1136}
1137
9ee718aa
EL
1138void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state)
1139{
1140 if (state)
1141 set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status);
1142 else
1143 clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status);
1144
6ad04359 1145 iwl_mvm_set_rfkill_state(mvm);
9ee718aa
EL
1146}
1147
14cfca71 1148static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)
8ca151b5
JB
1149{
1150 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
6aa7de05 1151 bool calibrating = READ_ONCE(mvm->calibrating);
8ca151b5
JB
1152
1153 if (state)
1154 set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status);
1155 else
1156 clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status);
1157
6ad04359 1158 iwl_mvm_set_rfkill_state(mvm);
14cfca71 1159
31b8b343
EG
1160 /* iwl_run_init_mvm_ucode is waiting for results, abort it */
1161 if (calibrating)
1162 iwl_abort_notification_waits(&mvm->notif_wait);
1163
1164 /*
1165 * Stop the device if we run OPERATIONAL firmware or if we are in the
1166 * middle of the calibrations.
1167 */
702e975d 1168 return state && (mvm->fwrt.cur_fw_img != IWL_UCODE_INIT || calibrating);
8ca151b5
JB
1169}
1170
1171static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb)
1172{
1173 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1174 struct ieee80211_tx_info *info;
1175
1176 info = IEEE80211_SKB_CB(skb);
1177 iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]);
1178 ieee80211_free_txskb(mvm->hw, skb);
1179}
1180
ac1ed416
JB
1181struct iwl_mvm_reprobe {
1182 struct device *dev;
1183 struct work_struct work;
1184};
1185
1186static void iwl_mvm_reprobe_wk(struct work_struct *wk)
1187{
1188 struct iwl_mvm_reprobe *reprobe;
1189
1190 reprobe = container_of(wk, struct iwl_mvm_reprobe, work);
1191 if (device_reprobe(reprobe->dev))
1192 dev_err(reprobe->dev, "reprobe failed!\n");
1193 kfree(reprobe);
1194 module_put(THIS_MODULE);
1195}
1196
b08c1d97 1197void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error)
8ca151b5 1198{
8ca151b5
JB
1199 iwl_abort_notification_waits(&mvm->notif_wait);
1200
992f81fc
DS
1201 /*
1202 * This is a bit racy, but worst case we tell mac80211 about
1203 * a stopped/aborted scan when that was already done which
1204 * is not a problem. It is necessary to abort any os scan
1205 * here because mac80211 requires having the scan cleared
1206 * before restarting.
1207 * We'll reset the scan_status to NONE in restart cleanup in
1208 * the next start() call from mac80211. If restart isn't called
1209 * (no fw restart) scan status will stay busy.
1210 */
4ffb3650 1211 iwl_mvm_report_scan_aborted(mvm);
992f81fc 1212
8ca151b5
JB
1213 /*
1214 * If we're restarting already, don't cycle restarts.
1215 * If INIT fw asserted, it will likely fail again.
1216 * If WoWLAN fw asserted, don't restart either, mac80211
1217 * can't recover this since we're already half suspended.
1218 */
3b37f4c9 1219 if (!mvm->fw_restart && fw_error) {
7174beb6 1220 iwl_fw_dbg_collect_desc(&mvm->fwrt, &iwl_dump_desc_assert,
bf8b286f
JB
1221 NULL);
1222 } else if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
ac1ed416
JB
1223 struct iwl_mvm_reprobe *reprobe;
1224
1225 IWL_ERR(mvm,
1226 "Firmware error during reconfiguration - reprobe!\n");
1227
1228 /*
1229 * get a module reference to avoid doing this while unloading
1230 * anyway and to avoid scheduling a work with code that's
1231 * being removed.
1232 */
1233 if (!try_module_get(THIS_MODULE)) {
1234 IWL_ERR(mvm, "Module is being unloaded - abort\n");
1235 return;
1236 }
1237
1238 reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC);
1239 if (!reprobe) {
1240 module_put(THIS_MODULE);
1241 return;
1242 }
1243 reprobe->dev = mvm->trans->dev;
1244 INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk);
1245 schedule_work(&reprobe->work);
702e975d 1246 } else if (mvm->fwrt.cur_fw_img == IWL_UCODE_REGULAR &&
1f370650 1247 mvm->hw_registered) {
7498cf4c
EP
1248 /* don't let the transport/FW power down */
1249 iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN);
1250
3b37f4c9
JB
1251 if (fw_error && mvm->fw_restart > 0)
1252 mvm->fw_restart--;
bf8b286f 1253 set_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status);
8ca151b5
JB
1254 ieee80211_restart_hw(mvm->hw);
1255 }
1256}
1257
715c998f
EG
1258static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode)
1259{
1260 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1261
1262 iwl_mvm_dump_nic_error_log(mvm);
1bd3cbc1 1263
b08c1d97 1264 iwl_mvm_nic_restart(mvm, true);
715c998f
EG
1265}
1266
8ca151b5
JB
1267static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode)
1268{
715c998f
EG
1269 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1270
8ca151b5 1271 WARN_ON(1);
b08c1d97 1272 iwl_mvm_nic_restart(mvm, true);
8ca151b5
JB
1273}
1274
37577fe2
EP
1275struct iwl_d0i3_iter_data {
1276 struct iwl_mvm *mvm;
a3f7ba5c 1277 struct ieee80211_vif *connected_vif;
37577fe2
EP
1278 u8 ap_sta_id;
1279 u8 vif_count;
b2492501
AN
1280 u8 offloading_tid;
1281 bool disable_offloading;
37577fe2
EP
1282};
1283
b2492501
AN
1284static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm,
1285 struct ieee80211_vif *vif,
1286 struct iwl_d0i3_iter_data *iter_data)
1287{
1288 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
b2492501
AN
1289 struct iwl_mvm_sta *mvmsta;
1290 u32 available_tids = 0;
1291 u8 tid;
1292
1293 if (WARN_ON(vif->type != NL80211_IFTYPE_STATION ||
0ae98812 1294 mvmvif->ap_sta_id == IWL_MVM_INVALID_STA))
b2492501
AN
1295 return false;
1296
13303c0f
SS
1297 mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id);
1298 if (!mvmsta)
b2492501
AN
1299 return false;
1300
b2492501
AN
1301 spin_lock_bh(&mvmsta->lock);
1302 for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) {
1303 struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
1304
1305 /*
1306 * in case of pending tx packets, don't use this tid
1307 * for offloading in order to prevent reuse of the same
1308 * qos seq counters.
1309 */
dd32162d 1310 if (iwl_mvm_tid_queued(mvm, tid_data))
b2492501
AN
1311 continue;
1312
1313 if (tid_data->state != IWL_AGG_OFF)
1314 continue;
1315
1316 available_tids |= BIT(tid);
1317 }
1318 spin_unlock_bh(&mvmsta->lock);
1319
1320 /*
1321 * disallow protocol offloading if we have no available tid
1322 * (with no pending frames and no active aggregation,
1323 * as we don't handle "holes" properly - the scheduler needs the
1324 * frame's seq number and TFD index to match)
1325 */
1326 if (!available_tids)
1327 return true;
1328
1329 /* for simplicity, just use the first available tid */
1330 iter_data->offloading_tid = ffs(available_tids) - 1;
1331 return false;
1332}
1333
d6230972
EP
1334static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac,
1335 struct ieee80211_vif *vif)
1336{
37577fe2
EP
1337 struct iwl_d0i3_iter_data *data = _data;
1338 struct iwl_mvm *mvm = data->mvm;
1339 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
d6230972
EP
1340 u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE;
1341
1342 IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr);
1343 if (vif->type != NL80211_IFTYPE_STATION ||
1344 !vif->bss_conf.assoc)
1345 return;
1346
b2492501
AN
1347 /*
1348 * in case of pending tx packets or active aggregations,
1349 * avoid offloading features in order to prevent reuse of
1350 * the same qos seq counters.
1351 */
1352 if (iwl_mvm_disallow_offloading(mvm, vif, data))
1353 data->disable_offloading = true;
1354
d6230972 1355 iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags);
c97dab40
SS
1356 iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading,
1357 false, flags);
d6230972
EP
1358
1359 /*
1360 * on init/association, mvm already configures POWER_TABLE_CMD
1361 * and REPLY_MCAST_FILTER_CMD, so currently don't
1362 * reconfigure them (we might want to use different
1363 * params later on, though).
1364 */
37577fe2
EP
1365 data->ap_sta_id = mvmvif->ap_sta_id;
1366 data->vif_count++;
a3f7ba5c
EP
1367
1368 /*
1369 * no new commands can be sent at this stage, so it's safe
1370 * to save the vif pointer during d0i3 entrance.
1371 */
1372 data->connected_vif = vif;
d6230972
EP
1373}
1374
1a95c8df 1375static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm,
c8b06a99 1376 struct iwl_wowlan_config_cmd *cmd,
1a95c8df
EP
1377 struct iwl_d0i3_iter_data *iter_data)
1378{
1379 struct ieee80211_sta *ap_sta;
1380 struct iwl_mvm_sta *mvm_ap_sta;
1381
0ae98812 1382 if (iter_data->ap_sta_id == IWL_MVM_INVALID_STA)
1a95c8df
EP
1383 return;
1384
1385 rcu_read_lock();
1386
1387 ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]);
1388 if (IS_ERR_OR_NULL(ap_sta))
1389 goto out;
1390
1391 mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta);
c8b06a99 1392 cmd->is_11n_connection = ap_sta->ht_cap.ht_supported;
b2492501 1393 cmd->offloading_tid = iter_data->offloading_tid;
70b4c536 1394 cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING |
0db056d3 1395 ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON;
1a95c8df
EP
1396 /*
1397 * The d0i3 uCode takes care of the nonqos counters,
1398 * so configure only the qos seq ones.
1399 */
c8b06a99 1400 iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd);
1a95c8df
EP
1401out:
1402 rcu_read_unlock();
1403}
6735943f
EP
1404
1405int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode)
b3370d47
EP
1406{
1407 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
98ee7783 1408 u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE;
b77f06d9 1409 int ret;
37577fe2
EP
1410 struct iwl_d0i3_iter_data d0i3_iter_data = {
1411 .mvm = mvm,
1412 };
c8b06a99
EG
1413 struct iwl_wowlan_config_cmd wowlan_config_cmd = {
1414 .wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME |
1415 IWL_WOWLAN_WAKEUP_BEACON_MISS |
0db056d3 1416 IWL_WOWLAN_WAKEUP_LINK_CHANGE),
b77f06d9 1417 };
98ee7783
AN
1418 struct iwl_d3_manager_config d3_cfg_cmd = {
1419 .min_sleep_time = cpu_to_le32(1000),
d9f1fc20 1420 .wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR),
98ee7783 1421 };
b3370d47
EP
1422
1423 IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n");
98ee7783 1424
702e975d 1425 if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR))
08f0d23d
EP
1426 return -EINVAL;
1427
b2492501 1428 set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
b2492501 1429
f4cf8680
EP
1430 /*
1431 * iwl_mvm_ref_sync takes a reference before checking the flag.
1432 * so by checking there is no held reference we prevent a state
1433 * in which iwl_mvm_ref_sync continues successfully while we
1434 * configure the firmware to enter d0i3
1435 */
1436 if (iwl_mvm_ref_taken(mvm)) {
1437 IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n");
1438 clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
caf1578a 1439 wake_up(&mvm->d0i3_exit_waitq);
f4cf8680
EP
1440 return 1;
1441 }
1442
d6230972
EP
1443 ieee80211_iterate_active_interfaces_atomic(mvm->hw,
1444 IEEE80211_IFACE_ITER_NORMAL,
1445 iwl_mvm_enter_d0i3_iterator,
37577fe2
EP
1446 &d0i3_iter_data);
1447 if (d0i3_iter_data.vif_count == 1) {
1448 mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id;
b2492501 1449 mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading;
37577fe2
EP
1450 } else {
1451 WARN_ON_ONCE(d0i3_iter_data.vif_count > 1);
0ae98812 1452 mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA;
b2492501 1453 mvm->d0i3_offloading = false;
37577fe2 1454 }
d6230972 1455
7d9d0d56 1456 iwl_mvm_pause_tcm(mvm, true);
ecc7c518
EG
1457 /* make sure we have no running tx while configuring the seqno */
1458 synchronize_net();
1459
eb3908d3 1460 /* Flush the hw queues, in case something got queued during entry */
d167e81a
MG
1461 /* TODO new tx api */
1462 if (iwl_mvm_has_new_tx_api(mvm)) {
1463 WARN_ONCE(1, "d0i3: Need to implement flush TX queue\n");
1464 } else {
1465 ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm),
1466 flags);
1467 if (ret)
1468 return ret;
1469 }
eb3908d3 1470
183edd84 1471 /* configure wowlan configuration only if needed */
0ae98812 1472 if (mvm->d0i3_ap_sta_id != IWL_MVM_INVALID_STA) {
0db056d3
SS
1473 /* wake on beacons only if beacon storing isn't supported */
1474 if (!fw_has_capa(&mvm->fw->ucode_capa,
1475 IWL_UCODE_TLV_CAPA_BEACON_STORING))
1476 wowlan_config_cmd.wakeup_filter |=
1477 cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING);
1478
a3f7ba5c
EP
1479 iwl_mvm_wowlan_config_key_params(mvm,
1480 d0i3_iter_data.connected_vif,
1481 true, flags);
1482
183edd84
EP
1483 iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd,
1484 &d0i3_iter_data);
1485
1486 ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags,
1487 sizeof(wowlan_config_cmd),
1488 &wowlan_config_cmd);
1489 if (ret)
1490 return ret;
1491 }
b77f06d9 1492
98ee7783
AN
1493 return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD,
1494 flags | CMD_MAKE_TRANS_IDLE,
1495 sizeof(d3_cfg_cmd), &d3_cfg_cmd);
b3370d47
EP
1496}
1497
d6230972
EP
1498static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac,
1499 struct ieee80211_vif *vif)
1500{
1501 struct iwl_mvm *mvm = _data;
1502 u32 flags = CMD_ASYNC | CMD_HIGH_PRIO;
1503
1504 IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr);
1505 if (vif->type != NL80211_IFTYPE_STATION ||
1506 !vif->bss_conf.assoc)
1507 return;
1508
1509 iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags);
1510}
1511
a3f7ba5c 1512struct iwl_mvm_d0i3_exit_work_iter_data {
b3df2247 1513 struct iwl_mvm *mvm;
a3f7ba5c 1514 struct iwl_wowlan_status *status;
b3df2247
DS
1515 u32 wakeup_reasons;
1516};
1517
a3f7ba5c
EP
1518static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac,
1519 struct ieee80211_vif *vif)
37577fe2 1520{
a3f7ba5c 1521 struct iwl_mvm_d0i3_exit_work_iter_data *data = _data;
37577fe2 1522 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
a3f7ba5c 1523 u32 reasons = data->wakeup_reasons;
37577fe2 1524
a3f7ba5c
EP
1525 /* consider only the relevant station interface */
1526 if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc ||
1527 data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id)
1528 return;
1529
1530 if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH)
1531 iwl_mvm_connection_loss(data->mvm, vif, "D0i3");
1532 else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON)
1533 ieee80211_beacon_loss(vif);
1534 else
1535 iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status);
37577fe2
EP
1536}
1537
b2492501
AN
1538void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq)
1539{
1540 struct ieee80211_sta *sta = NULL;
1541 struct iwl_mvm_sta *mvm_ap_sta;
1542 int i;
1543 bool wake_queues = false;
1544
1545 lockdep_assert_held(&mvm->mutex);
1546
1547 spin_lock_bh(&mvm->d0i3_tx_lock);
1548
0ae98812 1549 if (mvm->d0i3_ap_sta_id == IWL_MVM_INVALID_STA)
b2492501
AN
1550 goto out;
1551
1552 IWL_DEBUG_RPM(mvm, "re-enqueue packets\n");
1553
1554 /* get the sta in order to update seq numbers and re-enqueue skbs */
1555 sta = rcu_dereference_protected(
1556 mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id],
1557 lockdep_is_held(&mvm->mutex));
1558
1559 if (IS_ERR_OR_NULL(sta)) {
1560 sta = NULL;
1561 goto out;
1562 }
1563
1564 if (mvm->d0i3_offloading && qos_seq) {
1565 /* update qos seq numbers if offloading was enabled */
9d8ce6af 1566 mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta);
b2492501
AN
1567 for (i = 0; i < IWL_MAX_TID_COUNT; i++) {
1568 u16 seq = le16_to_cpu(qos_seq[i]);
1569 /* firmware stores last-used one, we store next one */
1570 seq += 0x10;
1571 mvm_ap_sta->tid_data[i].seq_number = seq;
1572 }
1573 }
1574out:
1575 /* re-enqueue (or drop) all packets */
1576 while (!skb_queue_empty(&mvm->d0i3_tx)) {
1577 struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx);
1578
1579 if (!sta || iwl_mvm_tx_skb(mvm, skb, sta))
1580 ieee80211_free_txskb(mvm->hw, skb);
1581
1582 /* if the skb_queue is not empty, we need to wake queues */
1583 wake_queues = true;
1584 }
1585 clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
1586 wake_up(&mvm->d0i3_exit_waitq);
0ae98812 1587 mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA;
b2492501
AN
1588 if (wake_queues)
1589 ieee80211_wake_queues(mvm->hw);
1590
1591 spin_unlock_bh(&mvm->d0i3_tx_lock);
1592}
1593
37577fe2
EP
1594static void iwl_mvm_d0i3_exit_work(struct work_struct *wk)
1595{
1596 struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work);
1597 struct iwl_host_cmd get_status_cmd = {
1598 .id = WOWLAN_GET_STATUSES,
a1022927 1599 .flags = CMD_HIGH_PRIO | CMD_WANT_SKB,
37577fe2 1600 };
a3f7ba5c
EP
1601 struct iwl_mvm_d0i3_exit_work_iter_data iter_data = {
1602 .mvm = mvm,
1603 };
1604
3afec639 1605 struct iwl_wowlan_status *status;
37577fe2 1606 int ret;
a3f7ba5c 1607 u32 wakeup_reasons = 0;
b2492501 1608 __le16 *qos_seq = NULL;
37577fe2
EP
1609
1610 mutex_lock(&mvm->mutex);
1611 ret = iwl_mvm_send_cmd(mvm, &get_status_cmd);
1612 if (ret)
1613 goto out;
1614
37577fe2
EP
1615 status = (void *)get_status_cmd.resp_pkt->data;
1616 wakeup_reasons = le32_to_cpu(status->wakeup_reasons);
b2492501 1617 qos_seq = status->qos_seq_ctr;
37577fe2
EP
1618
1619 IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons);
1620
a3f7ba5c
EP
1621 iter_data.wakeup_reasons = wakeup_reasons;
1622 iter_data.status = status;
1623 ieee80211_iterate_active_interfaces(mvm->hw,
1624 IEEE80211_IFACE_ITER_NORMAL,
1625 iwl_mvm_d0i3_exit_work_iter,
1626 &iter_data);
37577fe2 1627out:
b2492501 1628 iwl_mvm_d0i3_enable_tx(mvm, qos_seq);
47c8b154 1629
7c014e35
EP
1630 IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n",
1631 wakeup_reasons);
1632
e5629be7
EP
1633 /* qos_seq might point inside resp_pkt, so free it only now */
1634 if (get_status_cmd.resp_pkt)
1635 iwl_free_resp(&get_status_cmd);
1636
47c8b154
JD
1637 /* the FW might have updated the regdomain */
1638 iwl_mvm_update_changed_regdom(mvm);
1639
7d9d0d56 1640 iwl_mvm_resume_tcm(mvm);
d15a747f 1641 iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK);
37577fe2
EP
1642 mutex_unlock(&mvm->mutex);
1643}
1644
d15a747f 1645int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm)
b3370d47 1646{
98ee7783
AN
1647 u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE |
1648 CMD_WAKE_UP_TRANS;
d6230972 1649 int ret;
b3370d47
EP
1650
1651 IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n");
98ee7783 1652
702e975d 1653 if (WARN_ON_ONCE(mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR))
08f0d23d
EP
1654 return -EINVAL;
1655
d15a747f
EP
1656 mutex_lock(&mvm->d0i3_suspend_mutex);
1657 if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) {
1658 IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n");
1659 __set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags);
1660 mutex_unlock(&mvm->d0i3_suspend_mutex);
1661 return 0;
1662 }
1663 mutex_unlock(&mvm->d0i3_suspend_mutex);
1664
d6230972
EP
1665 ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL);
1666 if (ret)
37577fe2 1667 goto out;
d6230972
EP
1668
1669 ieee80211_iterate_active_interfaces_atomic(mvm->hw,
1670 IEEE80211_IFACE_ITER_NORMAL,
1671 iwl_mvm_exit_d0i3_iterator,
1672 mvm);
37577fe2
EP
1673out:
1674 schedule_work(&mvm->d0i3_exit_work);
1675 return ret;
b3370d47
EP
1676}
1677
6735943f 1678int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode)
d15a747f
EP
1679{
1680 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
1681
1682 iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK);
1683 return _iwl_mvm_exit_d0i3(mvm);
1684}
1685
0316d30e
JB
1686#define IWL_MVM_COMMON_OPS \
1687 /* these could be differentiated */ \
156f92f2 1688 .async_cb = iwl_mvm_async_cb, \
0316d30e
JB
1689 .queue_full = iwl_mvm_stop_sw_queue, \
1690 .queue_not_full = iwl_mvm_wake_sw_queue, \
1691 .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \
1692 .free_skb = iwl_mvm_free_skb, \
1693 .nic_error = iwl_mvm_nic_error, \
1694 .cmd_queue_full = iwl_mvm_cmd_queue_full, \
1695 .nic_config = iwl_mvm_nic_config, \
1696 .enter_d0i3 = iwl_mvm_enter_d0i3, \
1697 .exit_d0i3 = iwl_mvm_exit_d0i3, \
1698 /* as we only register one, these MUST be common! */ \
1699 .start = iwl_op_mode_mvm_start, \
1700 .stop = iwl_op_mode_mvm_stop
1701
8ca151b5 1702static const struct iwl_op_mode_ops iwl_mvm_ops = {
0316d30e
JB
1703 IWL_MVM_COMMON_OPS,
1704 .rx = iwl_mvm_rx,
1705};
1706
1707static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode,
1708 struct napi_struct *napi,
1709 struct iwl_rx_cmd_buffer *rxb,
1710 unsigned int queue)
1711{
1712 struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
585a6fcc 1713 struct iwl_rx_packet *pkt = rxb_addr(rxb);
61b0f5d7 1714 u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
0316d30e 1715
61b0f5d7 1716 if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)))
a338384b 1717 iwl_mvm_rx_frame_release(mvm, napi, rxb, queue);
61b0f5d7
JB
1718 else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
1719 RX_QUEUES_NOTIFICATION)))
94bb4481 1720 iwl_mvm_rx_queue_notif(mvm, rxb, queue);
61b0f5d7 1721 else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
585a6fcc 1722 iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue);
0316d30e
JB
1723}
1724
1725static const struct iwl_op_mode_ops iwl_mvm_ops_mq = {
1726 IWL_MVM_COMMON_OPS,
1727 .rx = iwl_mvm_rx_mq,
1728 .rx_rss = iwl_mvm_rx_mq_rss,
8ca151b5 1729};